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path: root/drivers/net/qlcnic/qlcnic_hdr.h
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Diffstat (limited to 'drivers/net/qlcnic/qlcnic_hdr.h')
-rw-r--r--drivers/net/qlcnic/qlcnic_hdr.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/net/qlcnic/qlcnic_hdr.h b/drivers/net/qlcnic/qlcnic_hdr.h
index 51fa3fbcf58a..8285a06eecdb 100644
--- a/drivers/net/qlcnic/qlcnic_hdr.h
+++ b/drivers/net/qlcnic/qlcnic_hdr.h
@@ -694,17 +694,18 @@ enum {
694#define QLCNIC_CRB_DRV_STATE (QLCNIC_CAM_RAM(0x144)) 694#define QLCNIC_CRB_DRV_STATE (QLCNIC_CAM_RAM(0x144))
695#define QLCNIC_CRB_DRV_SCRATCH (QLCNIC_CAM_RAM(0x148)) 695#define QLCNIC_CRB_DRV_SCRATCH (QLCNIC_CAM_RAM(0x148))
696#define QLCNIC_CRB_DEV_PARTITION_INFO (QLCNIC_CAM_RAM(0x14c)) 696#define QLCNIC_CRB_DEV_PARTITION_INFO (QLCNIC_CAM_RAM(0x14c))
697#define QLCNIC_CRB_DRV_IDC_VER (QLCNIC_CAM_RAM(0x14c)) 697#define QLCNIC_CRB_DRV_IDC_VER (QLCNIC_CAM_RAM(0x174))
698#define QLCNIC_ROM_DEV_INIT_TIMEOUT (0x3e885c) 698#define QLCNIC_ROM_DEV_INIT_TIMEOUT (0x3e885c)
699#define QLCNIC_ROM_DRV_RESET_TIMEOUT (0x3e8860) 699#define QLCNIC_ROM_DRV_RESET_TIMEOUT (0x3e8860)
700 700
701 /* Device State */ 701/* Device State */
702#define QLCNIC_DEV_COLD 1 702#define QLCNIC_DEV_COLD 0x1
703#define QLCNIC_DEV_INITALIZING 2 703#define QLCNIC_DEV_INITIALIZING 0x2
704#define QLCNIC_DEV_READY 3 704#define QLCNIC_DEV_READY 0x3
705#define QLCNIC_DEV_NEED_RESET 4 705#define QLCNIC_DEV_NEED_RESET 0x4
706#define QLCNIC_DEV_NEED_QUISCENT 5 706#define QLCNIC_DEV_NEED_QUISCENT 0x5
707#define QLCNIC_DEV_FAILED 6 707#define QLCNIC_DEV_FAILED 0x6
708#define QLCNIC_DEV_QUISCENT 0x7
708 709
709#define QLCNIC_RCODE_DRIVER_INFO 0x20000000 710#define QLCNIC_RCODE_DRIVER_INFO 0x20000000
710#define QLCNIC_RCODE_DRIVER_CAN_RELOAD 0x40000000 711#define QLCNIC_RCODE_DRIVER_CAN_RELOAD 0x40000000
@@ -712,9 +713,8 @@ enum {
712#define QLCNIC_FWERROR_PEGNUM(code) ((code) & 0xff) 713#define QLCNIC_FWERROR_PEGNUM(code) ((code) & 0xff)
713#define QLCNIC_FWERROR_CODE(code) ((code >> 8) & 0xfffff) 714#define QLCNIC_FWERROR_CODE(code) ((code >> 8) & 0xfffff)
714 715
715#define FW_POLL_DELAY (2 * HZ) 716#define FW_POLL_DELAY (1 * HZ)
716#define FW_FAIL_THRESH 3 717#define FW_FAIL_THRESH 2
717#define FW_POLL_THRESH 10
718 718
719#define ISR_MSI_INT_TRIGGER(FUNC) (QLCNIC_PCIX_PS_REG(PCIX_MSI_F(FUNC))) 719#define ISR_MSI_INT_TRIGGER(FUNC) (QLCNIC_PCIX_PS_REG(PCIX_MSI_F(FUNC)))
720#define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) 720#define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200)