5 files changed, 415 insertions, 3 deletions

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 6eb2d31d1e34..d55932acd887 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -53,7 +53,8 @@ config SMSC_PHY
 config BROADCOM_PHY
         tristate "Drivers for Broadcom PHYs"
         ---help---
-          Currently supports the BCM5411, BCM5421 and BCM5461 PHYs.
+          Currently supports the BCM5411, BCM5421, BCM5461, BCM5464, BCM5481
+          and BCM5482 PHYs.
 
 config ICPLUS_PHY
         tristate "Drivers for ICPlus PHYs"
@@ -83,4 +84,10 @@ config MDIO_BITBANG
 
           If in doubt, say N.
 
+config MDIO_OF_GPIO
+        tristate "Support for GPIO lib-based bitbanged MDIO buses"
+        depends on MDIO_BITBANG && OF_GPIO
+        ---help---
+          Supports GPIO lib-based MDIO busses.
+
 endif # PHYLIB
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 5997d6ef702b..eee329fa6f53 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_ICPLUS_PHY)	+= icplus.o
 obj-$(CONFIG_REALTEK_PHY)       += realtek.o
 obj-$(CONFIG_FIXED_PHY)         += fixed.o
 obj-$(CONFIG_MDIO_BITBANG)      += mdio-bitbang.o
+obj-$(CONFIG_MDIO_OF_GPIO)      += mdio-ofgpio.o
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index 60c5cfe96918..4b4dc98ad165 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -24,6 +24,12 @@
 #define MII_BCM54XX_ESR         0x11    /* BCM54xx extended status register */
 #define MII_BCM54XX_ESR_IS      0x1000  /* Interrupt status */
 
+#define MII_BCM54XX_EXP_DATA    0x15    /* Expansion register data */
+#define MII_BCM54XX_EXP_SEL     0x17    /* Expansion register select */
+#define MII_BCM54XX_EXP_SEL_SSD 0x0e00  /* Secondary SerDes select */
+#define MII_BCM54XX_EXP_SEL_ER  0x0f00  /* Expansion register select */
+
+#define MII_BCM54XX_AUX_CTL     0x18    /* Auxiliary control register */
 #define MII_BCM54XX_ISR         0x1a    /* BCM54xx interrupt status register */
 #define MII_BCM54XX_IMR         0x1b    /* BCM54xx interrupt mask register */
 #define MII_BCM54XX_INT_CRCERR  0x0001  /* CRC error */
@@ -42,10 +48,120 @@
 #define MII_BCM54XX_INT_MDIX    0x2000  /* MDIX status change */
 #define MII_BCM54XX_INT_PSERR   0x4000  /* Pair swap error */
 
+#define MII_BCM54XX_SHD         0x1c    /* 0x1c shadow registers */
+#define MII_BCM54XX_SHD_WRITE   0x8000
+#define MII_BCM54XX_SHD_VAL(x)  ((x & 0x1f) << 10)
+#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0)
+
+/*
+ * Broadcom LED source encodings.  These are used in BCM5461, BCM5481,
+ * BCM5482, and possibly some others.
+ */
+#define BCM_LED_SRC_LINKSPD1    0x0
+#define BCM_LED_SRC_LINKSPD2    0x1
+#define BCM_LED_SRC_XMITLED     0x2
+#define BCM_LED_SRC_ACTIVITYLED 0x3
+#define BCM_LED_SRC_FDXLED      0x4
+#define BCM_LED_SRC_SLAVE       0x5
+#define BCM_LED_SRC_INTR        0x6
+#define BCM_LED_SRC_QUALITY     0x7
+#define BCM_LED_SRC_RCVLED      0x8
+#define BCM_LED_SRC_MULTICOLOR1 0xa
+#define BCM_LED_SRC_OPENSHORT   0xb
+#define BCM_LED_SRC_OFF         0xe     /* Tied high */
+#define BCM_LED_SRC_ON          0xf     /* Tied low */
+
+/*
+ * BCM5482: Shadow registers
+ * Shadow values go into bits [14:10] of register 0x1c to select a shadow
+ * register to access.
+ */
+#define BCM5482_SHD_LEDS1       0x0d    /* 01101: LED Selector 1 */
+                                        /* LED3 / ~LINKSPD[2] selector */
+#define BCM5482_SHD_LEDS1_LED3(src)     ((src & 0xf) << 4)
+                                        /* LED1 / ~LINKSPD[1] selector */
+#define BCM5482_SHD_LEDS1_LED1(src)     ((src & 0xf) << 0)
+#define BCM5482_SHD_SSD         0x14    /* 10100: Secondary SerDes control */
+#define BCM5482_SHD_SSD_LEDM    0x0008  /* SSD LED Mode enable */
+#define BCM5482_SHD_SSD_EN      0x0001  /* SSD enable */
+#define BCM5482_SHD_MODE        0x1f    /* 11111: Mode Control Register */
+#define BCM5482_SHD_MODE_1000BX 0x0001  /* Enable 1000BASE-X registers */
+
+/*
+ * BCM5482: Secondary SerDes registers
+ */
+#define BCM5482_SSD_1000BX_CTL          0x00    /* 1000BASE-X Control */
+#define BCM5482_SSD_1000BX_CTL_PWRDOWN  0x0800  /* Power-down SSD */
+#define BCM5482_SSD_SGMII_SLAVE         0x15    /* SGMII Slave Register */
+#define BCM5482_SSD_SGMII_SLAVE_EN      0x0002  /* Slave mode enable */
+#define BCM5482_SSD_SGMII_SLAVE_AD      0x0001  /* Slave auto-detection */
+
+/*
+ * Device flags for PHYs that can be configured for different operating
+ * modes.
+ */
+#define PHY_BCM_FLAGS_VALID             0x80000000
+#define PHY_BCM_FLAGS_INTF_XAUI         0x00000020
+#define PHY_BCM_FLAGS_INTF_SGMII        0x00000010
+#define PHY_BCM_FLAGS_MODE_1000BX       0x00000002
+#define PHY_BCM_FLAGS_MODE_COPPER       0x00000001
+
 MODULE_DESCRIPTION("Broadcom PHY driver");
 MODULE_AUTHOR("Maciej W. Rozycki");
 MODULE_LICENSE("GPL");
 
+/*
+ * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T
+ * 0x1c shadow registers.
+ */
+static int bcm54xx_shadow_read(struct phy_device *phydev, u16 shadow)
+{
+        phy_write(phydev, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow));
+        return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD));
+}
+
+static int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow, u16 val)
+{
+        return phy_write(phydev, MII_BCM54XX_SHD,
+                         MII_BCM54XX_SHD_WRITE |
+                         MII_BCM54XX_SHD_VAL(shadow) |
+                         MII_BCM54XX_SHD_DATA(val));
+}
+
+/*
+ * Indirect register access functions for the Expansion Registers
+ * and Secondary SerDes registers (when sec_serdes=1).
+ */
+static int bcm54xx_exp_read(struct phy_device *phydev,
+                            int sec_serdes, u8 regnum)
+{
+        int val;
+
+        phy_write(phydev, MII_BCM54XX_EXP_SEL,
+                  (sec_serdes ? MII_BCM54XX_EXP_SEL_SSD :
+                                MII_BCM54XX_EXP_SEL_ER) |
+                  regnum);
+        val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+        phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
+
+        return val;
+}
+
+static int bcm54xx_exp_write(struct phy_device *phydev,
+                             int sec_serdes, u8 regnum, u16 val)
+{
+        int ret;
+
+        phy_write(phydev, MII_BCM54XX_EXP_SEL,
+                  (sec_serdes ? MII_BCM54XX_EXP_SEL_SSD :
+                                MII_BCM54XX_EXP_SEL_ER) |
+                  regnum);
+        ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+        phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
+
+        return ret;
+}
+
 static int bcm54xx_config_init(struct phy_device *phydev)
 {
         int reg, err;
@@ -70,6 +186,87 @@ static int bcm54xx_config_init(struct phy_device *phydev)
         return 0;
 }
 
+static int bcm5482_config_init(struct phy_device *phydev)
+{
+        int err, reg;
+
+        err = bcm54xx_config_init(phydev);
+
+        if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) {
+                /*
+                 * Enable secondary SerDes and its use as an LED source
+                 */
+                reg = bcm54xx_shadow_read(phydev, BCM5482_SHD_SSD);
+                bcm54xx_shadow_write(phydev, BCM5482_SHD_SSD,
+                                     reg |
+                                     BCM5482_SHD_SSD_LEDM |
+                                     BCM5482_SHD_SSD_EN);
+
+                /*
+                 * Enable SGMII slave mode and auto-detection
+                 */
+                reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_SGMII_SLAVE);
+                bcm54xx_exp_write(phydev, 1, BCM5482_SSD_SGMII_SLAVE,
+                                  reg |
+                                  BCM5482_SSD_SGMII_SLAVE_EN |
+                                  BCM5482_SSD_SGMII_SLAVE_AD);
+
+                /*
+                 * Disable secondary SerDes powerdown
+                 */
+                reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_1000BX_CTL);
+                bcm54xx_exp_write(phydev, 1, BCM5482_SSD_1000BX_CTL,
+                                  reg & ~BCM5482_SSD_1000BX_CTL_PWRDOWN);
+
+                /*
+                 * Select 1000BASE-X register set (primary SerDes)
+                 */
+                reg = bcm54xx_shadow_read(phydev, BCM5482_SHD_MODE);
+                bcm54xx_shadow_write(phydev, BCM5482_SHD_MODE,
+                                     reg | BCM5482_SHD_MODE_1000BX);
+
+                /*
+                 * LED1=ACTIVITYLED, LED3=LINKSPD[2]
+                 * (Use LED1 as secondary SerDes ACTIVITY LED)
+                 */
+                bcm54xx_shadow_write(phydev, BCM5482_SHD_LEDS1,
+                        BCM5482_SHD_LEDS1_LED1(BCM_LED_SRC_ACTIVITYLED) |
+                        BCM5482_SHD_LEDS1_LED3(BCM_LED_SRC_LINKSPD2));
+
+                /*
+                 * Auto-negotiation doesn't seem to work quite right
+                 * in this mode, so we disable it and force it to the
+                 * right speed/duplex setting.  Only 'link status'
+                 * is important.
+                 */
+                phydev->autoneg = AUTONEG_DISABLE;
+                phydev->speed = SPEED_1000;
+                phydev->duplex = DUPLEX_FULL;
+        }
+
+        return err;
+}
+
+static int bcm5482_read_status(struct phy_device *phydev)
+{
+        int err;
+
+        err = genphy_read_status(phydev);
+
+        if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) {
+                /*
+                 * Only link status matters for 1000Base-X mode, so force
+                 * 1000 Mbit/s full-duplex status
+                 */
+                if (phydev->link) {
+                        phydev->speed = SPEED_1000;
+                        phydev->duplex = DUPLEX_FULL;
+                }
+        }
+
+        return err;
+}
+
 static int bcm54xx_ack_interrupt(struct phy_device *phydev)
 {
         int reg;
@@ -210,9 +407,9 @@ static struct phy_driver bcm5482_driver = {
         .name           = "Broadcom BCM5482",
         .features       = PHY_GBIT_FEATURES,
         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
-        .config_init    = bcm54xx_config_init,
+        .config_init    = bcm5482_config_init,
         .config_aneg    = genphy_config_aneg,
-        .read_status    = genphy_read_status,
+        .read_status    = bcm5482_read_status,
         .ack_interrupt  = bcm54xx_ack_interrupt,
         .config_intr    = bcm54xx_config_intr,
         .driver         = { .owner = THIS_MODULE },
diff --git a/drivers/net/phy/mdio-bitbang.c b/drivers/net/phy/mdio-bitbang.c
index 2747b1f89ffe..c01b78013ddc 100644
--- a/drivers/net/phy/mdio-bitbang.c
+++ b/drivers/net/phy/mdio-bitbang.c
@@ -177,6 +177,7 @@ struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl)
 
         return bus;
 }
+EXPORT_SYMBOL(alloc_mdio_bitbang);
 
 void free_mdio_bitbang(struct mii_bus *bus)
 {
@@ -185,5 +186,6 @@ void free_mdio_bitbang(struct mii_bus *bus)
         module_put(ctrl->ops->owner);
         kfree(bus);
 }
+EXPORT_SYMBOL(free_mdio_bitbang);
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/net/phy/mdio-ofgpio.c b/drivers/net/phy/mdio-ofgpio.c
new file mode 100644
index 000000000000..7edfc0c34835
--- /dev/null
+++ b/drivers/net/phy/mdio-ofgpio.c
@@ -0,0 +1,205 @@
+/*
+ * OpenFirmware GPIO based MDIO bitbang driver.
+ *
+ * Copyright (c) 2008 CSE Semaphore Belgium.
+ *  by Laurent Pinchart <laurentp@cse-semaphore.com>
+ *
+ * Based on earlier work by
+ *
+ * Copyright (c) 2003 Intracom S.A.
+ *  by Pantelis Antoniou <panto@intracom.gr>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/mdio-bitbang.h>
+#include <linux/of_gpio.h>
+#include <linux/of_platform.h>
+
+struct mdio_gpio_info {
+        struct mdiobb_ctrl ctrl;
+        int mdc, mdio;
+};
+
+static void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
+{
+        struct mdio_gpio_info *bitbang =
+                container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+        if (dir)
+                gpio_direction_output(bitbang->mdio, 1);
+        else
+                gpio_direction_input(bitbang->mdio);
+}
+
+static int mdio_read(struct mdiobb_ctrl *ctrl)
+{
+        struct mdio_gpio_info *bitbang =
+                container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+        return gpio_get_value(bitbang->mdio);
+}
+
+static void mdio(struct mdiobb_ctrl *ctrl, int what)
+{
+        struct mdio_gpio_info *bitbang =
+                container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+        gpio_set_value(bitbang->mdio, what);
+}
+
+static void mdc(struct mdiobb_ctrl *ctrl, int what)
+{
+        struct mdio_gpio_info *bitbang =
+                container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+        gpio_set_value(bitbang->mdc, what);
+}
+
+static struct mdiobb_ops mdio_gpio_ops = {
+        .owner = THIS_MODULE,
+        .set_mdc = mdc,
+        .set_mdio_dir = mdio_dir,
+        .set_mdio_data = mdio,
+        .get_mdio_data = mdio_read,
+};
+
+static int __devinit mdio_ofgpio_bitbang_init(struct mii_bus *bus,
+                                         struct device_node *np)
+{
+        struct mdio_gpio_info *bitbang = bus->priv;
+
+        bitbang->mdc = of_get_gpio(np, 0);
+        bitbang->mdio = of_get_gpio(np, 1);
+
+        if (bitbang->mdc < 0 || bitbang->mdio < 0)
+                return -ENODEV;
+
+        snprintf(bus->id, MII_BUS_ID_SIZE, "%x", bitbang->mdc);
+        return 0;
+}
+
+static void __devinit add_phy(struct mii_bus *bus, struct device_node *np)
+{
+        const u32 *data;
+        int len, id, irq;
+
+        data = of_get_property(np, "reg", &len);
+        if (!data || len != 4)
+                return;
+
+        id = *data;
+        bus->phy_mask &= ~(1 << id);
+
+        irq = of_irq_to_resource(np, 0, NULL);
+        if (irq != NO_IRQ)
+                bus->irq[id] = irq;
+}
+
+static int __devinit mdio_ofgpio_probe(struct of_device *ofdev,
+                                        const struct of_device_id *match)
+{
+        struct device_node *np = NULL;
+        struct mii_bus *new_bus;
+        struct mdio_gpio_info *bitbang;
+        int ret = -ENOMEM;
+        int i;
+
+        bitbang = kzalloc(sizeof(struct mdio_gpio_info), GFP_KERNEL);
+        if (!bitbang)
+                goto out;
+
+        bitbang->ctrl.ops = &mdio_gpio_ops;
+
+        new_bus = alloc_mdio_bitbang(&bitbang->ctrl);
+        if (!new_bus)
+                goto out_free_priv;
+
+        new_bus->name = "GPIO Bitbanged MII",
+
+        ret = mdio_ofgpio_bitbang_init(new_bus, ofdev->node);
+        if (ret)
+                goto out_free_bus;
+
+        new_bus->phy_mask = ~0;
+        new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+        if (!new_bus->irq)
+                goto out_free_bus;
+
+        for (i = 0; i < PHY_MAX_ADDR; i++)
+                new_bus->irq[i] = -1;
+
+        while ((np = of_get_next_child(ofdev->node, np)))
+                if (!strcmp(np->type, "ethernet-phy"))
+                        add_phy(new_bus, np);
+
+        new_bus->dev = &ofdev->dev;
+        dev_set_drvdata(&ofdev->dev, new_bus);
+
+        ret = mdiobus_register(new_bus);
+        if (ret)
+                goto out_free_irqs;
+
+        return 0;
+
+out_free_irqs:
+        dev_set_drvdata(&ofdev->dev, NULL);
+        kfree(new_bus->irq);
+out_free_bus:
+        kfree(new_bus);
+out_free_priv:
+        free_mdio_bitbang(new_bus);
+out:
+        return ret;
+}
+
+static int mdio_ofgpio_remove(struct of_device *ofdev)
+{
+        struct mii_bus *bus = dev_get_drvdata(&ofdev->dev);
+        struct mdio_gpio_info *bitbang = bus->priv;
+
+        mdiobus_unregister(bus);
+        free_mdio_bitbang(bus);
+        dev_set_drvdata(&ofdev->dev, NULL);
+        kfree(bus->irq);
+        kfree(bitbang);
+        kfree(bus);
+
+        return 0;
+}
+
+static struct of_device_id mdio_ofgpio_match[] = {
+        {
+                .compatible = "virtual,mdio-gpio",
+        },
+        {},
+};
+
+static struct of_platform_driver mdio_ofgpio_driver = {
+        .name = "mdio-gpio",
+        .match_table = mdio_ofgpio_match,
+        .probe = mdio_ofgpio_probe,
+        .remove = mdio_ofgpio_remove,
+};
+
+static int mdio_ofgpio_init(void)
+{
+        return of_register_platform_driver(&mdio_ofgpio_driver);
+}
+
+static void mdio_ofgpio_exit(void)
+{
+        of_unregister_platform_driver(&mdio_ofgpio_driver);
+}
+
+module_init(mdio_ofgpio_init);
+module_exit(mdio_ofgpio_exit);