diff options
Diffstat (limited to 'drivers/net/mlx4')
-rw-r--r-- | drivers/net/mlx4/en_main.c | 19 | ||||
-rw-r--r-- | drivers/net/mlx4/en_rx.c | 8 | ||||
-rw-r--r-- | drivers/net/mlx4/fw.c | 3 | ||||
-rw-r--r-- | drivers/net/mlx4/fw.h | 1 | ||||
-rw-r--r-- | drivers/net/mlx4/main.c | 1 | ||||
-rw-r--r-- | drivers/net/mlx4/mlx4_en.h | 3 |
6 files changed, 24 insertions, 11 deletions
diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c index cacac4e966ee..143906417048 100644 --- a/drivers/net/mlx4/en_main.c +++ b/drivers/net/mlx4/en_main.c | |||
@@ -63,11 +63,12 @@ static const char mlx4_en_version[] = | |||
63 | */ | 63 | */ |
64 | 64 | ||
65 | 65 | ||
66 | /* Use a XOR rathern than Toeplitz hash function for RSS */ | 66 | /* Enable RSS TCP traffic */ |
67 | MLX4_EN_PARM_INT(rss_xor, 0, "Use XOR hash function for RSS"); | 67 | MLX4_EN_PARM_INT(tcp_rss, 1, |
68 | 68 | "Enable RSS for incomming TCP traffic or disabled (0)"); | |
69 | /* RSS hash type mask - default to <saddr, daddr, sport, dport> */ | 69 | /* Enable RSS UDP traffic */ |
70 | MLX4_EN_PARM_INT(rss_mask, 0xf, "RSS hash type bitmask"); | 70 | MLX4_EN_PARM_INT(udp_rss, 1, |
71 | "Enable RSS for incomming UDP traffic or disabled (0)"); | ||
71 | 72 | ||
72 | /* Priority pausing */ | 73 | /* Priority pausing */ |
73 | MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." | 74 | MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." |
@@ -103,8 +104,12 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) | |||
103 | struct mlx4_en_profile *params = &mdev->profile; | 104 | struct mlx4_en_profile *params = &mdev->profile; |
104 | int i; | 105 | int i; |
105 | 106 | ||
106 | params->rss_xor = (rss_xor != 0); | 107 | params->tcp_rss = tcp_rss; |
107 | params->rss_mask = rss_mask & 0x1f; | 108 | params->udp_rss = udp_rss; |
109 | if (params->udp_rss && !mdev->dev->caps.udp_rss) { | ||
110 | mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); | ||
111 | params->udp_rss = 0; | ||
112 | } | ||
108 | for (i = 1; i <= MLX4_MAX_PORTS; i++) { | 113 | for (i = 1; i <= MLX4_MAX_PORTS; i++) { |
109 | params->prof[i].rx_pause = 1; | 114 | params->prof[i].rx_pause = 1; |
110 | params->prof[i].rx_ppp = pfcrx; | 115 | params->prof[i].rx_ppp = pfcrx; |
diff --git a/drivers/net/mlx4/en_rx.c b/drivers/net/mlx4/en_rx.c index f421a3d42723..e2126c76d1dc 100644 --- a/drivers/net/mlx4/en_rx.c +++ b/drivers/net/mlx4/en_rx.c | |||
@@ -859,8 +859,7 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv) | |||
859 | struct mlx4_qp_context context; | 859 | struct mlx4_qp_context context; |
860 | struct mlx4_en_rss_context *rss_context; | 860 | struct mlx4_en_rss_context *rss_context; |
861 | void *ptr; | 861 | void *ptr; |
862 | int rss_xor = mdev->profile.rss_xor; | 862 | u8 rss_mask = 0x3f; |
863 | u8 rss_mask = mdev->profile.rss_mask; | ||
864 | int i, qpn; | 863 | int i, qpn; |
865 | int err = 0; | 864 | int err = 0; |
866 | int good_qps = 0; | 865 | int good_qps = 0; |
@@ -906,9 +905,10 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv) | |||
906 | rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 | | 905 | rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 | |
907 | (rss_map->base_qpn)); | 906 | (rss_map->base_qpn)); |
908 | rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn); | 907 | rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn); |
909 | rss_context->hash_fn = rss_xor & 0x3; | 908 | rss_context->flags = rss_mask; |
910 | rss_context->flags = rss_mask << 2; | ||
911 | 909 | ||
910 | if (priv->mdev->profile.udp_rss) | ||
911 | rss_context->base_qpn_udp = rss_context->default_qpn; | ||
912 | err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context, | 912 | err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context, |
913 | &rss_map->indir_qp, &rss_map->indir_state); | 913 | &rss_map->indir_qp, &rss_map->indir_state); |
914 | if (err) | 914 | if (err) |
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c index 515c6348f32b..b716e1a1b298 100644 --- a/drivers/net/mlx4/fw.c +++ b/drivers/net/mlx4/fw.c | |||
@@ -179,6 +179,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
179 | #define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b | 179 | #define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b |
180 | #define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c | 180 | #define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c |
181 | #define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f | 181 | #define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f |
182 | #define QUERY_DEV_CAP_UDP_RSS_OFFSET 0x42 | ||
182 | #define QUERY_DEV_CAP_ETH_UC_LOOPBACK_OFFSET 0x43 | 183 | #define QUERY_DEV_CAP_ETH_UC_LOOPBACK_OFFSET 0x43 |
183 | #define QUERY_DEV_CAP_FLAGS_OFFSET 0x44 | 184 | #define QUERY_DEV_CAP_FLAGS_OFFSET 0x44 |
184 | #define QUERY_DEV_CAP_RSVD_UAR_OFFSET 0x48 | 185 | #define QUERY_DEV_CAP_RSVD_UAR_OFFSET 0x48 |
@@ -270,6 +271,8 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
270 | dev_cap->max_msg_sz = 1 << (field & 0x1f); | 271 | dev_cap->max_msg_sz = 1 << (field & 0x1f); |
271 | MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET); | 272 | MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET); |
272 | dev_cap->stat_rate_support = stat_rate; | 273 | dev_cap->stat_rate_support = stat_rate; |
274 | MLX4_GET(field, outbox, QUERY_DEV_CAP_UDP_RSS_OFFSET); | ||
275 | dev_cap->udp_rss = field & 0x1; | ||
273 | MLX4_GET(field, outbox, QUERY_DEV_CAP_ETH_UC_LOOPBACK_OFFSET); | 276 | MLX4_GET(field, outbox, QUERY_DEV_CAP_ETH_UC_LOOPBACK_OFFSET); |
274 | dev_cap->loopback_support = field & 0x1; | 277 | dev_cap->loopback_support = field & 0x1; |
275 | MLX4_GET(dev_cap->flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET); | 278 | MLX4_GET(dev_cap->flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET); |
diff --git a/drivers/net/mlx4/fw.h b/drivers/net/mlx4/fw.h index 443e456c9dab..65cc72eb899d 100644 --- a/drivers/net/mlx4/fw.h +++ b/drivers/net/mlx4/fw.h | |||
@@ -78,6 +78,7 @@ struct mlx4_dev_cap { | |||
78 | u16 wavelength[MLX4_MAX_PORTS + 1]; | 78 | u16 wavelength[MLX4_MAX_PORTS + 1]; |
79 | u64 trans_code[MLX4_MAX_PORTS + 1]; | 79 | u64 trans_code[MLX4_MAX_PORTS + 1]; |
80 | u16 stat_rate_support; | 80 | u16 stat_rate_support; |
81 | int udp_rss; | ||
81 | int loopback_support; | 82 | int loopback_support; |
82 | u32 flags; | 83 | u32 flags; |
83 | int reserved_uars; | 84 | int reserved_uars; |
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index f4791fa2472f..569fa3df381f 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c | |||
@@ -225,6 +225,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
225 | dev->caps.bmme_flags = dev_cap->bmme_flags; | 225 | dev->caps.bmme_flags = dev_cap->bmme_flags; |
226 | dev->caps.reserved_lkey = dev_cap->reserved_lkey; | 226 | dev->caps.reserved_lkey = dev_cap->reserved_lkey; |
227 | dev->caps.stat_rate_support = dev_cap->stat_rate_support; | 227 | dev->caps.stat_rate_support = dev_cap->stat_rate_support; |
228 | dev->caps.udp_rss = dev_cap->udp_rss; | ||
228 | dev->caps.loopback_support = dev_cap->loopback_support; | 229 | dev->caps.loopback_support = dev_cap->loopback_support; |
229 | dev->caps.max_gso_sz = dev_cap->max_gso_sz; | 230 | dev->caps.max_gso_sz = dev_cap->max_gso_sz; |
230 | 231 | ||
diff --git a/drivers/net/mlx4/mlx4_en.h b/drivers/net/mlx4/mlx4_en.h index 5d8f097d7e06..4036a053ee32 100644 --- a/drivers/net/mlx4/mlx4_en.h +++ b/drivers/net/mlx4/mlx4_en.h | |||
@@ -318,6 +318,8 @@ struct mlx4_en_port_profile { | |||
318 | 318 | ||
319 | struct mlx4_en_profile { | 319 | struct mlx4_en_profile { |
320 | int rss_xor; | 320 | int rss_xor; |
321 | int tcp_rss; | ||
322 | int udp_rss; | ||
321 | u8 rss_mask; | 323 | u8 rss_mask; |
322 | u32 active_ports; | 324 | u32 active_ports; |
323 | u32 small_pkt_int; | 325 | u32 small_pkt_int; |
@@ -360,6 +362,7 @@ struct mlx4_en_rss_context { | |||
360 | u8 hash_fn; | 362 | u8 hash_fn; |
361 | u8 flags; | 363 | u8 flags; |
362 | __be32 rss_key[10]; | 364 | __be32 rss_key[10]; |
365 | __be32 base_qpn_udp; | ||
363 | }; | 366 | }; |
364 | 367 | ||
365 | struct mlx4_en_port_state { | 368 | struct mlx4_en_port_state { |