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path: root/drivers/net/mlx4/mlx4_en.h
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Diffstat (limited to 'drivers/net/mlx4/mlx4_en.h')
-rw-r--r--drivers/net/mlx4/mlx4_en.h64
1 files changed, 50 insertions, 14 deletions
diff --git a/drivers/net/mlx4/mlx4_en.h b/drivers/net/mlx4/mlx4_en.h
index 449210994ee9..0b5150df0585 100644
--- a/drivers/net/mlx4/mlx4_en.h
+++ b/drivers/net/mlx4/mlx4_en.h
@@ -38,19 +38,19 @@
38#include <linux/list.h> 38#include <linux/list.h>
39#include <linux/mutex.h> 39#include <linux/mutex.h>
40#include <linux/netdevice.h> 40#include <linux/netdevice.h>
41#include <linux/inet_lro.h>
42 41
43#include <linux/mlx4/device.h> 42#include <linux/mlx4/device.h>
44#include <linux/mlx4/qp.h> 43#include <linux/mlx4/qp.h>
45#include <linux/mlx4/cq.h> 44#include <linux/mlx4/cq.h>
46#include <linux/mlx4/srq.h> 45#include <linux/mlx4/srq.h>
47#include <linux/mlx4/doorbell.h> 46#include <linux/mlx4/doorbell.h>
47#include <linux/mlx4/cmd.h>
48 48
49#include "en_port.h" 49#include "en_port.h"
50 50
51#define DRV_NAME "mlx4_en" 51#define DRV_NAME "mlx4_en"
52#define DRV_VERSION "1.4.1.1" 52#define DRV_VERSION "1.5.4.1"
53#define DRV_RELDATE "June 2009" 53#define DRV_RELDATE "March 2011"
54 54
55#define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN) 55#define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN)
56 56
@@ -61,8 +61,8 @@
61 61
62#define MLX4_EN_PAGE_SHIFT 12 62#define MLX4_EN_PAGE_SHIFT 12
63#define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT) 63#define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT)
64#define MAX_TX_RINGS 16
65#define MAX_RX_RINGS 16 64#define MAX_RX_RINGS 16
65#define MIN_RX_RINGS 4
66#define TXBB_SIZE 64 66#define TXBB_SIZE 64
67#define HEADROOM (2048 / TXBB_SIZE + 1) 67#define HEADROOM (2048 / TXBB_SIZE + 1)
68#define STAMP_STRIDE 64 68#define STAMP_STRIDE 64
@@ -107,6 +107,7 @@ enum {
107#define MLX4_EN_SMALL_PKT_SIZE 64 107#define MLX4_EN_SMALL_PKT_SIZE 64
108#define MLX4_EN_NUM_TX_RINGS 8 108#define MLX4_EN_NUM_TX_RINGS 8
109#define MLX4_EN_NUM_PPP_RINGS 8 109#define MLX4_EN_NUM_PPP_RINGS 8
110#define MAX_TX_RINGS (MLX4_EN_NUM_TX_RINGS + MLX4_EN_NUM_PPP_RINGS)
110#define MLX4_EN_DEF_TX_RING_SIZE 512 111#define MLX4_EN_DEF_TX_RING_SIZE 512
111#define MLX4_EN_DEF_RX_RING_SIZE 1024 112#define MLX4_EN_DEF_RX_RING_SIZE 1024
112 113
@@ -124,6 +125,7 @@ enum {
124#define MLX4_EN_RX_SIZE_THRESH 1024 125#define MLX4_EN_RX_SIZE_THRESH 1024
125#define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH) 126#define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH)
126#define MLX4_EN_SAMPLE_INTERVAL 0 127#define MLX4_EN_SAMPLE_INTERVAL 0
128#define MLX4_EN_AVG_PKT_SMALL 256
127 129
128#define MLX4_EN_AUTO_CONF 0xffff 130#define MLX4_EN_AUTO_CONF 0xffff
129 131
@@ -139,10 +141,14 @@ enum {
139 141
140#define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN) 142#define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN)
141#define HEADER_COPY_SIZE (128 - NET_IP_ALIGN) 143#define HEADER_COPY_SIZE (128 - NET_IP_ALIGN)
144#define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETH_HLEN)
142 145
143#define MLX4_EN_MIN_MTU 46 146#define MLX4_EN_MIN_MTU 46
144#define ETH_BCAST 0xffffffffffffULL 147#define ETH_BCAST 0xffffffffffffULL
145 148
149#define MLX4_EN_LOOPBACK_RETRIES 5
150#define MLX4_EN_LOOPBACK_TIMEOUT 100
151
146#ifdef MLX4_EN_PERF_STAT 152#ifdef MLX4_EN_PERF_STAT
147/* Number of samples to 'average' */ 153/* Number of samples to 'average' */
148#define AVG_SIZE 128 154#define AVG_SIZE 128
@@ -210,6 +216,9 @@ struct mlx4_en_tx_desc {
210 216
211#define MLX4_EN_USE_SRQ 0x01000000 217#define MLX4_EN_USE_SRQ 0x01000000
212 218
219#define MLX4_EN_CX3_LOW_ID 0x1000
220#define MLX4_EN_CX3_HIGH_ID 0x1005
221
213struct mlx4_en_rx_alloc { 222struct mlx4_en_rx_alloc {
214 struct page *page; 223 struct page *page;
215 u16 offset; 224 u16 offset;
@@ -239,6 +248,8 @@ struct mlx4_en_tx_ring {
239 unsigned long bytes; 248 unsigned long bytes;
240 unsigned long packets; 249 unsigned long packets;
241 spinlock_t comp_lock; 250 spinlock_t comp_lock;
251 struct mlx4_bf bf;
252 bool bf_enabled;
242}; 253};
243 254
244struct mlx4_en_rx_desc { 255struct mlx4_en_rx_desc {
@@ -249,7 +260,6 @@ struct mlx4_en_rx_desc {
249struct mlx4_en_rx_ring { 260struct mlx4_en_rx_ring {
250 struct mlx4_hwq_resources wqres; 261 struct mlx4_hwq_resources wqres;
251 struct mlx4_en_rx_alloc page_alloc[MLX4_EN_MAX_RX_FRAGS]; 262 struct mlx4_en_rx_alloc page_alloc[MLX4_EN_MAX_RX_FRAGS];
252 struct net_lro_mgr lro;
253 u32 size ; /* number of Rx descs*/ 263 u32 size ; /* number of Rx descs*/
254 u32 actual_size; 264 u32 actual_size;
255 u32 size_mask; 265 u32 size_mask;
@@ -313,7 +323,8 @@ struct mlx4_en_port_profile {
313 323
314struct mlx4_en_profile { 324struct mlx4_en_profile {
315 int rss_xor; 325 int rss_xor;
316 int num_lro; 326 int tcp_rss;
327 int udp_rss;
317 u8 rss_mask; 328 u8 rss_mask;
318 u32 active_ports; 329 u32 active_ports;
319 u32 small_pkt_int; 330 u32 small_pkt_int;
@@ -337,6 +348,7 @@ struct mlx4_en_dev {
337 struct mlx4_mr mr; 348 struct mlx4_mr mr;
338 u32 priv_pdn; 349 u32 priv_pdn;
339 spinlock_t uar_lock; 350 spinlock_t uar_lock;
351 u8 mac_removed[MLX4_MAX_PORTS + 1];
340}; 352};
341 353
342 354
@@ -355,6 +367,13 @@ struct mlx4_en_rss_context {
355 u8 hash_fn; 367 u8 hash_fn;
356 u8 flags; 368 u8 flags;
357 __be32 rss_key[10]; 369 __be32 rss_key[10];
370 __be32 base_qpn_udp;
371};
372
373struct mlx4_en_port_state {
374 int link_state;
375 int link_speed;
376 int transciver;
358}; 377};
359 378
360struct mlx4_en_pkt_stats { 379struct mlx4_en_pkt_stats {
@@ -365,9 +384,6 @@ struct mlx4_en_pkt_stats {
365}; 384};
366 385
367struct mlx4_en_port_stats { 386struct mlx4_en_port_stats {
368 unsigned long lro_aggregated;
369 unsigned long lro_flushed;
370 unsigned long lro_no_desc;
371 unsigned long tso_packets; 387 unsigned long tso_packets;
372 unsigned long queue_stopped; 388 unsigned long queue_stopped;
373 unsigned long wake_queue; 389 unsigned long wake_queue;
@@ -376,7 +392,7 @@ struct mlx4_en_port_stats {
376 unsigned long rx_chksum_good; 392 unsigned long rx_chksum_good;
377 unsigned long rx_chksum_none; 393 unsigned long rx_chksum_none;
378 unsigned long tx_chksum_offload; 394 unsigned long tx_chksum_offload;
379#define NUM_PORT_STATS 11 395#define NUM_PORT_STATS 8
380}; 396};
381 397
382struct mlx4_en_perf_stats { 398struct mlx4_en_perf_stats {
@@ -405,6 +421,7 @@ struct mlx4_en_priv {
405 struct vlan_group *vlgrp; 421 struct vlan_group *vlgrp;
406 struct net_device_stats stats; 422 struct net_device_stats stats;
407 struct net_device_stats ret_stats; 423 struct net_device_stats ret_stats;
424 struct mlx4_en_port_state port_state;
408 spinlock_t stats_lock; 425 spinlock_t stats_lock;
409 426
410 unsigned long last_moder_packets; 427 unsigned long last_moder_packets;
@@ -423,6 +440,8 @@ struct mlx4_en_priv {
423 u16 sample_interval; 440 u16 sample_interval;
424 u16 adaptive_rx_coal; 441 u16 adaptive_rx_coal;
425 u32 msg_enable; 442 u32 msg_enable;
443 u32 loopback_ok;
444 u32 validate_loopback;
426 445
427 struct mlx4_hwq_resources res; 446 struct mlx4_hwq_resources res;
428 int link_state; 447 int link_state;
@@ -432,7 +451,6 @@ struct mlx4_en_priv {
432 int registered; 451 int registered;
433 int allocated; 452 int allocated;
434 int stride; 453 int stride;
435 int rx_csum;
436 u64 mac; 454 u64 mac;
437 int mac_index; 455 int mac_index;
438 unsigned max_mtu; 456 unsigned max_mtu;
@@ -441,6 +459,7 @@ struct mlx4_en_priv {
441 struct mlx4_en_rss_map rss_map; 459 struct mlx4_en_rss_map rss_map;
442 u32 flags; 460 u32 flags;
443#define MLX4_EN_FLAG_PROMISC 0x1 461#define MLX4_EN_FLAG_PROMISC 0x1
462#define MLX4_EN_FLAG_MC_PROMISC 0x2
444 u32 tx_ring_num; 463 u32 tx_ring_num;
445 u32 rx_ring_num; 464 u32 rx_ring_num;
446 u32 rx_skb_size; 465 u32 rx_skb_size;
@@ -449,6 +468,7 @@ struct mlx4_en_priv {
449 u16 log_rx_info; 468 u16 log_rx_info;
450 469
451 struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS]; 470 struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS];
471 int tx_vector;
452 struct mlx4_en_rx_ring rx_ring[MAX_RX_RINGS]; 472 struct mlx4_en_rx_ring rx_ring[MAX_RX_RINGS];
453 struct mlx4_en_cq tx_cq[MAX_TX_RINGS]; 473 struct mlx4_en_cq tx_cq[MAX_TX_RINGS];
454 struct mlx4_en_cq rx_cq[MAX_RX_RINGS]; 474 struct mlx4_en_cq rx_cq[MAX_RX_RINGS];
@@ -463,6 +483,14 @@ struct mlx4_en_priv {
463 char *mc_addrs; 483 char *mc_addrs;
464 int mc_addrs_cnt; 484 int mc_addrs_cnt;
465 struct mlx4_en_stat_out_mbox hw_stats; 485 struct mlx4_en_stat_out_mbox hw_stats;
486 int vids[128];
487 bool wol;
488};
489
490enum mlx4_en_wol {
491 MLX4_EN_WOL_MAGIC = (1ULL << 61),
492 MLX4_EN_WOL_ENABLED = (1ULL << 62),
493 MLX4_EN_WOL_DO_MODIFY = (1ULL << 63),
466}; 494};
467 495
468 496
@@ -473,12 +501,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
473int mlx4_en_start_port(struct net_device *dev); 501int mlx4_en_start_port(struct net_device *dev);
474void mlx4_en_stop_port(struct net_device *dev); 502void mlx4_en_stop_port(struct net_device *dev);
475 503
476void mlx4_en_free_resources(struct mlx4_en_priv *priv); 504void mlx4_en_free_resources(struct mlx4_en_priv *priv, bool reserve_vectors);
477int mlx4_en_alloc_resources(struct mlx4_en_priv *priv); 505int mlx4_en_alloc_resources(struct mlx4_en_priv *priv);
478 506
479int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, 507int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
480 int entries, int ring, enum cq_type mode); 508 int entries, int ring, enum cq_type mode);
481void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 509void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
510 bool reserve_vectors);
482int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 511int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
483void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 512void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
484int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 513int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
@@ -490,7 +519,7 @@ u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb);
490netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev); 519netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev);
491 520
492int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring, 521int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring,
493 u32 size, u16 stride); 522 int qpn, u32 size, u16 stride);
494void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring); 523void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring);
495int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, 524int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
496 struct mlx4_en_tx_ring *ring, 525 struct mlx4_en_tx_ring *ring,
@@ -531,6 +560,11 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
531 u8 promisc); 560 u8 promisc);
532 561
533int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset); 562int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);
563int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
564
565#define MLX4_EN_NUM_SELF_TEST 5
566void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
567u64 mlx4_en_mac_to_u64(u8 *addr);
534 568
535/* 569/*
536 * Globals 570 * Globals
@@ -555,6 +589,8 @@ do { \
555 en_print(KERN_WARNING, priv, format, ##arg) 589 en_print(KERN_WARNING, priv, format, ##arg)
556#define en_err(priv, format, arg...) \ 590#define en_err(priv, format, arg...) \
557 en_print(KERN_ERR, priv, format, ##arg) 591 en_print(KERN_ERR, priv, format, ##arg)
592#define en_info(priv, format, arg...) \
593 en_print(KERN_INFO, priv, format, ## arg)
558 594
559#define mlx4_err(mdev, format, arg...) \ 595#define mlx4_err(mdev, format, arg...) \
560 pr_err("%s %s: " format, DRV_NAME, \ 596 pr_err("%s %s: " format, DRV_NAME, \