diff options
Diffstat (limited to 'drivers/net/mlx4/main.c')
-rw-r--r-- | drivers/net/mlx4/main.c | 154 |
1 files changed, 147 insertions, 7 deletions
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index 5102ab1ac561..3814fc9b1145 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <linux/pci.h> | 39 | #include <linux/pci.h> |
40 | #include <linux/dma-mapping.h> | 40 | #include <linux/dma-mapping.h> |
41 | #include <linux/slab.h> | 41 | #include <linux/slab.h> |
42 | #include <linux/io-mapping.h> | ||
42 | 43 | ||
43 | #include <linux/mlx4/device.h> | 44 | #include <linux/mlx4/device.h> |
44 | #include <linux/mlx4/doorbell.h> | 45 | #include <linux/mlx4/doorbell.h> |
@@ -103,7 +104,7 @@ MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports " | |||
103 | 104 | ||
104 | static int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG); | 105 | static int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG); |
105 | module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); | 106 | module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); |
106 | MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)"); | 107 | MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)"); |
107 | 108 | ||
108 | int mlx4_check_port_params(struct mlx4_dev *dev, | 109 | int mlx4_check_port_params(struct mlx4_dev *dev, |
109 | enum mlx4_port_type *port_type) | 110 | enum mlx4_port_type *port_type) |
@@ -184,6 +185,10 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
184 | dev->caps.eth_mtu_cap[i] = dev_cap->eth_mtu[i]; | 185 | dev->caps.eth_mtu_cap[i] = dev_cap->eth_mtu[i]; |
185 | dev->caps.def_mac[i] = dev_cap->def_mac[i]; | 186 | dev->caps.def_mac[i] = dev_cap->def_mac[i]; |
186 | dev->caps.supported_type[i] = dev_cap->supported_port_types[i]; | 187 | dev->caps.supported_type[i] = dev_cap->supported_port_types[i]; |
188 | dev->caps.trans_type[i] = dev_cap->trans_type[i]; | ||
189 | dev->caps.vendor_oui[i] = dev_cap->vendor_oui[i]; | ||
190 | dev->caps.wavelength[i] = dev_cap->wavelength[i]; | ||
191 | dev->caps.trans_code[i] = dev_cap->trans_code[i]; | ||
187 | } | 192 | } |
188 | 193 | ||
189 | dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; | 194 | dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; |
@@ -221,6 +226,11 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
221 | dev->caps.bmme_flags = dev_cap->bmme_flags; | 226 | dev->caps.bmme_flags = dev_cap->bmme_flags; |
222 | dev->caps.reserved_lkey = dev_cap->reserved_lkey; | 227 | dev->caps.reserved_lkey = dev_cap->reserved_lkey; |
223 | dev->caps.stat_rate_support = dev_cap->stat_rate_support; | 228 | dev->caps.stat_rate_support = dev_cap->stat_rate_support; |
229 | dev->caps.udp_rss = dev_cap->udp_rss; | ||
230 | dev->caps.loopback_support = dev_cap->loopback_support; | ||
231 | dev->caps.vep_uc_steering = dev_cap->vep_uc_steering; | ||
232 | dev->caps.vep_mc_steering = dev_cap->vep_mc_steering; | ||
233 | dev->caps.wol = dev_cap->wol; | ||
224 | dev->caps.max_gso_sz = dev_cap->max_gso_sz; | 234 | dev->caps.max_gso_sz = dev_cap->max_gso_sz; |
225 | 235 | ||
226 | dev->caps.log_num_macs = log_num_mac; | 236 | dev->caps.log_num_macs = log_num_mac; |
@@ -712,8 +722,31 @@ static void mlx4_free_icms(struct mlx4_dev *dev) | |||
712 | mlx4_free_icm(dev, priv->fw.aux_icm, 0); | 722 | mlx4_free_icm(dev, priv->fw.aux_icm, 0); |
713 | } | 723 | } |
714 | 724 | ||
725 | static int map_bf_area(struct mlx4_dev *dev) | ||
726 | { | ||
727 | struct mlx4_priv *priv = mlx4_priv(dev); | ||
728 | resource_size_t bf_start; | ||
729 | resource_size_t bf_len; | ||
730 | int err = 0; | ||
731 | |||
732 | bf_start = pci_resource_start(dev->pdev, 2) + (dev->caps.num_uars << PAGE_SHIFT); | ||
733 | bf_len = pci_resource_len(dev->pdev, 2) - (dev->caps.num_uars << PAGE_SHIFT); | ||
734 | priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len); | ||
735 | if (!priv->bf_mapping) | ||
736 | err = -ENOMEM; | ||
737 | |||
738 | return err; | ||
739 | } | ||
740 | |||
741 | static void unmap_bf_area(struct mlx4_dev *dev) | ||
742 | { | ||
743 | if (mlx4_priv(dev)->bf_mapping) | ||
744 | io_mapping_free(mlx4_priv(dev)->bf_mapping); | ||
745 | } | ||
746 | |||
715 | static void mlx4_close_hca(struct mlx4_dev *dev) | 747 | static void mlx4_close_hca(struct mlx4_dev *dev) |
716 | { | 748 | { |
749 | unmap_bf_area(dev); | ||
717 | mlx4_CLOSE_HCA(dev, 0); | 750 | mlx4_CLOSE_HCA(dev, 0); |
718 | mlx4_free_icms(dev); | 751 | mlx4_free_icms(dev); |
719 | mlx4_UNMAP_FA(dev); | 752 | mlx4_UNMAP_FA(dev); |
@@ -766,6 +799,9 @@ static int mlx4_init_hca(struct mlx4_dev *dev) | |||
766 | goto err_stop_fw; | 799 | goto err_stop_fw; |
767 | } | 800 | } |
768 | 801 | ||
802 | if (map_bf_area(dev)) | ||
803 | mlx4_dbg(dev, "Failed to map blue flame area\n"); | ||
804 | |||
769 | init_hca.log_uar_sz = ilog2(dev->caps.num_uars); | 805 | init_hca.log_uar_sz = ilog2(dev->caps.num_uars); |
770 | 806 | ||
771 | err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size); | 807 | err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size); |
@@ -796,6 +832,7 @@ err_free_icm: | |||
796 | mlx4_free_icms(dev); | 832 | mlx4_free_icms(dev); |
797 | 833 | ||
798 | err_stop_fw: | 834 | err_stop_fw: |
835 | unmap_bf_area(dev); | ||
799 | mlx4_UNMAP_FA(dev); | 836 | mlx4_UNMAP_FA(dev); |
800 | mlx4_free_icm(dev, priv->fw.fw_icm, 0); | 837 | mlx4_free_icm(dev, priv->fw.fw_icm, 0); |
801 | 838 | ||
@@ -823,7 +860,7 @@ static int mlx4_setup_hca(struct mlx4_dev *dev) | |||
823 | goto err_uar_table_free; | 860 | goto err_uar_table_free; |
824 | } | 861 | } |
825 | 862 | ||
826 | priv->kar = ioremap(priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); | 863 | priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); |
827 | if (!priv->kar) { | 864 | if (!priv->kar) { |
828 | mlx4_err(dev, "Couldn't map kernel access region, " | 865 | mlx4_err(dev, "Couldn't map kernel access region, " |
829 | "aborting.\n"); | 866 | "aborting.\n"); |
@@ -907,6 +944,10 @@ static int mlx4_setup_hca(struct mlx4_dev *dev) | |||
907 | } | 944 | } |
908 | 945 | ||
909 | for (port = 1; port <= dev->caps.num_ports; port++) { | 946 | for (port = 1; port <= dev->caps.num_ports; port++) { |
947 | enum mlx4_port_type port_type = 0; | ||
948 | mlx4_SENSE_PORT(dev, port, &port_type); | ||
949 | if (port_type) | ||
950 | dev->caps.port_type[port] = port_type; | ||
910 | ib_port_default_caps = 0; | 951 | ib_port_default_caps = 0; |
911 | err = mlx4_get_port_ib_caps(dev, port, &ib_port_default_caps); | 952 | err = mlx4_get_port_ib_caps(dev, port, &ib_port_default_caps); |
912 | if (err) | 953 | if (err) |
@@ -921,6 +962,7 @@ static int mlx4_setup_hca(struct mlx4_dev *dev) | |||
921 | goto err_mcg_table_free; | 962 | goto err_mcg_table_free; |
922 | } | 963 | } |
923 | } | 964 | } |
965 | mlx4_set_port_mask(dev); | ||
924 | 966 | ||
925 | return 0; | 967 | return 0; |
926 | 968 | ||
@@ -963,13 +1005,15 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev) | |||
963 | { | 1005 | { |
964 | struct mlx4_priv *priv = mlx4_priv(dev); | 1006 | struct mlx4_priv *priv = mlx4_priv(dev); |
965 | struct msix_entry *entries; | 1007 | struct msix_entry *entries; |
966 | int nreq; | 1008 | int nreq = min_t(int, dev->caps.num_ports * |
1009 | min_t(int, num_online_cpus() + 1, MAX_MSIX_P_PORT) | ||
1010 | + MSIX_LEGACY_SZ, MAX_MSIX); | ||
967 | int err; | 1011 | int err; |
968 | int i; | 1012 | int i; |
969 | 1013 | ||
970 | if (msi_x) { | 1014 | if (msi_x) { |
971 | nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs, | 1015 | nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs, |
972 | num_possible_cpus() + 1); | 1016 | nreq); |
973 | entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL); | 1017 | entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL); |
974 | if (!entries) | 1018 | if (!entries) |
975 | goto no_msi; | 1019 | goto no_msi; |
@@ -992,7 +1036,15 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev) | |||
992 | goto no_msi; | 1036 | goto no_msi; |
993 | } | 1037 | } |
994 | 1038 | ||
995 | dev->caps.num_comp_vectors = nreq - 1; | 1039 | if (nreq < |
1040 | MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) { | ||
1041 | /*Working in legacy mode , all EQ's shared*/ | ||
1042 | dev->caps.comp_pool = 0; | ||
1043 | dev->caps.num_comp_vectors = nreq - 1; | ||
1044 | } else { | ||
1045 | dev->caps.comp_pool = nreq - MSIX_LEGACY_SZ; | ||
1046 | dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1; | ||
1047 | } | ||
996 | for (i = 0; i < nreq; ++i) | 1048 | for (i = 0; i < nreq; ++i) |
997 | priv->eq_table.eq[i].irq = entries[i].vector; | 1049 | priv->eq_table.eq[i].irq = entries[i].vector; |
998 | 1050 | ||
@@ -1004,6 +1056,7 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev) | |||
1004 | 1056 | ||
1005 | no_msi: | 1057 | no_msi: |
1006 | dev->caps.num_comp_vectors = 1; | 1058 | dev->caps.num_comp_vectors = 1; |
1059 | dev->caps.comp_pool = 0; | ||
1007 | 1060 | ||
1008 | for (i = 0; i < 2; ++i) | 1061 | for (i = 0; i < 2; ++i) |
1009 | priv->eq_table.eq[i].irq = dev->pdev->irq; | 1062 | priv->eq_table.eq[i].irq = dev->pdev->irq; |
@@ -1043,6 +1096,59 @@ static void mlx4_cleanup_port_info(struct mlx4_port_info *info) | |||
1043 | device_remove_file(&info->dev->pdev->dev, &info->port_attr); | 1096 | device_remove_file(&info->dev->pdev->dev, &info->port_attr); |
1044 | } | 1097 | } |
1045 | 1098 | ||
1099 | static int mlx4_init_steering(struct mlx4_dev *dev) | ||
1100 | { | ||
1101 | struct mlx4_priv *priv = mlx4_priv(dev); | ||
1102 | int num_entries = dev->caps.num_ports; | ||
1103 | int i, j; | ||
1104 | |||
1105 | priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL); | ||
1106 | if (!priv->steer) | ||
1107 | return -ENOMEM; | ||
1108 | |||
1109 | for (i = 0; i < num_entries; i++) { | ||
1110 | for (j = 0; j < MLX4_NUM_STEERS; j++) { | ||
1111 | INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]); | ||
1112 | INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]); | ||
1113 | } | ||
1114 | INIT_LIST_HEAD(&priv->steer[i].high_prios); | ||
1115 | } | ||
1116 | return 0; | ||
1117 | } | ||
1118 | |||
1119 | static void mlx4_clear_steering(struct mlx4_dev *dev) | ||
1120 | { | ||
1121 | struct mlx4_priv *priv = mlx4_priv(dev); | ||
1122 | struct mlx4_steer_index *entry, *tmp_entry; | ||
1123 | struct mlx4_promisc_qp *pqp, *tmp_pqp; | ||
1124 | int num_entries = dev->caps.num_ports; | ||
1125 | int i, j; | ||
1126 | |||
1127 | for (i = 0; i < num_entries; i++) { | ||
1128 | for (j = 0; j < MLX4_NUM_STEERS; j++) { | ||
1129 | list_for_each_entry_safe(pqp, tmp_pqp, | ||
1130 | &priv->steer[i].promisc_qps[j], | ||
1131 | list) { | ||
1132 | list_del(&pqp->list); | ||
1133 | kfree(pqp); | ||
1134 | } | ||
1135 | list_for_each_entry_safe(entry, tmp_entry, | ||
1136 | &priv->steer[i].steer_entries[j], | ||
1137 | list) { | ||
1138 | list_del(&entry->list); | ||
1139 | list_for_each_entry_safe(pqp, tmp_pqp, | ||
1140 | &entry->duplicates, | ||
1141 | list) { | ||
1142 | list_del(&pqp->list); | ||
1143 | kfree(pqp); | ||
1144 | } | ||
1145 | kfree(entry); | ||
1146 | } | ||
1147 | } | ||
1148 | } | ||
1149 | kfree(priv->steer); | ||
1150 | } | ||
1151 | |||
1046 | static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | 1152 | static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
1047 | { | 1153 | { |
1048 | struct mlx4_priv *priv; | 1154 | struct mlx4_priv *priv; |
@@ -1103,6 +1209,9 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1103 | } | 1209 | } |
1104 | } | 1210 | } |
1105 | 1211 | ||
1212 | /* Allow large DMA segments, up to the firmware limit of 1 GB */ | ||
1213 | dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); | ||
1214 | |||
1106 | priv = kzalloc(sizeof *priv, GFP_KERNEL); | 1215 | priv = kzalloc(sizeof *priv, GFP_KERNEL); |
1107 | if (!priv) { | 1216 | if (!priv) { |
1108 | dev_err(&pdev->dev, "Device struct alloc failed, " | 1217 | dev_err(&pdev->dev, "Device struct alloc failed, " |
@@ -1121,6 +1230,11 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1121 | INIT_LIST_HEAD(&priv->pgdir_list); | 1230 | INIT_LIST_HEAD(&priv->pgdir_list); |
1122 | mutex_init(&priv->pgdir_mutex); | 1231 | mutex_init(&priv->pgdir_mutex); |
1123 | 1232 | ||
1233 | pci_read_config_byte(pdev, PCI_REVISION_ID, &dev->rev_id); | ||
1234 | |||
1235 | INIT_LIST_HEAD(&priv->bf_list); | ||
1236 | mutex_init(&priv->bf_mutex); | ||
1237 | |||
1124 | /* | 1238 | /* |
1125 | * Now reset the HCA before we touch the PCI capabilities or | 1239 | * Now reset the HCA before we touch the PCI capabilities or |
1126 | * attempt a firmware command, since a boot ROM may have left | 1240 | * attempt a firmware command, since a boot ROM may have left |
@@ -1145,8 +1259,15 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1145 | if (err) | 1259 | if (err) |
1146 | goto err_close; | 1260 | goto err_close; |
1147 | 1261 | ||
1262 | priv->msix_ctl.pool_bm = 0; | ||
1263 | spin_lock_init(&priv->msix_ctl.pool_lock); | ||
1264 | |||
1148 | mlx4_enable_msi_x(dev); | 1265 | mlx4_enable_msi_x(dev); |
1149 | 1266 | ||
1267 | err = mlx4_init_steering(dev); | ||
1268 | if (err) | ||
1269 | goto err_free_eq; | ||
1270 | |||
1150 | err = mlx4_setup_hca(dev); | 1271 | err = mlx4_setup_hca(dev); |
1151 | if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) { | 1272 | if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) { |
1152 | dev->flags &= ~MLX4_FLAG_MSI_X; | 1273 | dev->flags &= ~MLX4_FLAG_MSI_X; |
@@ -1155,7 +1276,7 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1155 | } | 1276 | } |
1156 | 1277 | ||
1157 | if (err) | 1278 | if (err) |
1158 | goto err_free_eq; | 1279 | goto err_steer; |
1159 | 1280 | ||
1160 | for (port = 1; port <= dev->caps.num_ports; port++) { | 1281 | for (port = 1; port <= dev->caps.num_ports; port++) { |
1161 | err = mlx4_init_port_info(dev, port); | 1282 | err = mlx4_init_port_info(dev, port); |
@@ -1188,6 +1309,9 @@ err_port: | |||
1188 | mlx4_cleanup_pd_table(dev); | 1309 | mlx4_cleanup_pd_table(dev); |
1189 | mlx4_cleanup_uar_table(dev); | 1310 | mlx4_cleanup_uar_table(dev); |
1190 | 1311 | ||
1312 | err_steer: | ||
1313 | mlx4_clear_steering(dev); | ||
1314 | |||
1191 | err_free_eq: | 1315 | err_free_eq: |
1192 | mlx4_free_eq_table(dev); | 1316 | mlx4_free_eq_table(dev); |
1193 | 1317 | ||
@@ -1247,6 +1371,7 @@ static void mlx4_remove_one(struct pci_dev *pdev) | |||
1247 | iounmap(priv->kar); | 1371 | iounmap(priv->kar); |
1248 | mlx4_uar_free(dev, &priv->driver_uar); | 1372 | mlx4_uar_free(dev, &priv->driver_uar); |
1249 | mlx4_cleanup_uar_table(dev); | 1373 | mlx4_cleanup_uar_table(dev); |
1374 | mlx4_clear_steering(dev); | ||
1250 | mlx4_free_eq_table(dev); | 1375 | mlx4_free_eq_table(dev); |
1251 | mlx4_close_hca(dev); | 1376 | mlx4_close_hca(dev); |
1252 | mlx4_cmd_cleanup(dev); | 1377 | mlx4_cmd_cleanup(dev); |
@@ -1280,6 +1405,21 @@ static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = { | |||
1280 | { PCI_VDEVICE(MELLANOX, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/ | 1405 | { PCI_VDEVICE(MELLANOX, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/ |
1281 | { PCI_VDEVICE(MELLANOX, 0x6746) }, /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */ | 1406 | { PCI_VDEVICE(MELLANOX, 0x6746) }, /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */ |
1282 | { PCI_VDEVICE(MELLANOX, 0x676e) }, /* MT26478 ConnectX2 40GigE PCIe gen2 */ | 1407 | { PCI_VDEVICE(MELLANOX, 0x676e) }, /* MT26478 ConnectX2 40GigE PCIe gen2 */ |
1408 | { PCI_VDEVICE(MELLANOX, 0x1002) }, /* MT25400 Family [ConnectX-2 Virtual Function] */ | ||
1409 | { PCI_VDEVICE(MELLANOX, 0x1003) }, /* MT27500 Family [ConnectX-3] */ | ||
1410 | { PCI_VDEVICE(MELLANOX, 0x1004) }, /* MT27500 Family [ConnectX-3 Virtual Function] */ | ||
1411 | { PCI_VDEVICE(MELLANOX, 0x1005) }, /* MT27510 Family */ | ||
1412 | { PCI_VDEVICE(MELLANOX, 0x1006) }, /* MT27511 Family */ | ||
1413 | { PCI_VDEVICE(MELLANOX, 0x1007) }, /* MT27520 Family */ | ||
1414 | { PCI_VDEVICE(MELLANOX, 0x1008) }, /* MT27521 Family */ | ||
1415 | { PCI_VDEVICE(MELLANOX, 0x1009) }, /* MT27530 Family */ | ||
1416 | { PCI_VDEVICE(MELLANOX, 0x100a) }, /* MT27531 Family */ | ||
1417 | { PCI_VDEVICE(MELLANOX, 0x100b) }, /* MT27540 Family */ | ||
1418 | { PCI_VDEVICE(MELLANOX, 0x100c) }, /* MT27541 Family */ | ||
1419 | { PCI_VDEVICE(MELLANOX, 0x100d) }, /* MT27550 Family */ | ||
1420 | { PCI_VDEVICE(MELLANOX, 0x100e) }, /* MT27551 Family */ | ||
1421 | { PCI_VDEVICE(MELLANOX, 0x100f) }, /* MT27560 Family */ | ||
1422 | { PCI_VDEVICE(MELLANOX, 0x1010) }, /* MT27561 Family */ | ||
1283 | { 0, } | 1423 | { 0, } |
1284 | }; | 1424 | }; |
1285 | 1425 | ||
@@ -1304,7 +1444,7 @@ static int __init mlx4_verify_params(void) | |||
1304 | return -1; | 1444 | return -1; |
1305 | } | 1445 | } |
1306 | 1446 | ||
1307 | if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) { | 1447 | if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) { |
1308 | pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); | 1448 | pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); |
1309 | return -1; | 1449 | return -1; |
1310 | } | 1450 | } |