diff options
Diffstat (limited to 'drivers/net/mlx4/en_main.c')
-rw-r--r-- | drivers/net/mlx4/en_main.c | 64 |
1 files changed, 38 insertions, 26 deletions
diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c index 97934f1ec53a..9276b1b25586 100644 --- a/drivers/net/mlx4/en_main.c +++ b/drivers/net/mlx4/en_main.c | |||
@@ -63,15 +63,12 @@ static const char mlx4_en_version[] = | |||
63 | */ | 63 | */ |
64 | 64 | ||
65 | 65 | ||
66 | /* Use a XOR rathern than Toeplitz hash function for RSS */ | 66 | /* Enable RSS TCP traffic */ |
67 | MLX4_EN_PARM_INT(rss_xor, 0, "Use XOR hash function for RSS"); | 67 | MLX4_EN_PARM_INT(tcp_rss, 1, |
68 | 68 | "Enable RSS for incomming TCP traffic or disabled (0)"); | |
69 | /* RSS hash type mask - default to <saddr, daddr, sport, dport> */ | 69 | /* Enable RSS UDP traffic */ |
70 | MLX4_EN_PARM_INT(rss_mask, 0xf, "RSS hash type bitmask"); | 70 | MLX4_EN_PARM_INT(udp_rss, 1, |
71 | 71 | "Enable RSS for incomming UDP traffic or disabled (0)"); | |
72 | /* Number of LRO sessions per Rx ring (rounded up to a power of two) */ | ||
73 | MLX4_EN_PARM_INT(num_lro, MLX4_EN_MAX_LRO_DESCRIPTORS, | ||
74 | "Number of LRO sessions per ring or disabled (0)"); | ||
75 | 72 | ||
76 | /* Priority pausing */ | 73 | /* Priority pausing */ |
77 | MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." | 74 | MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." |
@@ -107,9 +104,12 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) | |||
107 | struct mlx4_en_profile *params = &mdev->profile; | 104 | struct mlx4_en_profile *params = &mdev->profile; |
108 | int i; | 105 | int i; |
109 | 106 | ||
110 | params->rss_xor = (rss_xor != 0); | 107 | params->tcp_rss = tcp_rss; |
111 | params->rss_mask = rss_mask & 0x1f; | 108 | params->udp_rss = udp_rss; |
112 | params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS); | 109 | if (params->udp_rss && !mdev->dev->caps.udp_rss) { |
110 | mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); | ||
111 | params->udp_rss = 0; | ||
112 | } | ||
113 | for (i = 1; i <= MLX4_MAX_PORTS; i++) { | 113 | for (i = 1; i <= MLX4_MAX_PORTS; i++) { |
114 | params->prof[i].rx_pause = 1; | 114 | params->prof[i].rx_pause = 1; |
115 | params->prof[i].rx_ppp = pfcrx; | 115 | params->prof[i].rx_ppp = pfcrx; |
@@ -124,6 +124,13 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) | |||
124 | return 0; | 124 | return 0; |
125 | } | 125 | } |
126 | 126 | ||
127 | static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port) | ||
128 | { | ||
129 | struct mlx4_en_dev *endev = ctx; | ||
130 | |||
131 | return endev->pndev[port]; | ||
132 | } | ||
133 | |||
127 | static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, | 134 | static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, |
128 | enum mlx4_dev_event event, int port) | 135 | enum mlx4_dev_event event, int port) |
129 | { | 136 | { |
@@ -195,7 +202,8 @@ static void *mlx4_en_add(struct mlx4_dev *dev) | |||
195 | if (mlx4_uar_alloc(dev, &mdev->priv_uar)) | 202 | if (mlx4_uar_alloc(dev, &mdev->priv_uar)) |
196 | goto err_pd; | 203 | goto err_pd; |
197 | 204 | ||
198 | mdev->uar_map = ioremap(mdev->priv_uar.pfn << PAGE_SHIFT, PAGE_SIZE); | 205 | mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT, |
206 | PAGE_SIZE); | ||
199 | if (!mdev->uar_map) | 207 | if (!mdev->uar_map) |
200 | goto err_uar; | 208 | goto err_uar; |
201 | spin_lock_init(&mdev->uar_lock); | 209 | spin_lock_init(&mdev->uar_lock); |
@@ -228,21 +236,23 @@ static void *mlx4_en_add(struct mlx4_dev *dev) | |||
228 | goto err_mr; | 236 | goto err_mr; |
229 | } | 237 | } |
230 | 238 | ||
231 | /* Configure wich ports to start according to module parameters */ | 239 | /* Configure which ports to start according to module parameters */ |
232 | mdev->port_cnt = 0; | 240 | mdev->port_cnt = 0; |
233 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | 241 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) |
234 | mdev->port_cnt++; | 242 | mdev->port_cnt++; |
235 | 243 | ||
236 | /* If we did not receive an explicit number of Rx rings, default to | ||
237 | * the number of completion vectors populated by the mlx4_core */ | ||
238 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { | 244 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { |
239 | mlx4_info(mdev, "Using %d tx rings for port:%d\n", | 245 | if (!dev->caps.comp_pool) { |
240 | mdev->profile.prof[i].tx_ring_num, i); | 246 | mdev->profile.prof[i].rx_ring_num = |
241 | mdev->profile.prof[i].rx_ring_num = min_t(int, | 247 | rounddown_pow_of_two(max_t(int, MIN_RX_RINGS, |
242 | roundup_pow_of_two(dev->caps.num_comp_vectors), | 248 | min_t(int, |
243 | MAX_RX_RINGS); | 249 | dev->caps.num_comp_vectors, |
244 | mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n", | 250 | MAX_RX_RINGS))); |
245 | mdev->profile.prof[i].rx_ring_num, i); | 251 | } else { |
252 | mdev->profile.prof[i].rx_ring_num = rounddown_pow_of_two( | ||
253 | min_t(int, dev->caps.comp_pool/ | ||
254 | dev->caps.num_ports - 1 , MAX_MSIX_P_PORT - 1)); | ||
255 | } | ||
246 | } | 256 | } |
247 | 257 | ||
248 | /* Create our own workqueue for reset/multicast tasks | 258 | /* Create our own workqueue for reset/multicast tasks |
@@ -282,9 +292,11 @@ err_free_res: | |||
282 | } | 292 | } |
283 | 293 | ||
284 | static struct mlx4_interface mlx4_en_interface = { | 294 | static struct mlx4_interface mlx4_en_interface = { |
285 | .add = mlx4_en_add, | 295 | .add = mlx4_en_add, |
286 | .remove = mlx4_en_remove, | 296 | .remove = mlx4_en_remove, |
287 | .event = mlx4_en_event, | 297 | .event = mlx4_en_event, |
298 | .get_dev = mlx4_en_get_netdev, | ||
299 | .protocol = MLX4_PROT_ETH, | ||
288 | }; | 300 | }; |
289 | 301 | ||
290 | static int __init mlx4_en_init(void) | 302 | static int __init mlx4_en_init(void) |