diff options
Diffstat (limited to 'drivers/net/ixgbe')
-rw-r--r-- | drivers/net/ixgbe/ixgbe.h | 35 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_82598.c | 6 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_82599.c | 156 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_common.c | 3 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_common.h | 1 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 2 |
6 files changed, 81 insertions, 122 deletions
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h index 8f1f8bab0fd9..c983c89630af 100644 --- a/drivers/net/ixgbe/ixgbe.h +++ b/drivers/net/ixgbe/ixgbe.h | |||
@@ -424,55 +424,20 @@ extern s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc); | |||
424 | extern s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, | 424 | extern s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, |
425 | struct ixgbe_atr_input *input, | 425 | struct ixgbe_atr_input *input, |
426 | u8 queue); | 426 | u8 queue); |
427 | extern s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, | ||
428 | struct ixgbe_atr_input *input, | ||
429 | u16 soft_id, | ||
430 | u8 queue); | ||
431 | extern u16 ixgbe_atr_compute_hash_82599(struct ixgbe_atr_input *input, u32 key); | ||
432 | extern s32 ixgbe_atr_set_vlan_id_82599(struct ixgbe_atr_input *input, | 427 | extern s32 ixgbe_atr_set_vlan_id_82599(struct ixgbe_atr_input *input, |
433 | u16 vlan_id); | 428 | u16 vlan_id); |
434 | extern s32 ixgbe_atr_set_src_ipv4_82599(struct ixgbe_atr_input *input, | 429 | extern s32 ixgbe_atr_set_src_ipv4_82599(struct ixgbe_atr_input *input, |
435 | u32 src_addr); | 430 | u32 src_addr); |
436 | extern s32 ixgbe_atr_set_dst_ipv4_82599(struct ixgbe_atr_input *input, | 431 | extern s32 ixgbe_atr_set_dst_ipv4_82599(struct ixgbe_atr_input *input, |
437 | u32 dst_addr); | 432 | u32 dst_addr); |
438 | extern s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input, | ||
439 | u32 src_addr_1, u32 src_addr_2, | ||
440 | u32 src_addr_3, u32 src_addr_4); | ||
441 | extern s32 ixgbe_atr_set_dst_ipv6_82599(struct ixgbe_atr_input *input, | ||
442 | u32 dst_addr_1, u32 dst_addr_2, | ||
443 | u32 dst_addr_3, u32 dst_addr_4); | ||
444 | extern s32 ixgbe_atr_set_src_port_82599(struct ixgbe_atr_input *input, | 433 | extern s32 ixgbe_atr_set_src_port_82599(struct ixgbe_atr_input *input, |
445 | u16 src_port); | 434 | u16 src_port); |
446 | extern s32 ixgbe_atr_set_dst_port_82599(struct ixgbe_atr_input *input, | 435 | extern s32 ixgbe_atr_set_dst_port_82599(struct ixgbe_atr_input *input, |
447 | u16 dst_port); | 436 | u16 dst_port); |
448 | extern s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, | 437 | extern s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, |
449 | u16 flex_byte); | 438 | u16 flex_byte); |
450 | extern s32 ixgbe_atr_set_vm_pool_82599(struct ixgbe_atr_input *input, | ||
451 | u8 vm_pool); | ||
452 | extern s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, | 439 | extern s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, |
453 | u8 l4type); | 440 | u8 l4type); |
454 | extern s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input, | ||
455 | u16 *vlan_id); | ||
456 | extern s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input, | ||
457 | u32 *src_addr); | ||
458 | extern s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, | ||
459 | u32 *dst_addr); | ||
460 | extern s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input, | ||
461 | u32 *src_addr_1, u32 *src_addr_2, | ||
462 | u32 *src_addr_3, u32 *src_addr_4); | ||
463 | extern s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input, | ||
464 | u32 *dst_addr_1, u32 *dst_addr_2, | ||
465 | u32 *dst_addr_3, u32 *dst_addr_4); | ||
466 | extern s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input, | ||
467 | u16 *src_port); | ||
468 | extern s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input, | ||
469 | u16 *dst_port); | ||
470 | extern s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input, | ||
471 | u16 *flex_byte); | ||
472 | extern s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input, | ||
473 | u8 *vm_pool); | ||
474 | extern s32 ixgbe_atr_get_l4type_82599(struct ixgbe_atr_input *input, | ||
475 | u8 *l4type); | ||
476 | #ifdef IXGBE_FCOE | 441 | #ifdef IXGBE_FCOE |
477 | extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter); | 442 | extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter); |
478 | extern int ixgbe_fso(struct ixgbe_adapter *adapter, | 443 | extern int ixgbe_fso(struct ixgbe_adapter *adapter, |
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c index 1c227b0777a6..916430f2a7e7 100644 --- a/drivers/net/ixgbe/ixgbe_82598.c +++ b/drivers/net/ixgbe/ixgbe_82598.c | |||
@@ -59,7 +59,7 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, | |||
59 | * increase the value to either 10ms to 250ms for capability version 1 config, | 59 | * increase the value to either 10ms to 250ms for capability version 1 config, |
60 | * or 16ms to 55ms for version 2. | 60 | * or 16ms to 55ms for version 2. |
61 | **/ | 61 | **/ |
62 | void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw) | 62 | static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw) |
63 | { | 63 | { |
64 | struct ixgbe_adapter *adapter = hw->back; | 64 | struct ixgbe_adapter *adapter = hw->back; |
65 | u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); | 65 | u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); |
@@ -143,7 +143,7 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw) | |||
143 | * not known. Perform the SFP init if necessary. | 143 | * not known. Perform the SFP init if necessary. |
144 | * | 144 | * |
145 | **/ | 145 | **/ |
146 | s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw) | 146 | static s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw) |
147 | { | 147 | { |
148 | struct ixgbe_mac_info *mac = &hw->mac; | 148 | struct ixgbe_mac_info *mac = &hw->mac; |
149 | struct ixgbe_phy_info *phy = &hw->phy; | 149 | struct ixgbe_phy_info *phy = &hw->phy; |
@@ -204,7 +204,7 @@ out: | |||
204 | * Starts the hardware using the generic start_hw function. | 204 | * Starts the hardware using the generic start_hw function. |
205 | * Then set pcie completion timeout | 205 | * Then set pcie completion timeout |
206 | **/ | 206 | **/ |
207 | s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw) | 207 | static s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw) |
208 | { | 208 | { |
209 | s32 ret_val = 0; | 209 | s32 ret_val = 0; |
210 | 210 | ||
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c index 1984cab7d48b..364b6d2279e4 100644 --- a/drivers/net/ixgbe/ixgbe_82599.c +++ b/drivers/net/ixgbe/ixgbe_82599.c | |||
@@ -38,22 +38,15 @@ | |||
38 | #define IXGBE_82599_MC_TBL_SIZE 128 | 38 | #define IXGBE_82599_MC_TBL_SIZE 128 |
39 | #define IXGBE_82599_VFT_TBL_SIZE 128 | 39 | #define IXGBE_82599_VFT_TBL_SIZE 128 |
40 | 40 | ||
41 | s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, | 41 | static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw); |
42 | ixgbe_link_speed *speed, | 42 | static s32 ixgbe_setup_mac_link_speed_multispeed_fiber(struct ixgbe_hw *hw, |
43 | bool *autoneg); | ||
44 | enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw); | ||
45 | s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw); | ||
46 | s32 ixgbe_setup_mac_link_speed_multispeed_fiber(struct ixgbe_hw *hw, | ||
47 | ixgbe_link_speed speed, bool autoneg, | 43 | ixgbe_link_speed speed, bool autoneg, |
48 | bool autoneg_wait_to_complete); | 44 | bool autoneg_wait_to_complete); |
49 | s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw); | 45 | static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw); |
50 | s32 ixgbe_check_mac_link_82599(struct ixgbe_hw *hw, | 46 | static s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw, |
51 | ixgbe_link_speed *speed, | 47 | ixgbe_link_speed speed, |
52 | bool *link_up, bool link_up_wait_to_complete); | 48 | bool autoneg, |
53 | s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw, | 49 | bool autoneg_wait_to_complete); |
54 | ixgbe_link_speed speed, | ||
55 | bool autoneg, | ||
56 | bool autoneg_wait_to_complete); | ||
57 | static s32 ixgbe_get_copper_link_capabilities_82599(struct ixgbe_hw *hw, | 50 | static s32 ixgbe_get_copper_link_capabilities_82599(struct ixgbe_hw *hw, |
58 | ixgbe_link_speed *speed, | 51 | ixgbe_link_speed *speed, |
59 | bool *autoneg); | 52 | bool *autoneg); |
@@ -62,21 +55,9 @@ static s32 ixgbe_setup_copper_link_speed_82599(struct ixgbe_hw *hw, | |||
62 | ixgbe_link_speed speed, | 55 | ixgbe_link_speed speed, |
63 | bool autoneg, | 56 | bool autoneg, |
64 | bool autoneg_wait_to_complete); | 57 | bool autoneg_wait_to_complete); |
65 | s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw); | ||
66 | s32 ixgbe_set_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq); | ||
67 | s32 ixgbe_clear_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq); | ||
68 | s32 ixgbe_set_vfta_82599(struct ixgbe_hw *hw, u32 vlan, | ||
69 | u32 vind, bool vlan_on); | ||
70 | s32 ixgbe_clear_vfta_82599(struct ixgbe_hw *hw); | ||
71 | s32 ixgbe_init_uta_tables_82599(struct ixgbe_hw *hw); | ||
72 | s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val); | ||
73 | s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val); | ||
74 | s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw); | ||
75 | s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw); | ||
76 | u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw); | ||
77 | static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw); | 58 | static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw); |
78 | 59 | ||
79 | void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw) | 60 | static void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw) |
80 | { | 61 | { |
81 | struct ixgbe_mac_info *mac = &hw->mac; | 62 | struct ixgbe_mac_info *mac = &hw->mac; |
82 | if (hw->phy.multispeed_fiber) { | 63 | if (hw->phy.multispeed_fiber) { |
@@ -93,7 +74,7 @@ void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw) | |||
93 | } | 74 | } |
94 | } | 75 | } |
95 | 76 | ||
96 | s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw) | 77 | static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw) |
97 | { | 78 | { |
98 | s32 ret_val = 0; | 79 | s32 ret_val = 0; |
99 | u16 list_offset, data_offset, data_value; | 80 | u16 list_offset, data_offset, data_value; |
@@ -143,7 +124,7 @@ setup_sfp_out: | |||
143 | * Read PCIe configuration space, and get the MSI-X vector count from | 124 | * Read PCIe configuration space, and get the MSI-X vector count from |
144 | * the capabilities table. | 125 | * the capabilities table. |
145 | **/ | 126 | **/ |
146 | u32 ixgbe_get_pcie_msix_count_82599(struct ixgbe_hw *hw) | 127 | static u32 ixgbe_get_pcie_msix_count_82599(struct ixgbe_hw *hw) |
147 | { | 128 | { |
148 | struct ixgbe_adapter *adapter = hw->back; | 129 | struct ixgbe_adapter *adapter = hw->back; |
149 | u16 msix_count; | 130 | u16 msix_count; |
@@ -182,7 +163,7 @@ static s32 ixgbe_get_invariants_82599(struct ixgbe_hw *hw) | |||
182 | * not known. Perform the SFP init if necessary. | 163 | * not known. Perform the SFP init if necessary. |
183 | * | 164 | * |
184 | **/ | 165 | **/ |
185 | s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw) | 166 | static s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw) |
186 | { | 167 | { |
187 | struct ixgbe_mac_info *mac = &hw->mac; | 168 | struct ixgbe_mac_info *mac = &hw->mac; |
188 | struct ixgbe_phy_info *phy = &hw->phy; | 169 | struct ixgbe_phy_info *phy = &hw->phy; |
@@ -225,9 +206,9 @@ s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw) | |||
225 | * | 206 | * |
226 | * Determines the link capabilities by reading the AUTOC register. | 207 | * Determines the link capabilities by reading the AUTOC register. |
227 | **/ | 208 | **/ |
228 | s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, | 209 | static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, |
229 | ixgbe_link_speed *speed, | 210 | ixgbe_link_speed *speed, |
230 | bool *negotiation) | 211 | bool *negotiation) |
231 | { | 212 | { |
232 | s32 status = 0; | 213 | s32 status = 0; |
233 | u32 autoc = 0; | 214 | u32 autoc = 0; |
@@ -344,7 +325,7 @@ static s32 ixgbe_get_copper_link_capabilities_82599(struct ixgbe_hw *hw, | |||
344 | * | 325 | * |
345 | * Returns the media type (fiber, copper, backplane) | 326 | * Returns the media type (fiber, copper, backplane) |
346 | **/ | 327 | **/ |
347 | enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw) | 328 | static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw) |
348 | { | 329 | { |
349 | enum ixgbe_media_type media_type; | 330 | enum ixgbe_media_type media_type; |
350 | 331 | ||
@@ -379,7 +360,7 @@ out: | |||
379 | * Configures link settings based on values in the ixgbe_hw struct. | 360 | * Configures link settings based on values in the ixgbe_hw struct. |
380 | * Restarts the link. Performs autonegotiation if needed. | 361 | * Restarts the link. Performs autonegotiation if needed. |
381 | **/ | 362 | **/ |
382 | s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw) | 363 | static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw) |
383 | { | 364 | { |
384 | u32 autoc_reg; | 365 | u32 autoc_reg; |
385 | u32 links_reg; | 366 | u32 links_reg; |
@@ -428,7 +409,7 @@ s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw) | |||
428 | * fails at 10G. | 409 | * fails at 10G. |
429 | * Performs autonegotiation if needed. | 410 | * Performs autonegotiation if needed. |
430 | **/ | 411 | **/ |
431 | s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw) | 412 | static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw) |
432 | { | 413 | { |
433 | s32 status = 0; | 414 | s32 status = 0; |
434 | ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_82599_AUTONEG; | 415 | ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_82599_AUTONEG; |
@@ -446,7 +427,7 @@ s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw) | |||
446 | * | 427 | * |
447 | * Set the link speed in the AUTOC register and restarts link. | 428 | * Set the link speed in the AUTOC register and restarts link. |
448 | **/ | 429 | **/ |
449 | s32 ixgbe_setup_mac_link_speed_multispeed_fiber(struct ixgbe_hw *hw, | 430 | static s32 ixgbe_setup_mac_link_speed_multispeed_fiber(struct ixgbe_hw *hw, |
450 | ixgbe_link_speed speed, | 431 | ixgbe_link_speed speed, |
451 | bool autoneg, | 432 | bool autoneg, |
452 | bool autoneg_wait_to_complete) | 433 | bool autoneg_wait_to_complete) |
@@ -613,8 +594,10 @@ out: | |||
613 | * | 594 | * |
614 | * Reads the links register to determine if link is up and the current speed | 595 | * Reads the links register to determine if link is up and the current speed |
615 | **/ | 596 | **/ |
616 | s32 ixgbe_check_mac_link_82599(struct ixgbe_hw *hw, ixgbe_link_speed *speed, | 597 | static s32 ixgbe_check_mac_link_82599(struct ixgbe_hw *hw, |
617 | bool *link_up, bool link_up_wait_to_complete) | 598 | ixgbe_link_speed *speed, |
599 | bool *link_up, | ||
600 | bool link_up_wait_to_complete) | ||
618 | { | 601 | { |
619 | u32 links_reg; | 602 | u32 links_reg; |
620 | u32 i; | 603 | u32 i; |
@@ -665,9 +648,10 @@ s32 ixgbe_check_mac_link_82599(struct ixgbe_hw *hw, ixgbe_link_speed *speed, | |||
665 | * | 648 | * |
666 | * Set the link speed in the AUTOC register and restarts link. | 649 | * Set the link speed in the AUTOC register and restarts link. |
667 | **/ | 650 | **/ |
668 | s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw, | 651 | static s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw, |
669 | ixgbe_link_speed speed, bool autoneg, | 652 | ixgbe_link_speed speed, |
670 | bool autoneg_wait_to_complete) | 653 | bool autoneg, |
654 | bool autoneg_wait_to_complete) | ||
671 | { | 655 | { |
672 | s32 status = 0; | 656 | s32 status = 0; |
673 | u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); | 657 | u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); |
@@ -818,7 +802,7 @@ static s32 ixgbe_setup_copper_link_speed_82599(struct ixgbe_hw *hw, | |||
818 | * and clears all interrupts, perform a PHY reset, and perform a link (MAC) | 802 | * and clears all interrupts, perform a PHY reset, and perform a link (MAC) |
819 | * reset. | 803 | * reset. |
820 | **/ | 804 | **/ |
821 | s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw) | 805 | static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw) |
822 | { | 806 | { |
823 | s32 status = 0; | 807 | s32 status = 0; |
824 | u32 ctrl, ctrl_ext; | 808 | u32 ctrl, ctrl_ext; |
@@ -943,7 +927,7 @@ reset_hw_out: | |||
943 | * @rar: receive address register index to disassociate | 927 | * @rar: receive address register index to disassociate |
944 | * @vmdq: VMDq pool index to remove from the rar | 928 | * @vmdq: VMDq pool index to remove from the rar |
945 | **/ | 929 | **/ |
946 | s32 ixgbe_clear_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq) | 930 | static s32 ixgbe_clear_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq) |
947 | { | 931 | { |
948 | u32 mpsar_lo, mpsar_hi; | 932 | u32 mpsar_lo, mpsar_hi; |
949 | u32 rar_entries = hw->mac.num_rar_entries; | 933 | u32 rar_entries = hw->mac.num_rar_entries; |
@@ -989,7 +973,7 @@ done: | |||
989 | * @rar: receive address register index to associate with a VMDq index | 973 | * @rar: receive address register index to associate with a VMDq index |
990 | * @vmdq: VMDq pool index | 974 | * @vmdq: VMDq pool index |
991 | **/ | 975 | **/ |
992 | s32 ixgbe_set_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq) | 976 | static s32 ixgbe_set_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq) |
993 | { | 977 | { |
994 | u32 mpsar; | 978 | u32 mpsar; |
995 | u32 rar_entries = hw->mac.num_rar_entries; | 979 | u32 rar_entries = hw->mac.num_rar_entries; |
@@ -1019,8 +1003,8 @@ s32 ixgbe_set_vmdq_82599(struct ixgbe_hw *hw, u32 rar, u32 vmdq) | |||
1019 | * | 1003 | * |
1020 | * Turn on/off specified VLAN in the VLAN filter table. | 1004 | * Turn on/off specified VLAN in the VLAN filter table. |
1021 | **/ | 1005 | **/ |
1022 | s32 ixgbe_set_vfta_82599(struct ixgbe_hw *hw, u32 vlan, u32 vind, | 1006 | static s32 ixgbe_set_vfta_82599(struct ixgbe_hw *hw, u32 vlan, u32 vind, |
1023 | bool vlan_on) | 1007 | bool vlan_on) |
1024 | { | 1008 | { |
1025 | u32 regindex; | 1009 | u32 regindex; |
1026 | u32 bitindex; | 1010 | u32 bitindex; |
@@ -1133,7 +1117,7 @@ out: | |||
1133 | * | 1117 | * |
1134 | * Clears the VLAN filer table, and the VMDq index associated with the filter | 1118 | * Clears the VLAN filer table, and the VMDq index associated with the filter |
1135 | **/ | 1119 | **/ |
1136 | s32 ixgbe_clear_vfta_82599(struct ixgbe_hw *hw) | 1120 | static s32 ixgbe_clear_vfta_82599(struct ixgbe_hw *hw) |
1137 | { | 1121 | { |
1138 | u32 offset; | 1122 | u32 offset; |
1139 | 1123 | ||
@@ -1153,7 +1137,7 @@ s32 ixgbe_clear_vfta_82599(struct ixgbe_hw *hw) | |||
1153 | * ixgbe_init_uta_tables_82599 - Initialize the Unicast Table Array | 1137 | * ixgbe_init_uta_tables_82599 - Initialize the Unicast Table Array |
1154 | * @hw: pointer to hardware structure | 1138 | * @hw: pointer to hardware structure |
1155 | **/ | 1139 | **/ |
1156 | s32 ixgbe_init_uta_tables_82599(struct ixgbe_hw *hw) | 1140 | static s32 ixgbe_init_uta_tables_82599(struct ixgbe_hw *hw) |
1157 | { | 1141 | { |
1158 | int i; | 1142 | int i; |
1159 | hw_dbg(hw, " Clearing UTA\n"); | 1143 | hw_dbg(hw, " Clearing UTA\n"); |
@@ -1430,7 +1414,8 @@ s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc) | |||
1430 | * @stream: input bitstream to compute the hash on | 1414 | * @stream: input bitstream to compute the hash on |
1431 | * @key: 32-bit hash key | 1415 | * @key: 32-bit hash key |
1432 | **/ | 1416 | **/ |
1433 | u16 ixgbe_atr_compute_hash_82599(struct ixgbe_atr_input *atr_input, u32 key) | 1417 | static u16 ixgbe_atr_compute_hash_82599(struct ixgbe_atr_input *atr_input, |
1418 | u32 key) | ||
1434 | { | 1419 | { |
1435 | /* | 1420 | /* |
1436 | * The algorithm is as follows: | 1421 | * The algorithm is as follows: |
@@ -1602,8 +1587,8 @@ s32 ixgbe_atr_set_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 dst_addr) | |||
1602 | * @src_addr_4: the fourth 4 bytes of the IP address to load | 1587 | * @src_addr_4: the fourth 4 bytes of the IP address to load |
1603 | **/ | 1588 | **/ |
1604 | s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input, | 1589 | s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input, |
1605 | u32 src_addr_1, u32 src_addr_2, | 1590 | u32 src_addr_1, u32 src_addr_2, |
1606 | u32 src_addr_3, u32 src_addr_4) | 1591 | u32 src_addr_3, u32 src_addr_4) |
1607 | { | 1592 | { |
1608 | input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET] = src_addr_4 & 0xff; | 1593 | input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET] = src_addr_4 & 0xff; |
1609 | input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET + 1] = | 1594 | input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET + 1] = |
@@ -1645,8 +1630,8 @@ s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input, | |||
1645 | * @dst_addr_4: the fourth 4 bytes of the IP address to load | 1630 | * @dst_addr_4: the fourth 4 bytes of the IP address to load |
1646 | **/ | 1631 | **/ |
1647 | s32 ixgbe_atr_set_dst_ipv6_82599(struct ixgbe_atr_input *input, | 1632 | s32 ixgbe_atr_set_dst_ipv6_82599(struct ixgbe_atr_input *input, |
1648 | u32 dst_addr_1, u32 dst_addr_2, | 1633 | u32 dst_addr_1, u32 dst_addr_2, |
1649 | u32 dst_addr_3, u32 dst_addr_4) | 1634 | u32 dst_addr_3, u32 dst_addr_4) |
1650 | { | 1635 | { |
1651 | input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET] = dst_addr_4 & 0xff; | 1636 | input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET] = dst_addr_4 & 0xff; |
1652 | input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET + 1] = | 1637 | input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET + 1] = |
@@ -1723,7 +1708,8 @@ s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, u16 flex_byte) | |||
1723 | * @input: input stream to modify | 1708 | * @input: input stream to modify |
1724 | * @vm_pool: the Virtual Machine pool to load | 1709 | * @vm_pool: the Virtual Machine pool to load |
1725 | **/ | 1710 | **/ |
1726 | s32 ixgbe_atr_set_vm_pool_82599(struct ixgbe_atr_input *input, u8 vm_pool) | 1711 | s32 ixgbe_atr_set_vm_pool_82599(struct ixgbe_atr_input *input, |
1712 | u8 vm_pool) | ||
1727 | { | 1713 | { |
1728 | input->byte_stream[IXGBE_ATR_VM_POOL_OFFSET] = vm_pool; | 1714 | input->byte_stream[IXGBE_ATR_VM_POOL_OFFSET] = vm_pool; |
1729 | 1715 | ||
@@ -1747,7 +1733,8 @@ s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, u8 l4type) | |||
1747 | * @input: input stream to search | 1733 | * @input: input stream to search |
1748 | * @vlan: the VLAN id to load | 1734 | * @vlan: the VLAN id to load |
1749 | **/ | 1735 | **/ |
1750 | s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input, u16 *vlan) | 1736 | static s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input, |
1737 | u16 *vlan) | ||
1751 | { | 1738 | { |
1752 | *vlan = input->byte_stream[IXGBE_ATR_VLAN_OFFSET]; | 1739 | *vlan = input->byte_stream[IXGBE_ATR_VLAN_OFFSET]; |
1753 | *vlan |= input->byte_stream[IXGBE_ATR_VLAN_OFFSET + 1] << 8; | 1740 | *vlan |= input->byte_stream[IXGBE_ATR_VLAN_OFFSET + 1] << 8; |
@@ -1760,7 +1747,8 @@ s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input, u16 *vlan) | |||
1760 | * @input: input stream to search | 1747 | * @input: input stream to search |
1761 | * @src_addr: the IP address to load | 1748 | * @src_addr: the IP address to load |
1762 | **/ | 1749 | **/ |
1763 | s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input, u32 *src_addr) | 1750 | static s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input, |
1751 | u32 *src_addr) | ||
1764 | { | 1752 | { |
1765 | *src_addr = input->byte_stream[IXGBE_ATR_SRC_IPV4_OFFSET]; | 1753 | *src_addr = input->byte_stream[IXGBE_ATR_SRC_IPV4_OFFSET]; |
1766 | *src_addr |= input->byte_stream[IXGBE_ATR_SRC_IPV4_OFFSET + 1] << 8; | 1754 | *src_addr |= input->byte_stream[IXGBE_ATR_SRC_IPV4_OFFSET + 1] << 8; |
@@ -1775,7 +1763,8 @@ s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input, u32 *src_addr) | |||
1775 | * @input: input stream to search | 1763 | * @input: input stream to search |
1776 | * @dst_addr: the IP address to load | 1764 | * @dst_addr: the IP address to load |
1777 | **/ | 1765 | **/ |
1778 | s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 *dst_addr) | 1766 | static s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, |
1767 | u32 *dst_addr) | ||
1779 | { | 1768 | { |
1780 | *dst_addr = input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET]; | 1769 | *dst_addr = input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET]; |
1781 | *dst_addr |= input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET + 1] << 8; | 1770 | *dst_addr |= input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET + 1] << 8; |
@@ -1793,9 +1782,9 @@ s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 *dst_addr) | |||
1793 | * @src_addr_3: the third 4 bytes of the IP address to load | 1782 | * @src_addr_3: the third 4 bytes of the IP address to load |
1794 | * @src_addr_4: the fourth 4 bytes of the IP address to load | 1783 | * @src_addr_4: the fourth 4 bytes of the IP address to load |
1795 | **/ | 1784 | **/ |
1796 | s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input, | 1785 | static s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input, |
1797 | u32 *src_addr_1, u32 *src_addr_2, | 1786 | u32 *src_addr_1, u32 *src_addr_2, |
1798 | u32 *src_addr_3, u32 *src_addr_4) | 1787 | u32 *src_addr_3, u32 *src_addr_4) |
1799 | { | 1788 | { |
1800 | *src_addr_1 = input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET + 12]; | 1789 | *src_addr_1 = input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET + 12]; |
1801 | *src_addr_1 = input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET + 13] << 8; | 1790 | *src_addr_1 = input->byte_stream[IXGBE_ATR_SRC_IPV6_OFFSET + 13] << 8; |
@@ -1829,8 +1818,8 @@ s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input, | |||
1829 | * @dst_addr_4: the fourth 4 bytes of the IP address to load | 1818 | * @dst_addr_4: the fourth 4 bytes of the IP address to load |
1830 | **/ | 1819 | **/ |
1831 | s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input, | 1820 | s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input, |
1832 | u32 *dst_addr_1, u32 *dst_addr_2, | 1821 | u32 *dst_addr_1, u32 *dst_addr_2, |
1833 | u32 *dst_addr_3, u32 *dst_addr_4) | 1822 | u32 *dst_addr_3, u32 *dst_addr_4) |
1834 | { | 1823 | { |
1835 | *dst_addr_1 = input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET + 12]; | 1824 | *dst_addr_1 = input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET + 12]; |
1836 | *dst_addr_1 = input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET + 13] << 8; | 1825 | *dst_addr_1 = input->byte_stream[IXGBE_ATR_DST_IPV6_OFFSET + 13] << 8; |
@@ -1865,7 +1854,8 @@ s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input, | |||
1865 | * endianness when retrieving the data. This can be confusing since the | 1854 | * endianness when retrieving the data. This can be confusing since the |
1866 | * internal hash engine expects it to be big-endian. | 1855 | * internal hash engine expects it to be big-endian. |
1867 | **/ | 1856 | **/ |
1868 | s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input, u16 *src_port) | 1857 | static s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input, |
1858 | u16 *src_port) | ||
1869 | { | 1859 | { |
1870 | *src_port = input->byte_stream[IXGBE_ATR_SRC_PORT_OFFSET] << 8; | 1860 | *src_port = input->byte_stream[IXGBE_ATR_SRC_PORT_OFFSET] << 8; |
1871 | *src_port |= input->byte_stream[IXGBE_ATR_SRC_PORT_OFFSET + 1]; | 1861 | *src_port |= input->byte_stream[IXGBE_ATR_SRC_PORT_OFFSET + 1]; |
@@ -1883,7 +1873,8 @@ s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input, u16 *src_port) | |||
1883 | * endianness when retrieving the data. This can be confusing since the | 1873 | * endianness when retrieving the data. This can be confusing since the |
1884 | * internal hash engine expects it to be big-endian. | 1874 | * internal hash engine expects it to be big-endian. |
1885 | **/ | 1875 | **/ |
1886 | s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input, u16 *dst_port) | 1876 | static s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input, |
1877 | u16 *dst_port) | ||
1887 | { | 1878 | { |
1888 | *dst_port = input->byte_stream[IXGBE_ATR_DST_PORT_OFFSET] << 8; | 1879 | *dst_port = input->byte_stream[IXGBE_ATR_DST_PORT_OFFSET] << 8; |
1889 | *dst_port |= input->byte_stream[IXGBE_ATR_DST_PORT_OFFSET + 1]; | 1880 | *dst_port |= input->byte_stream[IXGBE_ATR_DST_PORT_OFFSET + 1]; |
@@ -1896,7 +1887,8 @@ s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input, u16 *dst_port) | |||
1896 | * @input: input stream to modify | 1887 | * @input: input stream to modify |
1897 | * @flex_bytes: the flexible bytes to load | 1888 | * @flex_bytes: the flexible bytes to load |
1898 | **/ | 1889 | **/ |
1899 | s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input, u16 *flex_byte) | 1890 | static s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input, |
1891 | u16 *flex_byte) | ||
1900 | { | 1892 | { |
1901 | *flex_byte = input->byte_stream[IXGBE_ATR_FLEX_BYTE_OFFSET]; | 1893 | *flex_byte = input->byte_stream[IXGBE_ATR_FLEX_BYTE_OFFSET]; |
1902 | *flex_byte |= input->byte_stream[IXGBE_ATR_FLEX_BYTE_OFFSET + 1] << 8; | 1894 | *flex_byte |= input->byte_stream[IXGBE_ATR_FLEX_BYTE_OFFSET + 1] << 8; |
@@ -1909,7 +1901,8 @@ s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input, u16 *flex_byte) | |||
1909 | * @input: input stream to modify | 1901 | * @input: input stream to modify |
1910 | * @vm_pool: the Virtual Machine pool to load | 1902 | * @vm_pool: the Virtual Machine pool to load |
1911 | **/ | 1903 | **/ |
1912 | s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input, u8 *vm_pool) | 1904 | s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input, |
1905 | u8 *vm_pool) | ||
1913 | { | 1906 | { |
1914 | *vm_pool = input->byte_stream[IXGBE_ATR_VM_POOL_OFFSET]; | 1907 | *vm_pool = input->byte_stream[IXGBE_ATR_VM_POOL_OFFSET]; |
1915 | 1908 | ||
@@ -1921,7 +1914,8 @@ s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input, u8 *vm_pool) | |||
1921 | * @input: input stream to modify | 1914 | * @input: input stream to modify |
1922 | * @l4type: the layer 4 type value to load | 1915 | * @l4type: the layer 4 type value to load |
1923 | **/ | 1916 | **/ |
1924 | s32 ixgbe_atr_get_l4type_82599(struct ixgbe_atr_input *input, u8 *l4type) | 1917 | static s32 ixgbe_atr_get_l4type_82599(struct ixgbe_atr_input *input, |
1918 | u8 *l4type) | ||
1925 | { | 1919 | { |
1926 | *l4type = input->byte_stream[IXGBE_ATR_L4TYPE_OFFSET]; | 1920 | *l4type = input->byte_stream[IXGBE_ATR_L4TYPE_OFFSET]; |
1927 | 1921 | ||
@@ -2002,9 +1996,9 @@ s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, | |||
2002 | * hardware writes must be protected from one another. | 1996 | * hardware writes must be protected from one another. |
2003 | **/ | 1997 | **/ |
2004 | s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, | 1998 | s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, |
2005 | struct ixgbe_atr_input *input, | 1999 | struct ixgbe_atr_input *input, |
2006 | u16 soft_id, | 2000 | u16 soft_id, |
2007 | u8 queue) | 2001 | u8 queue) |
2008 | { | 2002 | { |
2009 | u32 fdircmd = 0; | 2003 | u32 fdircmd = 0; |
2010 | u32 fdirhash; | 2004 | u32 fdirhash; |
@@ -2097,7 +2091,7 @@ s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, | |||
2097 | * | 2091 | * |
2098 | * Performs read operation to Omer analog register specified. | 2092 | * Performs read operation to Omer analog register specified. |
2099 | **/ | 2093 | **/ |
2100 | s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val) | 2094 | static s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val) |
2101 | { | 2095 | { |
2102 | u32 core_ctl; | 2096 | u32 core_ctl; |
2103 | 2097 | ||
@@ -2119,7 +2113,7 @@ s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val) | |||
2119 | * | 2113 | * |
2120 | * Performs write operation to Omer analog register specified. | 2114 | * Performs write operation to Omer analog register specified. |
2121 | **/ | 2115 | **/ |
2122 | s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val) | 2116 | static s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val) |
2123 | { | 2117 | { |
2124 | u32 core_ctl; | 2118 | u32 core_ctl; |
2125 | 2119 | ||
@@ -2139,7 +2133,7 @@ s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val) | |||
2139 | * Then performs device-specific: | 2133 | * Then performs device-specific: |
2140 | * Clears the rate limiter registers. | 2134 | * Clears the rate limiter registers. |
2141 | **/ | 2135 | **/ |
2142 | s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw) | 2136 | static s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw) |
2143 | { | 2137 | { |
2144 | u32 q_num; | 2138 | u32 q_num; |
2145 | s32 ret_val; | 2139 | s32 ret_val; |
@@ -2168,7 +2162,7 @@ s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw) | |||
2168 | * | 2162 | * |
2169 | * Determines the physical layer module found on the current adapter. | 2163 | * Determines the physical layer module found on the current adapter. |
2170 | **/ | 2164 | **/ |
2171 | s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw) | 2165 | static s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw) |
2172 | { | 2166 | { |
2173 | s32 status = IXGBE_ERR_PHY_ADDR_INVALID; | 2167 | s32 status = IXGBE_ERR_PHY_ADDR_INVALID; |
2174 | status = ixgbe_identify_phy_generic(hw); | 2168 | status = ixgbe_identify_phy_generic(hw); |
@@ -2183,7 +2177,7 @@ s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw) | |||
2183 | * | 2177 | * |
2184 | * Determines physical layer capabilities of the current configuration. | 2178 | * Determines physical layer capabilities of the current configuration. |
2185 | **/ | 2179 | **/ |
2186 | u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw) | 2180 | static u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw) |
2187 | { | 2181 | { |
2188 | u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; | 2182 | u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; |
2189 | u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); | 2183 | u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); |
@@ -2290,7 +2284,7 @@ out: | |||
2290 | * | 2284 | * |
2291 | * Enables the Rx DMA unit for 82599 | 2285 | * Enables the Rx DMA unit for 82599 |
2292 | **/ | 2286 | **/ |
2293 | s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval) | 2287 | static s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval) |
2294 | { | 2288 | { |
2295 | #define IXGBE_MAX_SECRX_POLL 30 | 2289 | #define IXGBE_MAX_SECRX_POLL 30 |
2296 | int i; | 2290 | int i; |
@@ -2335,7 +2329,7 @@ s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval) | |||
2335 | * This function will read the EEPROM location for the device capabilities, | 2329 | * This function will read the EEPROM location for the device capabilities, |
2336 | * and return the word through device_caps. | 2330 | * and return the word through device_caps. |
2337 | **/ | 2331 | **/ |
2338 | s32 ixgbe_get_device_caps_82599(struct ixgbe_hw *hw, u16 *device_caps) | 2332 | static s32 ixgbe_get_device_caps_82599(struct ixgbe_hw *hw, u16 *device_caps) |
2339 | { | 2333 | { |
2340 | hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); | 2334 | hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); |
2341 | 2335 | ||
@@ -2351,8 +2345,8 @@ s32 ixgbe_get_device_caps_82599(struct ixgbe_hw *hw, u16 *device_caps) | |||
2351 | * pointer, and returns the value at that location. This is used in both | 2345 | * pointer, and returns the value at that location. This is used in both |
2352 | * get and set mac_addr routines. | 2346 | * get and set mac_addr routines. |
2353 | **/ | 2347 | **/ |
2354 | s32 ixgbe_get_san_mac_addr_offset_82599(struct ixgbe_hw *hw, | 2348 | static s32 ixgbe_get_san_mac_addr_offset_82599(struct ixgbe_hw *hw, |
2355 | u16 *san_mac_offset) | 2349 | u16 *san_mac_offset) |
2356 | { | 2350 | { |
2357 | /* | 2351 | /* |
2358 | * First read the EEPROM pointer to see if the MAC addresses are | 2352 | * First read the EEPROM pointer to see if the MAC addresses are |
@@ -2373,7 +2367,7 @@ s32 ixgbe_get_san_mac_addr_offset_82599(struct ixgbe_hw *hw, | |||
2373 | * set_lan_id() is called by identify_sfp(), but this cannot be relied | 2367 | * set_lan_id() is called by identify_sfp(), but this cannot be relied |
2374 | * upon for non-SFP connections, so we must call it here. | 2368 | * upon for non-SFP connections, so we must call it here. |
2375 | **/ | 2369 | **/ |
2376 | s32 ixgbe_get_san_mac_addr_82599(struct ixgbe_hw *hw, u8 *san_mac_addr) | 2370 | static s32 ixgbe_get_san_mac_addr_82599(struct ixgbe_hw *hw, u8 *san_mac_addr) |
2377 | { | 2371 | { |
2378 | u16 san_mac_data, san_mac_offset; | 2372 | u16 san_mac_data, san_mac_offset; |
2379 | u8 i; | 2373 | u8 i; |
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c index 96a185953777..6621e172df3d 100644 --- a/drivers/net/ixgbe/ixgbe_common.c +++ b/drivers/net/ixgbe/ixgbe_common.c | |||
@@ -53,6 +53,7 @@ static void ixgbe_enable_rar(struct ixgbe_hw *hw, u32 index); | |||
53 | static void ixgbe_disable_rar(struct ixgbe_hw *hw, u32 index); | 53 | static void ixgbe_disable_rar(struct ixgbe_hw *hw, u32 index); |
54 | static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr); | 54 | static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr); |
55 | static void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); | 55 | static void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); |
56 | static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num); | ||
56 | 57 | ||
57 | /** | 58 | /** |
58 | * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx | 59 | * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx |
@@ -1815,7 +1816,7 @@ out: | |||
1815 | * | 1816 | * |
1816 | * Called at init time to set up flow control. | 1817 | * Called at init time to set up flow control. |
1817 | **/ | 1818 | **/ |
1818 | s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num) | 1819 | static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num) |
1819 | { | 1820 | { |
1820 | s32 ret_val = 0; | 1821 | s32 ret_val = 0; |
1821 | u32 reg; | 1822 | u32 reg; |
diff --git a/drivers/net/ixgbe/ixgbe_common.h b/drivers/net/ixgbe/ixgbe_common.h index 0d34d4d8244c..27f3214bed2e 100644 --- a/drivers/net/ixgbe/ixgbe_common.h +++ b/drivers/net/ixgbe/ixgbe_common.h | |||
@@ -64,7 +64,6 @@ s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, | |||
64 | s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); | 64 | s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); |
65 | s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); | 65 | s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); |
66 | s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); | 66 | s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); |
67 | s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num); | ||
68 | s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packtetbuf_num); | 67 | s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packtetbuf_num); |
69 | s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw); | 68 | s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw); |
70 | 69 | ||
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index d69d277886e9..3f1770690bf0 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -3615,7 +3615,7 @@ static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter) | |||
3615 | } | 3615 | } |
3616 | } | 3616 | } |
3617 | 3617 | ||
3618 | void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter) | 3618 | static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter) |
3619 | { | 3619 | { |
3620 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { | 3620 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { |
3621 | adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; | 3621 | adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; |