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path: root/drivers/net/ixgbe/ixgbe_mbx.c
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Diffstat (limited to 'drivers/net/ixgbe/ixgbe_mbx.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_mbx.c48
1 files changed, 20 insertions, 28 deletions
diff --git a/drivers/net/ixgbe/ixgbe_mbx.c b/drivers/net/ixgbe/ixgbe_mbx.c
index d75f9148eb1f..1ff0eefcfd0a 100644
--- a/drivers/net/ixgbe/ixgbe_mbx.c
+++ b/drivers/net/ixgbe/ixgbe_mbx.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2011 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -154,9 +154,6 @@ static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
154 udelay(mbx->usec_delay); 154 udelay(mbx->usec_delay);
155 } 155 }
156 156
157 /* if we failed, all future posted messages fail until reset */
158 if (!countdown)
159 mbx->timeout = 0;
160out: 157out:
161 return countdown ? 0 : IXGBE_ERR_MBX; 158 return countdown ? 0 : IXGBE_ERR_MBX;
162} 159}
@@ -183,9 +180,6 @@ static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
183 udelay(mbx->usec_delay); 180 udelay(mbx->usec_delay);
184 } 181 }
185 182
186 /* if we failed, all future posted messages fail until reset */
187 if (!countdown)
188 mbx->timeout = 0;
189out: 183out:
190 return countdown ? 0 : IXGBE_ERR_MBX; 184 return countdown ? 0 : IXGBE_ERR_MBX;
191} 185}
@@ -200,7 +194,8 @@ out:
200 * returns SUCCESS if it successfully received a message notification and 194 * returns SUCCESS if it successfully received a message notification and
201 * copied it into the receive buffer. 195 * copied it into the receive buffer.
202 **/ 196 **/
203s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) 197static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
198 u16 mbx_id)
204{ 199{
205 struct ixgbe_mbx_info *mbx = &hw->mbx; 200 struct ixgbe_mbx_info *mbx = &hw->mbx;
206 s32 ret_val = IXGBE_ERR_MBX; 201 s32 ret_val = IXGBE_ERR_MBX;
@@ -227,7 +222,7 @@ out:
227 * returns SUCCESS if it successfully copied message into the buffer and 222 * returns SUCCESS if it successfully copied message into the buffer and
228 * received an ack to that message within delay * timeout period 223 * received an ack to that message within delay * timeout period
229 **/ 224 **/
230s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, 225static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
231 u16 mbx_id) 226 u16 mbx_id)
232{ 227{
233 struct ixgbe_mbx_info *mbx = &hw->mbx; 228 struct ixgbe_mbx_info *mbx = &hw->mbx;
@@ -247,20 +242,6 @@ out:
247 return ret_val; 242 return ret_val;
248} 243}
249 244
250/**
251 * ixgbe_init_mbx_ops_generic - Initialize MB function pointers
252 * @hw: pointer to the HW structure
253 *
254 * Setup the mailbox read and write message function pointers
255 **/
256void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw)
257{
258 struct ixgbe_mbx_info *mbx = &hw->mbx;
259
260 mbx->ops.read_posted = ixgbe_read_posted_mbx;
261 mbx->ops.write_posted = ixgbe_write_posted_mbx;
262}
263
264static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) 245static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
265{ 246{
266 u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index)); 247 u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index));
@@ -332,8 +313,16 @@ static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
332 u32 vflre = 0; 313 u32 vflre = 0;
333 s32 ret_val = IXGBE_ERR_MBX; 314 s32 ret_val = IXGBE_ERR_MBX;
334 315
335 if (hw->mac.type == ixgbe_mac_82599EB) 316 switch (hw->mac.type) {
317 case ixgbe_mac_82599EB:
336 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); 318 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
319 break;
320 case ixgbe_mac_X540:
321 vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
322 break;
323 default:
324 break;
325 }
337 326
338 if (vflre & (1 << vf_shift)) { 327 if (vflre & (1 << vf_shift)) {
339 ret_val = 0; 328 ret_val = 0;
@@ -442,6 +431,7 @@ out_no_read:
442 return ret_val; 431 return ret_val;
443} 432}
444 433
434#ifdef CONFIG_PCI_IOV
445/** 435/**
446 * ixgbe_init_mbx_params_pf - set initial values for pf mailbox 436 * ixgbe_init_mbx_params_pf - set initial values for pf mailbox
447 * @hw: pointer to the HW structure 437 * @hw: pointer to the HW structure
@@ -452,22 +442,24 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
452{ 442{
453 struct ixgbe_mbx_info *mbx = &hw->mbx; 443 struct ixgbe_mbx_info *mbx = &hw->mbx;
454 444
455 if (hw->mac.type != ixgbe_mac_82599EB) 445 if (hw->mac.type != ixgbe_mac_82599EB &&
446 hw->mac.type != ixgbe_mac_X540)
456 return; 447 return;
457 448
458 mbx->timeout = 0; 449 mbx->timeout = 0;
459 mbx->usec_delay = 0; 450 mbx->usec_delay = 0;
460 451
461 mbx->size = IXGBE_VFMAILBOX_SIZE;
462
463 mbx->stats.msgs_tx = 0; 452 mbx->stats.msgs_tx = 0;
464 mbx->stats.msgs_rx = 0; 453 mbx->stats.msgs_rx = 0;
465 mbx->stats.reqs = 0; 454 mbx->stats.reqs = 0;
466 mbx->stats.acks = 0; 455 mbx->stats.acks = 0;
467 mbx->stats.rsts = 0; 456 mbx->stats.rsts = 0;
457
458 mbx->size = IXGBE_VFMAILBOX_SIZE;
468} 459}
460#endif /* CONFIG_PCI_IOV */
469 461
470struct ixgbe_mbx_operations mbx_ops_82599 = { 462struct ixgbe_mbx_operations mbx_ops_generic = {
471 .read = ixgbe_read_mbx_pf, 463 .read = ixgbe_read_mbx_pf,
472 .write = ixgbe_write_mbx_pf, 464 .write = ixgbe_write_mbx_pf,
473 .read_posted = ixgbe_read_posted_mbx, 465 .read_posted = ixgbe_read_posted_mbx,