diff options
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_dcb.c')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_dcb.c | 383 |
1 files changed, 178 insertions, 205 deletions
diff --git a/drivers/net/ixgbe/ixgbe_dcb.c b/drivers/net/ixgbe/ixgbe_dcb.c index 9aea4f04bbd2..686a17aadef3 100644 --- a/drivers/net/ixgbe/ixgbe_dcb.c +++ b/drivers/net/ixgbe/ixgbe_dcb.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | 3 | Intel 10 Gigabit PCI Express Linux driver |
4 | Copyright(c) 1999 - 2010 Intel Corporation. | 4 | Copyright(c) 1999 - 2011 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms and conditions of the GNU General Public License, | 7 | under the terms and conditions of the GNU General Public License, |
@@ -34,95 +34,39 @@ | |||
34 | #include "ixgbe_dcb_82599.h" | 34 | #include "ixgbe_dcb_82599.h" |
35 | 35 | ||
36 | /** | 36 | /** |
37 | * ixgbe_dcb_config - Struct containing DCB settings. | 37 | * ixgbe_ieee_credits - This calculates the ieee traffic class |
38 | * @dcb_config: Pointer to DCB config structure | 38 | * credits from the configured bandwidth percentages. Credits |
39 | * | 39 | * are the smallest unit programmable into the underlying |
40 | * This function checks DCB rules for DCB settings. | 40 | * hardware. The IEEE 802.1Qaz specification do not use bandwidth |
41 | * The following rules are checked: | 41 | * groups so this is much simplified from the CEE case. |
42 | * 1. The sum of bandwidth percentages of all Bandwidth Groups must total 100%. | ||
43 | * 2. The sum of bandwidth percentages of all Traffic Classes within a Bandwidth | ||
44 | * Group must total 100. | ||
45 | * 3. A Traffic Class should not be set to both Link Strict Priority | ||
46 | * and Group Strict Priority. | ||
47 | * 4. Link strict Bandwidth Groups can only have link strict traffic classes | ||
48 | * with zero bandwidth. | ||
49 | */ | 42 | */ |
50 | s32 ixgbe_dcb_check_config(struct ixgbe_dcb_config *dcb_config) | 43 | s32 ixgbe_ieee_credits(__u8 *bw, __u16 *refill, __u16 *max, int max_frame) |
51 | { | 44 | { |
52 | struct tc_bw_alloc *p; | 45 | int min_percent = 100; |
53 | s32 ret_val = 0; | 46 | int min_credit, multiplier; |
54 | u8 i, j, bw = 0, bw_id; | 47 | int i; |
55 | u8 bw_sum[2][MAX_BW_GROUP]; | ||
56 | bool link_strict[2][MAX_BW_GROUP]; | ||
57 | |||
58 | memset(bw_sum, 0, sizeof(bw_sum)); | ||
59 | memset(link_strict, 0, sizeof(link_strict)); | ||
60 | |||
61 | /* First Tx, then Rx */ | ||
62 | for (i = 0; i < 2; i++) { | ||
63 | /* Check each traffic class for rule violation */ | ||
64 | for (j = 0; j < MAX_TRAFFIC_CLASS; j++) { | ||
65 | p = &dcb_config->tc_config[j].path[i]; | ||
66 | |||
67 | bw = p->bwg_percent; | ||
68 | bw_id = p->bwg_id; | ||
69 | |||
70 | if (bw_id >= MAX_BW_GROUP) { | ||
71 | ret_val = DCB_ERR_CONFIG; | ||
72 | goto err_config; | ||
73 | } | ||
74 | if (p->prio_type == prio_link) { | ||
75 | link_strict[i][bw_id] = true; | ||
76 | /* Link strict should have zero bandwidth */ | ||
77 | if (bw) { | ||
78 | ret_val = DCB_ERR_LS_BW_NONZERO; | ||
79 | goto err_config; | ||
80 | } | ||
81 | } else if (!bw) { | ||
82 | /* | ||
83 | * Traffic classes without link strict | ||
84 | * should have non-zero bandwidth. | ||
85 | */ | ||
86 | ret_val = DCB_ERR_TC_BW_ZERO; | ||
87 | goto err_config; | ||
88 | } | ||
89 | bw_sum[i][bw_id] += bw; | ||
90 | } | ||
91 | 48 | ||
92 | bw = 0; | 49 | min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) / |
50 | DCB_CREDIT_QUANTUM; | ||
93 | 51 | ||
94 | /* Check each bandwidth group for rule violation */ | 52 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { |
95 | for (j = 0; j < MAX_BW_GROUP; j++) { | 53 | if (bw[i] < min_percent && bw[i]) |
96 | bw += dcb_config->bw_percentage[i][j]; | 54 | min_percent = bw[i]; |
97 | /* | ||
98 | * Sum of bandwidth percentages of all traffic classes | ||
99 | * within a Bandwidth Group must total 100 except for | ||
100 | * link strict group (zero bandwidth). | ||
101 | */ | ||
102 | if (link_strict[i][j]) { | ||
103 | if (bw_sum[i][j]) { | ||
104 | /* | ||
105 | * Link strict group should have zero | ||
106 | * bandwidth. | ||
107 | */ | ||
108 | ret_val = DCB_ERR_LS_BWG_NONZERO; | ||
109 | goto err_config; | ||
110 | } | ||
111 | } else if (bw_sum[i][j] != BW_PERCENT && | ||
112 | bw_sum[i][j] != 0) { | ||
113 | ret_val = DCB_ERR_TC_BW; | ||
114 | goto err_config; | ||
115 | } | ||
116 | } | ||
117 | |||
118 | if (bw != BW_PERCENT) { | ||
119 | ret_val = DCB_ERR_BW_GROUP; | ||
120 | goto err_config; | ||
121 | } | ||
122 | } | 55 | } |
123 | 56 | ||
124 | err_config: | 57 | multiplier = (min_credit / min_percent) + 1; |
125 | return ret_val; | 58 | |
59 | /* Find out the hw credits for each TC */ | ||
60 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | ||
61 | int val = min(bw[i] * multiplier, MAX_CREDIT_REFILL); | ||
62 | |||
63 | if (val < min_credit) | ||
64 | val = min_credit; | ||
65 | refill[i] = val; | ||
66 | |||
67 | max[i] = bw[i] ? (bw[i] * MAX_CREDIT)/100 : min_credit; | ||
68 | } | ||
69 | return 0; | ||
126 | } | 70 | } |
127 | 71 | ||
128 | /** | 72 | /** |
@@ -134,10 +78,14 @@ err_config: | |||
134 | * It should be called only after the rules are checked by | 78 | * It should be called only after the rules are checked by |
135 | * ixgbe_dcb_check_config(). | 79 | * ixgbe_dcb_check_config(). |
136 | */ | 80 | */ |
137 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | 81 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_hw *hw, |
138 | u8 direction) | 82 | struct ixgbe_dcb_config *dcb_config, |
83 | int max_frame, u8 direction) | ||
139 | { | 84 | { |
140 | struct tc_bw_alloc *p; | 85 | struct tc_bw_alloc *p; |
86 | int min_credit; | ||
87 | int min_multiplier; | ||
88 | int min_percent = 100; | ||
141 | s32 ret_val = 0; | 89 | s32 ret_val = 0; |
142 | /* Initialization values default for Tx settings */ | 90 | /* Initialization values default for Tx settings */ |
143 | u32 credit_refill = 0; | 91 | u32 credit_refill = 0; |
@@ -151,6 +99,31 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | |||
151 | goto out; | 99 | goto out; |
152 | } | 100 | } |
153 | 101 | ||
102 | min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) / | ||
103 | DCB_CREDIT_QUANTUM; | ||
104 | |||
105 | /* Find smallest link percentage */ | ||
106 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | ||
107 | p = &dcb_config->tc_config[i].path[direction]; | ||
108 | bw_percent = dcb_config->bw_percentage[direction][p->bwg_id]; | ||
109 | link_percentage = p->bwg_percent; | ||
110 | |||
111 | link_percentage = (link_percentage * bw_percent) / 100; | ||
112 | |||
113 | if (link_percentage && link_percentage < min_percent) | ||
114 | min_percent = link_percentage; | ||
115 | } | ||
116 | |||
117 | /* | ||
118 | * The ratio between traffic classes will control the bandwidth | ||
119 | * percentages seen on the wire. To calculate this ratio we use | ||
120 | * a multiplier. It is required that the refill credits must be | ||
121 | * larger than the max frame size so here we find the smallest | ||
122 | * multiplier that will allow all bandwidth percentages to be | ||
123 | * greater than the max frame size. | ||
124 | */ | ||
125 | min_multiplier = (min_credit / min_percent) + 1; | ||
126 | |||
154 | /* Find out the link percentage for each TC first */ | 127 | /* Find out the link percentage for each TC first */ |
155 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | 128 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { |
156 | p = &dcb_config->tc_config[i].path[direction]; | 129 | p = &dcb_config->tc_config[i].path[direction]; |
@@ -165,8 +138,9 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | |||
165 | /* Save link_percentage for reference */ | 138 | /* Save link_percentage for reference */ |
166 | p->link_percent = (u8)link_percentage; | 139 | p->link_percent = (u8)link_percentage; |
167 | 140 | ||
168 | /* Calculate credit refill and save it */ | 141 | /* Calculate credit refill ratio using multiplier */ |
169 | credit_refill = link_percentage * MINIMUM_CREDIT_REFILL; | 142 | credit_refill = min(link_percentage * min_multiplier, |
143 | MAX_CREDIT_REFILL); | ||
170 | p->data_credits_refill = (u16)credit_refill; | 144 | p->data_credits_refill = (u16)credit_refill; |
171 | 145 | ||
172 | /* Calculate maximum credit for the TC */ | 146 | /* Calculate maximum credit for the TC */ |
@@ -177,8 +151,8 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | |||
177 | * of a TC is too small, the maximum credit may not be | 151 | * of a TC is too small, the maximum credit may not be |
178 | * enough to send out a jumbo frame in data plane arbitration. | 152 | * enough to send out a jumbo frame in data plane arbitration. |
179 | */ | 153 | */ |
180 | if (credit_max && (credit_max < MINIMUM_CREDIT_FOR_JUMBO)) | 154 | if (credit_max && (credit_max < min_credit)) |
181 | credit_max = MINIMUM_CREDIT_FOR_JUMBO; | 155 | credit_max = min_credit; |
182 | 156 | ||
183 | if (direction == DCB_TX_CONFIG) { | 157 | if (direction == DCB_TX_CONFIG) { |
184 | /* | 158 | /* |
@@ -187,7 +161,8 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | |||
187 | * credit may not be enough to send out a TSO | 161 | * credit may not be enough to send out a TSO |
188 | * packet in descriptor plane arbitration. | 162 | * packet in descriptor plane arbitration. |
189 | */ | 163 | */ |
190 | if (credit_max && | 164 | if ((hw->mac.type == ixgbe_mac_82598EB) && |
165 | credit_max && | ||
191 | (credit_max < MINIMUM_CREDIT_FOR_TSO)) | 166 | (credit_max < MINIMUM_CREDIT_FOR_TSO)) |
192 | credit_max = MINIMUM_CREDIT_FOR_TSO; | 167 | credit_max = MINIMUM_CREDIT_FOR_TSO; |
193 | 168 | ||
@@ -202,131 +177,57 @@ out: | |||
202 | return ret_val; | 177 | return ret_val; |
203 | } | 178 | } |
204 | 179 | ||
205 | /** | 180 | void ixgbe_dcb_unpack_pfc(struct ixgbe_dcb_config *cfg, u8 *pfc_en) |
206 | * ixgbe_dcb_get_tc_stats - Returns status of each traffic class | ||
207 | * @hw: pointer to hardware structure | ||
208 | * @stats: pointer to statistics structure | ||
209 | * @tc_count: Number of elements in bwg_array. | ||
210 | * | ||
211 | * This function returns the status data for each of the Traffic Classes in use. | ||
212 | */ | ||
213 | s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, | ||
214 | u8 tc_count) | ||
215 | { | 181 | { |
216 | s32 ret = 0; | 182 | int i; |
217 | if (hw->mac.type == ixgbe_mac_82598EB) | ||
218 | ret = ixgbe_dcb_get_tc_stats_82598(hw, stats, tc_count); | ||
219 | else if (hw->mac.type == ixgbe_mac_82599EB) | ||
220 | ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count); | ||
221 | return ret; | ||
222 | } | ||
223 | 183 | ||
224 | /** | 184 | *pfc_en = 0; |
225 | * ixgbe_dcb_get_pfc_stats - Returns CBFC status of each traffic class | 185 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) |
226 | * hw - pointer to hardware structure | 186 | *pfc_en |= (cfg->tc_config[i].dcb_pfc & 0xF) << i; |
227 | * stats - pointer to statistics structure | ||
228 | * tc_count - Number of elements in bwg_array. | ||
229 | * | ||
230 | * This function returns the CBFC status data for each of the Traffic Classes. | ||
231 | */ | ||
232 | s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, | ||
233 | u8 tc_count) | ||
234 | { | ||
235 | s32 ret = 0; | ||
236 | if (hw->mac.type == ixgbe_mac_82598EB) | ||
237 | ret = ixgbe_dcb_get_pfc_stats_82598(hw, stats, tc_count); | ||
238 | else if (hw->mac.type == ixgbe_mac_82599EB) | ||
239 | ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count); | ||
240 | return ret; | ||
241 | } | 187 | } |
242 | 188 | ||
243 | /** | 189 | void ixgbe_dcb_unpack_refill(struct ixgbe_dcb_config *cfg, int direction, |
244 | * ixgbe_dcb_config_rx_arbiter - Config Rx arbiter | 190 | u16 *refill) |
245 | * @hw: pointer to hardware structure | ||
246 | * @dcb_config: pointer to ixgbe_dcb_config structure | ||
247 | * | ||
248 | * Configure Rx Data Arbiter and credits for each traffic class. | ||
249 | */ | ||
250 | s32 ixgbe_dcb_config_rx_arbiter(struct ixgbe_hw *hw, | ||
251 | struct ixgbe_dcb_config *dcb_config) | ||
252 | { | 191 | { |
253 | s32 ret = 0; | 192 | struct tc_bw_alloc *p; |
254 | if (hw->mac.type == ixgbe_mac_82598EB) | 193 | int i; |
255 | ret = ixgbe_dcb_config_rx_arbiter_82598(hw, dcb_config); | ||
256 | else if (hw->mac.type == ixgbe_mac_82599EB) | ||
257 | ret = ixgbe_dcb_config_rx_arbiter_82599(hw, dcb_config); | ||
258 | return ret; | ||
259 | } | ||
260 | 194 | ||
261 | /** | 195 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { |
262 | * ixgbe_dcb_config_tx_desc_arbiter - Config Tx Desc arbiter | 196 | p = &cfg->tc_config[i].path[direction]; |
263 | * @hw: pointer to hardware structure | 197 | refill[i] = p->data_credits_refill; |
264 | * @dcb_config: pointer to ixgbe_dcb_config structure | 198 | } |
265 | * | ||
266 | * Configure Tx Descriptor Arbiter and credits for each traffic class. | ||
267 | */ | ||
268 | s32 ixgbe_dcb_config_tx_desc_arbiter(struct ixgbe_hw *hw, | ||
269 | struct ixgbe_dcb_config *dcb_config) | ||
270 | { | ||
271 | s32 ret = 0; | ||
272 | if (hw->mac.type == ixgbe_mac_82598EB) | ||
273 | ret = ixgbe_dcb_config_tx_desc_arbiter_82598(hw, dcb_config); | ||
274 | else if (hw->mac.type == ixgbe_mac_82599EB) | ||
275 | ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, dcb_config); | ||
276 | return ret; | ||
277 | } | 199 | } |
278 | 200 | ||
279 | /** | 201 | void ixgbe_dcb_unpack_max(struct ixgbe_dcb_config *cfg, u16 *max) |
280 | * ixgbe_dcb_config_tx_data_arbiter - Config Tx data arbiter | ||
281 | * @hw: pointer to hardware structure | ||
282 | * @dcb_config: pointer to ixgbe_dcb_config structure | ||
283 | * | ||
284 | * Configure Tx Data Arbiter and credits for each traffic class. | ||
285 | */ | ||
286 | s32 ixgbe_dcb_config_tx_data_arbiter(struct ixgbe_hw *hw, | ||
287 | struct ixgbe_dcb_config *dcb_config) | ||
288 | { | 202 | { |
289 | s32 ret = 0; | 203 | int i; |
290 | if (hw->mac.type == ixgbe_mac_82598EB) | 204 | |
291 | ret = ixgbe_dcb_config_tx_data_arbiter_82598(hw, dcb_config); | 205 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) |
292 | else if (hw->mac.type == ixgbe_mac_82599EB) | 206 | max[i] = cfg->tc_config[i].desc_credits_max; |
293 | ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, dcb_config); | ||
294 | return ret; | ||
295 | } | 207 | } |
296 | 208 | ||
297 | /** | 209 | void ixgbe_dcb_unpack_bwgid(struct ixgbe_dcb_config *cfg, int direction, |
298 | * ixgbe_dcb_config_pfc - Config priority flow control | 210 | u8 *bwgid) |
299 | * @hw: pointer to hardware structure | ||
300 | * @dcb_config: pointer to ixgbe_dcb_config structure | ||
301 | * | ||
302 | * Configure Priority Flow Control for each traffic class. | ||
303 | */ | ||
304 | s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, | ||
305 | struct ixgbe_dcb_config *dcb_config) | ||
306 | { | 211 | { |
307 | s32 ret = 0; | 212 | struct tc_bw_alloc *p; |
308 | if (hw->mac.type == ixgbe_mac_82598EB) | 213 | int i; |
309 | ret = ixgbe_dcb_config_pfc_82598(hw, dcb_config); | 214 | |
310 | else if (hw->mac.type == ixgbe_mac_82599EB) | 215 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { |
311 | ret = ixgbe_dcb_config_pfc_82599(hw, dcb_config); | 216 | p = &cfg->tc_config[i].path[direction]; |
312 | return ret; | 217 | bwgid[i] = p->bwg_id; |
218 | } | ||
313 | } | 219 | } |
314 | 220 | ||
315 | /** | 221 | void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *cfg, int direction, |
316 | * ixgbe_dcb_config_tc_stats - Config traffic class statistics | 222 | u8 *ptype) |
317 | * @hw: pointer to hardware structure | ||
318 | * | ||
319 | * Configure queue statistics registers, all queues belonging to same traffic | ||
320 | * class uses a single set of queue statistics counters. | ||
321 | */ | ||
322 | s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw) | ||
323 | { | 223 | { |
324 | s32 ret = 0; | 224 | struct tc_bw_alloc *p; |
325 | if (hw->mac.type == ixgbe_mac_82598EB) | 225 | int i; |
326 | ret = ixgbe_dcb_config_tc_stats_82598(hw); | 226 | |
327 | else if (hw->mac.type == ixgbe_mac_82599EB) | 227 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { |
328 | ret = ixgbe_dcb_config_tc_stats_82599(hw); | 228 | p = &cfg->tc_config[i].path[direction]; |
329 | return ret; | 229 | ptype[i] = p->prio_type; |
230 | } | ||
330 | } | 231 | } |
331 | 232 | ||
332 | /** | 233 | /** |
@@ -340,10 +241,82 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, | |||
340 | struct ixgbe_dcb_config *dcb_config) | 241 | struct ixgbe_dcb_config *dcb_config) |
341 | { | 242 | { |
342 | s32 ret = 0; | 243 | s32 ret = 0; |
343 | if (hw->mac.type == ixgbe_mac_82598EB) | 244 | u8 pfc_en; |
344 | ret = ixgbe_dcb_hw_config_82598(hw, dcb_config); | 245 | u8 ptype[MAX_TRAFFIC_CLASS]; |
345 | else if (hw->mac.type == ixgbe_mac_82599EB) | 246 | u8 bwgid[MAX_TRAFFIC_CLASS]; |
346 | ret = ixgbe_dcb_hw_config_82599(hw, dcb_config); | 247 | u16 refill[MAX_TRAFFIC_CLASS]; |
248 | u16 max[MAX_TRAFFIC_CLASS]; | ||
249 | /* CEE does not define a priority to tc mapping so map 1:1 */ | ||
250 | u8 prio_tc[MAX_TRAFFIC_CLASS] = {0, 1, 2, 3, 4, 5, 6, 7}; | ||
251 | |||
252 | /* Unpack CEE standard containers */ | ||
253 | ixgbe_dcb_unpack_pfc(dcb_config, &pfc_en); | ||
254 | ixgbe_dcb_unpack_refill(dcb_config, DCB_TX_CONFIG, refill); | ||
255 | ixgbe_dcb_unpack_max(dcb_config, max); | ||
256 | ixgbe_dcb_unpack_bwgid(dcb_config, DCB_TX_CONFIG, bwgid); | ||
257 | ixgbe_dcb_unpack_prio(dcb_config, DCB_TX_CONFIG, ptype); | ||
258 | |||
259 | switch (hw->mac.type) { | ||
260 | case ixgbe_mac_82598EB: | ||
261 | ret = ixgbe_dcb_hw_config_82598(hw, dcb_config->rx_pba_cfg, | ||
262 | pfc_en, refill, max, bwgid, | ||
263 | ptype); | ||
264 | break; | ||
265 | case ixgbe_mac_82599EB: | ||
266 | case ixgbe_mac_X540: | ||
267 | ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->rx_pba_cfg, | ||
268 | pfc_en, refill, max, bwgid, | ||
269 | ptype, prio_tc); | ||
270 | break; | ||
271 | default: | ||
272 | break; | ||
273 | } | ||
274 | return ret; | ||
275 | } | ||
276 | |||
277 | /* Helper routines to abstract HW specifics from DCB netlink ops */ | ||
278 | s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en) | ||
279 | { | ||
280 | int ret = -EINVAL; | ||
281 | |||
282 | switch (hw->mac.type) { | ||
283 | case ixgbe_mac_82598EB: | ||
284 | ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en); | ||
285 | break; | ||
286 | case ixgbe_mac_82599EB: | ||
287 | case ixgbe_mac_X540: | ||
288 | ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en); | ||
289 | break; | ||
290 | default: | ||
291 | break; | ||
292 | } | ||
347 | return ret; | 293 | return ret; |
348 | } | 294 | } |
349 | 295 | ||
296 | s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw, | ||
297 | u16 *refill, u16 *max, u8 *bwg_id, | ||
298 | u8 *prio_type, u8 *prio_tc) | ||
299 | { | ||
300 | switch (hw->mac.type) { | ||
301 | case ixgbe_mac_82598EB: | ||
302 | ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, | ||
303 | prio_type); | ||
304 | ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, | ||
305 | bwg_id, prio_type); | ||
306 | ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, | ||
307 | bwg_id, prio_type); | ||
308 | break; | ||
309 | case ixgbe_mac_82599EB: | ||
310 | case ixgbe_mac_X540: | ||
311 | ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, | ||
312 | bwg_id, prio_type, prio_tc); | ||
313 | ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, | ||
314 | bwg_id, prio_type); | ||
315 | ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id, | ||
316 | prio_type, prio_tc); | ||
317 | break; | ||
318 | default: | ||
319 | break; | ||
320 | } | ||
321 | return 0; | ||
322 | } | ||