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path: root/drivers/net/ixgb/ixgb_ee.c
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Diffstat (limited to 'drivers/net/ixgb/ixgb_ee.c')
-rw-r--r--drivers/net/ixgb/ixgb_ee.c24
1 files changed, 8 insertions, 16 deletions
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c
index 89ffa7264a12..813993f9c65c 100644
--- a/drivers/net/ixgb/ixgb_ee.c
+++ b/drivers/net/ixgb/ixgb_ee.c
@@ -26,6 +26,8 @@
26 26
27*******************************************************************************/ 27*******************************************************************************/
28 28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
29#include "ixgb_hw.h" 31#include "ixgb_hw.h"
30#include "ixgb_ee.h" 32#include "ixgb_ee.h"
31/* Local prototypes */ 33/* Local prototypes */
@@ -56,7 +58,6 @@ ixgb_raise_clock(struct ixgb_hw *hw,
56 *eecd_reg = *eecd_reg | IXGB_EECD_SK; 58 *eecd_reg = *eecd_reg | IXGB_EECD_SK;
57 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 59 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
58 udelay(50); 60 udelay(50);
59 return;
60} 61}
61 62
62/****************************************************************************** 63/******************************************************************************
@@ -75,7 +76,6 @@ ixgb_lower_clock(struct ixgb_hw *hw,
75 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; 76 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
76 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 77 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
77 udelay(50); 78 udelay(50);
78 return;
79} 79}
80 80
81/****************************************************************************** 81/******************************************************************************
@@ -125,7 +125,6 @@ ixgb_shift_out_bits(struct ixgb_hw *hw,
125 /* We leave the "DI" bit set to "0" when we leave this routine. */ 125 /* We leave the "DI" bit set to "0" when we leave this routine. */
126 eecd_reg &= ~IXGB_EECD_DI; 126 eecd_reg &= ~IXGB_EECD_DI;
127 IXGB_WRITE_REG(hw, EECD, eecd_reg); 127 IXGB_WRITE_REG(hw, EECD, eecd_reg);
128 return;
129} 128}
130 129
131/****************************************************************************** 130/******************************************************************************
@@ -190,7 +189,6 @@ ixgb_setup_eeprom(struct ixgb_hw *hw)
190 /* Set CS */ 189 /* Set CS */
191 eecd_reg |= IXGB_EECD_CS; 190 eecd_reg |= IXGB_EECD_CS;
192 IXGB_WRITE_REG(hw, EECD, eecd_reg); 191 IXGB_WRITE_REG(hw, EECD, eecd_reg);
193 return;
194} 192}
195 193
196/****************************************************************************** 194/******************************************************************************
@@ -224,7 +222,6 @@ ixgb_standby_eeprom(struct ixgb_hw *hw)
224 eecd_reg &= ~IXGB_EECD_SK; 222 eecd_reg &= ~IXGB_EECD_SK;
225 IXGB_WRITE_REG(hw, EECD, eecd_reg); 223 IXGB_WRITE_REG(hw, EECD, eecd_reg);
226 udelay(50); 224 udelay(50);
227 return;
228} 225}
229 226
230/****************************************************************************** 227/******************************************************************************
@@ -248,7 +245,6 @@ ixgb_clock_eeprom(struct ixgb_hw *hw)
248 eecd_reg &= ~IXGB_EECD_SK; 245 eecd_reg &= ~IXGB_EECD_SK;
249 IXGB_WRITE_REG(hw, EECD, eecd_reg); 246 IXGB_WRITE_REG(hw, EECD, eecd_reg);
250 udelay(50); 247 udelay(50);
251 return;
252} 248}
253 249
254/****************************************************************************** 250/******************************************************************************
@@ -268,7 +264,6 @@ ixgb_cleanup_eeprom(struct ixgb_hw *hw)
268 IXGB_WRITE_REG(hw, EECD, eecd_reg); 264 IXGB_WRITE_REG(hw, EECD, eecd_reg);
269 265
270 ixgb_clock_eeprom(hw); 266 ixgb_clock_eeprom(hw);
271 return;
272} 267}
273 268
274/****************************************************************************** 269/******************************************************************************
@@ -357,7 +352,6 @@ ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
357 checksum = (u16) EEPROM_SUM - checksum; 352 checksum = (u16) EEPROM_SUM - checksum;
358 353
359 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); 354 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
360 return;
361} 355}
362 356
363/****************************************************************************** 357/******************************************************************************
@@ -412,8 +406,6 @@ ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
412 406
413 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ 407 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
414 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); 408 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
415
416 return;
417} 409}
418 410
419/****************************************************************************** 411/******************************************************************************
@@ -467,11 +459,11 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
467 u16 checksum = 0; 459 u16 checksum = 0;
468 struct ixgb_ee_map_type *ee_map; 460 struct ixgb_ee_map_type *ee_map;
469 461
470 DEBUGFUNC("ixgb_get_eeprom_data"); 462 ENTER();
471 463
472 ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 464 ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
473 465
474 DEBUGOUT("ixgb_ee: Reading eeprom data\n"); 466 pr_debug("Reading eeprom data\n");
475 for (i = 0; i < IXGB_EEPROM_SIZE ; i++) { 467 for (i = 0; i < IXGB_EEPROM_SIZE ; i++) {
476 u16 ee_data; 468 u16 ee_data;
477 ee_data = ixgb_read_eeprom(hw, i); 469 ee_data = ixgb_read_eeprom(hw, i);
@@ -480,7 +472,7 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
480 } 472 }
481 473
482 if (checksum != (u16) EEPROM_SUM) { 474 if (checksum != (u16) EEPROM_SUM) {
483 DEBUGOUT("ixgb_ee: Checksum invalid.\n"); 475 pr_debug("Checksum invalid\n");
484 /* clear the init_ctrl_reg_1 to signify that the cache is 476 /* clear the init_ctrl_reg_1 to signify that the cache is
485 * invalidated */ 477 * invalidated */
486 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); 478 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
@@ -489,7 +481,7 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
489 481
490 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK)) 482 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
491 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) { 483 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
492 DEBUGOUT("ixgb_ee: Signature invalid.\n"); 484 pr_debug("Signature invalid\n");
493 return(false); 485 return(false);
494 } 486 }
495 487
@@ -555,13 +547,13 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
555 int i; 547 int i;
556 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 548 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
557 549
558 DEBUGFUNC("ixgb_get_ee_mac_addr"); 550 ENTER();
559 551
560 if (ixgb_check_and_get_eeprom_data(hw) == true) { 552 if (ixgb_check_and_get_eeprom_data(hw) == true) {
561 for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) { 553 for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) {
562 mac_addr[i] = ee_map->mac_addr[i]; 554 mac_addr[i] = ee_map->mac_addr[i];
563 DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]);
564 } 555 }
556 pr_debug("eeprom mac address = %pM\n", mac_addr);
565 } 557 }
566} 558}
567 559