diff options
Diffstat (limited to 'drivers/net/igb')
-rw-r--r-- | drivers/net/igb/e1000_82575.c | 360 | ||||
-rw-r--r-- | drivers/net/igb/e1000_82575.h | 6 | ||||
-rw-r--r-- | drivers/net/igb/e1000_defines.h | 90 | ||||
-rw-r--r-- | drivers/net/igb/e1000_hw.h | 13 | ||||
-rw-r--r-- | drivers/net/igb/e1000_mac.c | 4 | ||||
-rw-r--r-- | drivers/net/igb/e1000_mbx.c | 38 | ||||
-rw-r--r-- | drivers/net/igb/e1000_nvm.c | 157 | ||||
-rw-r--r-- | drivers/net/igb/e1000_nvm.h | 3 | ||||
-rw-r--r-- | drivers/net/igb/e1000_phy.c | 219 | ||||
-rw-r--r-- | drivers/net/igb/e1000_phy.h | 2 | ||||
-rw-r--r-- | drivers/net/igb/e1000_regs.h | 28 | ||||
-rw-r--r-- | drivers/net/igb/igb.h | 22 | ||||
-rw-r--r-- | drivers/net/igb/igb_ethtool.c | 130 | ||||
-rw-r--r-- | drivers/net/igb/igb_main.c | 531 |
14 files changed, 1407 insertions, 196 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index 187622f1c816..0f563c8c5ffc 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c | |||
@@ -64,7 +64,14 @@ static s32 igb_reset_init_script_82575(struct e1000_hw *); | |||
64 | static s32 igb_read_mac_addr_82575(struct e1000_hw *); | 64 | static s32 igb_read_mac_addr_82575(struct e1000_hw *); |
65 | static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw); | 65 | static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw); |
66 | static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw); | 66 | static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw); |
67 | 67 | static s32 igb_validate_nvm_checksum_82580(struct e1000_hw *hw); | |
68 | static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw); | ||
69 | static s32 igb_update_nvm_checksum_with_offset(struct e1000_hw *hw, | ||
70 | u16 offset); | ||
71 | static s32 igb_validate_nvm_checksum_with_offset(struct e1000_hw *hw, | ||
72 | u16 offset); | ||
73 | static s32 igb_validate_nvm_checksum_i350(struct e1000_hw *hw); | ||
74 | static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw); | ||
68 | static const u16 e1000_82580_rxpbs_table[] = | 75 | static const u16 e1000_82580_rxpbs_table[] = |
69 | { 36, 72, 144, 1, 2, 4, 8, 16, | 76 | { 36, 72, 144, 1, 2, 4, 8, 16, |
70 | 35, 70, 140 }; | 77 | 35, 70, 140 }; |
@@ -129,9 +136,14 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
129 | break; | 136 | break; |
130 | case E1000_DEV_ID_82580_COPPER: | 137 | case E1000_DEV_ID_82580_COPPER: |
131 | case E1000_DEV_ID_82580_FIBER: | 138 | case E1000_DEV_ID_82580_FIBER: |
139 | case E1000_DEV_ID_82580_QUAD_FIBER: | ||
132 | case E1000_DEV_ID_82580_SERDES: | 140 | case E1000_DEV_ID_82580_SERDES: |
133 | case E1000_DEV_ID_82580_SGMII: | 141 | case E1000_DEV_ID_82580_SGMII: |
134 | case E1000_DEV_ID_82580_COPPER_DUAL: | 142 | case E1000_DEV_ID_82580_COPPER_DUAL: |
143 | case E1000_DEV_ID_DH89XXCC_SGMII: | ||
144 | case E1000_DEV_ID_DH89XXCC_SERDES: | ||
145 | case E1000_DEV_ID_DH89XXCC_BACKPLANE: | ||
146 | case E1000_DEV_ID_DH89XXCC_SFP: | ||
135 | mac->type = e1000_82580; | 147 | mac->type = e1000_82580; |
136 | break; | 148 | break; |
137 | case E1000_DEV_ID_I350_COPPER: | 149 | case E1000_DEV_ID_I350_COPPER: |
@@ -190,7 +202,11 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
190 | mac->arc_subsystem_valid = | 202 | mac->arc_subsystem_valid = |
191 | (rd32(E1000_FWSM) & E1000_FWSM_MODE_MASK) | 203 | (rd32(E1000_FWSM) & E1000_FWSM_MODE_MASK) |
192 | ? true : false; | 204 | ? true : false; |
193 | 205 | /* enable EEE on i350 parts */ | |
206 | if (mac->type == e1000_i350) | ||
207 | dev_spec->eee_disable = false; | ||
208 | else | ||
209 | dev_spec->eee_disable = true; | ||
194 | /* physical interface link setup */ | 210 | /* physical interface link setup */ |
195 | mac->ops.setup_physical_interface = | 211 | mac->ops.setup_physical_interface = |
196 | (hw->phy.media_type == e1000_media_type_copper) | 212 | (hw->phy.media_type == e1000_media_type_copper) |
@@ -228,14 +244,50 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
228 | */ | 244 | */ |
229 | size += NVM_WORD_SIZE_BASE_SHIFT; | 245 | size += NVM_WORD_SIZE_BASE_SHIFT; |
230 | 246 | ||
231 | /* EEPROM access above 16k is unsupported */ | 247 | /* |
232 | if (size > 14) | 248 | * Check for invalid size |
233 | size = 14; | 249 | */ |
250 | if ((hw->mac.type == e1000_82576) && (size > 15)) { | ||
251 | printk("igb: The NVM size is not valid, " | ||
252 | "defaulting to 32K.\n"); | ||
253 | size = 15; | ||
254 | } | ||
234 | nvm->word_size = 1 << size; | 255 | nvm->word_size = 1 << size; |
256 | if (nvm->word_size == (1 << 15)) | ||
257 | nvm->page_size = 128; | ||
235 | 258 | ||
236 | /* if 82576 then initialize mailbox parameters */ | 259 | /* NVM Function Pointers */ |
237 | if (mac->type == e1000_82576) | 260 | nvm->ops.acquire = igb_acquire_nvm_82575; |
261 | if (nvm->word_size < (1 << 15)) | ||
262 | nvm->ops.read = igb_read_nvm_eerd; | ||
263 | else | ||
264 | nvm->ops.read = igb_read_nvm_spi; | ||
265 | |||
266 | nvm->ops.release = igb_release_nvm_82575; | ||
267 | switch (hw->mac.type) { | ||
268 | case e1000_82580: | ||
269 | nvm->ops.validate = igb_validate_nvm_checksum_82580; | ||
270 | nvm->ops.update = igb_update_nvm_checksum_82580; | ||
271 | break; | ||
272 | case e1000_i350: | ||
273 | nvm->ops.validate = igb_validate_nvm_checksum_i350; | ||
274 | nvm->ops.update = igb_update_nvm_checksum_i350; | ||
275 | break; | ||
276 | default: | ||
277 | nvm->ops.validate = igb_validate_nvm_checksum; | ||
278 | nvm->ops.update = igb_update_nvm_checksum; | ||
279 | } | ||
280 | nvm->ops.write = igb_write_nvm_spi; | ||
281 | |||
282 | /* if part supports SR-IOV then initialize mailbox parameters */ | ||
283 | switch (mac->type) { | ||
284 | case e1000_82576: | ||
285 | case e1000_i350: | ||
238 | igb_init_mbx_params_pf(hw); | 286 | igb_init_mbx_params_pf(hw); |
287 | break; | ||
288 | default: | ||
289 | break; | ||
290 | } | ||
239 | 291 | ||
240 | /* setup PHY parameters */ | 292 | /* setup PHY parameters */ |
241 | if (phy->media_type != e1000_media_type_copper) { | 293 | if (phy->media_type != e1000_media_type_copper) { |
@@ -282,10 +334,18 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
282 | 334 | ||
283 | /* Verify phy id and set remaining function pointers */ | 335 | /* Verify phy id and set remaining function pointers */ |
284 | switch (phy->id) { | 336 | switch (phy->id) { |
337 | case I347AT4_E_PHY_ID: | ||
338 | case M88E1112_E_PHY_ID: | ||
285 | case M88E1111_I_PHY_ID: | 339 | case M88E1111_I_PHY_ID: |
286 | phy->type = e1000_phy_m88; | 340 | phy->type = e1000_phy_m88; |
287 | phy->ops.get_phy_info = igb_get_phy_info_m88; | 341 | phy->ops.get_phy_info = igb_get_phy_info_m88; |
288 | phy->ops.get_cable_length = igb_get_cable_length_m88; | 342 | |
343 | if (phy->id == I347AT4_E_PHY_ID || | ||
344 | phy->id == M88E1112_E_PHY_ID) | ||
345 | phy->ops.get_cable_length = igb_get_cable_length_m88_gen2; | ||
346 | else | ||
347 | phy->ops.get_cable_length = igb_get_cable_length_m88; | ||
348 | |||
289 | phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; | 349 | phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; |
290 | break; | 350 | break; |
291 | case IGP03E1000_E_PHY_ID: | 351 | case IGP03E1000_E_PHY_ID: |
@@ -1058,7 +1118,11 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw) | |||
1058 | } | 1118 | } |
1059 | switch (hw->phy.type) { | 1119 | switch (hw->phy.type) { |
1060 | case e1000_phy_m88: | 1120 | case e1000_phy_m88: |
1061 | ret_val = igb_copper_link_setup_m88(hw); | 1121 | if (hw->phy.id == I347AT4_E_PHY_ID || |
1122 | hw->phy.id == M88E1112_E_PHY_ID) | ||
1123 | ret_val = igb_copper_link_setup_m88_gen2(hw); | ||
1124 | else | ||
1125 | ret_val = igb_copper_link_setup_m88(hw); | ||
1062 | break; | 1126 | break; |
1063 | case e1000_phy_igp_3: | 1127 | case e1000_phy_igp_3: |
1064 | ret_val = igb_copper_link_setup_igp(hw); | 1128 | ret_val = igb_copper_link_setup_igp(hw); |
@@ -1464,6 +1528,39 @@ out: | |||
1464 | } | 1528 | } |
1465 | 1529 | ||
1466 | /** | 1530 | /** |
1531 | * igb_vmdq_set_anti_spoofing_pf - enable or disable anti-spoofing | ||
1532 | * @hw: pointer to the hardware struct | ||
1533 | * @enable: state to enter, either enabled or disabled | ||
1534 | * @pf: Physical Function pool - do not set anti-spoofing for the PF | ||
1535 | * | ||
1536 | * enables/disables L2 switch anti-spoofing functionality. | ||
1537 | **/ | ||
1538 | void igb_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf) | ||
1539 | { | ||
1540 | u32 dtxswc; | ||
1541 | |||
1542 | switch (hw->mac.type) { | ||
1543 | case e1000_82576: | ||
1544 | case e1000_i350: | ||
1545 | dtxswc = rd32(E1000_DTXSWC); | ||
1546 | if (enable) { | ||
1547 | dtxswc |= (E1000_DTXSWC_MAC_SPOOF_MASK | | ||
1548 | E1000_DTXSWC_VLAN_SPOOF_MASK); | ||
1549 | /* The PF can spoof - it has to in order to | ||
1550 | * support emulation mode NICs */ | ||
1551 | dtxswc ^= (1 << pf | 1 << (pf + MAX_NUM_VFS)); | ||
1552 | } else { | ||
1553 | dtxswc &= ~(E1000_DTXSWC_MAC_SPOOF_MASK | | ||
1554 | E1000_DTXSWC_VLAN_SPOOF_MASK); | ||
1555 | } | ||
1556 | wr32(E1000_DTXSWC, dtxswc); | ||
1557 | break; | ||
1558 | default: | ||
1559 | break; | ||
1560 | } | ||
1561 | } | ||
1562 | |||
1563 | /** | ||
1467 | * igb_vmdq_set_loopback_pf - enable or disable vmdq loopback | 1564 | * igb_vmdq_set_loopback_pf - enable or disable vmdq loopback |
1468 | * @hw: pointer to the hardware struct | 1565 | * @hw: pointer to the hardware struct |
1469 | * @enable: state to enter, either enabled or disabled | 1566 | * @enable: state to enter, either enabled or disabled |
@@ -1564,7 +1661,7 @@ static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw) | |||
1564 | { | 1661 | { |
1565 | s32 ret_val = 0; | 1662 | s32 ret_val = 0; |
1566 | u32 mdicnfg; | 1663 | u32 mdicnfg; |
1567 | u16 nvm_data; | 1664 | u16 nvm_data = 0; |
1568 | 1665 | ||
1569 | if (hw->mac.type != e1000_82580) | 1666 | if (hw->mac.type != e1000_82580) |
1570 | goto out; | 1667 | goto out; |
@@ -1698,6 +1795,249 @@ u16 igb_rxpbs_adjust_82580(u32 data) | |||
1698 | return ret_val; | 1795 | return ret_val; |
1699 | } | 1796 | } |
1700 | 1797 | ||
1798 | /** | ||
1799 | * igb_validate_nvm_checksum_with_offset - Validate EEPROM | ||
1800 | * checksum | ||
1801 | * @hw: pointer to the HW structure | ||
1802 | * @offset: offset in words of the checksum protected region | ||
1803 | * | ||
1804 | * Calculates the EEPROM checksum by reading/adding each word of the EEPROM | ||
1805 | * and then verifies that the sum of the EEPROM is equal to 0xBABA. | ||
1806 | **/ | ||
1807 | s32 igb_validate_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset) | ||
1808 | { | ||
1809 | s32 ret_val = 0; | ||
1810 | u16 checksum = 0; | ||
1811 | u16 i, nvm_data; | ||
1812 | |||
1813 | for (i = offset; i < ((NVM_CHECKSUM_REG + offset) + 1); i++) { | ||
1814 | ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); | ||
1815 | if (ret_val) { | ||
1816 | hw_dbg("NVM Read Error\n"); | ||
1817 | goto out; | ||
1818 | } | ||
1819 | checksum += nvm_data; | ||
1820 | } | ||
1821 | |||
1822 | if (checksum != (u16) NVM_SUM) { | ||
1823 | hw_dbg("NVM Checksum Invalid\n"); | ||
1824 | ret_val = -E1000_ERR_NVM; | ||
1825 | goto out; | ||
1826 | } | ||
1827 | |||
1828 | out: | ||
1829 | return ret_val; | ||
1830 | } | ||
1831 | |||
1832 | /** | ||
1833 | * igb_update_nvm_checksum_with_offset - Update EEPROM | ||
1834 | * checksum | ||
1835 | * @hw: pointer to the HW structure | ||
1836 | * @offset: offset in words of the checksum protected region | ||
1837 | * | ||
1838 | * Updates the EEPROM checksum by reading/adding each word of the EEPROM | ||
1839 | * up to the checksum. Then calculates the EEPROM checksum and writes the | ||
1840 | * value to the EEPROM. | ||
1841 | **/ | ||
1842 | s32 igb_update_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset) | ||
1843 | { | ||
1844 | s32 ret_val; | ||
1845 | u16 checksum = 0; | ||
1846 | u16 i, nvm_data; | ||
1847 | |||
1848 | for (i = offset; i < (NVM_CHECKSUM_REG + offset); i++) { | ||
1849 | ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); | ||
1850 | if (ret_val) { | ||
1851 | hw_dbg("NVM Read Error while updating checksum.\n"); | ||
1852 | goto out; | ||
1853 | } | ||
1854 | checksum += nvm_data; | ||
1855 | } | ||
1856 | checksum = (u16) NVM_SUM - checksum; | ||
1857 | ret_val = hw->nvm.ops.write(hw, (NVM_CHECKSUM_REG + offset), 1, | ||
1858 | &checksum); | ||
1859 | if (ret_val) | ||
1860 | hw_dbg("NVM Write Error while updating checksum.\n"); | ||
1861 | |||
1862 | out: | ||
1863 | return ret_val; | ||
1864 | } | ||
1865 | |||
1866 | /** | ||
1867 | * igb_validate_nvm_checksum_82580 - Validate EEPROM checksum | ||
1868 | * @hw: pointer to the HW structure | ||
1869 | * | ||
1870 | * Calculates the EEPROM section checksum by reading/adding each word of | ||
1871 | * the EEPROM and then verifies that the sum of the EEPROM is | ||
1872 | * equal to 0xBABA. | ||
1873 | **/ | ||
1874 | static s32 igb_validate_nvm_checksum_82580(struct e1000_hw *hw) | ||
1875 | { | ||
1876 | s32 ret_val = 0; | ||
1877 | u16 eeprom_regions_count = 1; | ||
1878 | u16 j, nvm_data; | ||
1879 | u16 nvm_offset; | ||
1880 | |||
1881 | ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); | ||
1882 | if (ret_val) { | ||
1883 | hw_dbg("NVM Read Error\n"); | ||
1884 | goto out; | ||
1885 | } | ||
1886 | |||
1887 | if (nvm_data & NVM_COMPATIBILITY_BIT_MASK) { | ||
1888 | /* if checksums compatibility bit is set validate checksums | ||
1889 | * for all 4 ports. */ | ||
1890 | eeprom_regions_count = 4; | ||
1891 | } | ||
1892 | |||
1893 | for (j = 0; j < eeprom_regions_count; j++) { | ||
1894 | nvm_offset = NVM_82580_LAN_FUNC_OFFSET(j); | ||
1895 | ret_val = igb_validate_nvm_checksum_with_offset(hw, | ||
1896 | nvm_offset); | ||
1897 | if (ret_val != 0) | ||
1898 | goto out; | ||
1899 | } | ||
1900 | |||
1901 | out: | ||
1902 | return ret_val; | ||
1903 | } | ||
1904 | |||
1905 | /** | ||
1906 | * igb_update_nvm_checksum_82580 - Update EEPROM checksum | ||
1907 | * @hw: pointer to the HW structure | ||
1908 | * | ||
1909 | * Updates the EEPROM section checksums for all 4 ports by reading/adding | ||
1910 | * each word of the EEPROM up to the checksum. Then calculates the EEPROM | ||
1911 | * checksum and writes the value to the EEPROM. | ||
1912 | **/ | ||
1913 | static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw) | ||
1914 | { | ||
1915 | s32 ret_val; | ||
1916 | u16 j, nvm_data; | ||
1917 | u16 nvm_offset; | ||
1918 | |||
1919 | ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); | ||
1920 | if (ret_val) { | ||
1921 | hw_dbg("NVM Read Error while updating checksum" | ||
1922 | " compatibility bit.\n"); | ||
1923 | goto out; | ||
1924 | } | ||
1925 | |||
1926 | if ((nvm_data & NVM_COMPATIBILITY_BIT_MASK) == 0) { | ||
1927 | /* set compatibility bit to validate checksums appropriately */ | ||
1928 | nvm_data = nvm_data | NVM_COMPATIBILITY_BIT_MASK; | ||
1929 | ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1, | ||
1930 | &nvm_data); | ||
1931 | if (ret_val) { | ||
1932 | hw_dbg("NVM Write Error while updating checksum" | ||
1933 | " compatibility bit.\n"); | ||
1934 | goto out; | ||
1935 | } | ||
1936 | } | ||
1937 | |||
1938 | for (j = 0; j < 4; j++) { | ||
1939 | nvm_offset = NVM_82580_LAN_FUNC_OFFSET(j); | ||
1940 | ret_val = igb_update_nvm_checksum_with_offset(hw, nvm_offset); | ||
1941 | if (ret_val) | ||
1942 | goto out; | ||
1943 | } | ||
1944 | |||
1945 | out: | ||
1946 | return ret_val; | ||
1947 | } | ||
1948 | |||
1949 | /** | ||
1950 | * igb_validate_nvm_checksum_i350 - Validate EEPROM checksum | ||
1951 | * @hw: pointer to the HW structure | ||
1952 | * | ||
1953 | * Calculates the EEPROM section checksum by reading/adding each word of | ||
1954 | * the EEPROM and then verifies that the sum of the EEPROM is | ||
1955 | * equal to 0xBABA. | ||
1956 | **/ | ||
1957 | static s32 igb_validate_nvm_checksum_i350(struct e1000_hw *hw) | ||
1958 | { | ||
1959 | s32 ret_val = 0; | ||
1960 | u16 j; | ||
1961 | u16 nvm_offset; | ||
1962 | |||
1963 | for (j = 0; j < 4; j++) { | ||
1964 | nvm_offset = NVM_82580_LAN_FUNC_OFFSET(j); | ||
1965 | ret_val = igb_validate_nvm_checksum_with_offset(hw, | ||
1966 | nvm_offset); | ||
1967 | if (ret_val != 0) | ||
1968 | goto out; | ||
1969 | } | ||
1970 | |||
1971 | out: | ||
1972 | return ret_val; | ||
1973 | } | ||
1974 | |||
1975 | /** | ||
1976 | * igb_update_nvm_checksum_i350 - Update EEPROM checksum | ||
1977 | * @hw: pointer to the HW structure | ||
1978 | * | ||
1979 | * Updates the EEPROM section checksums for all 4 ports by reading/adding | ||
1980 | * each word of the EEPROM up to the checksum. Then calculates the EEPROM | ||
1981 | * checksum and writes the value to the EEPROM. | ||
1982 | **/ | ||
1983 | static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw) | ||
1984 | { | ||
1985 | s32 ret_val = 0; | ||
1986 | u16 j; | ||
1987 | u16 nvm_offset; | ||
1988 | |||
1989 | for (j = 0; j < 4; j++) { | ||
1990 | nvm_offset = NVM_82580_LAN_FUNC_OFFSET(j); | ||
1991 | ret_val = igb_update_nvm_checksum_with_offset(hw, nvm_offset); | ||
1992 | if (ret_val != 0) | ||
1993 | goto out; | ||
1994 | } | ||
1995 | |||
1996 | out: | ||
1997 | return ret_val; | ||
1998 | } | ||
1999 | |||
2000 | /** | ||
2001 | * igb_set_eee_i350 - Enable/disable EEE support | ||
2002 | * @hw: pointer to the HW structure | ||
2003 | * | ||
2004 | * Enable/disable EEE based on setting in dev_spec structure. | ||
2005 | * | ||
2006 | **/ | ||
2007 | s32 igb_set_eee_i350(struct e1000_hw *hw) | ||
2008 | { | ||
2009 | s32 ret_val = 0; | ||
2010 | u32 ipcnfg, eeer, ctrl_ext; | ||
2011 | |||
2012 | ctrl_ext = rd32(E1000_CTRL_EXT); | ||
2013 | if ((hw->mac.type != e1000_i350) || | ||
2014 | (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK)) | ||
2015 | goto out; | ||
2016 | ipcnfg = rd32(E1000_IPCNFG); | ||
2017 | eeer = rd32(E1000_EEER); | ||
2018 | |||
2019 | /* enable or disable per user setting */ | ||
2020 | if (!(hw->dev_spec._82575.eee_disable)) { | ||
2021 | ipcnfg |= (E1000_IPCNFG_EEE_1G_AN | | ||
2022 | E1000_IPCNFG_EEE_100M_AN); | ||
2023 | eeer |= (E1000_EEER_TX_LPI_EN | | ||
2024 | E1000_EEER_RX_LPI_EN | | ||
2025 | E1000_EEER_LPI_FC); | ||
2026 | |||
2027 | } else { | ||
2028 | ipcnfg &= ~(E1000_IPCNFG_EEE_1G_AN | | ||
2029 | E1000_IPCNFG_EEE_100M_AN); | ||
2030 | eeer &= ~(E1000_EEER_TX_LPI_EN | | ||
2031 | E1000_EEER_RX_LPI_EN | | ||
2032 | E1000_EEER_LPI_FC); | ||
2033 | } | ||
2034 | wr32(E1000_IPCNFG, ipcnfg); | ||
2035 | wr32(E1000_EEER, eeer); | ||
2036 | out: | ||
2037 | |||
2038 | return ret_val; | ||
2039 | } | ||
2040 | |||
1701 | static struct e1000_mac_operations e1000_mac_ops_82575 = { | 2041 | static struct e1000_mac_operations e1000_mac_ops_82575 = { |
1702 | .init_hw = igb_init_hw_82575, | 2042 | .init_hw = igb_init_hw_82575, |
1703 | .check_for_link = igb_check_for_link_82575, | 2043 | .check_for_link = igb_check_for_link_82575, |
diff --git a/drivers/net/igb/e1000_82575.h b/drivers/net/igb/e1000_82575.h index cbd1e1259e4d..dd6df3498998 100644 --- a/drivers/net/igb/e1000_82575.h +++ b/drivers/net/igb/e1000_82575.h | |||
@@ -194,6 +194,10 @@ struct e1000_adv_tx_context_desc { | |||
194 | #define E1000_NVM_APME_82575 0x0400 | 194 | #define E1000_NVM_APME_82575 0x0400 |
195 | #define MAX_NUM_VFS 8 | 195 | #define MAX_NUM_VFS 8 |
196 | 196 | ||
197 | #define E1000_DTXSWC_MAC_SPOOF_MASK 0x000000FF /* Per VF MAC spoof control */ | ||
198 | #define E1000_DTXSWC_VLAN_SPOOF_MASK 0x0000FF00 /* Per VF VLAN spoof control */ | ||
199 | #define E1000_DTXSWC_LLE_MASK 0x00FF0000 /* Per VF Local LB enables */ | ||
200 | #define E1000_DTXSWC_VLAN_SPOOF_SHIFT 8 | ||
197 | #define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31) /* global VF LB enable */ | 201 | #define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31) /* global VF LB enable */ |
198 | 202 | ||
199 | /* Easy defines for setting default pool, would normally be left a zero */ | 203 | /* Easy defines for setting default pool, would normally be left a zero */ |
@@ -243,8 +247,10 @@ struct e1000_adv_tx_context_desc { | |||
243 | 247 | ||
244 | /* RX packet buffer size defines */ | 248 | /* RX packet buffer size defines */ |
245 | #define E1000_RXPBS_SIZE_MASK_82576 0x0000007F | 249 | #define E1000_RXPBS_SIZE_MASK_82576 0x0000007F |
250 | void igb_vmdq_set_anti_spoofing_pf(struct e1000_hw *, bool, int); | ||
246 | void igb_vmdq_set_loopback_pf(struct e1000_hw *, bool); | 251 | void igb_vmdq_set_loopback_pf(struct e1000_hw *, bool); |
247 | void igb_vmdq_set_replication_pf(struct e1000_hw *, bool); | 252 | void igb_vmdq_set_replication_pf(struct e1000_hw *, bool); |
248 | u16 igb_rxpbs_adjust_82580(u32 data); | 253 | u16 igb_rxpbs_adjust_82580(u32 data); |
254 | s32 igb_set_eee_i350(struct e1000_hw *); | ||
249 | 255 | ||
250 | #endif | 256 | #endif |
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h index bbd2ec308eb0..6b80d40110ca 100644 --- a/drivers/net/igb/e1000_defines.h +++ b/drivers/net/igb/e1000_defines.h | |||
@@ -51,6 +51,7 @@ | |||
51 | #define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 | 51 | #define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 |
52 | #define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX 0x00400000 | 52 | #define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX 0x00400000 |
53 | #define E1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000 | 53 | #define E1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000 |
54 | #define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000 | ||
54 | #define E1000_CTRL_EXT_EIAME 0x01000000 | 55 | #define E1000_CTRL_EXT_EIAME 0x01000000 |
55 | #define E1000_CTRL_EXT_IRCA 0x00000001 | 56 | #define E1000_CTRL_EXT_IRCA 0x00000001 |
56 | /* Interrupt delay cancellation */ | 57 | /* Interrupt delay cancellation */ |
@@ -110,6 +111,7 @@ | |||
110 | /* Management Control */ | 111 | /* Management Control */ |
111 | #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */ | 112 | #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */ |
112 | #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */ | 113 | #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */ |
114 | #define E1000_MANC_EN_BMC2OS 0x10000000 /* OSBMC is Enabled or not */ | ||
113 | /* Enable Neighbor Discovery Filtering */ | 115 | /* Enable Neighbor Discovery Filtering */ |
114 | #define E1000_MANC_RCV_TCO_EN 0x00020000 /* Receive TCO Packets Enabled */ | 116 | #define E1000_MANC_RCV_TCO_EN 0x00020000 /* Receive TCO Packets Enabled */ |
115 | #define E1000_MANC_BLK_PHY_RST_ON_IDE 0x00040000 /* Block phy resets */ | 117 | #define E1000_MANC_BLK_PHY_RST_ON_IDE 0x00040000 /* Block phy resets */ |
@@ -286,7 +288,34 @@ | |||
286 | #define E1000_TCTL_COLD 0x003ff000 /* collision distance */ | 288 | #define E1000_TCTL_COLD 0x003ff000 /* collision distance */ |
287 | #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */ | 289 | #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */ |
288 | 290 | ||
289 | /* Transmit Arbitration Count */ | 291 | /* DMA Coalescing register fields */ |
292 | #define E1000_DMACR_DMACWT_MASK 0x00003FFF /* DMA Coalescing | ||
293 | * Watchdog Timer */ | ||
294 | #define E1000_DMACR_DMACTHR_MASK 0x00FF0000 /* DMA Coalescing Receive | ||
295 | * Threshold */ | ||
296 | #define E1000_DMACR_DMACTHR_SHIFT 16 | ||
297 | #define E1000_DMACR_DMAC_LX_MASK 0x30000000 /* Lx when no PCIe | ||
298 | * transactions */ | ||
299 | #define E1000_DMACR_DMAC_LX_SHIFT 28 | ||
300 | #define E1000_DMACR_DMAC_EN 0x80000000 /* Enable DMA Coalescing */ | ||
301 | |||
302 | #define E1000_DMCTXTH_DMCTTHR_MASK 0x00000FFF /* DMA Coalescing Transmit | ||
303 | * Threshold */ | ||
304 | |||
305 | #define E1000_DMCTLX_TTLX_MASK 0x00000FFF /* Time to LX request */ | ||
306 | |||
307 | #define E1000_DMCRTRH_UTRESH_MASK 0x0007FFFF /* Receive Traffic Rate | ||
308 | * Threshold */ | ||
309 | #define E1000_DMCRTRH_LRPRCW 0x80000000 /* Rcv packet rate in | ||
310 | * current window */ | ||
311 | |||
312 | #define E1000_DMCCNT_CCOUNT_MASK 0x01FFFFFF /* DMA Coal Rcv Traffic | ||
313 | * Current Cnt */ | ||
314 | |||
315 | #define E1000_FCRTC_RTH_COAL_MASK 0x0003FFF0 /* Flow ctrl Rcv Threshold | ||
316 | * High val */ | ||
317 | #define E1000_FCRTC_RTH_COAL_SHIFT 4 | ||
318 | #define E1000_PCIEMISC_LX_DECISION 0x00000080 /* Lx power decision */ | ||
290 | 319 | ||
291 | /* SerDes Control */ | 320 | /* SerDes Control */ |
292 | #define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400 | 321 | #define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400 |
@@ -419,6 +448,9 @@ | |||
419 | #define E1000_ERR_SWFW_SYNC 13 | 448 | #define E1000_ERR_SWFW_SYNC 13 |
420 | #define E1000_NOT_IMPLEMENTED 14 | 449 | #define E1000_NOT_IMPLEMENTED 14 |
421 | #define E1000_ERR_MBX 15 | 450 | #define E1000_ERR_MBX 15 |
451 | #define E1000_ERR_INVALID_ARGUMENT 16 | ||
452 | #define E1000_ERR_NO_SPACE 17 | ||
453 | #define E1000_ERR_NVM_PBA_SECTION 18 | ||
422 | 454 | ||
423 | /* Loop limit on how long we wait for auto-negotiation to complete */ | 455 | /* Loop limit on how long we wait for auto-negotiation to complete */ |
424 | #define COPPER_LINK_UP_LIMIT 10 | 456 | #define COPPER_LINK_UP_LIMIT 10 |
@@ -562,6 +594,8 @@ | |||
562 | #define NVM_INIT_CONTROL3_PORT_A 0x0024 | 594 | #define NVM_INIT_CONTROL3_PORT_A 0x0024 |
563 | #define NVM_ALT_MAC_ADDR_PTR 0x0037 | 595 | #define NVM_ALT_MAC_ADDR_PTR 0x0037 |
564 | #define NVM_CHECKSUM_REG 0x003F | 596 | #define NVM_CHECKSUM_REG 0x003F |
597 | #define NVM_COMPATIBILITY_REG_3 0x0003 | ||
598 | #define NVM_COMPATIBILITY_BIT_MASK 0x8000 | ||
565 | 599 | ||
566 | #define E1000_NVM_CFG_DONE_PORT_0 0x040000 /* MNG config cycle done */ | 600 | #define E1000_NVM_CFG_DONE_PORT_0 0x040000 /* MNG config cycle done */ |
567 | #define E1000_NVM_CFG_DONE_PORT_1 0x080000 /* ...for second port */ | 601 | #define E1000_NVM_CFG_DONE_PORT_1 0x080000 /* ...for second port */ |
@@ -580,11 +614,15 @@ | |||
580 | 614 | ||
581 | /* Mask bits for fields in Word 0x1a of the NVM */ | 615 | /* Mask bits for fields in Word 0x1a of the NVM */ |
582 | 616 | ||
617 | /* length of string needed to store part num */ | ||
618 | #define E1000_PBANUM_LENGTH 11 | ||
619 | |||
583 | /* For checksumming, the sum of all words in the NVM should equal 0xBABA. */ | 620 | /* For checksumming, the sum of all words in the NVM should equal 0xBABA. */ |
584 | #define NVM_SUM 0xBABA | 621 | #define NVM_SUM 0xBABA |
585 | 622 | ||
586 | #define NVM_PBA_OFFSET_0 8 | 623 | #define NVM_PBA_OFFSET_0 8 |
587 | #define NVM_PBA_OFFSET_1 9 | 624 | #define NVM_PBA_OFFSET_1 9 |
625 | #define NVM_PBA_PTR_GUARD 0xFAFA | ||
588 | #define NVM_WORD_SIZE_BASE_SHIFT 6 | 626 | #define NVM_WORD_SIZE_BASE_SHIFT 6 |
589 | 627 | ||
590 | /* NVM Commands - Microwire */ | 628 | /* NVM Commands - Microwire */ |
@@ -592,6 +630,7 @@ | |||
592 | /* NVM Commands - SPI */ | 630 | /* NVM Commands - SPI */ |
593 | #define NVM_MAX_RETRY_SPI 5000 /* Max wait of 5ms, for RDY signal */ | 631 | #define NVM_MAX_RETRY_SPI 5000 /* Max wait of 5ms, for RDY signal */ |
594 | #define NVM_WRITE_OPCODE_SPI 0x02 /* NVM write opcode */ | 632 | #define NVM_WRITE_OPCODE_SPI 0x02 /* NVM write opcode */ |
633 | #define NVM_READ_OPCODE_SPI 0x03 /* NVM read opcode */ | ||
595 | #define NVM_A8_OPCODE_SPI 0x08 /* opcode bit-3 = address bit-8 */ | 634 | #define NVM_A8_OPCODE_SPI 0x08 /* opcode bit-3 = address bit-8 */ |
596 | #define NVM_WREN_OPCODE_SPI 0x06 /* NVM set Write Enable latch */ | 635 | #define NVM_WREN_OPCODE_SPI 0x06 /* NVM set Write Enable latch */ |
597 | #define NVM_RDSR_OPCODE_SPI 0x05 /* NVM read Status register */ | 636 | #define NVM_RDSR_OPCODE_SPI 0x05 /* NVM read Status register */ |
@@ -634,6 +673,8 @@ | |||
634 | * E = External | 673 | * E = External |
635 | */ | 674 | */ |
636 | #define M88E1111_I_PHY_ID 0x01410CC0 | 675 | #define M88E1111_I_PHY_ID 0x01410CC0 |
676 | #define M88E1112_E_PHY_ID 0x01410C90 | ||
677 | #define I347AT4_E_PHY_ID 0x01410DC0 | ||
637 | #define IGP03E1000_E_PHY_ID 0x02A80390 | 678 | #define IGP03E1000_E_PHY_ID 0x02A80390 |
638 | #define I82580_I_PHY_ID 0x015403A0 | 679 | #define I82580_I_PHY_ID 0x015403A0 |
639 | #define I350_I_PHY_ID 0x015403B0 | 680 | #define I350_I_PHY_ID 0x015403B0 |
@@ -702,6 +743,35 @@ | |||
702 | #define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X 0x0100 | 743 | #define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X 0x0100 |
703 | #define M88E1000_EPSCR_TX_CLK_25 0x0070 /* 25 MHz TX_CLK */ | 744 | #define M88E1000_EPSCR_TX_CLK_25 0x0070 /* 25 MHz TX_CLK */ |
704 | 745 | ||
746 | /* Intel i347-AT4 Registers */ | ||
747 | |||
748 | #define I347AT4_PCDL 0x10 /* PHY Cable Diagnostics Length */ | ||
749 | #define I347AT4_PCDC 0x15 /* PHY Cable Diagnostics Control */ | ||
750 | #define I347AT4_PAGE_SELECT 0x16 | ||
751 | |||
752 | /* i347-AT4 Extended PHY Specific Control Register */ | ||
753 | |||
754 | /* | ||
755 | * Number of times we will attempt to autonegotiate before downshifting if we | ||
756 | * are the master | ||
757 | */ | ||
758 | #define I347AT4_PSCR_DOWNSHIFT_ENABLE 0x0800 | ||
759 | #define I347AT4_PSCR_DOWNSHIFT_MASK 0x7000 | ||
760 | #define I347AT4_PSCR_DOWNSHIFT_1X 0x0000 | ||
761 | #define I347AT4_PSCR_DOWNSHIFT_2X 0x1000 | ||
762 | #define I347AT4_PSCR_DOWNSHIFT_3X 0x2000 | ||
763 | #define I347AT4_PSCR_DOWNSHIFT_4X 0x3000 | ||
764 | #define I347AT4_PSCR_DOWNSHIFT_5X 0x4000 | ||
765 | #define I347AT4_PSCR_DOWNSHIFT_6X 0x5000 | ||
766 | #define I347AT4_PSCR_DOWNSHIFT_7X 0x6000 | ||
767 | #define I347AT4_PSCR_DOWNSHIFT_8X 0x7000 | ||
768 | |||
769 | /* i347-AT4 PHY Cable Diagnostics Control */ | ||
770 | #define I347AT4_PCDC_CABLE_LENGTH_UNIT 0x0400 /* 0=cm 1=meters */ | ||
771 | |||
772 | /* Marvell 1112 only registers */ | ||
773 | #define M88E1112_VCT_DSP_DISTANCE 0x001A | ||
774 | |||
705 | /* M88EC018 Rev 2 specific DownShift settings */ | 775 | /* M88EC018 Rev 2 specific DownShift settings */ |
706 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00 | 776 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00 |
707 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800 | 777 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800 |
@@ -719,6 +789,17 @@ | |||
719 | #define E1000_MDIC_ERROR 0x40000000 | 789 | #define E1000_MDIC_ERROR 0x40000000 |
720 | #define E1000_MDIC_DEST 0x80000000 | 790 | #define E1000_MDIC_DEST 0x80000000 |
721 | 791 | ||
792 | /* Thermal Sensor */ | ||
793 | #define E1000_THSTAT_PWR_DOWN 0x00000001 /* Power Down Event */ | ||
794 | #define E1000_THSTAT_LINK_THROTTLE 0x00000002 /* Link Speed Throttle Event */ | ||
795 | |||
796 | /* Energy Efficient Ethernet */ | ||
797 | #define E1000_IPCNFG_EEE_1G_AN 0x00000008 /* EEE Enable 1G AN */ | ||
798 | #define E1000_IPCNFG_EEE_100M_AN 0x00000004 /* EEE Enable 100M AN */ | ||
799 | #define E1000_EEER_TX_LPI_EN 0x00010000 /* EEE Tx LPI Enable */ | ||
800 | #define E1000_EEER_RX_LPI_EN 0x00020000 /* EEE Rx LPI Enable */ | ||
801 | #define E1000_EEER_LPI_FC 0x00040000 /* EEE Enable on FC */ | ||
802 | |||
722 | /* SerDes Control */ | 803 | /* SerDes Control */ |
723 | #define E1000_GEN_CTL_READY 0x80000000 | 804 | #define E1000_GEN_CTL_READY 0x80000000 |
724 | #define E1000_GEN_CTL_ADDRESS_SHIFT 8 | 805 | #define E1000_GEN_CTL_ADDRESS_SHIFT 8 |
@@ -732,4 +813,11 @@ | |||
732 | #define E1000_PCIEMISC_LX_DECISION 0x00000080 /* Lx power decision based | 813 | #define E1000_PCIEMISC_LX_DECISION 0x00000080 /* Lx power decision based |
733 | on DMA coal */ | 814 | on DMA coal */ |
734 | 815 | ||
816 | /* Tx Rate-Scheduler Config fields */ | ||
817 | #define E1000_RTTBCNRC_RS_ENA 0x80000000 | ||
818 | #define E1000_RTTBCNRC_RF_DEC_MASK 0x00003FFF | ||
819 | #define E1000_RTTBCNRC_RF_INT_SHIFT 14 | ||
820 | #define E1000_RTTBCNRC_RF_INT_MASK \ | ||
821 | (E1000_RTTBCNRC_RF_DEC_MASK << E1000_RTTBCNRC_RF_INT_SHIFT) | ||
822 | |||
735 | #endif | 823 | #endif |
diff --git a/drivers/net/igb/e1000_hw.h b/drivers/net/igb/e1000_hw.h index cb8db78b1a05..27153e8d7b16 100644 --- a/drivers/net/igb/e1000_hw.h +++ b/drivers/net/igb/e1000_hw.h | |||
@@ -54,6 +54,11 @@ struct e1000_hw; | |||
54 | #define E1000_DEV_ID_82580_SERDES 0x1510 | 54 | #define E1000_DEV_ID_82580_SERDES 0x1510 |
55 | #define E1000_DEV_ID_82580_SGMII 0x1511 | 55 | #define E1000_DEV_ID_82580_SGMII 0x1511 |
56 | #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516 | 56 | #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516 |
57 | #define E1000_DEV_ID_82580_QUAD_FIBER 0x1527 | ||
58 | #define E1000_DEV_ID_DH89XXCC_SGMII 0x0438 | ||
59 | #define E1000_DEV_ID_DH89XXCC_SERDES 0x043A | ||
60 | #define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C | ||
61 | #define E1000_DEV_ID_DH89XXCC_SFP 0x0440 | ||
57 | #define E1000_DEV_ID_I350_COPPER 0x1521 | 62 | #define E1000_DEV_ID_I350_COPPER 0x1521 |
58 | #define E1000_DEV_ID_I350_FIBER 0x1522 | 63 | #define E1000_DEV_ID_I350_FIBER 0x1522 |
59 | #define E1000_DEV_ID_I350_SERDES 0x1523 | 64 | #define E1000_DEV_ID_I350_SERDES 0x1523 |
@@ -243,6 +248,10 @@ struct e1000_hw_stats { | |||
243 | u64 scvpc; | 248 | u64 scvpc; |
244 | u64 hrmpc; | 249 | u64 hrmpc; |
245 | u64 doosync; | 250 | u64 doosync; |
251 | u64 o2bgptc; | ||
252 | u64 o2bspc; | ||
253 | u64 b2ospc; | ||
254 | u64 b2ogprc; | ||
246 | }; | 255 | }; |
247 | 256 | ||
248 | struct e1000_phy_stats { | 257 | struct e1000_phy_stats { |
@@ -327,6 +336,8 @@ struct e1000_nvm_operations { | |||
327 | s32 (*read)(struct e1000_hw *, u16, u16, u16 *); | 336 | s32 (*read)(struct e1000_hw *, u16, u16, u16 *); |
328 | void (*release)(struct e1000_hw *); | 337 | void (*release)(struct e1000_hw *); |
329 | s32 (*write)(struct e1000_hw *, u16, u16, u16 *); | 338 | s32 (*write)(struct e1000_hw *, u16, u16, u16 *); |
339 | s32 (*update)(struct e1000_hw *); | ||
340 | s32 (*validate)(struct e1000_hw *); | ||
330 | }; | 341 | }; |
331 | 342 | ||
332 | struct e1000_info { | 343 | struct e1000_info { |
@@ -413,7 +424,6 @@ struct e1000_phy_info { | |||
413 | 424 | ||
414 | struct e1000_nvm_info { | 425 | struct e1000_nvm_info { |
415 | struct e1000_nvm_operations ops; | 426 | struct e1000_nvm_operations ops; |
416 | |||
417 | enum e1000_nvm_type type; | 427 | enum e1000_nvm_type type; |
418 | enum e1000_nvm_override override; | 428 | enum e1000_nvm_override override; |
419 | 429 | ||
@@ -479,6 +489,7 @@ struct e1000_mbx_info { | |||
479 | struct e1000_dev_spec_82575 { | 489 | struct e1000_dev_spec_82575 { |
480 | bool sgmii_active; | 490 | bool sgmii_active; |
481 | bool global_device_reset; | 491 | bool global_device_reset; |
492 | bool eee_disable; | ||
482 | }; | 493 | }; |
483 | 494 | ||
484 | struct e1000_hw { | 495 | struct e1000_hw { |
diff --git a/drivers/net/igb/e1000_mac.c b/drivers/net/igb/e1000_mac.c index 90c5e01e9235..ce8255fc3c52 100644 --- a/drivers/net/igb/e1000_mac.c +++ b/drivers/net/igb/e1000_mac.c | |||
@@ -181,7 +181,7 @@ s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add) | |||
181 | * address and must override the actual permanent MAC address. If an | 181 | * address and must override the actual permanent MAC address. If an |
182 | * alternate MAC address is fopund it is saved in the hw struct and | 182 | * alternate MAC address is fopund it is saved in the hw struct and |
183 | * prgrammed into RAR0 and the cuntion returns success, otherwise the | 183 | * prgrammed into RAR0 and the cuntion returns success, otherwise the |
184 | * fucntion returns an error. | 184 | * function returns an error. |
185 | **/ | 185 | **/ |
186 | s32 igb_check_alt_mac_addr(struct e1000_hw *hw) | 186 | s32 igb_check_alt_mac_addr(struct e1000_hw *hw) |
187 | { | 187 | { |
@@ -982,7 +982,7 @@ out: | |||
982 | } | 982 | } |
983 | 983 | ||
984 | /** | 984 | /** |
985 | * igb_get_speed_and_duplex_copper - Retreive current speed/duplex | 985 | * igb_get_speed_and_duplex_copper - Retrieve current speed/duplex |
986 | * @hw: pointer to the HW structure | 986 | * @hw: pointer to the HW structure |
987 | * @speed: stores the current speed | 987 | * @speed: stores the current speed |
988 | * @duplex: stores the current duplex | 988 | * @duplex: stores the current duplex |
diff --git a/drivers/net/igb/e1000_mbx.c b/drivers/net/igb/e1000_mbx.c index c474cdb70047..78d48c7fa859 100644 --- a/drivers/net/igb/e1000_mbx.c +++ b/drivers/net/igb/e1000_mbx.c | |||
@@ -422,26 +422,24 @@ s32 igb_init_mbx_params_pf(struct e1000_hw *hw) | |||
422 | { | 422 | { |
423 | struct e1000_mbx_info *mbx = &hw->mbx; | 423 | struct e1000_mbx_info *mbx = &hw->mbx; |
424 | 424 | ||
425 | if (hw->mac.type == e1000_82576) { | 425 | mbx->timeout = 0; |
426 | mbx->timeout = 0; | 426 | mbx->usec_delay = 0; |
427 | mbx->usec_delay = 0; | 427 | |
428 | 428 | mbx->size = E1000_VFMAILBOX_SIZE; | |
429 | mbx->size = E1000_VFMAILBOX_SIZE; | 429 | |
430 | 430 | mbx->ops.read = igb_read_mbx_pf; | |
431 | mbx->ops.read = igb_read_mbx_pf; | 431 | mbx->ops.write = igb_write_mbx_pf; |
432 | mbx->ops.write = igb_write_mbx_pf; | 432 | mbx->ops.read_posted = igb_read_posted_mbx; |
433 | mbx->ops.read_posted = igb_read_posted_mbx; | 433 | mbx->ops.write_posted = igb_write_posted_mbx; |
434 | mbx->ops.write_posted = igb_write_posted_mbx; | 434 | mbx->ops.check_for_msg = igb_check_for_msg_pf; |
435 | mbx->ops.check_for_msg = igb_check_for_msg_pf; | 435 | mbx->ops.check_for_ack = igb_check_for_ack_pf; |
436 | mbx->ops.check_for_ack = igb_check_for_ack_pf; | 436 | mbx->ops.check_for_rst = igb_check_for_rst_pf; |
437 | mbx->ops.check_for_rst = igb_check_for_rst_pf; | 437 | |
438 | 438 | mbx->stats.msgs_tx = 0; | |
439 | mbx->stats.msgs_tx = 0; | 439 | mbx->stats.msgs_rx = 0; |
440 | mbx->stats.msgs_rx = 0; | 440 | mbx->stats.reqs = 0; |
441 | mbx->stats.reqs = 0; | 441 | mbx->stats.acks = 0; |
442 | mbx->stats.acks = 0; | 442 | mbx->stats.rsts = 0; |
443 | mbx->stats.rsts = 0; | ||
444 | } | ||
445 | 443 | ||
446 | return 0; | 444 | return 0; |
447 | } | 445 | } |
diff --git a/drivers/net/igb/e1000_nvm.c b/drivers/net/igb/e1000_nvm.c index d83b77fa4038..75bf36a4baee 100644 --- a/drivers/net/igb/e1000_nvm.c +++ b/drivers/net/igb/e1000_nvm.c | |||
@@ -318,6 +318,68 @@ out: | |||
318 | } | 318 | } |
319 | 319 | ||
320 | /** | 320 | /** |
321 | * igb_read_nvm_spi - Read EEPROM's using SPI | ||
322 | * @hw: pointer to the HW structure | ||
323 | * @offset: offset of word in the EEPROM to read | ||
324 | * @words: number of words to read | ||
325 | * @data: word read from the EEPROM | ||
326 | * | ||
327 | * Reads a 16 bit word from the EEPROM. | ||
328 | **/ | ||
329 | s32 igb_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | ||
330 | { | ||
331 | struct e1000_nvm_info *nvm = &hw->nvm; | ||
332 | u32 i = 0; | ||
333 | s32 ret_val; | ||
334 | u16 word_in; | ||
335 | u8 read_opcode = NVM_READ_OPCODE_SPI; | ||
336 | |||
337 | /* | ||
338 | * A check for invalid values: offset too large, too many words, | ||
339 | * and not enough words. | ||
340 | */ | ||
341 | if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || | ||
342 | (words == 0)) { | ||
343 | hw_dbg("nvm parameter(s) out of bounds\n"); | ||
344 | ret_val = -E1000_ERR_NVM; | ||
345 | goto out; | ||
346 | } | ||
347 | |||
348 | ret_val = nvm->ops.acquire(hw); | ||
349 | if (ret_val) | ||
350 | goto out; | ||
351 | |||
352 | ret_val = igb_ready_nvm_eeprom(hw); | ||
353 | if (ret_val) | ||
354 | goto release; | ||
355 | |||
356 | igb_standby_nvm(hw); | ||
357 | |||
358 | if ((nvm->address_bits == 8) && (offset >= 128)) | ||
359 | read_opcode |= NVM_A8_OPCODE_SPI; | ||
360 | |||
361 | /* Send the READ command (opcode + addr) */ | ||
362 | igb_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits); | ||
363 | igb_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits); | ||
364 | |||
365 | /* | ||
366 | * Read the data. SPI NVMs increment the address with each byte | ||
367 | * read and will roll over if reading beyond the end. This allows | ||
368 | * us to read the whole NVM from any offset | ||
369 | */ | ||
370 | for (i = 0; i < words; i++) { | ||
371 | word_in = igb_shift_in_eec_bits(hw, 16); | ||
372 | data[i] = (word_in >> 8) | (word_in << 8); | ||
373 | } | ||
374 | |||
375 | release: | ||
376 | nvm->ops.release(hw); | ||
377 | |||
378 | out: | ||
379 | return ret_val; | ||
380 | } | ||
381 | |||
382 | /** | ||
321 | * igb_read_nvm_eerd - Reads EEPROM using EERD register | 383 | * igb_read_nvm_eerd - Reads EEPROM using EERD register |
322 | * @hw: pointer to the HW structure | 384 | * @hw: pointer to the HW structure |
323 | * @offset: offset of word in the EEPROM to read | 385 | * @offset: offset of word in the EEPROM to read |
@@ -353,7 +415,7 @@ s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
353 | break; | 415 | break; |
354 | 416 | ||
355 | data[i] = (rd32(E1000_EERD) >> | 417 | data[i] = (rd32(E1000_EERD) >> |
356 | E1000_NVM_RW_REG_DATA); | 418 | E1000_NVM_RW_REG_DATA); |
357 | } | 419 | } |
358 | 420 | ||
359 | out: | 421 | out: |
@@ -445,31 +507,112 @@ out: | |||
445 | } | 507 | } |
446 | 508 | ||
447 | /** | 509 | /** |
448 | * igb_read_part_num - Read device part number | 510 | * igb_read_part_string - Read device part number |
449 | * @hw: pointer to the HW structure | 511 | * @hw: pointer to the HW structure |
450 | * @part_num: pointer to device part number | 512 | * @part_num: pointer to device part number |
513 | * @part_num_size: size of part number buffer | ||
451 | * | 514 | * |
452 | * Reads the product board assembly (PBA) number from the EEPROM and stores | 515 | * Reads the product board assembly (PBA) number from the EEPROM and stores |
453 | * the value in part_num. | 516 | * the value in part_num. |
454 | **/ | 517 | **/ |
455 | s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num) | 518 | s32 igb_read_part_string(struct e1000_hw *hw, u8 *part_num, u32 part_num_size) |
456 | { | 519 | { |
457 | s32 ret_val; | 520 | s32 ret_val; |
458 | u16 nvm_data; | 521 | u16 nvm_data; |
522 | u16 pointer; | ||
523 | u16 offset; | ||
524 | u16 length; | ||
525 | |||
526 | if (part_num == NULL) { | ||
527 | hw_dbg("PBA string buffer was null\n"); | ||
528 | ret_val = E1000_ERR_INVALID_ARGUMENT; | ||
529 | goto out; | ||
530 | } | ||
459 | 531 | ||
460 | ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data); | 532 | ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data); |
461 | if (ret_val) { | 533 | if (ret_val) { |
462 | hw_dbg("NVM Read Error\n"); | 534 | hw_dbg("NVM Read Error\n"); |
463 | goto out; | 535 | goto out; |
464 | } | 536 | } |
465 | *part_num = (u32)(nvm_data << 16); | ||
466 | 537 | ||
467 | ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data); | 538 | ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pointer); |
539 | if (ret_val) { | ||
540 | hw_dbg("NVM Read Error\n"); | ||
541 | goto out; | ||
542 | } | ||
543 | |||
544 | /* | ||
545 | * if nvm_data is not ptr guard the PBA must be in legacy format which | ||
546 | * means pointer is actually our second data word for the PBA number | ||
547 | * and we can decode it into an ascii string | ||
548 | */ | ||
549 | if (nvm_data != NVM_PBA_PTR_GUARD) { | ||
550 | hw_dbg("NVM PBA number is not stored as string\n"); | ||
551 | |||
552 | /* we will need 11 characters to store the PBA */ | ||
553 | if (part_num_size < 11) { | ||
554 | hw_dbg("PBA string buffer too small\n"); | ||
555 | return E1000_ERR_NO_SPACE; | ||
556 | } | ||
557 | |||
558 | /* extract hex string from data and pointer */ | ||
559 | part_num[0] = (nvm_data >> 12) & 0xF; | ||
560 | part_num[1] = (nvm_data >> 8) & 0xF; | ||
561 | part_num[2] = (nvm_data >> 4) & 0xF; | ||
562 | part_num[3] = nvm_data & 0xF; | ||
563 | part_num[4] = (pointer >> 12) & 0xF; | ||
564 | part_num[5] = (pointer >> 8) & 0xF; | ||
565 | part_num[6] = '-'; | ||
566 | part_num[7] = 0; | ||
567 | part_num[8] = (pointer >> 4) & 0xF; | ||
568 | part_num[9] = pointer & 0xF; | ||
569 | |||
570 | /* put a null character on the end of our string */ | ||
571 | part_num[10] = '\0'; | ||
572 | |||
573 | /* switch all the data but the '-' to hex char */ | ||
574 | for (offset = 0; offset < 10; offset++) { | ||
575 | if (part_num[offset] < 0xA) | ||
576 | part_num[offset] += '0'; | ||
577 | else if (part_num[offset] < 0x10) | ||
578 | part_num[offset] += 'A' - 0xA; | ||
579 | } | ||
580 | |||
581 | goto out; | ||
582 | } | ||
583 | |||
584 | ret_val = hw->nvm.ops.read(hw, pointer, 1, &length); | ||
468 | if (ret_val) { | 585 | if (ret_val) { |
469 | hw_dbg("NVM Read Error\n"); | 586 | hw_dbg("NVM Read Error\n"); |
470 | goto out; | 587 | goto out; |
471 | } | 588 | } |
472 | *part_num |= nvm_data; | 589 | |
590 | if (length == 0xFFFF || length == 0) { | ||
591 | hw_dbg("NVM PBA number section invalid length\n"); | ||
592 | ret_val = E1000_ERR_NVM_PBA_SECTION; | ||
593 | goto out; | ||
594 | } | ||
595 | /* check if part_num buffer is big enough */ | ||
596 | if (part_num_size < (((u32)length * 2) - 1)) { | ||
597 | hw_dbg("PBA string buffer too small\n"); | ||
598 | ret_val = E1000_ERR_NO_SPACE; | ||
599 | goto out; | ||
600 | } | ||
601 | |||
602 | /* trim pba length from start of string */ | ||
603 | pointer++; | ||
604 | length--; | ||
605 | |||
606 | for (offset = 0; offset < length; offset++) { | ||
607 | ret_val = hw->nvm.ops.read(hw, pointer + offset, 1, &nvm_data); | ||
608 | if (ret_val) { | ||
609 | hw_dbg("NVM Read Error\n"); | ||
610 | goto out; | ||
611 | } | ||
612 | part_num[offset * 2] = (u8)(nvm_data >> 8); | ||
613 | part_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF); | ||
614 | } | ||
615 | part_num[offset * 2] = '\0'; | ||
473 | 616 | ||
474 | out: | 617 | out: |
475 | return ret_val; | 618 | return ret_val; |
diff --git a/drivers/net/igb/e1000_nvm.h b/drivers/net/igb/e1000_nvm.h index 1041c34dcbe1..7f43564c4bcc 100644 --- a/drivers/net/igb/e1000_nvm.h +++ b/drivers/net/igb/e1000_nvm.h | |||
@@ -32,7 +32,10 @@ s32 igb_acquire_nvm(struct e1000_hw *hw); | |||
32 | void igb_release_nvm(struct e1000_hw *hw); | 32 | void igb_release_nvm(struct e1000_hw *hw); |
33 | s32 igb_read_mac_addr(struct e1000_hw *hw); | 33 | s32 igb_read_mac_addr(struct e1000_hw *hw); |
34 | s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num); | 34 | s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num); |
35 | s32 igb_read_part_string(struct e1000_hw *hw, u8 *part_num, | ||
36 | u32 part_num_size); | ||
35 | s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); | 37 | s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); |
38 | s32 igb_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); | ||
36 | s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); | 39 | s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); |
37 | s32 igb_validate_nvm_checksum(struct e1000_hw *hw); | 40 | s32 igb_validate_nvm_checksum(struct e1000_hw *hw); |
38 | s32 igb_update_nvm_checksum(struct e1000_hw *hw); | 41 | s32 igb_update_nvm_checksum(struct e1000_hw *hw); |
diff --git a/drivers/net/igb/e1000_phy.c b/drivers/net/igb/e1000_phy.c index cf1f32300923..d639706eb3f6 100644 --- a/drivers/net/igb/e1000_phy.c +++ b/drivers/net/igb/e1000_phy.c | |||
@@ -570,6 +570,89 @@ out: | |||
570 | } | 570 | } |
571 | 571 | ||
572 | /** | 572 | /** |
573 | * igb_copper_link_setup_m88_gen2 - Setup m88 PHY's for copper link | ||
574 | * @hw: pointer to the HW structure | ||
575 | * | ||
576 | * Sets up MDI/MDI-X and polarity for i347-AT4, m88e1322 and m88e1112 PHY's. | ||
577 | * Also enables and sets the downshift parameters. | ||
578 | **/ | ||
579 | s32 igb_copper_link_setup_m88_gen2(struct e1000_hw *hw) | ||
580 | { | ||
581 | struct e1000_phy_info *phy = &hw->phy; | ||
582 | s32 ret_val; | ||
583 | u16 phy_data; | ||
584 | |||
585 | if (phy->reset_disable) { | ||
586 | ret_val = 0; | ||
587 | goto out; | ||
588 | } | ||
589 | |||
590 | /* Enable CRS on Tx. This must be set for half-duplex operation. */ | ||
591 | ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); | ||
592 | if (ret_val) | ||
593 | goto out; | ||
594 | |||
595 | /* | ||
596 | * Options: | ||
597 | * MDI/MDI-X = 0 (default) | ||
598 | * 0 - Auto for all speeds | ||
599 | * 1 - MDI mode | ||
600 | * 2 - MDI-X mode | ||
601 | * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) | ||
602 | */ | ||
603 | phy_data &= ~M88E1000_PSCR_AUTO_X_MODE; | ||
604 | |||
605 | switch (phy->mdix) { | ||
606 | case 1: | ||
607 | phy_data |= M88E1000_PSCR_MDI_MANUAL_MODE; | ||
608 | break; | ||
609 | case 2: | ||
610 | phy_data |= M88E1000_PSCR_MDIX_MANUAL_MODE; | ||
611 | break; | ||
612 | case 3: | ||
613 | /* M88E1112 does not support this mode) */ | ||
614 | if (phy->id != M88E1112_E_PHY_ID) { | ||
615 | phy_data |= M88E1000_PSCR_AUTO_X_1000T; | ||
616 | break; | ||
617 | } | ||
618 | case 0: | ||
619 | default: | ||
620 | phy_data |= M88E1000_PSCR_AUTO_X_MODE; | ||
621 | break; | ||
622 | } | ||
623 | |||
624 | /* | ||
625 | * Options: | ||
626 | * disable_polarity_correction = 0 (default) | ||
627 | * Automatic Correction for Reversed Cable Polarity | ||
628 | * 0 - Disabled | ||
629 | * 1 - Enabled | ||
630 | */ | ||
631 | phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL; | ||
632 | if (phy->disable_polarity_correction == 1) | ||
633 | phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; | ||
634 | |||
635 | /* Enable downshift and setting it to X6 */ | ||
636 | phy_data &= ~I347AT4_PSCR_DOWNSHIFT_MASK; | ||
637 | phy_data |= I347AT4_PSCR_DOWNSHIFT_6X; | ||
638 | phy_data |= I347AT4_PSCR_DOWNSHIFT_ENABLE; | ||
639 | |||
640 | ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); | ||
641 | if (ret_val) | ||
642 | goto out; | ||
643 | |||
644 | /* Commit the changes. */ | ||
645 | ret_val = igb_phy_sw_reset(hw); | ||
646 | if (ret_val) { | ||
647 | hw_dbg("Error committing the PHY changes\n"); | ||
648 | goto out; | ||
649 | } | ||
650 | |||
651 | out: | ||
652 | return ret_val; | ||
653 | } | ||
654 | |||
655 | /** | ||
573 | * igb_copper_link_setup_igp - Setup igp PHY's for copper link | 656 | * igb_copper_link_setup_igp - Setup igp PHY's for copper link |
574 | * @hw: pointer to the HW structure | 657 | * @hw: pointer to the HW structure |
575 | * | 658 | * |
@@ -1124,18 +1207,25 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) | |||
1124 | goto out; | 1207 | goto out; |
1125 | 1208 | ||
1126 | if (!link) { | 1209 | if (!link) { |
1127 | /* | 1210 | if (hw->phy.type != e1000_phy_m88 || |
1128 | * We didn't get link. | 1211 | hw->phy.id == I347AT4_E_PHY_ID || |
1129 | * Reset the DSP and cross our fingers. | 1212 | hw->phy.id == M88E1112_E_PHY_ID) { |
1130 | */ | 1213 | hw_dbg("Link taking longer than expected.\n"); |
1131 | ret_val = phy->ops.write_reg(hw, | 1214 | } else { |
1132 | M88E1000_PHY_PAGE_SELECT, | 1215 | |
1133 | 0x001d); | 1216 | /* |
1134 | if (ret_val) | 1217 | * We didn't get link. |
1135 | goto out; | 1218 | * Reset the DSP and cross our fingers. |
1136 | ret_val = igb_phy_reset_dsp(hw); | 1219 | */ |
1137 | if (ret_val) | 1220 | ret_val = phy->ops.write_reg(hw, |
1138 | goto out; | 1221 | M88E1000_PHY_PAGE_SELECT, |
1222 | 0x001d); | ||
1223 | if (ret_val) | ||
1224 | goto out; | ||
1225 | ret_val = igb_phy_reset_dsp(hw); | ||
1226 | if (ret_val) | ||
1227 | goto out; | ||
1228 | } | ||
1139 | } | 1229 | } |
1140 | 1230 | ||
1141 | /* Try once more */ | 1231 | /* Try once more */ |
@@ -1145,6 +1235,11 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) | |||
1145 | goto out; | 1235 | goto out; |
1146 | } | 1236 | } |
1147 | 1237 | ||
1238 | if (hw->phy.type != e1000_phy_m88 || | ||
1239 | hw->phy.id == I347AT4_E_PHY_ID || | ||
1240 | hw->phy.id == M88E1112_E_PHY_ID) | ||
1241 | goto out; | ||
1242 | |||
1148 | ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data); | 1243 | ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data); |
1149 | if (ret_val) | 1244 | if (ret_val) |
1150 | goto out; | 1245 | goto out; |
@@ -1326,7 +1421,7 @@ out: | |||
1326 | } | 1421 | } |
1327 | 1422 | ||
1328 | /** | 1423 | /** |
1329 | * igb_check_downshift - Checks whether a downshift in speed occured | 1424 | * igb_check_downshift - Checks whether a downshift in speed occurred |
1330 | * @hw: pointer to the HW structure | 1425 | * @hw: pointer to the HW structure |
1331 | * | 1426 | * |
1332 | * Success returns 0, Failure returns 1 | 1427 | * Success returns 0, Failure returns 1 |
@@ -1557,6 +1652,93 @@ out: | |||
1557 | return ret_val; | 1652 | return ret_val; |
1558 | } | 1653 | } |
1559 | 1654 | ||
1655 | s32 igb_get_cable_length_m88_gen2(struct e1000_hw *hw) | ||
1656 | { | ||
1657 | struct e1000_phy_info *phy = &hw->phy; | ||
1658 | s32 ret_val; | ||
1659 | u16 phy_data, phy_data2, index, default_page, is_cm; | ||
1660 | |||
1661 | switch (hw->phy.id) { | ||
1662 | case I347AT4_E_PHY_ID: | ||
1663 | /* Remember the original page select and set it to 7 */ | ||
1664 | ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT, | ||
1665 | &default_page); | ||
1666 | if (ret_val) | ||
1667 | goto out; | ||
1668 | |||
1669 | ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x07); | ||
1670 | if (ret_val) | ||
1671 | goto out; | ||
1672 | |||
1673 | /* Get cable length from PHY Cable Diagnostics Control Reg */ | ||
1674 | ret_val = phy->ops.read_reg(hw, (I347AT4_PCDL + phy->addr), | ||
1675 | &phy_data); | ||
1676 | if (ret_val) | ||
1677 | goto out; | ||
1678 | |||
1679 | /* Check if the unit of cable length is meters or cm */ | ||
1680 | ret_val = phy->ops.read_reg(hw, I347AT4_PCDC, &phy_data2); | ||
1681 | if (ret_val) | ||
1682 | goto out; | ||
1683 | |||
1684 | is_cm = !(phy_data & I347AT4_PCDC_CABLE_LENGTH_UNIT); | ||
1685 | |||
1686 | /* Populate the phy structure with cable length in meters */ | ||
1687 | phy->min_cable_length = phy_data / (is_cm ? 100 : 1); | ||
1688 | phy->max_cable_length = phy_data / (is_cm ? 100 : 1); | ||
1689 | phy->cable_length = phy_data / (is_cm ? 100 : 1); | ||
1690 | |||
1691 | /* Reset the page selec to its original value */ | ||
1692 | ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, | ||
1693 | default_page); | ||
1694 | if (ret_val) | ||
1695 | goto out; | ||
1696 | break; | ||
1697 | case M88E1112_E_PHY_ID: | ||
1698 | /* Remember the original page select and set it to 5 */ | ||
1699 | ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT, | ||
1700 | &default_page); | ||
1701 | if (ret_val) | ||
1702 | goto out; | ||
1703 | |||
1704 | ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x05); | ||
1705 | if (ret_val) | ||
1706 | goto out; | ||
1707 | |||
1708 | ret_val = phy->ops.read_reg(hw, M88E1112_VCT_DSP_DISTANCE, | ||
1709 | &phy_data); | ||
1710 | if (ret_val) | ||
1711 | goto out; | ||
1712 | |||
1713 | index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >> | ||
1714 | M88E1000_PSSR_CABLE_LENGTH_SHIFT; | ||
1715 | if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE - 1) { | ||
1716 | ret_val = -E1000_ERR_PHY; | ||
1717 | goto out; | ||
1718 | } | ||
1719 | |||
1720 | phy->min_cable_length = e1000_m88_cable_length_table[index]; | ||
1721 | phy->max_cable_length = e1000_m88_cable_length_table[index + 1]; | ||
1722 | |||
1723 | phy->cable_length = (phy->min_cable_length + | ||
1724 | phy->max_cable_length) / 2; | ||
1725 | |||
1726 | /* Reset the page select to its original value */ | ||
1727 | ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, | ||
1728 | default_page); | ||
1729 | if (ret_val) | ||
1730 | goto out; | ||
1731 | |||
1732 | break; | ||
1733 | default: | ||
1734 | ret_val = -E1000_ERR_PHY; | ||
1735 | goto out; | ||
1736 | } | ||
1737 | |||
1738 | out: | ||
1739 | return ret_val; | ||
1740 | } | ||
1741 | |||
1560 | /** | 1742 | /** |
1561 | * igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY | 1743 | * igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY |
1562 | * @hw: pointer to the HW structure | 1744 | * @hw: pointer to the HW structure |
@@ -1575,11 +1757,12 @@ s32 igb_get_cable_length_igp_2(struct e1000_hw *hw) | |||
1575 | u16 phy_data, i, agc_value = 0; | 1757 | u16 phy_data, i, agc_value = 0; |
1576 | u16 cur_agc_index, max_agc_index = 0; | 1758 | u16 cur_agc_index, max_agc_index = 0; |
1577 | u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1; | 1759 | u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1; |
1578 | u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] = | 1760 | static const u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] = { |
1579 | {IGP02E1000_PHY_AGC_A, | 1761 | IGP02E1000_PHY_AGC_A, |
1580 | IGP02E1000_PHY_AGC_B, | 1762 | IGP02E1000_PHY_AGC_B, |
1581 | IGP02E1000_PHY_AGC_C, | 1763 | IGP02E1000_PHY_AGC_C, |
1582 | IGP02E1000_PHY_AGC_D}; | 1764 | IGP02E1000_PHY_AGC_D |
1765 | }; | ||
1583 | 1766 | ||
1584 | /* Read the AGC registers for all channels */ | 1767 | /* Read the AGC registers for all channels */ |
1585 | for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) { | 1768 | for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) { |
diff --git a/drivers/net/igb/e1000_phy.h b/drivers/net/igb/e1000_phy.h index 565a6dbb3714..2cc117705a31 100644 --- a/drivers/net/igb/e1000_phy.h +++ b/drivers/net/igb/e1000_phy.h | |||
@@ -45,9 +45,11 @@ s32 igb_check_downshift(struct e1000_hw *hw); | |||
45 | s32 igb_check_reset_block(struct e1000_hw *hw); | 45 | s32 igb_check_reset_block(struct e1000_hw *hw); |
46 | s32 igb_copper_link_setup_igp(struct e1000_hw *hw); | 46 | s32 igb_copper_link_setup_igp(struct e1000_hw *hw); |
47 | s32 igb_copper_link_setup_m88(struct e1000_hw *hw); | 47 | s32 igb_copper_link_setup_m88(struct e1000_hw *hw); |
48 | s32 igb_copper_link_setup_m88_gen2(struct e1000_hw *hw); | ||
48 | s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw); | 49 | s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw); |
49 | s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw); | 50 | s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw); |
50 | s32 igb_get_cable_length_m88(struct e1000_hw *hw); | 51 | s32 igb_get_cable_length_m88(struct e1000_hw *hw); |
52 | s32 igb_get_cable_length_m88_gen2(struct e1000_hw *hw); | ||
51 | s32 igb_get_cable_length_igp_2(struct e1000_hw *hw); | 53 | s32 igb_get_cable_length_igp_2(struct e1000_hw *hw); |
52 | s32 igb_get_phy_id(struct e1000_hw *hw); | 54 | s32 igb_get_phy_id(struct e1000_hw *hw); |
53 | s32 igb_get_phy_info_igp(struct e1000_hw *hw); | 55 | s32 igb_get_phy_info_igp(struct e1000_hw *hw); |
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h index abb7333a1fbf..958ca3bda482 100644 --- a/drivers/net/igb/e1000_regs.h +++ b/drivers/net/igb/e1000_regs.h | |||
@@ -106,6 +106,19 @@ | |||
106 | 106 | ||
107 | #define E1000_RQDPC(_n) (0x0C030 + ((_n) * 0x40)) | 107 | #define E1000_RQDPC(_n) (0x0C030 + ((_n) * 0x40)) |
108 | 108 | ||
109 | /* DMA Coalescing registers */ | ||
110 | #define E1000_DMACR 0x02508 /* Control Register */ | ||
111 | #define E1000_DMCTXTH 0x03550 /* Transmit Threshold */ | ||
112 | #define E1000_DMCTLX 0x02514 /* Time to Lx Request */ | ||
113 | #define E1000_DMCRTRH 0x05DD0 /* Receive Packet Rate Threshold */ | ||
114 | #define E1000_DMCCNT 0x05DD4 /* Current Rx Count */ | ||
115 | #define E1000_FCRTC 0x02170 /* Flow Control Rx high watermark */ | ||
116 | #define E1000_PCIEMISC 0x05BB8 /* PCIE misc config register */ | ||
117 | |||
118 | /* TX Rate Limit Registers */ | ||
119 | #define E1000_RTTDQSEL 0x3604 /* Tx Desc Plane Queue Select - WO */ | ||
120 | #define E1000_RTTBCNRC 0x36B0 /* Tx BCN Rate-Scheduler Config - WO */ | ||
121 | |||
109 | /* Split and Replication RX Control - RW */ | 122 | /* Split and Replication RX Control - RW */ |
110 | #define E1000_RXPBS 0x02404 /* Rx Packet Buffer Size - RW */ | 123 | #define E1000_RXPBS 0x02404 /* Rx Packet Buffer Size - RW */ |
111 | /* | 124 | /* |
@@ -301,6 +314,7 @@ | |||
301 | #define E1000_VFTE 0x00C90 /* VF Transmit Enables */ | 314 | #define E1000_VFTE 0x00C90 /* VF Transmit Enables */ |
302 | #define E1000_QDE 0x02408 /* Queue Drop Enable - RW */ | 315 | #define E1000_QDE 0x02408 /* Queue Drop Enable - RW */ |
303 | #define E1000_DTXSWC 0x03500 /* DMA Tx Switch Control - RW */ | 316 | #define E1000_DTXSWC 0x03500 /* DMA Tx Switch Control - RW */ |
317 | #define E1000_WVBR 0x03554 /* VM Wrong Behavior - RWS */ | ||
304 | #define E1000_RPLOLR 0x05AF0 /* Replication Offload - RW */ | 318 | #define E1000_RPLOLR 0x05AF0 /* Replication Offload - RW */ |
305 | #define E1000_UTA 0x0A000 /* Unicast Table Array - RW */ | 319 | #define E1000_UTA 0x0A000 /* Unicast Table Array - RW */ |
306 | #define E1000_IOVTCL 0x05BBC /* IOV Control Register */ | 320 | #define E1000_IOVTCL 0x05BBC /* IOV Control Register */ |
@@ -323,4 +337,18 @@ | |||
323 | 337 | ||
324 | /* DMA Coalescing registers */ | 338 | /* DMA Coalescing registers */ |
325 | #define E1000_PCIEMISC 0x05BB8 /* PCIE misc config register */ | 339 | #define E1000_PCIEMISC 0x05BB8 /* PCIE misc config register */ |
340 | |||
341 | /* Energy Efficient Ethernet "EEE" register */ | ||
342 | #define E1000_IPCNFG 0x0E38 /* Internal PHY Configuration */ | ||
343 | #define E1000_EEER 0x0E30 /* Energy Efficient Ethernet */ | ||
344 | |||
345 | /* Thermal Sensor Register */ | ||
346 | #define E1000_THSTAT 0x08110 /* Thermal Sensor Status */ | ||
347 | |||
348 | /* OS2BMC Registers */ | ||
349 | #define E1000_B2OSPC 0x08FE0 /* BMC2OS packets sent by BMC */ | ||
350 | #define E1000_B2OGPRC 0x04158 /* BMC2OS packets received by host */ | ||
351 | #define E1000_O2BGPTC 0x08FE4 /* OS2BMC packets received by BMC */ | ||
352 | #define E1000_O2BSPC 0x0415C /* OS2BMC packets transmitted by host */ | ||
353 | |||
326 | #endif | 354 | #endif |
diff --git a/drivers/net/igb/igb.h b/drivers/net/igb/igb.h index 6e63d9a7fc75..f4fa4b1751cf 100644 --- a/drivers/net/igb/igb.h +++ b/drivers/net/igb/igb.h | |||
@@ -77,6 +77,7 @@ struct vf_data_storage { | |||
77 | unsigned long last_nack; | 77 | unsigned long last_nack; |
78 | u16 pf_vlan; /* When set, guest VLAN config not allowed. */ | 78 | u16 pf_vlan; /* When set, guest VLAN config not allowed. */ |
79 | u16 pf_qos; | 79 | u16 pf_qos; |
80 | u16 tx_rate; | ||
80 | }; | 81 | }; |
81 | 82 | ||
82 | #define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */ | 83 | #define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */ |
@@ -143,7 +144,7 @@ struct igb_buffer { | |||
143 | u16 next_to_watch; | 144 | u16 next_to_watch; |
144 | unsigned int bytecount; | 145 | unsigned int bytecount; |
145 | u16 gso_segs; | 146 | u16 gso_segs; |
146 | union skb_shared_tx shtx; | 147 | u8 tx_flags; |
147 | u8 mapped_as_page; | 148 | u8 mapped_as_page; |
148 | }; | 149 | }; |
149 | /* RX */ | 150 | /* RX */ |
@@ -159,6 +160,7 @@ struct igb_tx_queue_stats { | |||
159 | u64 packets; | 160 | u64 packets; |
160 | u64 bytes; | 161 | u64 bytes; |
161 | u64 restart_queue; | 162 | u64 restart_queue; |
163 | u64 restart_queue2; | ||
162 | }; | 164 | }; |
163 | 165 | ||
164 | struct igb_rx_queue_stats { | 166 | struct igb_rx_queue_stats { |
@@ -210,11 +212,14 @@ struct igb_ring { | |||
210 | /* TX */ | 212 | /* TX */ |
211 | struct { | 213 | struct { |
212 | struct igb_tx_queue_stats tx_stats; | 214 | struct igb_tx_queue_stats tx_stats; |
215 | struct u64_stats_sync tx_syncp; | ||
216 | struct u64_stats_sync tx_syncp2; | ||
213 | bool detect_tx_hung; | 217 | bool detect_tx_hung; |
214 | }; | 218 | }; |
215 | /* RX */ | 219 | /* RX */ |
216 | struct { | 220 | struct { |
217 | struct igb_rx_queue_stats rx_stats; | 221 | struct igb_rx_queue_stats rx_stats; |
222 | struct u64_stats_sync rx_syncp; | ||
218 | u32 rx_buffer_len; | 223 | u32 rx_buffer_len; |
219 | }; | 224 | }; |
220 | }; | 225 | }; |
@@ -288,6 +293,9 @@ struct igb_adapter { | |||
288 | struct timecompare compare; | 293 | struct timecompare compare; |
289 | struct hwtstamp_config hwtstamp_config; | 294 | struct hwtstamp_config hwtstamp_config; |
290 | 295 | ||
296 | spinlock_t stats64_lock; | ||
297 | struct rtnl_link_stats64 stats64; | ||
298 | |||
291 | /* structs defined in e1000_hw.h */ | 299 | /* structs defined in e1000_hw.h */ |
292 | struct e1000_hw hw; | 300 | struct e1000_hw hw; |
293 | struct e1000_hw_stats stats; | 301 | struct e1000_hw_stats stats; |
@@ -316,13 +324,21 @@ struct igb_adapter { | |||
316 | u16 rx_ring_count; | 324 | u16 rx_ring_count; |
317 | unsigned int vfs_allocated_count; | 325 | unsigned int vfs_allocated_count; |
318 | struct vf_data_storage *vf_data; | 326 | struct vf_data_storage *vf_data; |
327 | int vf_rate_link_speed; | ||
319 | u32 rss_queues; | 328 | u32 rss_queues; |
329 | u32 wvbr; | ||
320 | }; | 330 | }; |
321 | 331 | ||
322 | #define IGB_FLAG_HAS_MSI (1 << 0) | 332 | #define IGB_FLAG_HAS_MSI (1 << 0) |
323 | #define IGB_FLAG_DCA_ENABLED (1 << 1) | 333 | #define IGB_FLAG_DCA_ENABLED (1 << 1) |
324 | #define IGB_FLAG_QUAD_PORT_A (1 << 2) | 334 | #define IGB_FLAG_QUAD_PORT_A (1 << 2) |
325 | #define IGB_FLAG_QUEUE_PAIRS (1 << 3) | 335 | #define IGB_FLAG_QUEUE_PAIRS (1 << 3) |
336 | #define IGB_FLAG_DMAC (1 << 4) | ||
337 | |||
338 | /* DMA Coalescing defines */ | ||
339 | #define IGB_MIN_TXPBSIZE 20408 | ||
340 | #define IGB_TX_BUF_4096 4096 | ||
341 | #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coal Flush */ | ||
326 | 342 | ||
327 | #define IGB_82576_TSYNC_SHIFT 19 | 343 | #define IGB_82576_TSYNC_SHIFT 19 |
328 | #define IGB_82580_TSYNC_SHIFT 24 | 344 | #define IGB_82580_TSYNC_SHIFT 24 |
@@ -344,7 +360,7 @@ extern int igb_up(struct igb_adapter *); | |||
344 | extern void igb_down(struct igb_adapter *); | 360 | extern void igb_down(struct igb_adapter *); |
345 | extern void igb_reinit_locked(struct igb_adapter *); | 361 | extern void igb_reinit_locked(struct igb_adapter *); |
346 | extern void igb_reset(struct igb_adapter *); | 362 | extern void igb_reset(struct igb_adapter *); |
347 | extern int igb_set_spd_dplx(struct igb_adapter *, u16); | 363 | extern int igb_set_spd_dplx(struct igb_adapter *, u32, u8); |
348 | extern int igb_setup_tx_resources(struct igb_ring *); | 364 | extern int igb_setup_tx_resources(struct igb_ring *); |
349 | extern int igb_setup_rx_resources(struct igb_ring *); | 365 | extern int igb_setup_rx_resources(struct igb_ring *); |
350 | extern void igb_free_tx_resources(struct igb_ring *); | 366 | extern void igb_free_tx_resources(struct igb_ring *); |
@@ -357,7 +373,7 @@ extern netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *, struct igb_ring *); | |||
357 | extern void igb_unmap_and_free_tx_resource(struct igb_ring *, | 373 | extern void igb_unmap_and_free_tx_resource(struct igb_ring *, |
358 | struct igb_buffer *); | 374 | struct igb_buffer *); |
359 | extern void igb_alloc_rx_buffers_adv(struct igb_ring *, int); | 375 | extern void igb_alloc_rx_buffers_adv(struct igb_ring *, int); |
360 | extern void igb_update_stats(struct igb_adapter *); | 376 | extern void igb_update_stats(struct igb_adapter *, struct rtnl_link_stats64 *); |
361 | extern bool igb_has_link(struct igb_adapter *adapter); | 377 | extern bool igb_has_link(struct igb_adapter *adapter); |
362 | extern void igb_set_ethtool_ops(struct net_device *); | 378 | extern void igb_set_ethtool_ops(struct net_device *); |
363 | extern void igb_power_up_link(struct igb_adapter *); | 379 | extern void igb_power_up_link(struct igb_adapter *); |
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c index 26bf6a13d1c1..fdc895e5a3f8 100644 --- a/drivers/net/igb/igb_ethtool.c +++ b/drivers/net/igb/igb_ethtool.c | |||
@@ -86,12 +86,16 @@ static const struct igb_stats igb_gstrings_stats[] = { | |||
86 | IGB_STAT("tx_smbus", stats.mgptc), | 86 | IGB_STAT("tx_smbus", stats.mgptc), |
87 | IGB_STAT("rx_smbus", stats.mgprc), | 87 | IGB_STAT("rx_smbus", stats.mgprc), |
88 | IGB_STAT("dropped_smbus", stats.mgpdc), | 88 | IGB_STAT("dropped_smbus", stats.mgpdc), |
89 | IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc), | ||
90 | IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc), | ||
91 | IGB_STAT("os2bmc_tx_by_host", stats.o2bspc), | ||
92 | IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc), | ||
89 | }; | 93 | }; |
90 | 94 | ||
91 | #define IGB_NETDEV_STAT(_net_stat) { \ | 95 | #define IGB_NETDEV_STAT(_net_stat) { \ |
92 | .stat_string = __stringify(_net_stat), \ | 96 | .stat_string = __stringify(_net_stat), \ |
93 | .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \ | 97 | .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \ |
94 | .stat_offset = offsetof(struct net_device_stats, _net_stat) \ | 98 | .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \ |
95 | } | 99 | } |
96 | static const struct igb_stats igb_gstrings_net_stats[] = { | 100 | static const struct igb_stats igb_gstrings_net_stats[] = { |
97 | IGB_NETDEV_STAT(rx_errors), | 101 | IGB_NETDEV_STAT(rx_errors), |
@@ -111,8 +115,9 @@ static const struct igb_stats igb_gstrings_net_stats[] = { | |||
111 | (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats)) | 115 | (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats)) |
112 | #define IGB_RX_QUEUE_STATS_LEN \ | 116 | #define IGB_RX_QUEUE_STATS_LEN \ |
113 | (sizeof(struct igb_rx_queue_stats) / sizeof(u64)) | 117 | (sizeof(struct igb_rx_queue_stats) / sizeof(u64)) |
114 | #define IGB_TX_QUEUE_STATS_LEN \ | 118 | |
115 | (sizeof(struct igb_tx_queue_stats) / sizeof(u64)) | 119 | #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */ |
120 | |||
116 | #define IGB_QUEUE_STATS_LEN \ | 121 | #define IGB_QUEUE_STATS_LEN \ |
117 | ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \ | 122 | ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \ |
118 | IGB_RX_QUEUE_STATS_LEN) + \ | 123 | IGB_RX_QUEUE_STATS_LEN) + \ |
@@ -173,11 +178,11 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
173 | 178 | ||
174 | if ((status & E1000_STATUS_SPEED_1000) || | 179 | if ((status & E1000_STATUS_SPEED_1000) || |
175 | hw->phy.media_type != e1000_media_type_copper) | 180 | hw->phy.media_type != e1000_media_type_copper) |
176 | ecmd->speed = SPEED_1000; | 181 | ethtool_cmd_speed_set(ecmd, SPEED_1000); |
177 | else if (status & E1000_STATUS_SPEED_100) | 182 | else if (status & E1000_STATUS_SPEED_100) |
178 | ecmd->speed = SPEED_100; | 183 | ethtool_cmd_speed_set(ecmd, SPEED_100); |
179 | else | 184 | else |
180 | ecmd->speed = SPEED_10; | 185 | ethtool_cmd_speed_set(ecmd, SPEED_10); |
181 | 186 | ||
182 | if ((status & E1000_STATUS_FD) || | 187 | if ((status & E1000_STATUS_FD) || |
183 | hw->phy.media_type != e1000_media_type_copper) | 188 | hw->phy.media_type != e1000_media_type_copper) |
@@ -185,7 +190,7 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
185 | else | 190 | else |
186 | ecmd->duplex = DUPLEX_HALF; | 191 | ecmd->duplex = DUPLEX_HALF; |
187 | } else { | 192 | } else { |
188 | ecmd->speed = -1; | 193 | ethtool_cmd_speed_set(ecmd, -1); |
189 | ecmd->duplex = -1; | 194 | ecmd->duplex = -1; |
190 | } | 195 | } |
191 | 196 | ||
@@ -218,7 +223,8 @@ static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
218 | if (adapter->fc_autoneg) | 223 | if (adapter->fc_autoneg) |
219 | hw->fc.requested_mode = e1000_fc_default; | 224 | hw->fc.requested_mode = e1000_fc_default; |
220 | } else { | 225 | } else { |
221 | if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) { | 226 | u32 speed = ethtool_cmd_speed(ecmd); |
227 | if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) { | ||
222 | clear_bit(__IGB_RESETTING, &adapter->state); | 228 | clear_bit(__IGB_RESETTING, &adapter->state); |
223 | return -EINVAL; | 229 | return -EINVAL; |
224 | } | 230 | } |
@@ -602,7 +608,10 @@ static void igb_get_regs(struct net_device *netdev, | |||
602 | regs_buff[548] = rd32(E1000_TDFT); | 608 | regs_buff[548] = rd32(E1000_TDFT); |
603 | regs_buff[549] = rd32(E1000_TDFHS); | 609 | regs_buff[549] = rd32(E1000_TDFHS); |
604 | regs_buff[550] = rd32(E1000_TDFPC); | 610 | regs_buff[550] = rd32(E1000_TDFPC); |
605 | 611 | regs_buff[551] = adapter->stats.o2bgptc; | |
612 | regs_buff[552] = adapter->stats.b2ospc; | ||
613 | regs_buff[553] = adapter->stats.o2bspc; | ||
614 | regs_buff[554] = adapter->stats.b2ogprc; | ||
606 | } | 615 | } |
607 | 616 | ||
608 | static int igb_get_eeprom_len(struct net_device *netdev) | 617 | static int igb_get_eeprom_len(struct net_device *netdev) |
@@ -713,7 +722,7 @@ static int igb_set_eeprom(struct net_device *netdev, | |||
713 | /* Update the checksum over the first part of the EEPROM if needed | 722 | /* Update the checksum over the first part of the EEPROM if needed |
714 | * and flush shadow RAM for 82573 controllers */ | 723 | * and flush shadow RAM for 82573 controllers */ |
715 | if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG))) | 724 | if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG))) |
716 | igb_update_nvm_checksum(hw); | 725 | hw->nvm.ops.update(hw); |
717 | 726 | ||
718 | kfree(eeprom_buff); | 727 | kfree(eeprom_buff); |
719 | return ret_val; | 728 | return ret_val; |
@@ -726,8 +735,9 @@ static void igb_get_drvinfo(struct net_device *netdev, | |||
726 | char firmware_version[32]; | 735 | char firmware_version[32]; |
727 | u16 eeprom_data; | 736 | u16 eeprom_data; |
728 | 737 | ||
729 | strncpy(drvinfo->driver, igb_driver_name, 32); | 738 | strncpy(drvinfo->driver, igb_driver_name, sizeof(drvinfo->driver) - 1); |
730 | strncpy(drvinfo->version, igb_driver_version, 32); | 739 | strncpy(drvinfo->version, igb_driver_version, |
740 | sizeof(drvinfo->version) - 1); | ||
731 | 741 | ||
732 | /* EEPROM image version # is reported as firmware version # for | 742 | /* EEPROM image version # is reported as firmware version # for |
733 | * 82575 controllers */ | 743 | * 82575 controllers */ |
@@ -737,8 +747,10 @@ static void igb_get_drvinfo(struct net_device *netdev, | |||
737 | (eeprom_data & 0x0FF0) >> 4, | 747 | (eeprom_data & 0x0FF0) >> 4, |
738 | eeprom_data & 0x000F); | 748 | eeprom_data & 0x000F); |
739 | 749 | ||
740 | strncpy(drvinfo->fw_version, firmware_version, 32); | 750 | strncpy(drvinfo->fw_version, firmware_version, |
741 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); | 751 | sizeof(drvinfo->fw_version) - 1); |
752 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), | ||
753 | sizeof(drvinfo->bus_info) - 1); | ||
742 | drvinfo->n_stats = IGB_STATS_LEN; | 754 | drvinfo->n_stats = IGB_STATS_LEN; |
743 | drvinfo->testinfo_len = IGB_TEST_LEN; | 755 | drvinfo->testinfo_len = IGB_TEST_LEN; |
744 | drvinfo->regdump_len = igb_get_regs_len(netdev); | 756 | drvinfo->regdump_len = igb_get_regs_len(netdev); |
@@ -1069,7 +1081,7 @@ static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data, | |||
1069 | {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; | 1081 | {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; |
1070 | for (pat = 0; pat < ARRAY_SIZE(_test); pat++) { | 1082 | for (pat = 0; pat < ARRAY_SIZE(_test); pat++) { |
1071 | wr32(reg, (_test[pat] & write)); | 1083 | wr32(reg, (_test[pat] & write)); |
1072 | val = rd32(reg); | 1084 | val = rd32(reg) & mask; |
1073 | if (val != (_test[pat] & write & mask)) { | 1085 | if (val != (_test[pat] & write & mask)) { |
1074 | dev_err(&adapter->pdev->dev, "pattern test reg %04X " | 1086 | dev_err(&adapter->pdev->dev, "pattern test reg %04X " |
1075 | "failed: got 0x%08X expected 0x%08X\n", | 1087 | "failed: got 0x%08X expected 0x%08X\n", |
@@ -1952,27 +1964,28 @@ static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |||
1952 | /* bit defines for adapter->led_status */ | 1964 | /* bit defines for adapter->led_status */ |
1953 | #define IGB_LED_ON 0 | 1965 | #define IGB_LED_ON 0 |
1954 | 1966 | ||
1955 | static int igb_phys_id(struct net_device *netdev, u32 data) | 1967 | static int igb_set_phys_id(struct net_device *netdev, |
1968 | enum ethtool_phys_id_state state) | ||
1956 | { | 1969 | { |
1957 | struct igb_adapter *adapter = netdev_priv(netdev); | 1970 | struct igb_adapter *adapter = netdev_priv(netdev); |
1958 | struct e1000_hw *hw = &adapter->hw; | 1971 | struct e1000_hw *hw = &adapter->hw; |
1959 | unsigned long timeout; | ||
1960 | |||
1961 | timeout = data * 1000; | ||
1962 | |||
1963 | /* | ||
1964 | * msleep_interruptable only accepts unsigned int so we are limited | ||
1965 | * in how long a duration we can wait | ||
1966 | */ | ||
1967 | if (!timeout || timeout > UINT_MAX) | ||
1968 | timeout = UINT_MAX; | ||
1969 | |||
1970 | igb_blink_led(hw); | ||
1971 | msleep_interruptible(timeout); | ||
1972 | 1972 | ||
1973 | igb_led_off(hw); | 1973 | switch (state) { |
1974 | clear_bit(IGB_LED_ON, &adapter->led_status); | 1974 | case ETHTOOL_ID_ACTIVE: |
1975 | igb_cleanup_led(hw); | 1975 | igb_blink_led(hw); |
1976 | return 2; | ||
1977 | case ETHTOOL_ID_ON: | ||
1978 | igb_blink_led(hw); | ||
1979 | break; | ||
1980 | case ETHTOOL_ID_OFF: | ||
1981 | igb_led_off(hw); | ||
1982 | break; | ||
1983 | case ETHTOOL_ID_INACTIVE: | ||
1984 | igb_led_off(hw); | ||
1985 | clear_bit(IGB_LED_ON, &adapter->led_status); | ||
1986 | igb_cleanup_led(hw); | ||
1987 | break; | ||
1988 | } | ||
1976 | 1989 | ||
1977 | return 0; | 1990 | return 0; |
1978 | } | 1991 | } |
@@ -1998,6 +2011,12 @@ static int igb_set_coalesce(struct net_device *netdev, | |||
1998 | if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs) | 2011 | if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs) |
1999 | return -EINVAL; | 2012 | return -EINVAL; |
2000 | 2013 | ||
2014 | /* If ITR is disabled, disable DMAC */ | ||
2015 | if (ec->rx_coalesce_usecs == 0) { | ||
2016 | if (adapter->flags & IGB_FLAG_DMAC) | ||
2017 | adapter->flags &= ~IGB_FLAG_DMAC; | ||
2018 | } | ||
2019 | |||
2001 | /* convert to rate of irq's per second */ | 2020 | /* convert to rate of irq's per second */ |
2002 | if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3) | 2021 | if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3) |
2003 | adapter->rx_itr_setting = ec->rx_coalesce_usecs; | 2022 | adapter->rx_itr_setting = ec->rx_coalesce_usecs; |
@@ -2070,12 +2089,14 @@ static void igb_get_ethtool_stats(struct net_device *netdev, | |||
2070 | struct ethtool_stats *stats, u64 *data) | 2089 | struct ethtool_stats *stats, u64 *data) |
2071 | { | 2090 | { |
2072 | struct igb_adapter *adapter = netdev_priv(netdev); | 2091 | struct igb_adapter *adapter = netdev_priv(netdev); |
2073 | struct net_device_stats *net_stats = &netdev->stats; | 2092 | struct rtnl_link_stats64 *net_stats = &adapter->stats64; |
2074 | u64 *queue_stat; | 2093 | unsigned int start; |
2075 | int i, j, k; | 2094 | struct igb_ring *ring; |
2095 | int i, j; | ||
2076 | char *p; | 2096 | char *p; |
2077 | 2097 | ||
2078 | igb_update_stats(adapter); | 2098 | spin_lock(&adapter->stats64_lock); |
2099 | igb_update_stats(adapter, net_stats); | ||
2079 | 2100 | ||
2080 | for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) { | 2101 | for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) { |
2081 | p = (char *)adapter + igb_gstrings_stats[i].stat_offset; | 2102 | p = (char *)adapter + igb_gstrings_stats[i].stat_offset; |
@@ -2088,15 +2109,36 @@ static void igb_get_ethtool_stats(struct net_device *netdev, | |||
2088 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | 2109 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; |
2089 | } | 2110 | } |
2090 | for (j = 0; j < adapter->num_tx_queues; j++) { | 2111 | for (j = 0; j < adapter->num_tx_queues; j++) { |
2091 | queue_stat = (u64 *)&adapter->tx_ring[j]->tx_stats; | 2112 | u64 restart2; |
2092 | for (k = 0; k < IGB_TX_QUEUE_STATS_LEN; k++, i++) | 2113 | |
2093 | data[i] = queue_stat[k]; | 2114 | ring = adapter->tx_ring[j]; |
2115 | do { | ||
2116 | start = u64_stats_fetch_begin_bh(&ring->tx_syncp); | ||
2117 | data[i] = ring->tx_stats.packets; | ||
2118 | data[i+1] = ring->tx_stats.bytes; | ||
2119 | data[i+2] = ring->tx_stats.restart_queue; | ||
2120 | } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start)); | ||
2121 | do { | ||
2122 | start = u64_stats_fetch_begin_bh(&ring->tx_syncp2); | ||
2123 | restart2 = ring->tx_stats.restart_queue2; | ||
2124 | } while (u64_stats_fetch_retry_bh(&ring->tx_syncp2, start)); | ||
2125 | data[i+2] += restart2; | ||
2126 | |||
2127 | i += IGB_TX_QUEUE_STATS_LEN; | ||
2094 | } | 2128 | } |
2095 | for (j = 0; j < adapter->num_rx_queues; j++) { | 2129 | for (j = 0; j < adapter->num_rx_queues; j++) { |
2096 | queue_stat = (u64 *)&adapter->rx_ring[j]->rx_stats; | 2130 | ring = adapter->rx_ring[j]; |
2097 | for (k = 0; k < IGB_RX_QUEUE_STATS_LEN; k++, i++) | 2131 | do { |
2098 | data[i] = queue_stat[k]; | 2132 | start = u64_stats_fetch_begin_bh(&ring->rx_syncp); |
2133 | data[i] = ring->rx_stats.packets; | ||
2134 | data[i+1] = ring->rx_stats.bytes; | ||
2135 | data[i+2] = ring->rx_stats.drops; | ||
2136 | data[i+3] = ring->rx_stats.csum_err; | ||
2137 | data[i+4] = ring->rx_stats.alloc_failed; | ||
2138 | } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start)); | ||
2139 | i += IGB_RX_QUEUE_STATS_LEN; | ||
2099 | } | 2140 | } |
2141 | spin_unlock(&adapter->stats64_lock); | ||
2100 | } | 2142 | } |
2101 | 2143 | ||
2102 | static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data) | 2144 | static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data) |
@@ -2175,7 +2217,7 @@ static const struct ethtool_ops igb_ethtool_ops = { | |||
2175 | .set_tso = igb_set_tso, | 2217 | .set_tso = igb_set_tso, |
2176 | .self_test = igb_diag_test, | 2218 | .self_test = igb_diag_test, |
2177 | .get_strings = igb_get_strings, | 2219 | .get_strings = igb_get_strings, |
2178 | .phys_id = igb_phys_id, | 2220 | .set_phys_id = igb_set_phys_id, |
2179 | .get_sset_count = igb_get_sset_count, | 2221 | .get_sset_count = igb_get_sset_count, |
2180 | .get_ethtool_stats = igb_get_ethtool_stats, | 2222 | .get_ethtool_stats = igb_get_ethtool_stats, |
2181 | .get_coalesce = igb_get_coalesce, | 2223 | .get_coalesce = igb_get_coalesce, |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index 9b4e5895f5f9..2c28621eb30b 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -45,17 +45,23 @@ | |||
45 | #include <linux/interrupt.h> | 45 | #include <linux/interrupt.h> |
46 | #include <linux/if_ether.h> | 46 | #include <linux/if_ether.h> |
47 | #include <linux/aer.h> | 47 | #include <linux/aer.h> |
48 | #include <linux/prefetch.h> | ||
48 | #ifdef CONFIG_IGB_DCA | 49 | #ifdef CONFIG_IGB_DCA |
49 | #include <linux/dca.h> | 50 | #include <linux/dca.h> |
50 | #endif | 51 | #endif |
51 | #include "igb.h" | 52 | #include "igb.h" |
52 | 53 | ||
53 | #define DRV_VERSION "2.1.0-k2" | 54 | #define MAJ 3 |
55 | #define MIN 0 | ||
56 | #define BUILD 6 | ||
57 | #define KFIX 2 | ||
58 | #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \ | ||
59 | __stringify(BUILD) "-k" __stringify(KFIX) | ||
54 | char igb_driver_name[] = "igb"; | 60 | char igb_driver_name[] = "igb"; |
55 | char igb_driver_version[] = DRV_VERSION; | 61 | char igb_driver_version[] = DRV_VERSION; |
56 | static const char igb_driver_string[] = | 62 | static const char igb_driver_string[] = |
57 | "Intel(R) Gigabit Ethernet Network Driver"; | 63 | "Intel(R) Gigabit Ethernet Network Driver"; |
58 | static const char igb_copyright[] = "Copyright (c) 2007-2009 Intel Corporation."; | 64 | static const char igb_copyright[] = "Copyright (c) 2007-2011 Intel Corporation."; |
59 | 65 | ||
60 | static const struct e1000_info *igb_info_tbl[] = { | 66 | static const struct e1000_info *igb_info_tbl[] = { |
61 | [board_82575] = &e1000_82575_info, | 67 | [board_82575] = &e1000_82575_info, |
@@ -68,9 +74,14 @@ static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = { | |||
68 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 }, | 74 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 }, |
69 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 }, | 75 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 }, |
70 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 }, | 76 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 }, |
77 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 }, | ||
71 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 }, | 78 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 }, |
72 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 }, | 79 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 }, |
73 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 }, | 80 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 }, |
81 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 }, | ||
82 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 }, | ||
83 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 }, | ||
84 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 }, | ||
74 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 }, | 85 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 }, |
75 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 }, | 86 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 }, |
76 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 }, | 87 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 }, |
@@ -94,9 +105,9 @@ static int igb_setup_all_rx_resources(struct igb_adapter *); | |||
94 | static void igb_free_all_tx_resources(struct igb_adapter *); | 105 | static void igb_free_all_tx_resources(struct igb_adapter *); |
95 | static void igb_free_all_rx_resources(struct igb_adapter *); | 106 | static void igb_free_all_rx_resources(struct igb_adapter *); |
96 | static void igb_setup_mrqc(struct igb_adapter *); | 107 | static void igb_setup_mrqc(struct igb_adapter *); |
97 | void igb_update_stats(struct igb_adapter *); | ||
98 | static int igb_probe(struct pci_dev *, const struct pci_device_id *); | 108 | static int igb_probe(struct pci_dev *, const struct pci_device_id *); |
99 | static void __devexit igb_remove(struct pci_dev *pdev); | 109 | static void __devexit igb_remove(struct pci_dev *pdev); |
110 | static void igb_init_hw_timer(struct igb_adapter *adapter); | ||
100 | static int igb_sw_init(struct igb_adapter *); | 111 | static int igb_sw_init(struct igb_adapter *); |
101 | static int igb_open(struct net_device *); | 112 | static int igb_open(struct net_device *); |
102 | static int igb_close(struct net_device *); | 113 | static int igb_close(struct net_device *); |
@@ -111,7 +122,8 @@ static void igb_update_phy_info(unsigned long); | |||
111 | static void igb_watchdog(unsigned long); | 122 | static void igb_watchdog(unsigned long); |
112 | static void igb_watchdog_task(struct work_struct *); | 123 | static void igb_watchdog_task(struct work_struct *); |
113 | static netdev_tx_t igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *); | 124 | static netdev_tx_t igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *); |
114 | static struct net_device_stats *igb_get_stats(struct net_device *); | 125 | static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev, |
126 | struct rtnl_link_stats64 *stats); | ||
115 | static int igb_change_mtu(struct net_device *, int); | 127 | static int igb_change_mtu(struct net_device *, int); |
116 | static int igb_set_mac(struct net_device *, void *); | 128 | static int igb_set_mac(struct net_device *, void *); |
117 | static void igb_set_uta(struct igb_adapter *adapter); | 129 | static void igb_set_uta(struct igb_adapter *adapter); |
@@ -145,6 +157,7 @@ static int igb_ndo_set_vf_vlan(struct net_device *netdev, | |||
145 | static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate); | 157 | static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate); |
146 | static int igb_ndo_get_vf_config(struct net_device *netdev, int vf, | 158 | static int igb_ndo_get_vf_config(struct net_device *netdev, int vf, |
147 | struct ifla_vf_info *ivi); | 159 | struct ifla_vf_info *ivi); |
160 | static void igb_check_vf_rate_limit(struct igb_adapter *); | ||
148 | 161 | ||
149 | #ifdef CONFIG_PM | 162 | #ifdef CONFIG_PM |
150 | static int igb_suspend(struct pci_dev *, pm_message_t); | 163 | static int igb_suspend(struct pci_dev *, pm_message_t); |
@@ -188,7 +201,7 @@ static struct pci_driver igb_driver = { | |||
188 | .probe = igb_probe, | 201 | .probe = igb_probe, |
189 | .remove = __devexit_p(igb_remove), | 202 | .remove = __devexit_p(igb_remove), |
190 | #ifdef CONFIG_PM | 203 | #ifdef CONFIG_PM |
191 | /* Power Managment Hooks */ | 204 | /* Power Management Hooks */ |
192 | .suspend = igb_suspend, | 205 | .suspend = igb_suspend, |
193 | .resume = igb_resume, | 206 | .resume = igb_resume, |
194 | #endif | 207 | #endif |
@@ -986,7 +999,7 @@ static void igb_clear_interrupt_scheme(struct igb_adapter *adapter) | |||
986 | * Attempt to configure interrupts using the best available | 999 | * Attempt to configure interrupts using the best available |
987 | * capabilities of the hardware and kernel. | 1000 | * capabilities of the hardware and kernel. |
988 | **/ | 1001 | **/ |
989 | static void igb_set_interrupt_capability(struct igb_adapter *adapter) | 1002 | static int igb_set_interrupt_capability(struct igb_adapter *adapter) |
990 | { | 1003 | { |
991 | int err; | 1004 | int err; |
992 | int numvecs, i; | 1005 | int numvecs, i; |
@@ -1052,8 +1065,10 @@ msi_only: | |||
1052 | if (!pci_enable_msi(adapter->pdev)) | 1065 | if (!pci_enable_msi(adapter->pdev)) |
1053 | adapter->flags |= IGB_FLAG_HAS_MSI; | 1066 | adapter->flags |= IGB_FLAG_HAS_MSI; |
1054 | out: | 1067 | out: |
1055 | /* Notify the stack of the (possibly) reduced Tx Queue count. */ | 1068 | /* Notify the stack of the (possibly) reduced queue counts. */ |
1056 | adapter->netdev->real_num_tx_queues = adapter->num_tx_queues; | 1069 | netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues); |
1070 | return netif_set_real_num_rx_queues(adapter->netdev, | ||
1071 | adapter->num_rx_queues); | ||
1057 | } | 1072 | } |
1058 | 1073 | ||
1059 | /** | 1074 | /** |
@@ -1152,7 +1167,9 @@ static int igb_init_interrupt_scheme(struct igb_adapter *adapter) | |||
1152 | struct pci_dev *pdev = adapter->pdev; | 1167 | struct pci_dev *pdev = adapter->pdev; |
1153 | int err; | 1168 | int err; |
1154 | 1169 | ||
1155 | igb_set_interrupt_capability(adapter); | 1170 | err = igb_set_interrupt_capability(adapter); |
1171 | if (err) | ||
1172 | return err; | ||
1156 | 1173 | ||
1157 | err = igb_alloc_q_vectors(adapter); | 1174 | err = igb_alloc_q_vectors(adapter); |
1158 | if (err) { | 1175 | if (err) { |
@@ -1530,7 +1547,9 @@ void igb_down(struct igb_adapter *adapter) | |||
1530 | netif_carrier_off(netdev); | 1547 | netif_carrier_off(netdev); |
1531 | 1548 | ||
1532 | /* record the stats before reset*/ | 1549 | /* record the stats before reset*/ |
1533 | igb_update_stats(adapter); | 1550 | spin_lock(&adapter->stats64_lock); |
1551 | igb_update_stats(adapter, &adapter->stats64); | ||
1552 | spin_unlock(&adapter->stats64_lock); | ||
1534 | 1553 | ||
1535 | adapter->link_speed = 0; | 1554 | adapter->link_speed = 0; |
1536 | adapter->link_duplex = 0; | 1555 | adapter->link_duplex = 0; |
@@ -1646,7 +1665,7 @@ void igb_reset(struct igb_adapter *adapter) | |||
1646 | if (adapter->vfs_allocated_count) { | 1665 | if (adapter->vfs_allocated_count) { |
1647 | int i; | 1666 | int i; |
1648 | for (i = 0 ; i < adapter->vfs_allocated_count; i++) | 1667 | for (i = 0 ; i < adapter->vfs_allocated_count; i++) |
1649 | adapter->vf_data[i].flags = 0; | 1668 | adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC; |
1650 | 1669 | ||
1651 | /* ping all the active vfs to let them know we are going down */ | 1670 | /* ping all the active vfs to let them know we are going down */ |
1652 | igb_ping_all_vfs(adapter); | 1671 | igb_ping_all_vfs(adapter); |
@@ -1662,7 +1681,58 @@ void igb_reset(struct igb_adapter *adapter) | |||
1662 | 1681 | ||
1663 | if (hw->mac.ops.init_hw(hw)) | 1682 | if (hw->mac.ops.init_hw(hw)) |
1664 | dev_err(&pdev->dev, "Hardware Error\n"); | 1683 | dev_err(&pdev->dev, "Hardware Error\n"); |
1684 | if (hw->mac.type > e1000_82580) { | ||
1685 | if (adapter->flags & IGB_FLAG_DMAC) { | ||
1686 | u32 reg; | ||
1687 | |||
1688 | /* | ||
1689 | * DMA Coalescing high water mark needs to be higher | ||
1690 | * than * the * Rx threshold. The Rx threshold is | ||
1691 | * currently * pba - 6, so we * should use a high water | ||
1692 | * mark of pba * - 4. */ | ||
1693 | hwm = (pba - 4) << 10; | ||
1694 | |||
1695 | reg = (((pba-6) << E1000_DMACR_DMACTHR_SHIFT) | ||
1696 | & E1000_DMACR_DMACTHR_MASK); | ||
1697 | |||
1698 | /* transition to L0x or L1 if available..*/ | ||
1699 | reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK); | ||
1700 | |||
1701 | /* watchdog timer= +-1000 usec in 32usec intervals */ | ||
1702 | reg |= (1000 >> 5); | ||
1703 | wr32(E1000_DMACR, reg); | ||
1704 | |||
1705 | /* no lower threshold to disable coalescing(smart fifb) | ||
1706 | * -UTRESH=0*/ | ||
1707 | wr32(E1000_DMCRTRH, 0); | ||
1708 | |||
1709 | /* set hwm to PBA - 2 * max frame size */ | ||
1710 | wr32(E1000_FCRTC, hwm); | ||
1665 | 1711 | ||
1712 | /* | ||
1713 | * This sets the time to wait before requesting tran- | ||
1714 | * sition to * low power state to number of usecs needed | ||
1715 | * to receive 1 512 * byte frame at gigabit line rate | ||
1716 | */ | ||
1717 | reg = rd32(E1000_DMCTLX); | ||
1718 | reg |= IGB_DMCTLX_DCFLUSH_DIS; | ||
1719 | |||
1720 | /* Delay 255 usec before entering Lx state. */ | ||
1721 | reg |= 0xFF; | ||
1722 | wr32(E1000_DMCTLX, reg); | ||
1723 | |||
1724 | /* free space in Tx packet buffer to wake from DMAC */ | ||
1725 | wr32(E1000_DMCTXTH, | ||
1726 | (IGB_MIN_TXPBSIZE - | ||
1727 | (IGB_TX_BUF_4096 + adapter->max_frame_size)) | ||
1728 | >> 6); | ||
1729 | |||
1730 | /* make low power state decision controlled by DMAC */ | ||
1731 | reg = rd32(E1000_PCIEMISC); | ||
1732 | reg |= E1000_PCIEMISC_LX_DECISION; | ||
1733 | wr32(E1000_PCIEMISC, reg); | ||
1734 | } /* end if IGB_FLAG_DMAC set */ | ||
1735 | } | ||
1666 | if (hw->mac.type == e1000_82580) { | 1736 | if (hw->mac.type == e1000_82580) { |
1667 | u32 reg = rd32(E1000_PCIEMISC); | 1737 | u32 reg = rd32(E1000_PCIEMISC); |
1668 | wr32(E1000_PCIEMISC, | 1738 | wr32(E1000_PCIEMISC, |
@@ -1683,7 +1753,7 @@ static const struct net_device_ops igb_netdev_ops = { | |||
1683 | .ndo_open = igb_open, | 1753 | .ndo_open = igb_open, |
1684 | .ndo_stop = igb_close, | 1754 | .ndo_stop = igb_close, |
1685 | .ndo_start_xmit = igb_xmit_frame_adv, | 1755 | .ndo_start_xmit = igb_xmit_frame_adv, |
1686 | .ndo_get_stats = igb_get_stats, | 1756 | .ndo_get_stats64 = igb_get_stats64, |
1687 | .ndo_set_rx_mode = igb_set_rx_mode, | 1757 | .ndo_set_rx_mode = igb_set_rx_mode, |
1688 | .ndo_set_multicast_list = igb_set_rx_mode, | 1758 | .ndo_set_multicast_list = igb_set_rx_mode, |
1689 | .ndo_set_mac_address = igb_set_mac, | 1759 | .ndo_set_mac_address = igb_set_mac, |
@@ -1721,12 +1791,13 @@ static int __devinit igb_probe(struct pci_dev *pdev, | |||
1721 | struct igb_adapter *adapter; | 1791 | struct igb_adapter *adapter; |
1722 | struct e1000_hw *hw; | 1792 | struct e1000_hw *hw; |
1723 | u16 eeprom_data = 0; | 1793 | u16 eeprom_data = 0; |
1794 | s32 ret_val; | ||
1724 | static int global_quad_port_a; /* global quad port a indication */ | 1795 | static int global_quad_port_a; /* global quad port a indication */ |
1725 | const struct e1000_info *ei = igb_info_tbl[ent->driver_data]; | 1796 | const struct e1000_info *ei = igb_info_tbl[ent->driver_data]; |
1726 | unsigned long mmio_start, mmio_len; | 1797 | unsigned long mmio_start, mmio_len; |
1727 | int err, pci_using_dac; | 1798 | int err, pci_using_dac; |
1728 | u16 eeprom_apme_mask = IGB_EEPROM_APME; | 1799 | u16 eeprom_apme_mask = IGB_EEPROM_APME; |
1729 | u32 part_num; | 1800 | u8 part_str[E1000_PBANUM_LENGTH]; |
1730 | 1801 | ||
1731 | /* Catch broken hardware that put the wrong VF device ID in | 1802 | /* Catch broken hardware that put the wrong VF device ID in |
1732 | * the PCIe SR-IOV capability. | 1803 | * the PCIe SR-IOV capability. |
@@ -1856,8 +1927,10 @@ static int __devinit igb_probe(struct pci_dev *pdev, | |||
1856 | netdev->vlan_features |= NETIF_F_IPV6_CSUM; | 1927 | netdev->vlan_features |= NETIF_F_IPV6_CSUM; |
1857 | netdev->vlan_features |= NETIF_F_SG; | 1928 | netdev->vlan_features |= NETIF_F_SG; |
1858 | 1929 | ||
1859 | if (pci_using_dac) | 1930 | if (pci_using_dac) { |
1860 | netdev->features |= NETIF_F_HIGHDMA; | 1931 | netdev->features |= NETIF_F_HIGHDMA; |
1932 | netdev->vlan_features |= NETIF_F_HIGHDMA; | ||
1933 | } | ||
1861 | 1934 | ||
1862 | if (hw->mac.type >= e1000_82576) | 1935 | if (hw->mac.type >= e1000_82576) |
1863 | netdev->features |= NETIF_F_SCTP_CSUM; | 1936 | netdev->features |= NETIF_F_SCTP_CSUM; |
@@ -1869,7 +1942,7 @@ static int __devinit igb_probe(struct pci_dev *pdev, | |||
1869 | hw->mac.ops.reset_hw(hw); | 1942 | hw->mac.ops.reset_hw(hw); |
1870 | 1943 | ||
1871 | /* make sure the NVM is good */ | 1944 | /* make sure the NVM is good */ |
1872 | if (igb_validate_nvm_checksum(hw) < 0) { | 1945 | if (hw->nvm.ops.validate(hw) < 0) { |
1873 | dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n"); | 1946 | dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n"); |
1874 | err = -EIO; | 1947 | err = -EIO; |
1875 | goto err_eeprom; | 1948 | goto err_eeprom; |
@@ -1888,9 +1961,9 @@ static int __devinit igb_probe(struct pci_dev *pdev, | |||
1888 | goto err_eeprom; | 1961 | goto err_eeprom; |
1889 | } | 1962 | } |
1890 | 1963 | ||
1891 | setup_timer(&adapter->watchdog_timer, &igb_watchdog, | 1964 | setup_timer(&adapter->watchdog_timer, igb_watchdog, |
1892 | (unsigned long) adapter); | 1965 | (unsigned long) adapter); |
1893 | setup_timer(&adapter->phy_info_timer, &igb_update_phy_info, | 1966 | setup_timer(&adapter->phy_info_timer, igb_update_phy_info, |
1894 | (unsigned long) adapter); | 1967 | (unsigned long) adapter); |
1895 | 1968 | ||
1896 | INIT_WORK(&adapter->reset_task, igb_reset_task); | 1969 | INIT_WORK(&adapter->reset_task, igb_reset_task); |
@@ -1977,6 +2050,9 @@ static int __devinit igb_probe(struct pci_dev *pdev, | |||
1977 | } | 2050 | } |
1978 | 2051 | ||
1979 | #endif | 2052 | #endif |
2053 | /* do hw tstamp init after resetting */ | ||
2054 | igb_init_hw_timer(adapter); | ||
2055 | |||
1980 | dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n"); | 2056 | dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n"); |
1981 | /* print bus type/speed/width info */ | 2057 | /* print bus type/speed/width info */ |
1982 | dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n", | 2058 | dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n", |
@@ -1990,16 +2066,22 @@ static int __devinit igb_probe(struct pci_dev *pdev, | |||
1990 | "unknown"), | 2066 | "unknown"), |
1991 | netdev->dev_addr); | 2067 | netdev->dev_addr); |
1992 | 2068 | ||
1993 | igb_read_part_num(hw, &part_num); | 2069 | ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH); |
1994 | dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name, | 2070 | if (ret_val) |
1995 | (part_num >> 8), (part_num & 0xff)); | 2071 | strcpy(part_str, "Unknown"); |
1996 | 2072 | dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str); | |
1997 | dev_info(&pdev->dev, | 2073 | dev_info(&pdev->dev, |
1998 | "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n", | 2074 | "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n", |
1999 | adapter->msix_entries ? "MSI-X" : | 2075 | adapter->msix_entries ? "MSI-X" : |
2000 | (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy", | 2076 | (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy", |
2001 | adapter->num_rx_queues, adapter->num_tx_queues); | 2077 | adapter->num_rx_queues, adapter->num_tx_queues); |
2002 | 2078 | switch (hw->mac.type) { | |
2079 | case e1000_i350: | ||
2080 | igb_set_eee_i350(hw); | ||
2081 | break; | ||
2082 | default: | ||
2083 | break; | ||
2084 | } | ||
2003 | return 0; | 2085 | return 0; |
2004 | 2086 | ||
2005 | err_register: | 2087 | err_register: |
@@ -2039,13 +2121,16 @@ static void __devexit igb_remove(struct pci_dev *pdev) | |||
2039 | struct igb_adapter *adapter = netdev_priv(netdev); | 2121 | struct igb_adapter *adapter = netdev_priv(netdev); |
2040 | struct e1000_hw *hw = &adapter->hw; | 2122 | struct e1000_hw *hw = &adapter->hw; |
2041 | 2123 | ||
2042 | /* flush_scheduled work may reschedule our watchdog task, so | 2124 | /* |
2043 | * explicitly disable watchdog tasks from being rescheduled */ | 2125 | * The watchdog timer may be rescheduled, so explicitly |
2126 | * disable watchdog from being rescheduled. | ||
2127 | */ | ||
2044 | set_bit(__IGB_DOWN, &adapter->state); | 2128 | set_bit(__IGB_DOWN, &adapter->state); |
2045 | del_timer_sync(&adapter->watchdog_timer); | 2129 | del_timer_sync(&adapter->watchdog_timer); |
2046 | del_timer_sync(&adapter->phy_info_timer); | 2130 | del_timer_sync(&adapter->phy_info_timer); |
2047 | 2131 | ||
2048 | flush_scheduled_work(); | 2132 | cancel_work_sync(&adapter->reset_task); |
2133 | cancel_work_sync(&adapter->watchdog_task); | ||
2049 | 2134 | ||
2050 | #ifdef CONFIG_IGB_DCA | 2135 | #ifdef CONFIG_IGB_DCA |
2051 | if (adapter->flags & IGB_FLAG_DCA_ENABLED) { | 2136 | if (adapter->flags & IGB_FLAG_DCA_ENABLED) { |
@@ -2133,6 +2218,9 @@ static void __devinit igb_probe_vfs(struct igb_adapter * adapter) | |||
2133 | random_ether_addr(mac_addr); | 2218 | random_ether_addr(mac_addr); |
2134 | igb_set_vf_mac(adapter, i, mac_addr); | 2219 | igb_set_vf_mac(adapter, i, mac_addr); |
2135 | } | 2220 | } |
2221 | /* DMA Coalescing is not supported in IOV mode. */ | ||
2222 | if (adapter->flags & IGB_FLAG_DMAC) | ||
2223 | adapter->flags &= ~IGB_FLAG_DMAC; | ||
2136 | } | 2224 | } |
2137 | #endif /* CONFIG_PCI_IOV */ | 2225 | #endif /* CONFIG_PCI_IOV */ |
2138 | } | 2226 | } |
@@ -2205,7 +2293,7 @@ static void igb_init_hw_timer(struct igb_adapter *adapter) | |||
2205 | /** | 2293 | /** |
2206 | * Scale the NIC clock cycle by a large factor so that | 2294 | * Scale the NIC clock cycle by a large factor so that |
2207 | * relatively small clock corrections can be added or | 2295 | * relatively small clock corrections can be added or |
2208 | * substracted at each clock tick. The drawbacks of a large | 2296 | * subtracted at each clock tick. The drawbacks of a large |
2209 | * factor are a) that the clock register overflows more quickly | 2297 | * factor are a) that the clock register overflows more quickly |
2210 | * (not such a big deal) and b) that the increment per tick has | 2298 | * (not such a big deal) and b) that the increment per tick has |
2211 | * to fit into 24 bits. As a result we need to use a shift of | 2299 | * to fit into 24 bits. As a result we need to use a shift of |
@@ -2268,12 +2356,26 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter) | |||
2268 | adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; | 2356 | adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
2269 | adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; | 2357 | adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; |
2270 | 2358 | ||
2359 | spin_lock_init(&adapter->stats64_lock); | ||
2271 | #ifdef CONFIG_PCI_IOV | 2360 | #ifdef CONFIG_PCI_IOV |
2272 | if (hw->mac.type == e1000_82576) | 2361 | switch (hw->mac.type) { |
2273 | adapter->vfs_allocated_count = (max_vfs > 7) ? 7 : max_vfs; | 2362 | case e1000_82576: |
2274 | 2363 | case e1000_i350: | |
2364 | if (max_vfs > 7) { | ||
2365 | dev_warn(&pdev->dev, | ||
2366 | "Maximum of 7 VFs per PF, using max\n"); | ||
2367 | adapter->vfs_allocated_count = 7; | ||
2368 | } else | ||
2369 | adapter->vfs_allocated_count = max_vfs; | ||
2370 | break; | ||
2371 | default: | ||
2372 | break; | ||
2373 | } | ||
2275 | #endif /* CONFIG_PCI_IOV */ | 2374 | #endif /* CONFIG_PCI_IOV */ |
2276 | adapter->rss_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus()); | 2375 | adapter->rss_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus()); |
2376 | /* i350 cannot do RSS and SR-IOV at the same time */ | ||
2377 | if (hw->mac.type == e1000_i350 && adapter->vfs_allocated_count) | ||
2378 | adapter->rss_queues = 1; | ||
2277 | 2379 | ||
2278 | /* | 2380 | /* |
2279 | * if rss_queues > 4 or vfs are going to be allocated with rss_queues | 2381 | * if rss_queues > 4 or vfs are going to be allocated with rss_queues |
@@ -2290,12 +2392,14 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter) | |||
2290 | return -ENOMEM; | 2392 | return -ENOMEM; |
2291 | } | 2393 | } |
2292 | 2394 | ||
2293 | igb_init_hw_timer(adapter); | ||
2294 | igb_probe_vfs(adapter); | 2395 | igb_probe_vfs(adapter); |
2295 | 2396 | ||
2296 | /* Explicitly disable IRQ since the NIC can be in any state. */ | 2397 | /* Explicitly disable IRQ since the NIC can be in any state. */ |
2297 | igb_irq_disable(adapter); | 2398 | igb_irq_disable(adapter); |
2298 | 2399 | ||
2400 | if (hw->mac.type == e1000_i350) | ||
2401 | adapter->flags &= ~IGB_FLAG_DMAC; | ||
2402 | |||
2299 | set_bit(__IGB_DOWN, &adapter->state); | 2403 | set_bit(__IGB_DOWN, &adapter->state); |
2300 | return 0; | 2404 | return 0; |
2301 | } | 2405 | } |
@@ -2425,10 +2529,9 @@ int igb_setup_tx_resources(struct igb_ring *tx_ring) | |||
2425 | int size; | 2529 | int size; |
2426 | 2530 | ||
2427 | size = sizeof(struct igb_buffer) * tx_ring->count; | 2531 | size = sizeof(struct igb_buffer) * tx_ring->count; |
2428 | tx_ring->buffer_info = vmalloc(size); | 2532 | tx_ring->buffer_info = vzalloc(size); |
2429 | if (!tx_ring->buffer_info) | 2533 | if (!tx_ring->buffer_info) |
2430 | goto err; | 2534 | goto err; |
2431 | memset(tx_ring->buffer_info, 0, size); | ||
2432 | 2535 | ||
2433 | /* round up to nearest 4K */ | 2536 | /* round up to nearest 4K */ |
2434 | tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc); | 2537 | tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc); |
@@ -2576,10 +2679,9 @@ int igb_setup_rx_resources(struct igb_ring *rx_ring) | |||
2576 | int size, desc_len; | 2679 | int size, desc_len; |
2577 | 2680 | ||
2578 | size = sizeof(struct igb_buffer) * rx_ring->count; | 2681 | size = sizeof(struct igb_buffer) * rx_ring->count; |
2579 | rx_ring->buffer_info = vmalloc(size); | 2682 | rx_ring->buffer_info = vzalloc(size); |
2580 | if (!rx_ring->buffer_info) | 2683 | if (!rx_ring->buffer_info) |
2581 | goto err; | 2684 | goto err; |
2582 | memset(rx_ring->buffer_info, 0, size); | ||
2583 | 2685 | ||
2584 | desc_len = sizeof(union e1000_adv_rx_desc); | 2686 | desc_len = sizeof(union e1000_adv_rx_desc); |
2585 | 2687 | ||
@@ -3311,7 +3413,7 @@ static void igb_set_rx_mode(struct net_device *netdev) | |||
3311 | } else { | 3413 | } else { |
3312 | /* | 3414 | /* |
3313 | * Write addresses to the MTA, if the attempt fails | 3415 | * Write addresses to the MTA, if the attempt fails |
3314 | * then we should just turn on promiscous mode so | 3416 | * then we should just turn on promiscuous mode so |
3315 | * that we can at least receive multicast traffic | 3417 | * that we can at least receive multicast traffic |
3316 | */ | 3418 | */ |
3317 | count = igb_write_mc_addr_list(netdev); | 3419 | count = igb_write_mc_addr_list(netdev); |
@@ -3325,7 +3427,7 @@ static void igb_set_rx_mode(struct net_device *netdev) | |||
3325 | /* | 3427 | /* |
3326 | * Write addresses to available RAR registers, if there is not | 3428 | * Write addresses to available RAR registers, if there is not |
3327 | * sufficient space to store all the addresses then enable | 3429 | * sufficient space to store all the addresses then enable |
3328 | * unicast promiscous mode | 3430 | * unicast promiscuous mode |
3329 | */ | 3431 | */ |
3330 | count = igb_write_uc_addr_list(netdev); | 3432 | count = igb_write_uc_addr_list(netdev); |
3331 | if (count < 0) { | 3433 | if (count < 0) { |
@@ -3351,6 +3453,45 @@ static void igb_set_rx_mode(struct net_device *netdev) | |||
3351 | igb_restore_vf_multicasts(adapter); | 3453 | igb_restore_vf_multicasts(adapter); |
3352 | } | 3454 | } |
3353 | 3455 | ||
3456 | static void igb_check_wvbr(struct igb_adapter *adapter) | ||
3457 | { | ||
3458 | struct e1000_hw *hw = &adapter->hw; | ||
3459 | u32 wvbr = 0; | ||
3460 | |||
3461 | switch (hw->mac.type) { | ||
3462 | case e1000_82576: | ||
3463 | case e1000_i350: | ||
3464 | if (!(wvbr = rd32(E1000_WVBR))) | ||
3465 | return; | ||
3466 | break; | ||
3467 | default: | ||
3468 | break; | ||
3469 | } | ||
3470 | |||
3471 | adapter->wvbr |= wvbr; | ||
3472 | } | ||
3473 | |||
3474 | #define IGB_STAGGERED_QUEUE_OFFSET 8 | ||
3475 | |||
3476 | static void igb_spoof_check(struct igb_adapter *adapter) | ||
3477 | { | ||
3478 | int j; | ||
3479 | |||
3480 | if (!adapter->wvbr) | ||
3481 | return; | ||
3482 | |||
3483 | for(j = 0; j < adapter->vfs_allocated_count; j++) { | ||
3484 | if (adapter->wvbr & (1 << j) || | ||
3485 | adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) { | ||
3486 | dev_warn(&adapter->pdev->dev, | ||
3487 | "Spoof event(s) detected on VF %d\n", j); | ||
3488 | adapter->wvbr &= | ||
3489 | ~((1 << j) | | ||
3490 | (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))); | ||
3491 | } | ||
3492 | } | ||
3493 | } | ||
3494 | |||
3354 | /* Need to wait a few seconds after link up to get diagnostic information from | 3495 | /* Need to wait a few seconds after link up to get diagnostic information from |
3355 | * the phy */ | 3496 | * the phy */ |
3356 | static void igb_update_phy_info(unsigned long data) | 3497 | static void igb_update_phy_info(unsigned long data) |
@@ -3395,6 +3536,25 @@ bool igb_has_link(struct igb_adapter *adapter) | |||
3395 | return link_active; | 3536 | return link_active; |
3396 | } | 3537 | } |
3397 | 3538 | ||
3539 | static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event) | ||
3540 | { | ||
3541 | bool ret = false; | ||
3542 | u32 ctrl_ext, thstat; | ||
3543 | |||
3544 | /* check for thermal sensor event on i350, copper only */ | ||
3545 | if (hw->mac.type == e1000_i350) { | ||
3546 | thstat = rd32(E1000_THSTAT); | ||
3547 | ctrl_ext = rd32(E1000_CTRL_EXT); | ||
3548 | |||
3549 | if ((hw->phy.media_type == e1000_media_type_copper) && | ||
3550 | !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII)) { | ||
3551 | ret = !!(thstat & event); | ||
3552 | } | ||
3553 | } | ||
3554 | |||
3555 | return ret; | ||
3556 | } | ||
3557 | |||
3398 | /** | 3558 | /** |
3399 | * igb_watchdog - Timer Call-back | 3559 | * igb_watchdog - Timer Call-back |
3400 | * @data: pointer to adapter cast into an unsigned long | 3560 | * @data: pointer to adapter cast into an unsigned long |
@@ -3437,6 +3597,14 @@ static void igb_watchdog_task(struct work_struct *work) | |||
3437 | ((ctrl & E1000_CTRL_RFCE) ? "RX" : | 3597 | ((ctrl & E1000_CTRL_RFCE) ? "RX" : |
3438 | ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None"))); | 3598 | ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None"))); |
3439 | 3599 | ||
3600 | /* check for thermal sensor event */ | ||
3601 | if (igb_thermal_sensor_event(hw, E1000_THSTAT_LINK_THROTTLE)) { | ||
3602 | printk(KERN_INFO "igb: %s The network adapter " | ||
3603 | "link speed was downshifted " | ||
3604 | "because it overheated.\n", | ||
3605 | netdev->name); | ||
3606 | } | ||
3607 | |||
3440 | /* adjust timeout factor according to speed/duplex */ | 3608 | /* adjust timeout factor according to speed/duplex */ |
3441 | adapter->tx_timeout_factor = 1; | 3609 | adapter->tx_timeout_factor = 1; |
3442 | switch (adapter->link_speed) { | 3610 | switch (adapter->link_speed) { |
@@ -3451,6 +3619,7 @@ static void igb_watchdog_task(struct work_struct *work) | |||
3451 | netif_carrier_on(netdev); | 3619 | netif_carrier_on(netdev); |
3452 | 3620 | ||
3453 | igb_ping_all_vfs(adapter); | 3621 | igb_ping_all_vfs(adapter); |
3622 | igb_check_vf_rate_limit(adapter); | ||
3454 | 3623 | ||
3455 | /* link state has changed, schedule phy info update */ | 3624 | /* link state has changed, schedule phy info update */ |
3456 | if (!test_bit(__IGB_DOWN, &adapter->state)) | 3625 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
@@ -3461,6 +3630,15 @@ static void igb_watchdog_task(struct work_struct *work) | |||
3461 | if (netif_carrier_ok(netdev)) { | 3630 | if (netif_carrier_ok(netdev)) { |
3462 | adapter->link_speed = 0; | 3631 | adapter->link_speed = 0; |
3463 | adapter->link_duplex = 0; | 3632 | adapter->link_duplex = 0; |
3633 | |||
3634 | /* check for thermal sensor event */ | ||
3635 | if (igb_thermal_sensor_event(hw, E1000_THSTAT_PWR_DOWN)) { | ||
3636 | printk(KERN_ERR "igb: %s The network adapter " | ||
3637 | "was stopped because it " | ||
3638 | "overheated.\n", | ||
3639 | netdev->name); | ||
3640 | } | ||
3641 | |||
3464 | /* Links status message must follow this format */ | 3642 | /* Links status message must follow this format */ |
3465 | printk(KERN_INFO "igb: %s NIC Link is Down\n", | 3643 | printk(KERN_INFO "igb: %s NIC Link is Down\n", |
3466 | netdev->name); | 3644 | netdev->name); |
@@ -3475,7 +3653,9 @@ static void igb_watchdog_task(struct work_struct *work) | |||
3475 | } | 3653 | } |
3476 | } | 3654 | } |
3477 | 3655 | ||
3478 | igb_update_stats(adapter); | 3656 | spin_lock(&adapter->stats64_lock); |
3657 | igb_update_stats(adapter, &adapter->stats64); | ||
3658 | spin_unlock(&adapter->stats64_lock); | ||
3479 | 3659 | ||
3480 | for (i = 0; i < adapter->num_tx_queues; i++) { | 3660 | for (i = 0; i < adapter->num_tx_queues; i++) { |
3481 | struct igb_ring *tx_ring = adapter->tx_ring[i]; | 3661 | struct igb_ring *tx_ring = adapter->tx_ring[i]; |
@@ -3508,6 +3688,8 @@ static void igb_watchdog_task(struct work_struct *work) | |||
3508 | wr32(E1000_ICS, E1000_ICS_RXDMT0); | 3688 | wr32(E1000_ICS, E1000_ICS_RXDMT0); |
3509 | } | 3689 | } |
3510 | 3690 | ||
3691 | igb_spoof_check(adapter); | ||
3692 | |||
3511 | /* Reset the timer */ | 3693 | /* Reset the timer */ |
3512 | if (!test_bit(__IGB_DOWN, &adapter->state)) | 3694 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
3513 | mod_timer(&adapter->watchdog_timer, | 3695 | mod_timer(&adapter->watchdog_timer, |
@@ -3527,7 +3709,7 @@ enum latency_range { | |||
3527 | * Stores a new ITR value based on strictly on packet size. This | 3709 | * Stores a new ITR value based on strictly on packet size. This |
3528 | * algorithm is less sophisticated than that used in igb_update_itr, | 3710 | * algorithm is less sophisticated than that used in igb_update_itr, |
3529 | * due to the difficulty of synchronizing statistics across multiple | 3711 | * due to the difficulty of synchronizing statistics across multiple |
3530 | * receive rings. The divisors and thresholds used by this fuction | 3712 | * receive rings. The divisors and thresholds used by this function |
3531 | * were determined based on theoretical maximum wire speed and testing | 3713 | * were determined based on theoretical maximum wire speed and testing |
3532 | * data, in order to minimize response time while increasing bulk | 3714 | * data, in order to minimize response time while increasing bulk |
3533 | * throughput. | 3715 | * throughput. |
@@ -3542,6 +3724,8 @@ static void igb_update_ring_itr(struct igb_q_vector *q_vector) | |||
3542 | int new_val = q_vector->itr_val; | 3724 | int new_val = q_vector->itr_val; |
3543 | int avg_wire_size = 0; | 3725 | int avg_wire_size = 0; |
3544 | struct igb_adapter *adapter = q_vector->adapter; | 3726 | struct igb_adapter *adapter = q_vector->adapter; |
3727 | struct igb_ring *ring; | ||
3728 | unsigned int packets; | ||
3545 | 3729 | ||
3546 | /* For non-gigabit speeds, just fix the interrupt rate at 4000 | 3730 | /* For non-gigabit speeds, just fix the interrupt rate at 4000 |
3547 | * ints/sec - ITR timer value of 120 ticks. | 3731 | * ints/sec - ITR timer value of 120 ticks. |
@@ -3551,16 +3735,21 @@ static void igb_update_ring_itr(struct igb_q_vector *q_vector) | |||
3551 | goto set_itr_val; | 3735 | goto set_itr_val; |
3552 | } | 3736 | } |
3553 | 3737 | ||
3554 | if (q_vector->rx_ring && q_vector->rx_ring->total_packets) { | 3738 | ring = q_vector->rx_ring; |
3555 | struct igb_ring *ring = q_vector->rx_ring; | 3739 | if (ring) { |
3556 | avg_wire_size = ring->total_bytes / ring->total_packets; | 3740 | packets = ACCESS_ONCE(ring->total_packets); |
3741 | |||
3742 | if (packets) | ||
3743 | avg_wire_size = ring->total_bytes / packets; | ||
3557 | } | 3744 | } |
3558 | 3745 | ||
3559 | if (q_vector->tx_ring && q_vector->tx_ring->total_packets) { | 3746 | ring = q_vector->tx_ring; |
3560 | struct igb_ring *ring = q_vector->tx_ring; | 3747 | if (ring) { |
3561 | avg_wire_size = max_t(u32, avg_wire_size, | 3748 | packets = ACCESS_ONCE(ring->total_packets); |
3562 | (ring->total_bytes / | 3749 | |
3563 | ring->total_packets)); | 3750 | if (packets) |
3751 | avg_wire_size = max_t(u32, avg_wire_size, | ||
3752 | ring->total_bytes / packets); | ||
3564 | } | 3753 | } |
3565 | 3754 | ||
3566 | /* if avg_wire_size isn't set no work was done */ | 3755 | /* if avg_wire_size isn't set no work was done */ |
@@ -3954,7 +4143,7 @@ static inline int igb_tx_map_adv(struct igb_ring *tx_ring, struct sk_buff *skb, | |||
3954 | } | 4143 | } |
3955 | 4144 | ||
3956 | tx_ring->buffer_info[i].skb = skb; | 4145 | tx_ring->buffer_info[i].skb = skb; |
3957 | tx_ring->buffer_info[i].shtx = skb_shinfo(skb)->tx_flags; | 4146 | tx_ring->buffer_info[i].tx_flags = skb_shinfo(skb)->tx_flags; |
3958 | /* multiply data chunks by size of headers */ | 4147 | /* multiply data chunks by size of headers */ |
3959 | tx_ring->buffer_info[i].bytecount = ((gso_segs - 1) * hlen) + skb->len; | 4148 | tx_ring->buffer_info[i].bytecount = ((gso_segs - 1) * hlen) + skb->len; |
3960 | tx_ring->buffer_info[i].gso_segs = gso_segs; | 4149 | tx_ring->buffer_info[i].gso_segs = gso_segs; |
@@ -4069,7 +4258,11 @@ static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, int size) | |||
4069 | 4258 | ||
4070 | /* A reprieve! */ | 4259 | /* A reprieve! */ |
4071 | netif_wake_subqueue(netdev, tx_ring->queue_index); | 4260 | netif_wake_subqueue(netdev, tx_ring->queue_index); |
4072 | tx_ring->tx_stats.restart_queue++; | 4261 | |
4262 | u64_stats_update_begin(&tx_ring->tx_syncp2); | ||
4263 | tx_ring->tx_stats.restart_queue2++; | ||
4264 | u64_stats_update_end(&tx_ring->tx_syncp2); | ||
4265 | |||
4073 | return 0; | 4266 | return 0; |
4074 | } | 4267 | } |
4075 | 4268 | ||
@@ -4083,12 +4276,10 @@ static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, int size) | |||
4083 | netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb, | 4276 | netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb, |
4084 | struct igb_ring *tx_ring) | 4277 | struct igb_ring *tx_ring) |
4085 | { | 4278 | { |
4086 | struct igb_adapter *adapter = netdev_priv(tx_ring->netdev); | ||
4087 | int tso = 0, count; | 4279 | int tso = 0, count; |
4088 | u32 tx_flags = 0; | 4280 | u32 tx_flags = 0; |
4089 | u16 first; | 4281 | u16 first; |
4090 | u8 hdr_len = 0; | 4282 | u8 hdr_len = 0; |
4091 | union skb_shared_tx *shtx = skb_tx(skb); | ||
4092 | 4283 | ||
4093 | /* need: 1 descriptor per page, | 4284 | /* need: 1 descriptor per page, |
4094 | * + 2 desc gap to keep tail from touching head, | 4285 | * + 2 desc gap to keep tail from touching head, |
@@ -4100,12 +4291,12 @@ netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb, | |||
4100 | return NETDEV_TX_BUSY; | 4291 | return NETDEV_TX_BUSY; |
4101 | } | 4292 | } |
4102 | 4293 | ||
4103 | if (unlikely(shtx->hardware)) { | 4294 | if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { |
4104 | shtx->in_progress = 1; | 4295 | skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; |
4105 | tx_flags |= IGB_TX_FLAGS_TSTAMP; | 4296 | tx_flags |= IGB_TX_FLAGS_TSTAMP; |
4106 | } | 4297 | } |
4107 | 4298 | ||
4108 | if (vlan_tx_tag_present(skb) && adapter->vlgrp) { | 4299 | if (vlan_tx_tag_present(skb)) { |
4109 | tx_flags |= IGB_TX_FLAGS_VLAN; | 4300 | tx_flags |= IGB_TX_FLAGS_VLAN; |
4110 | tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT); | 4301 | tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT); |
4111 | } | 4302 | } |
@@ -4131,7 +4322,7 @@ netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb, | |||
4131 | 4322 | ||
4132 | /* | 4323 | /* |
4133 | * count reflects descriptors mapped, if 0 or less then mapping error | 4324 | * count reflects descriptors mapped, if 0 or less then mapping error |
4134 | * has occured and we need to rewind the descriptor queue | 4325 | * has occurred and we need to rewind the descriptor queue |
4135 | */ | 4326 | */ |
4136 | count = igb_tx_map_adv(tx_ring, skb, first); | 4327 | count = igb_tx_map_adv(tx_ring, skb, first); |
4137 | if (!count) { | 4328 | if (!count) { |
@@ -4207,16 +4398,22 @@ static void igb_reset_task(struct work_struct *work) | |||
4207 | } | 4398 | } |
4208 | 4399 | ||
4209 | /** | 4400 | /** |
4210 | * igb_get_stats - Get System Network Statistics | 4401 | * igb_get_stats64 - Get System Network Statistics |
4211 | * @netdev: network interface device structure | 4402 | * @netdev: network interface device structure |
4403 | * @stats: rtnl_link_stats64 pointer | ||
4212 | * | 4404 | * |
4213 | * Returns the address of the device statistics structure. | ||
4214 | * The statistics are actually updated from the timer callback. | ||
4215 | **/ | 4405 | **/ |
4216 | static struct net_device_stats *igb_get_stats(struct net_device *netdev) | 4406 | static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev, |
4407 | struct rtnl_link_stats64 *stats) | ||
4217 | { | 4408 | { |
4218 | /* only return the current stats */ | 4409 | struct igb_adapter *adapter = netdev_priv(netdev); |
4219 | return &netdev->stats; | 4410 | |
4411 | spin_lock(&adapter->stats64_lock); | ||
4412 | igb_update_stats(adapter, &adapter->stats64); | ||
4413 | memcpy(stats, &adapter->stats64, sizeof(*stats)); | ||
4414 | spin_unlock(&adapter->stats64_lock); | ||
4415 | |||
4416 | return stats; | ||
4220 | } | 4417 | } |
4221 | 4418 | ||
4222 | /** | 4419 | /** |
@@ -4298,15 +4495,17 @@ static int igb_change_mtu(struct net_device *netdev, int new_mtu) | |||
4298 | * @adapter: board private structure | 4495 | * @adapter: board private structure |
4299 | **/ | 4496 | **/ |
4300 | 4497 | ||
4301 | void igb_update_stats(struct igb_adapter *adapter) | 4498 | void igb_update_stats(struct igb_adapter *adapter, |
4499 | struct rtnl_link_stats64 *net_stats) | ||
4302 | { | 4500 | { |
4303 | struct net_device_stats *net_stats = igb_get_stats(adapter->netdev); | ||
4304 | struct e1000_hw *hw = &adapter->hw; | 4501 | struct e1000_hw *hw = &adapter->hw; |
4305 | struct pci_dev *pdev = adapter->pdev; | 4502 | struct pci_dev *pdev = adapter->pdev; |
4306 | u32 reg, mpc; | 4503 | u32 reg, mpc; |
4307 | u16 phy_tmp; | 4504 | u16 phy_tmp; |
4308 | int i; | 4505 | int i; |
4309 | u64 bytes, packets; | 4506 | u64 bytes, packets; |
4507 | unsigned int start; | ||
4508 | u64 _bytes, _packets; | ||
4310 | 4509 | ||
4311 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | 4510 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF |
4312 | 4511 | ||
@@ -4324,10 +4523,17 @@ void igb_update_stats(struct igb_adapter *adapter) | |||
4324 | for (i = 0; i < adapter->num_rx_queues; i++) { | 4523 | for (i = 0; i < adapter->num_rx_queues; i++) { |
4325 | u32 rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0x0FFF; | 4524 | u32 rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0x0FFF; |
4326 | struct igb_ring *ring = adapter->rx_ring[i]; | 4525 | struct igb_ring *ring = adapter->rx_ring[i]; |
4526 | |||
4327 | ring->rx_stats.drops += rqdpc_tmp; | 4527 | ring->rx_stats.drops += rqdpc_tmp; |
4328 | net_stats->rx_fifo_errors += rqdpc_tmp; | 4528 | net_stats->rx_fifo_errors += rqdpc_tmp; |
4329 | bytes += ring->rx_stats.bytes; | 4529 | |
4330 | packets += ring->rx_stats.packets; | 4530 | do { |
4531 | start = u64_stats_fetch_begin_bh(&ring->rx_syncp); | ||
4532 | _bytes = ring->rx_stats.bytes; | ||
4533 | _packets = ring->rx_stats.packets; | ||
4534 | } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start)); | ||
4535 | bytes += _bytes; | ||
4536 | packets += _packets; | ||
4331 | } | 4537 | } |
4332 | 4538 | ||
4333 | net_stats->rx_bytes = bytes; | 4539 | net_stats->rx_bytes = bytes; |
@@ -4337,8 +4543,13 @@ void igb_update_stats(struct igb_adapter *adapter) | |||
4337 | packets = 0; | 4543 | packets = 0; |
4338 | for (i = 0; i < adapter->num_tx_queues; i++) { | 4544 | for (i = 0; i < adapter->num_tx_queues; i++) { |
4339 | struct igb_ring *ring = adapter->tx_ring[i]; | 4545 | struct igb_ring *ring = adapter->tx_ring[i]; |
4340 | bytes += ring->tx_stats.bytes; | 4546 | do { |
4341 | packets += ring->tx_stats.packets; | 4547 | start = u64_stats_fetch_begin_bh(&ring->tx_syncp); |
4548 | _bytes = ring->tx_stats.bytes; | ||
4549 | _packets = ring->tx_stats.packets; | ||
4550 | } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start)); | ||
4551 | bytes += _bytes; | ||
4552 | packets += _packets; | ||
4342 | } | 4553 | } |
4343 | net_stats->tx_bytes = bytes; | 4554 | net_stats->tx_bytes = bytes; |
4344 | net_stats->tx_packets = packets; | 4555 | net_stats->tx_packets = packets; |
@@ -4460,6 +4671,15 @@ void igb_update_stats(struct igb_adapter *adapter) | |||
4460 | adapter->stats.mgptc += rd32(E1000_MGTPTC); | 4671 | adapter->stats.mgptc += rd32(E1000_MGTPTC); |
4461 | adapter->stats.mgprc += rd32(E1000_MGTPRC); | 4672 | adapter->stats.mgprc += rd32(E1000_MGTPRC); |
4462 | adapter->stats.mgpdc += rd32(E1000_MGTPDC); | 4673 | adapter->stats.mgpdc += rd32(E1000_MGTPDC); |
4674 | |||
4675 | /* OS2BMC Stats */ | ||
4676 | reg = rd32(E1000_MANC); | ||
4677 | if (reg & E1000_MANC_EN_BMC2OS) { | ||
4678 | adapter->stats.o2bgptc += rd32(E1000_O2BGPTC); | ||
4679 | adapter->stats.o2bspc += rd32(E1000_O2BSPC); | ||
4680 | adapter->stats.b2ospc += rd32(E1000_B2OSPC); | ||
4681 | adapter->stats.b2ogprc += rd32(E1000_B2OGPRC); | ||
4682 | } | ||
4463 | } | 4683 | } |
4464 | 4684 | ||
4465 | static irqreturn_t igb_msix_other(int irq, void *data) | 4685 | static irqreturn_t igb_msix_other(int irq, void *data) |
@@ -4475,6 +4695,10 @@ static irqreturn_t igb_msix_other(int irq, void *data) | |||
4475 | if (icr & E1000_ICR_DOUTSYNC) { | 4695 | if (icr & E1000_ICR_DOUTSYNC) { |
4476 | /* HW is reporting DMA is out of sync */ | 4696 | /* HW is reporting DMA is out of sync */ |
4477 | adapter->stats.doosync++; | 4697 | adapter->stats.doosync++; |
4698 | /* The DMA Out of Sync is also indication of a spoof event | ||
4699 | * in IOV mode. Check the Wrong VM Behavior register to | ||
4700 | * see if it is really a spoof event. */ | ||
4701 | igb_check_wvbr(adapter); | ||
4478 | } | 4702 | } |
4479 | 4703 | ||
4480 | /* Check for a mailbox event */ | 4704 | /* Check for a mailbox event */ |
@@ -4660,12 +4884,13 @@ static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf) | |||
4660 | u32 vmolr = rd32(E1000_VMOLR(vf)); | 4884 | u32 vmolr = rd32(E1000_VMOLR(vf)); |
4661 | struct vf_data_storage *vf_data = &adapter->vf_data[vf]; | 4885 | struct vf_data_storage *vf_data = &adapter->vf_data[vf]; |
4662 | 4886 | ||
4663 | vf_data->flags |= ~(IGB_VF_FLAG_UNI_PROMISC | | 4887 | vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC | |
4664 | IGB_VF_FLAG_MULTI_PROMISC); | 4888 | IGB_VF_FLAG_MULTI_PROMISC); |
4665 | vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME); | 4889 | vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME); |
4666 | 4890 | ||
4667 | if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) { | 4891 | if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) { |
4668 | vmolr |= E1000_VMOLR_MPME; | 4892 | vmolr |= E1000_VMOLR_MPME; |
4893 | vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC; | ||
4669 | *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST; | 4894 | *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST; |
4670 | } else { | 4895 | } else { |
4671 | /* | 4896 | /* |
@@ -4926,8 +5151,8 @@ static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf) | |||
4926 | 5151 | ||
4927 | static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf) | 5152 | static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf) |
4928 | { | 5153 | { |
4929 | /* clear flags */ | 5154 | /* clear flags - except flag that indicates PF has set the MAC */ |
4930 | adapter->vf_data[vf].flags &= ~(IGB_VF_FLAG_PF_SET_MAC); | 5155 | adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC; |
4931 | adapter->vf_data[vf].last_nack = jiffies; | 5156 | adapter->vf_data[vf].last_nack = jiffies; |
4932 | 5157 | ||
4933 | /* reset offloads to defaults */ | 5158 | /* reset offloads to defaults */ |
@@ -4981,7 +5206,7 @@ static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf) | |||
4981 | reg = rd32(E1000_VFRE); | 5206 | reg = rd32(E1000_VFRE); |
4982 | wr32(E1000_VFRE, reg | (1 << vf)); | 5207 | wr32(E1000_VFRE, reg | (1 << vf)); |
4983 | 5208 | ||
4984 | adapter->vf_data[vf].flags = IGB_VF_FLAG_CTS; | 5209 | adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS; |
4985 | 5210 | ||
4986 | /* reply to reset with ack and vf mac address */ | 5211 | /* reply to reset with ack and vf mac address */ |
4987 | msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK; | 5212 | msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK; |
@@ -5060,7 +5285,14 @@ static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf) | |||
5060 | 5285 | ||
5061 | switch ((msgbuf[0] & 0xFFFF)) { | 5286 | switch ((msgbuf[0] & 0xFFFF)) { |
5062 | case E1000_VF_SET_MAC_ADDR: | 5287 | case E1000_VF_SET_MAC_ADDR: |
5063 | retval = igb_set_vf_mac_addr(adapter, msgbuf, vf); | 5288 | retval = -EINVAL; |
5289 | if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC)) | ||
5290 | retval = igb_set_vf_mac_addr(adapter, msgbuf, vf); | ||
5291 | else | ||
5292 | dev_warn(&pdev->dev, | ||
5293 | "VF %d attempted to override administratively " | ||
5294 | "set MAC address\nReload the VF driver to " | ||
5295 | "resume operations\n", vf); | ||
5064 | break; | 5296 | break; |
5065 | case E1000_VF_SET_PROMISC: | 5297 | case E1000_VF_SET_PROMISC: |
5066 | retval = igb_set_vf_promisc(adapter, msgbuf, vf); | 5298 | retval = igb_set_vf_promisc(adapter, msgbuf, vf); |
@@ -5072,8 +5304,12 @@ static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf) | |||
5072 | retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf); | 5304 | retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf); |
5073 | break; | 5305 | break; |
5074 | case E1000_VF_SET_VLAN: | 5306 | case E1000_VF_SET_VLAN: |
5075 | if (adapter->vf_data[vf].pf_vlan) | 5307 | retval = -1; |
5076 | retval = -1; | 5308 | if (vf_data->pf_vlan) |
5309 | dev_warn(&pdev->dev, | ||
5310 | "VF %d attempted to override administratively " | ||
5311 | "set VLAN tag\nReload the VF driver to " | ||
5312 | "resume operations\n", vf); | ||
5077 | else | 5313 | else |
5078 | retval = igb_set_vf_vlan(adapter, msgbuf, vf); | 5314 | retval = igb_set_vf_vlan(adapter, msgbuf, vf); |
5079 | break; | 5315 | break; |
@@ -5121,8 +5357,8 @@ static void igb_msg_task(struct igb_adapter *adapter) | |||
5121 | * The unicast table address is a register array of 32-bit registers. | 5357 | * The unicast table address is a register array of 32-bit registers. |
5122 | * The table is meant to be used in a way similar to how the MTA is used | 5358 | * The table is meant to be used in a way similar to how the MTA is used |
5123 | * however due to certain limitations in the hardware it is necessary to | 5359 | * however due to certain limitations in the hardware it is necessary to |
5124 | * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscous | 5360 | * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous |
5125 | * enable bit to allow vlan tag stripping when promiscous mode is enabled | 5361 | * enable bit to allow vlan tag stripping when promiscuous mode is enabled |
5126 | **/ | 5362 | **/ |
5127 | static void igb_set_uta(struct igb_adapter *adapter) | 5363 | static void igb_set_uta(struct igb_adapter *adapter) |
5128 | { | 5364 | { |
@@ -5319,7 +5555,7 @@ static void igb_tx_hwtstamp(struct igb_q_vector *q_vector, struct igb_buffer *bu | |||
5319 | u64 regval; | 5555 | u64 regval; |
5320 | 5556 | ||
5321 | /* if skb does not support hw timestamp or TX stamp not valid exit */ | 5557 | /* if skb does not support hw timestamp or TX stamp not valid exit */ |
5322 | if (likely(!buffer_info->shtx.hardware) || | 5558 | if (likely(!(buffer_info->tx_flags & SKBTX_HW_TSTAMP)) || |
5323 | !(rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID)) | 5559 | !(rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID)) |
5324 | return; | 5560 | return; |
5325 | 5561 | ||
@@ -5389,7 +5625,10 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector) | |||
5389 | if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) && | 5625 | if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) && |
5390 | !(test_bit(__IGB_DOWN, &adapter->state))) { | 5626 | !(test_bit(__IGB_DOWN, &adapter->state))) { |
5391 | netif_wake_subqueue(netdev, tx_ring->queue_index); | 5627 | netif_wake_subqueue(netdev, tx_ring->queue_index); |
5628 | |||
5629 | u64_stats_update_begin(&tx_ring->tx_syncp); | ||
5392 | tx_ring->tx_stats.restart_queue++; | 5630 | tx_ring->tx_stats.restart_queue++; |
5631 | u64_stats_update_end(&tx_ring->tx_syncp); | ||
5393 | } | 5632 | } |
5394 | } | 5633 | } |
5395 | 5634 | ||
@@ -5429,9 +5668,11 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector) | |||
5429 | } | 5668 | } |
5430 | tx_ring->total_bytes += total_bytes; | 5669 | tx_ring->total_bytes += total_bytes; |
5431 | tx_ring->total_packets += total_packets; | 5670 | tx_ring->total_packets += total_packets; |
5671 | u64_stats_update_begin(&tx_ring->tx_syncp); | ||
5432 | tx_ring->tx_stats.bytes += total_bytes; | 5672 | tx_ring->tx_stats.bytes += total_bytes; |
5433 | tx_ring->tx_stats.packets += total_packets; | 5673 | tx_ring->tx_stats.packets += total_packets; |
5434 | return (count < tx_ring->count); | 5674 | u64_stats_update_end(&tx_ring->tx_syncp); |
5675 | return count < tx_ring->count; | ||
5435 | } | 5676 | } |
5436 | 5677 | ||
5437 | /** | 5678 | /** |
@@ -5456,7 +5697,7 @@ static void igb_receive_skb(struct igb_q_vector *q_vector, | |||
5456 | static inline void igb_rx_checksum_adv(struct igb_ring *ring, | 5697 | static inline void igb_rx_checksum_adv(struct igb_ring *ring, |
5457 | u32 status_err, struct sk_buff *skb) | 5698 | u32 status_err, struct sk_buff *skb) |
5458 | { | 5699 | { |
5459 | skb->ip_summed = CHECKSUM_NONE; | 5700 | skb_checksum_none_assert(skb); |
5460 | 5701 | ||
5461 | /* Ignore Checksum bit is set or checksum is disabled through ethtool */ | 5702 | /* Ignore Checksum bit is set or checksum is disabled through ethtool */ |
5462 | if (!(ring->flags & IGB_RING_FLAG_RX_CSUM) || | 5703 | if (!(ring->flags & IGB_RING_FLAG_RX_CSUM) || |
@@ -5472,9 +5713,11 @@ static inline void igb_rx_checksum_adv(struct igb_ring *ring, | |||
5472 | * packets, (aka let the stack check the crc32c) | 5713 | * packets, (aka let the stack check the crc32c) |
5473 | */ | 5714 | */ |
5474 | if ((skb->len == 60) && | 5715 | if ((skb->len == 60) && |
5475 | (ring->flags & IGB_RING_FLAG_RX_SCTP_CSUM)) | 5716 | (ring->flags & IGB_RING_FLAG_RX_SCTP_CSUM)) { |
5717 | u64_stats_update_begin(&ring->rx_syncp); | ||
5476 | ring->rx_stats.csum_err++; | 5718 | ring->rx_stats.csum_err++; |
5477 | 5719 | u64_stats_update_end(&ring->rx_syncp); | |
5720 | } | ||
5478 | /* let the stack verify checksum errors */ | 5721 | /* let the stack verify checksum errors */ |
5479 | return; | 5722 | return; |
5480 | } | 5723 | } |
@@ -5500,7 +5743,7 @@ static void igb_rx_hwtstamp(struct igb_q_vector *q_vector, u32 staterr, | |||
5500 | * values must belong to this one here and therefore we don't need to | 5743 | * values must belong to this one here and therefore we don't need to |
5501 | * compare any of the additional attributes stored for it. | 5744 | * compare any of the additional attributes stored for it. |
5502 | * | 5745 | * |
5503 | * If nothing went wrong, then it should have a skb_shared_tx that we | 5746 | * If nothing went wrong, then it should have a shared tx_flags that we |
5504 | * can turn into a skb_shared_hwtstamps. | 5747 | * can turn into a skb_shared_hwtstamps. |
5505 | */ | 5748 | */ |
5506 | if (staterr & E1000_RXDADV_STAT_TSIP) { | 5749 | if (staterr & E1000_RXDADV_STAT_TSIP) { |
@@ -5661,8 +5904,10 @@ next_desc: | |||
5661 | 5904 | ||
5662 | rx_ring->total_packets += total_packets; | 5905 | rx_ring->total_packets += total_packets; |
5663 | rx_ring->total_bytes += total_bytes; | 5906 | rx_ring->total_bytes += total_bytes; |
5907 | u64_stats_update_begin(&rx_ring->rx_syncp); | ||
5664 | rx_ring->rx_stats.packets += total_packets; | 5908 | rx_ring->rx_stats.packets += total_packets; |
5665 | rx_ring->rx_stats.bytes += total_bytes; | 5909 | rx_ring->rx_stats.bytes += total_bytes; |
5910 | u64_stats_update_end(&rx_ring->rx_syncp); | ||
5666 | return cleaned; | 5911 | return cleaned; |
5667 | } | 5912 | } |
5668 | 5913 | ||
@@ -5690,8 +5935,10 @@ void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring, int cleaned_count) | |||
5690 | if ((bufsz < IGB_RXBUFFER_1024) && !buffer_info->page_dma) { | 5935 | if ((bufsz < IGB_RXBUFFER_1024) && !buffer_info->page_dma) { |
5691 | if (!buffer_info->page) { | 5936 | if (!buffer_info->page) { |
5692 | buffer_info->page = netdev_alloc_page(netdev); | 5937 | buffer_info->page = netdev_alloc_page(netdev); |
5693 | if (!buffer_info->page) { | 5938 | if (unlikely(!buffer_info->page)) { |
5939 | u64_stats_update_begin(&rx_ring->rx_syncp); | ||
5694 | rx_ring->rx_stats.alloc_failed++; | 5940 | rx_ring->rx_stats.alloc_failed++; |
5941 | u64_stats_update_end(&rx_ring->rx_syncp); | ||
5695 | goto no_buffers; | 5942 | goto no_buffers; |
5696 | } | 5943 | } |
5697 | buffer_info->page_offset = 0; | 5944 | buffer_info->page_offset = 0; |
@@ -5706,7 +5953,9 @@ void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring, int cleaned_count) | |||
5706 | if (dma_mapping_error(rx_ring->dev, | 5953 | if (dma_mapping_error(rx_ring->dev, |
5707 | buffer_info->page_dma)) { | 5954 | buffer_info->page_dma)) { |
5708 | buffer_info->page_dma = 0; | 5955 | buffer_info->page_dma = 0; |
5956 | u64_stats_update_begin(&rx_ring->rx_syncp); | ||
5709 | rx_ring->rx_stats.alloc_failed++; | 5957 | rx_ring->rx_stats.alloc_failed++; |
5958 | u64_stats_update_end(&rx_ring->rx_syncp); | ||
5710 | goto no_buffers; | 5959 | goto no_buffers; |
5711 | } | 5960 | } |
5712 | } | 5961 | } |
@@ -5714,8 +5963,10 @@ void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring, int cleaned_count) | |||
5714 | skb = buffer_info->skb; | 5963 | skb = buffer_info->skb; |
5715 | if (!skb) { | 5964 | if (!skb) { |
5716 | skb = netdev_alloc_skb_ip_align(netdev, bufsz); | 5965 | skb = netdev_alloc_skb_ip_align(netdev, bufsz); |
5717 | if (!skb) { | 5966 | if (unlikely(!skb)) { |
5967 | u64_stats_update_begin(&rx_ring->rx_syncp); | ||
5718 | rx_ring->rx_stats.alloc_failed++; | 5968 | rx_ring->rx_stats.alloc_failed++; |
5969 | u64_stats_update_end(&rx_ring->rx_syncp); | ||
5719 | goto no_buffers; | 5970 | goto no_buffers; |
5720 | } | 5971 | } |
5721 | 5972 | ||
@@ -5729,7 +5980,9 @@ void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring, int cleaned_count) | |||
5729 | if (dma_mapping_error(rx_ring->dev, | 5980 | if (dma_mapping_error(rx_ring->dev, |
5730 | buffer_info->dma)) { | 5981 | buffer_info->dma)) { |
5731 | buffer_info->dma = 0; | 5982 | buffer_info->dma = 0; |
5983 | u64_stats_update_begin(&rx_ring->rx_syncp); | ||
5732 | rx_ring->rx_stats.alloc_failed++; | 5984 | rx_ring->rx_stats.alloc_failed++; |
5985 | u64_stats_update_end(&rx_ring->rx_syncp); | ||
5733 | goto no_buffers; | 5986 | goto no_buffers; |
5734 | } | 5987 | } |
5735 | } | 5988 | } |
@@ -6092,7 +6345,7 @@ static void igb_restore_vlan(struct igb_adapter *adapter) | |||
6092 | 6345 | ||
6093 | if (adapter->vlgrp) { | 6346 | if (adapter->vlgrp) { |
6094 | u16 vid; | 6347 | u16 vid; |
6095 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { | 6348 | for (vid = 0; vid < VLAN_N_VID; vid++) { |
6096 | if (!vlan_group_get_device(adapter->vlgrp, vid)) | 6349 | if (!vlan_group_get_device(adapter->vlgrp, vid)) |
6097 | continue; | 6350 | continue; |
6098 | igb_vlan_rx_add_vid(adapter->netdev, vid); | 6351 | igb_vlan_rx_add_vid(adapter->netdev, vid); |
@@ -6100,14 +6353,25 @@ static void igb_restore_vlan(struct igb_adapter *adapter) | |||
6100 | } | 6353 | } |
6101 | } | 6354 | } |
6102 | 6355 | ||
6103 | int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx) | 6356 | int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx) |
6104 | { | 6357 | { |
6105 | struct pci_dev *pdev = adapter->pdev; | 6358 | struct pci_dev *pdev = adapter->pdev; |
6106 | struct e1000_mac_info *mac = &adapter->hw.mac; | 6359 | struct e1000_mac_info *mac = &adapter->hw.mac; |
6107 | 6360 | ||
6108 | mac->autoneg = 0; | 6361 | mac->autoneg = 0; |
6109 | 6362 | ||
6110 | switch (spddplx) { | 6363 | /* Make sure dplx is at most 1 bit and lsb of speed is not set |
6364 | * for the switch() below to work */ | ||
6365 | if ((spd & 1) || (dplx & ~1)) | ||
6366 | goto err_inval; | ||
6367 | |||
6368 | /* Fiber NIC's only allow 1000 Gbps Full duplex */ | ||
6369 | if ((adapter->hw.phy.media_type == e1000_media_type_internal_serdes) && | ||
6370 | spd != SPEED_1000 && | ||
6371 | dplx != DUPLEX_FULL) | ||
6372 | goto err_inval; | ||
6373 | |||
6374 | switch (spd + dplx) { | ||
6111 | case SPEED_10 + DUPLEX_HALF: | 6375 | case SPEED_10 + DUPLEX_HALF: |
6112 | mac->forced_speed_duplex = ADVERTISE_10_HALF; | 6376 | mac->forced_speed_duplex = ADVERTISE_10_HALF; |
6113 | break; | 6377 | break; |
@@ -6126,10 +6390,13 @@ int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx) | |||
6126 | break; | 6390 | break; |
6127 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | 6391 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ |
6128 | default: | 6392 | default: |
6129 | dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n"); | 6393 | goto err_inval; |
6130 | return -EINVAL; | ||
6131 | } | 6394 | } |
6132 | return 0; | 6395 | return 0; |
6396 | |||
6397 | err_inval: | ||
6398 | dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n"); | ||
6399 | return -EINVAL; | ||
6133 | } | 6400 | } |
6134 | 6401 | ||
6135 | static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake) | 6402 | static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake) |
@@ -6466,9 +6733,91 @@ static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) | |||
6466 | return igb_set_vf_mac(adapter, vf, mac); | 6733 | return igb_set_vf_mac(adapter, vf, mac); |
6467 | } | 6734 | } |
6468 | 6735 | ||
6736 | static int igb_link_mbps(int internal_link_speed) | ||
6737 | { | ||
6738 | switch (internal_link_speed) { | ||
6739 | case SPEED_100: | ||
6740 | return 100; | ||
6741 | case SPEED_1000: | ||
6742 | return 1000; | ||
6743 | default: | ||
6744 | return 0; | ||
6745 | } | ||
6746 | } | ||
6747 | |||
6748 | static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate, | ||
6749 | int link_speed) | ||
6750 | { | ||
6751 | int rf_dec, rf_int; | ||
6752 | u32 bcnrc_val; | ||
6753 | |||
6754 | if (tx_rate != 0) { | ||
6755 | /* Calculate the rate factor values to set */ | ||
6756 | rf_int = link_speed / tx_rate; | ||
6757 | rf_dec = (link_speed - (rf_int * tx_rate)); | ||
6758 | rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate; | ||
6759 | |||
6760 | bcnrc_val = E1000_RTTBCNRC_RS_ENA; | ||
6761 | bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) & | ||
6762 | E1000_RTTBCNRC_RF_INT_MASK); | ||
6763 | bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK); | ||
6764 | } else { | ||
6765 | bcnrc_val = 0; | ||
6766 | } | ||
6767 | |||
6768 | wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */ | ||
6769 | wr32(E1000_RTTBCNRC, bcnrc_val); | ||
6770 | } | ||
6771 | |||
6772 | static void igb_check_vf_rate_limit(struct igb_adapter *adapter) | ||
6773 | { | ||
6774 | int actual_link_speed, i; | ||
6775 | bool reset_rate = false; | ||
6776 | |||
6777 | /* VF TX rate limit was not set or not supported */ | ||
6778 | if ((adapter->vf_rate_link_speed == 0) || | ||
6779 | (adapter->hw.mac.type != e1000_82576)) | ||
6780 | return; | ||
6781 | |||
6782 | actual_link_speed = igb_link_mbps(adapter->link_speed); | ||
6783 | if (actual_link_speed != adapter->vf_rate_link_speed) { | ||
6784 | reset_rate = true; | ||
6785 | adapter->vf_rate_link_speed = 0; | ||
6786 | dev_info(&adapter->pdev->dev, | ||
6787 | "Link speed has been changed. VF Transmit " | ||
6788 | "rate is disabled\n"); | ||
6789 | } | ||
6790 | |||
6791 | for (i = 0; i < adapter->vfs_allocated_count; i++) { | ||
6792 | if (reset_rate) | ||
6793 | adapter->vf_data[i].tx_rate = 0; | ||
6794 | |||
6795 | igb_set_vf_rate_limit(&adapter->hw, i, | ||
6796 | adapter->vf_data[i].tx_rate, | ||
6797 | actual_link_speed); | ||
6798 | } | ||
6799 | } | ||
6800 | |||
6469 | static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate) | 6801 | static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate) |
6470 | { | 6802 | { |
6471 | return -EOPNOTSUPP; | 6803 | struct igb_adapter *adapter = netdev_priv(netdev); |
6804 | struct e1000_hw *hw = &adapter->hw; | ||
6805 | int actual_link_speed; | ||
6806 | |||
6807 | if (hw->mac.type != e1000_82576) | ||
6808 | return -EOPNOTSUPP; | ||
6809 | |||
6810 | actual_link_speed = igb_link_mbps(adapter->link_speed); | ||
6811 | if ((vf >= adapter->vfs_allocated_count) || | ||
6812 | (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) || | ||
6813 | (tx_rate < 0) || (tx_rate > actual_link_speed)) | ||
6814 | return -EINVAL; | ||
6815 | |||
6816 | adapter->vf_rate_link_speed = actual_link_speed; | ||
6817 | adapter->vf_data[vf].tx_rate = (u16)tx_rate; | ||
6818 | igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed); | ||
6819 | |||
6820 | return 0; | ||
6472 | } | 6821 | } |
6473 | 6822 | ||
6474 | static int igb_ndo_get_vf_config(struct net_device *netdev, | 6823 | static int igb_ndo_get_vf_config(struct net_device *netdev, |
@@ -6479,7 +6828,7 @@ static int igb_ndo_get_vf_config(struct net_device *netdev, | |||
6479 | return -EINVAL; | 6828 | return -EINVAL; |
6480 | ivi->vf = vf; | 6829 | ivi->vf = vf; |
6481 | memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN); | 6830 | memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN); |
6482 | ivi->tx_rate = 0; | 6831 | ivi->tx_rate = adapter->vf_data[vf].tx_rate; |
6483 | ivi->vlan = adapter->vf_data[vf].pf_vlan; | 6832 | ivi->vlan = adapter->vf_data[vf].pf_vlan; |
6484 | ivi->qos = adapter->vf_data[vf].pf_qos; | 6833 | ivi->qos = adapter->vf_data[vf].pf_qos; |
6485 | return 0; | 6834 | return 0; |
@@ -6513,6 +6862,8 @@ static void igb_vmm_control(struct igb_adapter *adapter) | |||
6513 | if (adapter->vfs_allocated_count) { | 6862 | if (adapter->vfs_allocated_count) { |
6514 | igb_vmdq_set_loopback_pf(hw, true); | 6863 | igb_vmdq_set_loopback_pf(hw, true); |
6515 | igb_vmdq_set_replication_pf(hw, true); | 6864 | igb_vmdq_set_replication_pf(hw, true); |
6865 | igb_vmdq_set_anti_spoofing_pf(hw, true, | ||
6866 | adapter->vfs_allocated_count); | ||
6516 | } else { | 6867 | } else { |
6517 | igb_vmdq_set_loopback_pf(hw, false); | 6868 | igb_vmdq_set_loopback_pf(hw, false); |
6518 | igb_vmdq_set_replication_pf(hw, false); | 6869 | igb_vmdq_set_replication_pf(hw, false); |