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1/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/* Linux PRO/1000 Ethernet Driver main header file */
30
31#ifndef _IGB_H_
32#define _IGB_H_
33
34#include "e1000_mac.h"
35#include "e1000_82575.h"
36
37struct igb_adapter;
38
39/* Interrupt defines */
40#define IGB_MAX_TX_CLEAN 72
41
42#define IGB_MIN_DYN_ITR 3000
43#define IGB_MAX_DYN_ITR 96000
44#define IGB_START_ITR 6000
45
46#define IGB_DYN_ITR_PACKET_THRESHOLD 2
47#define IGB_DYN_ITR_LENGTH_LOW 200
48#define IGB_DYN_ITR_LENGTH_HIGH 1000
49
50/* TX/RX descriptor defines */
51#define IGB_DEFAULT_TXD 256
52#define IGB_MIN_TXD 80
53#define IGB_MAX_TXD 4096
54
55#define IGB_DEFAULT_RXD 256
56#define IGB_MIN_RXD 80
57#define IGB_MAX_RXD 4096
58
59#define IGB_DEFAULT_ITR 3 /* dynamic */
60#define IGB_MAX_ITR_USECS 10000
61#define IGB_MIN_ITR_USECS 10
62
63/* Transmit and receive queues */
64#define IGB_MAX_RX_QUEUES 4
65
66/* RX descriptor control thresholds.
67 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
68 * descriptors available in its onboard memory.
69 * Setting this to 0 disables RX descriptor prefetch.
70 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
71 * available in host memory.
72 * If PTHRESH is 0, this should also be 0.
73 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
74 * descriptors until either it has this many to write back, or the
75 * ITR timer expires.
76 */
77#define IGB_RX_PTHRESH 16
78#define IGB_RX_HTHRESH 8
79#define IGB_RX_WTHRESH 1
80
81/* this is the size past which hardware will drop packets when setting LPE=0 */
82#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
83
84/* Supported Rx Buffer Sizes */
85#define IGB_RXBUFFER_128 128 /* Used for packet split */
86#define IGB_RXBUFFER_256 256 /* Used for packet split */
87#define IGB_RXBUFFER_512 512
88#define IGB_RXBUFFER_1024 1024
89#define IGB_RXBUFFER_2048 2048
90#define IGB_RXBUFFER_4096 4096
91#define IGB_RXBUFFER_8192 8192
92#define IGB_RXBUFFER_16384 16384
93
94/* Packet Buffer allocations */
95
96
97/* How many Tx Descriptors do we need to call netif_wake_queue ? */
98#define IGB_TX_QUEUE_WAKE 16
99/* How many Rx Buffers do we bundle into one write to the hardware ? */
100#define IGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */
101
102#define AUTO_ALL_MODES 0
103#define IGB_EEPROM_APME 0x0400
104
105#ifndef IGB_MASTER_SLAVE
106/* Switch to override PHY master/slave setting */
107#define IGB_MASTER_SLAVE e1000_ms_hw_default
108#endif
109
110#define IGB_MNG_VLAN_NONE -1
111
112/* wrapper around a pointer to a socket buffer,
113 * so a DMA handle can be stored along with the buffer */
114struct igb_buffer {
115 struct sk_buff *skb;
116 dma_addr_t dma;
117 union {
118 /* TX */
119 struct {
120 unsigned long time_stamp;
121 u32 length;
122 };
123 /* RX */
124 struct {
125 struct page *page;
126 u64 page_dma;
127 };
128 };
129};
130
131struct igb_queue_stats {
132 u64 packets;
133 u64 bytes;
134};
135
136struct igb_ring {
137 struct igb_adapter *adapter; /* backlink */
138 void *desc; /* descriptor ring memory */
139 dma_addr_t dma; /* phys address of the ring */
140 unsigned int size; /* length of desc. ring in bytes */
141 unsigned int count; /* number of desc. in the ring */
142 u16 next_to_use;
143 u16 next_to_clean;
144 u16 head;
145 u16 tail;
146 struct igb_buffer *buffer_info; /* array of buffer info structs */
147
148 u32 eims_value;
149 u32 itr_val;
150 u16 itr_register;
151 u16 cpu;
152
153 unsigned int total_bytes;
154 unsigned int total_packets;
155
156 union {
157 /* TX */
158 struct {
159 spinlock_t tx_clean_lock;
160 spinlock_t tx_lock;
161 bool detect_tx_hung;
162 };
163 /* RX */
164 struct {
165 /* arrays of page information for packet split */
166 struct sk_buff *pending_skb;
167 int pending_skb_page;
168 int no_itr_adjust;
169 struct igb_queue_stats rx_stats;
170 struct napi_struct napi;
171 };
172 };
173
174 char name[IFNAMSIZ + 5];
175};
176
177#define IGB_DESC_UNUSED(R) \
178 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
179 (R)->next_to_clean - (R)->next_to_use - 1)
180
181#define E1000_RX_DESC_ADV(R, i) \
182 (&(((union e1000_adv_rx_desc *)((R).desc))[i]))
183#define E1000_TX_DESC_ADV(R, i) \
184 (&(((union e1000_adv_tx_desc *)((R).desc))[i]))
185#define E1000_TX_CTXTDESC_ADV(R, i) \
186 (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i]))
187#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
188#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
189#define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
190
191/* board specific private data structure */
192
193struct igb_adapter {
194 struct timer_list watchdog_timer;
195 struct timer_list phy_info_timer;
196 struct vlan_group *vlgrp;
197 u16 mng_vlan_id;
198 u32 bd_number;
199 u32 rx_buffer_len;
200 u32 wol;
201 u32 en_mng_pt;
202 u16 link_speed;
203 u16 link_duplex;
204 unsigned int total_tx_bytes;
205 unsigned int total_tx_packets;
206 unsigned int total_rx_bytes;
207 unsigned int total_rx_packets;
208 /* Interrupt Throttle Rate */
209 u32 itr;
210 u32 itr_setting;
211 u16 tx_itr;
212 u16 rx_itr;
213 int set_itr;
214
215 struct work_struct reset_task;
216 struct work_struct watchdog_task;
217 bool fc_autoneg;
218 u8 tx_timeout_factor;
219 struct timer_list blink_timer;
220 unsigned long led_status;
221
222 /* TX */
223 struct igb_ring *tx_ring; /* One per active queue */
224 unsigned int restart_queue;
225 unsigned long tx_queue_len;
226 u32 txd_cmd;
227 u32 gotc;
228 u64 gotc_old;
229 u64 tpt_old;
230 u64 colc_old;
231 u32 tx_timeout_count;
232
233 /* RX */
234 struct igb_ring *rx_ring; /* One per active queue */
235 int num_tx_queues;
236 int num_rx_queues;
237
238 u64 hw_csum_err;
239 u64 hw_csum_good;
240 u64 rx_hdr_split;
241 u32 alloc_rx_buff_failed;
242 bool rx_csum;
243 u32 gorc;
244 u64 gorc_old;
245 u16 rx_ps_hdr_size;
246 u32 max_frame_size;
247 u32 min_frame_size;
248
249 /* OS defined structs */
250 struct net_device *netdev;
251 struct napi_struct napi;
252 struct pci_dev *pdev;
253 struct net_device_stats net_stats;
254
255 /* structs defined in e1000_hw.h */
256 struct e1000_hw hw;
257 struct e1000_hw_stats stats;
258 struct e1000_phy_info phy_info;
259 struct e1000_phy_stats phy_stats;
260
261 u32 test_icr;
262 struct igb_ring test_tx_ring;
263 struct igb_ring test_rx_ring;
264
265 int msg_enable;
266 struct msix_entry *msix_entries;
267 u32 eims_enable_mask;
268
269 /* to not mess up cache alignment, always add to the bottom */
270 unsigned long state;
271 unsigned int msi_enabled;
272
273 u32 eeprom_wol;
274};
275
276enum e1000_state_t {
277 __IGB_TESTING,
278 __IGB_RESETTING,
279 __IGB_DOWN
280};
281
282enum igb_boards {
283 board_82575,
284};
285
286extern char igb_driver_name[];
287extern char igb_driver_version[];
288
289extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
290extern int igb_up(struct igb_adapter *);
291extern void igb_down(struct igb_adapter *);
292extern void igb_reinit_locked(struct igb_adapter *);
293extern void igb_reset(struct igb_adapter *);
294extern int igb_set_spd_dplx(struct igb_adapter *, u16);
295extern int igb_setup_tx_resources(struct igb_adapter *, struct igb_ring *);
296extern int igb_setup_rx_resources(struct igb_adapter *, struct igb_ring *);
297extern void igb_update_stats(struct igb_adapter *);
298extern void igb_set_ethtool_ops(struct net_device *);
299
300#endif /* _IGB_H_ */
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