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-rw-r--r--drivers/net/ethernet/renesas/Kconfig2
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.c71
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.h10
3 files changed, 71 insertions, 12 deletions
diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig
index 19a8a045e077..a30c4395b232 100644
--- a/drivers/net/ethernet/renesas/Kconfig
+++ b/drivers/net/ethernet/renesas/Kconfig
@@ -13,4 +13,4 @@ config SH_ETH
13 Renesas SuperH Ethernet device driver. 13 Renesas SuperH Ethernet device driver.
14 This driver supporting CPUs are: 14 This driver supporting CPUs are:
15 - SH7619, SH7710, SH7712, SH7724, SH7734, SH7763, SH7757, 15 - SH7619, SH7710, SH7712, SH7724, SH7734, SH7763, SH7757,
16 R8A7740 and R8A7779. 16 R8A7740, R8A777x and R8A7790.
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index a753928bab9c..5cd831ebfa83 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -189,6 +189,7 @@ static const u16 sh_eth_offset_fast_rcar[SH_ETH_MAX_REGISTER_OFFSET] = {
189 [RMCR] = 0x0258, 189 [RMCR] = 0x0258,
190 [TFUCR] = 0x0264, 190 [TFUCR] = 0x0264,
191 [RFOCR] = 0x0268, 191 [RFOCR] = 0x0268,
192 [RMIIMODE] = 0x026c,
192 [FCFTR] = 0x0270, 193 [FCFTR] = 0x0270,
193 [TRIMD] = 0x027c, 194 [TRIMD] = 0x027c,
194}; 195};
@@ -377,6 +378,8 @@ static struct sh_eth_cpu_data r8a777x_data = {
377 .set_duplex = sh_eth_set_duplex, 378 .set_duplex = sh_eth_set_duplex,
378 .set_rate = sh_eth_set_rate_r8a777x, 379 .set_rate = sh_eth_set_rate_r8a777x,
379 380
381 .register_type = SH_ETH_REG_FAST_RCAR,
382
380 .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD, 383 .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
381 .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP, 384 .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
382 .eesipr_value = 0x01ff009f, 385 .eesipr_value = 0x01ff009f,
@@ -392,6 +395,30 @@ static struct sh_eth_cpu_data r8a777x_data = {
392 .hw_swap = 1, 395 .hw_swap = 1,
393}; 396};
394 397
398/* R8A7790 */
399static struct sh_eth_cpu_data r8a7790_data = {
400 .set_duplex = sh_eth_set_duplex,
401 .set_rate = sh_eth_set_rate_r8a777x,
402
403 .register_type = SH_ETH_REG_FAST_RCAR,
404
405 .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
406 .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
407 .eesipr_value = 0x01ff009f,
408
409 .tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
410 .eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
411 EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
412 EESR_ECI,
413
414 .apr = 1,
415 .mpr = 1,
416 .tpauser = 1,
417 .hw_swap = 1,
418 .rmiimode = 1,
419 .shift_rd0 = 1,
420};
421
395static void sh_eth_set_rate_sh7724(struct net_device *ndev) 422static void sh_eth_set_rate_sh7724(struct net_device *ndev)
396{ 423{
397 struct sh_eth_private *mdp = netdev_priv(ndev); 424 struct sh_eth_private *mdp = netdev_priv(ndev);
@@ -413,6 +440,8 @@ static struct sh_eth_cpu_data sh7724_data = {
413 .set_duplex = sh_eth_set_duplex, 440 .set_duplex = sh_eth_set_duplex,
414 .set_rate = sh_eth_set_rate_sh7724, 441 .set_rate = sh_eth_set_rate_sh7724,
415 442
443 .register_type = SH_ETH_REG_FAST_SH4,
444
416 .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD, 445 .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
417 .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP, 446 .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
418 .eesipr_value = 0x01ff009f, 447 .eesipr_value = 0x01ff009f,
@@ -451,6 +480,8 @@ static struct sh_eth_cpu_data sh7757_data = {
451 .set_duplex = sh_eth_set_duplex, 480 .set_duplex = sh_eth_set_duplex,
452 .set_rate = sh_eth_set_rate_sh7757, 481 .set_rate = sh_eth_set_rate_sh7757,
453 482
483 .register_type = SH_ETH_REG_FAST_SH4,
484
454 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 485 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
455 .rmcr_value = 0x00000001, 486 .rmcr_value = 0x00000001,
456 487
@@ -519,6 +550,8 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
519 .set_duplex = sh_eth_set_duplex, 550 .set_duplex = sh_eth_set_duplex,
520 .set_rate = sh_eth_set_rate_giga, 551 .set_rate = sh_eth_set_rate_giga,
521 552
553 .register_type = SH_ETH_REG_GIGABIT,
554
522 .ecsr_value = ECSR_ICD | ECSR_MPD, 555 .ecsr_value = ECSR_ICD | ECSR_MPD,
523 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, 556 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
524 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 557 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
@@ -577,6 +610,8 @@ static struct sh_eth_cpu_data sh7734_data = {
577 .set_duplex = sh_eth_set_duplex, 610 .set_duplex = sh_eth_set_duplex,
578 .set_rate = sh_eth_set_rate_gether, 611 .set_rate = sh_eth_set_rate_gether,
579 612
613 .register_type = SH_ETH_REG_GIGABIT,
614
580 .ecsr_value = ECSR_ICD | ECSR_MPD, 615 .ecsr_value = ECSR_ICD | ECSR_MPD,
581 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, 616 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
582 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 617 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
@@ -604,6 +639,8 @@ static struct sh_eth_cpu_data sh7763_data = {
604 .set_duplex = sh_eth_set_duplex, 639 .set_duplex = sh_eth_set_duplex,
605 .set_rate = sh_eth_set_rate_gether, 640 .set_rate = sh_eth_set_rate_gether,
606 641
642 .register_type = SH_ETH_REG_GIGABIT,
643
607 .ecsr_value = ECSR_ICD | ECSR_MPD, 644 .ecsr_value = ECSR_ICD | ECSR_MPD,
608 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, 645 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
609 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 646 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
@@ -641,6 +678,8 @@ static struct sh_eth_cpu_data r8a7740_data = {
641 .set_duplex = sh_eth_set_duplex, 678 .set_duplex = sh_eth_set_duplex,
642 .set_rate = sh_eth_set_rate_gether, 679 .set_rate = sh_eth_set_rate_gether,
643 680
681 .register_type = SH_ETH_REG_GIGABIT,
682
644 .ecsr_value = ECSR_ICD | ECSR_MPD, 683 .ecsr_value = ECSR_ICD | ECSR_MPD,
645 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, 684 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
646 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 685 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
@@ -663,6 +702,8 @@ static struct sh_eth_cpu_data r8a7740_data = {
663}; 702};
664 703
665static struct sh_eth_cpu_data sh7619_data = { 704static struct sh_eth_cpu_data sh7619_data = {
705 .register_type = SH_ETH_REG_FAST_SH3_SH2,
706
666 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 707 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
667 708
668 .apr = 1, 709 .apr = 1,
@@ -672,6 +713,8 @@ static struct sh_eth_cpu_data sh7619_data = {
672}; 713};
673 714
674static struct sh_eth_cpu_data sh771x_data = { 715static struct sh_eth_cpu_data sh771x_data = {
716 .register_type = SH_ETH_REG_FAST_SH3_SH2,
717
675 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, 718 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
676 .tsu = 1, 719 .tsu = 1,
677}; 720};
@@ -1124,6 +1167,9 @@ static int sh_eth_dev_init(struct net_device *ndev, bool start)
1124 if (ret) 1167 if (ret)
1125 goto out; 1168 goto out;
1126 1169
1170 if (mdp->cd->rmiimode)
1171 sh_eth_write(ndev, 0x1, RMIIMODE);
1172
1127 /* Descriptor format */ 1173 /* Descriptor format */
1128 sh_eth_ring_format(ndev); 1174 sh_eth_ring_format(ndev);
1129 if (mdp->cd->rpadir) 1175 if (mdp->cd->rpadir)
@@ -1297,9 +1343,12 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1297 mdp->rx_skbuff[entry] = NULL; 1343 mdp->rx_skbuff[entry] = NULL;
1298 if (mdp->cd->rpadir) 1344 if (mdp->cd->rpadir)
1299 skb_reserve(skb, NET_IP_ALIGN); 1345 skb_reserve(skb, NET_IP_ALIGN);
1346 dma_sync_single_for_cpu(&ndev->dev, rxdesc->addr,
1347 mdp->rx_buf_sz,
1348 DMA_FROM_DEVICE);
1300 skb_put(skb, pkt_len); 1349 skb_put(skb, pkt_len);
1301 skb->protocol = eth_type_trans(skb, ndev); 1350 skb->protocol = eth_type_trans(skb, ndev);
1302 netif_rx(skb); 1351 netif_receive_skb(skb);
1303 ndev->stats.rx_packets++; 1352 ndev->stats.rx_packets++;
1304 ndev->stats.rx_bytes += pkt_len; 1353 ndev->stats.rx_bytes += pkt_len;
1305 } 1354 }
@@ -1857,11 +1906,13 @@ static int sh_eth_open(struct net_device *ndev)
1857 1906
1858 pm_runtime_get_sync(&mdp->pdev->dev); 1907 pm_runtime_get_sync(&mdp->pdev->dev);
1859 1908
1909 napi_enable(&mdp->napi);
1910
1860 ret = request_irq(ndev->irq, sh_eth_interrupt, 1911 ret = request_irq(ndev->irq, sh_eth_interrupt,
1861 mdp->cd->irq_flags, ndev->name, ndev); 1912 mdp->cd->irq_flags, ndev->name, ndev);
1862 if (ret) { 1913 if (ret) {
1863 dev_err(&ndev->dev, "Can not assign IRQ number\n"); 1914 dev_err(&ndev->dev, "Can not assign IRQ number\n");
1864 return ret; 1915 goto out_napi_off;
1865 } 1916 }
1866 1917
1867 /* Descriptor set */ 1918 /* Descriptor set */
@@ -1879,12 +1930,12 @@ static int sh_eth_open(struct net_device *ndev)
1879 if (ret) 1930 if (ret)
1880 goto out_free_irq; 1931 goto out_free_irq;
1881 1932
1882 napi_enable(&mdp->napi);
1883
1884 return ret; 1933 return ret;
1885 1934
1886out_free_irq: 1935out_free_irq:
1887 free_irq(ndev->irq, ndev); 1936 free_irq(ndev->irq, ndev);
1937out_napi_off:
1938 napi_disable(&mdp->napi);
1888 pm_runtime_put_sync(&mdp->pdev->dev); 1939 pm_runtime_put_sync(&mdp->pdev->dev);
1889 return ret; 1940 return ret;
1890} 1941}
@@ -1976,8 +2027,6 @@ static int sh_eth_close(struct net_device *ndev)
1976{ 2027{
1977 struct sh_eth_private *mdp = netdev_priv(ndev); 2028 struct sh_eth_private *mdp = netdev_priv(ndev);
1978 2029
1979 napi_disable(&mdp->napi);
1980
1981 netif_stop_queue(ndev); 2030 netif_stop_queue(ndev);
1982 2031
1983 /* Disable interrupts by clearing the interrupt mask. */ 2032 /* Disable interrupts by clearing the interrupt mask. */
@@ -1995,6 +2044,8 @@ static int sh_eth_close(struct net_device *ndev)
1995 2044
1996 free_irq(ndev->irq, ndev); 2045 free_irq(ndev->irq, ndev);
1997 2046
2047 napi_disable(&mdp->napi);
2048
1998 /* Free all the skbuffs in the Rx queue. */ 2049 /* Free all the skbuffs in the Rx queue. */
1999 sh_eth_ring_free(ndev); 2050 sh_eth_ring_free(ndev);
2000 2051
@@ -2561,7 +2612,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
2561 struct resource *res; 2612 struct resource *res;
2562 struct net_device *ndev = NULL; 2613 struct net_device *ndev = NULL;
2563 struct sh_eth_private *mdp = NULL; 2614 struct sh_eth_private *mdp = NULL;
2564 struct sh_eth_plat_data *pd = pdev->dev.platform_data; 2615 struct sh_eth_plat_data *pd = dev_get_platdata(&pdev->dev);
2565 const struct platform_device_id *id = platform_get_device_id(pdev); 2616 const struct platform_device_id *id = platform_get_device_id(pdev);
2566 2617
2567 /* get base addr */ 2618 /* get base addr */
@@ -2594,9 +2645,6 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
2594 2645
2595 SET_NETDEV_DEV(ndev, &pdev->dev); 2646 SET_NETDEV_DEV(ndev, &pdev->dev);
2596 2647
2597 /* Fill in the fields of the device structure with ethernet values. */
2598 ether_setup(ndev);
2599
2600 mdp = netdev_priv(ndev); 2648 mdp = netdev_priv(ndev);
2601 mdp->num_tx_ring = TX_RING_SIZE; 2649 mdp->num_tx_ring = TX_RING_SIZE;
2602 mdp->num_rx_ring = RX_RING_SIZE; 2650 mdp->num_rx_ring = RX_RING_SIZE;
@@ -2618,10 +2666,10 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
2618 mdp->edmac_endian = pd->edmac_endian; 2666 mdp->edmac_endian = pd->edmac_endian;
2619 mdp->no_ether_link = pd->no_ether_link; 2667 mdp->no_ether_link = pd->no_ether_link;
2620 mdp->ether_link_active_low = pd->ether_link_active_low; 2668 mdp->ether_link_active_low = pd->ether_link_active_low;
2621 mdp->reg_offset = sh_eth_get_register_offset(pd->register_type);
2622 2669
2623 /* set cpu data */ 2670 /* set cpu data */
2624 mdp->cd = (struct sh_eth_cpu_data *)id->driver_data; 2671 mdp->cd = (struct sh_eth_cpu_data *)id->driver_data;
2672 mdp->reg_offset = sh_eth_get_register_offset(mdp->cd->register_type);
2625 sh_eth_set_default_cpu_data(mdp->cd); 2673 sh_eth_set_default_cpu_data(mdp->cd);
2626 2674
2627 /* set function */ 2675 /* set function */
@@ -2749,6 +2797,7 @@ static struct platform_device_id sh_eth_id_table[] = {
2749 { "sh7763-gether", (kernel_ulong_t)&sh7763_data }, 2797 { "sh7763-gether", (kernel_ulong_t)&sh7763_data },
2750 { "r8a7740-gether", (kernel_ulong_t)&r8a7740_data }, 2798 { "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
2751 { "r8a777x-ether", (kernel_ulong_t)&r8a777x_data }, 2799 { "r8a777x-ether", (kernel_ulong_t)&r8a777x_data },
2800 { "r8a7790-ether", (kernel_ulong_t)&r8a7790_data },
2752 { } 2801 { }
2753}; 2802};
2754MODULE_DEVICE_TABLE(platform, sh_eth_id_table); 2803MODULE_DEVICE_TABLE(platform, sh_eth_id_table);
diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 99995bf38c40..a0db02c63b11 100644
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -60,6 +60,7 @@ enum {
60 EDOCR, 60 EDOCR,
61 TFUCR, 61 TFUCR,
62 RFOCR, 62 RFOCR,
63 RMIIMODE,
63 FCFTR, 64 FCFTR,
64 RPADIR, 65 RPADIR,
65 TRIMD, 66 TRIMD,
@@ -156,6 +157,13 @@ enum {
156 SH_ETH_MAX_REGISTER_OFFSET, 157 SH_ETH_MAX_REGISTER_OFFSET,
157}; 158};
158 159
160enum {
161 SH_ETH_REG_GIGABIT,
162 SH_ETH_REG_FAST_RCAR,
163 SH_ETH_REG_FAST_SH4,
164 SH_ETH_REG_FAST_SH3_SH2
165};
166
159/* Driver's parameters */ 167/* Driver's parameters */
160#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE) 168#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
161#define SH4_SKB_RX_ALIGN 32 169#define SH4_SKB_RX_ALIGN 32
@@ -453,6 +461,7 @@ struct sh_eth_cpu_data {
453 void (*set_rate)(struct net_device *ndev); 461 void (*set_rate)(struct net_device *ndev);
454 462
455 /* mandatory initialize value */ 463 /* mandatory initialize value */
464 int register_type;
456 unsigned long eesipr_value; 465 unsigned long eesipr_value;
457 466
458 /* optional initialize value */ 467 /* optional initialize value */
@@ -482,6 +491,7 @@ struct sh_eth_cpu_data {
482 unsigned hw_crc:1; /* E-DMAC have CSMR */ 491 unsigned hw_crc:1; /* E-DMAC have CSMR */
483 unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */ 492 unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
484 unsigned shift_rd0:1; /* shift Rx descriptor word 0 right by 16 */ 493 unsigned shift_rd0:1; /* shift Rx descriptor word 0 right by 16 */
494 unsigned rmiimode:1; /* EtherC has RMIIMODE register */
485}; 495};
486 496
487struct sh_eth_private { 497struct sh_eth_private {