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path: root/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
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Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c87
1 files changed, 0 insertions, 87 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
index 34f30ec79c2e..f193fc2f28fb 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
@@ -1108,79 +1108,6 @@ s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)
1108} 1108}
1109 1109
1110/** 1110/**
1111 * ixgbe_set_fdir_rxpba_82599 - Initialize Flow Director Rx packet buffer
1112 * @hw: pointer to hardware structure
1113 * @pballoc: which mode to allocate filters with
1114 **/
1115static s32 ixgbe_set_fdir_rxpba_82599(struct ixgbe_hw *hw, const u32 pballoc)
1116{
1117 u32 fdir_pbsize = hw->mac.rx_pb_size << IXGBE_RXPBSIZE_SHIFT;
1118 u32 current_rxpbsize = 0;
1119 int i;
1120
1121 /* reserve space for Flow Director filters */
1122 switch (pballoc) {
1123 case IXGBE_FDIR_PBALLOC_256K:
1124 fdir_pbsize -= 256 << IXGBE_RXPBSIZE_SHIFT;
1125 break;
1126 case IXGBE_FDIR_PBALLOC_128K:
1127 fdir_pbsize -= 128 << IXGBE_RXPBSIZE_SHIFT;
1128 break;
1129 case IXGBE_FDIR_PBALLOC_64K:
1130 fdir_pbsize -= 64 << IXGBE_RXPBSIZE_SHIFT;
1131 break;
1132 case IXGBE_FDIR_PBALLOC_NONE:
1133 default:
1134 return IXGBE_ERR_PARAM;
1135 }
1136
1137 /* determine current RX packet buffer size */
1138 for (i = 0; i < 8; i++)
1139 current_rxpbsize += IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
1140
1141 /* if there is already room for the filters do nothing */
1142 if (current_rxpbsize <= fdir_pbsize)
1143 return 0;
1144
1145 if (current_rxpbsize > hw->mac.rx_pb_size) {
1146 /*
1147 * if rxpbsize is greater than max then HW max the Rx buffer
1148 * sizes are unconfigured or misconfigured since HW default is
1149 * to give the full buffer to each traffic class resulting in
1150 * the total size being buffer size 8x actual size
1151 *
1152 * This assumes no DCB since the RXPBSIZE registers appear to
1153 * be unconfigured.
1154 */
1155 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), fdir_pbsize);
1156 for (i = 1; i < 8; i++)
1157 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), 0);
1158 } else {
1159 /*
1160 * Since the Rx packet buffer appears to have already been
1161 * configured we need to shrink each packet buffer by enough
1162 * to make room for the filters. As such we take each rxpbsize
1163 * value and multiply it by a fraction representing the size
1164 * needed over the size we currently have.
1165 *
1166 * We need to reduce fdir_pbsize and current_rxpbsize to
1167 * 1/1024 of their original values in order to avoid
1168 * overflowing the u32 being used to store rxpbsize.
1169 */
1170 fdir_pbsize >>= IXGBE_RXPBSIZE_SHIFT;
1171 current_rxpbsize >>= IXGBE_RXPBSIZE_SHIFT;
1172 for (i = 0; i < 8; i++) {
1173 u32 rxpbsize = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
1174 rxpbsize *= fdir_pbsize;
1175 rxpbsize /= current_rxpbsize;
1176 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpbsize);
1177 }
1178 }
1179
1180 return 0;
1181}
1182
1183/**
1184 * ixgbe_fdir_enable_82599 - Initialize Flow Director control registers 1111 * ixgbe_fdir_enable_82599 - Initialize Flow Director control registers
1185 * @hw: pointer to hardware structure 1112 * @hw: pointer to hardware structure
1186 * @fdirctrl: value to write to flow director control register 1113 * @fdirctrl: value to write to flow director control register
@@ -1227,13 +1154,6 @@ static void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl)
1227 **/ 1154 **/
1228s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl) 1155s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)
1229{ 1156{
1230 s32 err;
1231
1232 /* Before enabling Flow Director, verify the Rx Packet Buffer size */
1233 err = ixgbe_set_fdir_rxpba_82599(hw, fdirctrl);
1234 if (err)
1235 return err;
1236
1237 /* 1157 /*
1238 * Continue setup of fdirctrl register bits: 1158 * Continue setup of fdirctrl register bits:
1239 * Move the flexible bytes to use the ethertype - shift 6 words 1159 * Move the flexible bytes to use the ethertype - shift 6 words
@@ -1258,13 +1178,6 @@ s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)
1258 **/ 1178 **/
1259s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl) 1179s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl)
1260{ 1180{
1261 s32 err;
1262
1263 /* Before enabling Flow Director, verify the Rx Packet Buffer size */
1264 err = ixgbe_set_fdir_rxpba_82599(hw, fdirctrl);
1265 if (err)
1266 return err;
1267
1268 /* 1181 /*
1269 * Continue setup of fdirctrl register bits: 1182 * Continue setup of fdirctrl register bits:
1270 * Turn perfect match filtering on 1183 * Turn perfect match filtering on