diff options
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c')
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c | 34 |
1 files changed, 23 insertions, 11 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c index 4a5bfb6b3af0..a26f3fee4f35 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c | |||
@@ -1018,8 +1018,17 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, | |||
1018 | u16 sfp_addr = 0; | 1018 | u16 sfp_addr = 0; |
1019 | u16 sfp_data = 0; | 1019 | u16 sfp_data = 0; |
1020 | u16 sfp_stat = 0; | 1020 | u16 sfp_stat = 0; |
1021 | u16 gssr; | ||
1021 | u32 i; | 1022 | u32 i; |
1022 | 1023 | ||
1024 | if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1) | ||
1025 | gssr = IXGBE_GSSR_PHY1_SM; | ||
1026 | else | ||
1027 | gssr = IXGBE_GSSR_PHY0_SM; | ||
1028 | |||
1029 | if (hw->mac.ops.acquire_swfw_sync(hw, gssr) != 0) | ||
1030 | return IXGBE_ERR_SWFW_SYNC; | ||
1031 | |||
1023 | if (hw->phy.type == ixgbe_phy_nl) { | 1032 | if (hw->phy.type == ixgbe_phy_nl) { |
1024 | /* | 1033 | /* |
1025 | * phy SDA/SCL registers are at addresses 0xC30A to | 1034 | * phy SDA/SCL registers are at addresses 0xC30A to |
@@ -1028,17 +1037,17 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, | |||
1028 | */ | 1037 | */ |
1029 | sfp_addr = (dev_addr << 8) + byte_offset; | 1038 | sfp_addr = (dev_addr << 8) + byte_offset; |
1030 | sfp_addr = (sfp_addr | IXGBE_I2C_EEPROM_READ_MASK); | 1039 | sfp_addr = (sfp_addr | IXGBE_I2C_EEPROM_READ_MASK); |
1031 | hw->phy.ops.write_reg(hw, | 1040 | hw->phy.ops.write_reg_mdi(hw, |
1032 | IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR, | 1041 | IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR, |
1033 | MDIO_MMD_PMAPMD, | 1042 | MDIO_MMD_PMAPMD, |
1034 | sfp_addr); | 1043 | sfp_addr); |
1035 | 1044 | ||
1036 | /* Poll status */ | 1045 | /* Poll status */ |
1037 | for (i = 0; i < 100; i++) { | 1046 | for (i = 0; i < 100; i++) { |
1038 | hw->phy.ops.read_reg(hw, | 1047 | hw->phy.ops.read_reg_mdi(hw, |
1039 | IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT, | 1048 | IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT, |
1040 | MDIO_MMD_PMAPMD, | 1049 | MDIO_MMD_PMAPMD, |
1041 | &sfp_stat); | 1050 | &sfp_stat); |
1042 | sfp_stat = sfp_stat & IXGBE_I2C_EEPROM_STATUS_MASK; | 1051 | sfp_stat = sfp_stat & IXGBE_I2C_EEPROM_STATUS_MASK; |
1043 | if (sfp_stat != IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS) | 1052 | if (sfp_stat != IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS) |
1044 | break; | 1053 | break; |
@@ -1052,8 +1061,8 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, | |||
1052 | } | 1061 | } |
1053 | 1062 | ||
1054 | /* Read data */ | 1063 | /* Read data */ |
1055 | hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA, | 1064 | hw->phy.ops.read_reg_mdi(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA, |
1056 | MDIO_MMD_PMAPMD, &sfp_data); | 1065 | MDIO_MMD_PMAPMD, &sfp_data); |
1057 | 1066 | ||
1058 | *eeprom_data = (u8)(sfp_data >> 8); | 1067 | *eeprom_data = (u8)(sfp_data >> 8); |
1059 | } else { | 1068 | } else { |
@@ -1061,6 +1070,7 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, | |||
1061 | } | 1070 | } |
1062 | 1071 | ||
1063 | out: | 1072 | out: |
1073 | hw->mac.ops.release_swfw_sync(hw, gssr); | ||
1064 | return status; | 1074 | return status; |
1065 | } | 1075 | } |
1066 | 1076 | ||
@@ -1321,11 +1331,13 @@ static struct ixgbe_eeprom_operations eeprom_ops_82598 = { | |||
1321 | 1331 | ||
1322 | static struct ixgbe_phy_operations phy_ops_82598 = { | 1332 | static struct ixgbe_phy_operations phy_ops_82598 = { |
1323 | .identify = &ixgbe_identify_phy_generic, | 1333 | .identify = &ixgbe_identify_phy_generic, |
1324 | .identify_sfp = &ixgbe_identify_sfp_module_generic, | 1334 | .identify_sfp = &ixgbe_identify_module_generic, |
1325 | .init = &ixgbe_init_phy_ops_82598, | 1335 | .init = &ixgbe_init_phy_ops_82598, |
1326 | .reset = &ixgbe_reset_phy_generic, | 1336 | .reset = &ixgbe_reset_phy_generic, |
1327 | .read_reg = &ixgbe_read_phy_reg_generic, | 1337 | .read_reg = &ixgbe_read_phy_reg_generic, |
1328 | .write_reg = &ixgbe_write_phy_reg_generic, | 1338 | .write_reg = &ixgbe_write_phy_reg_generic, |
1339 | .read_reg_mdi = &ixgbe_read_phy_reg_mdi, | ||
1340 | .write_reg_mdi = &ixgbe_write_phy_reg_mdi, | ||
1329 | .setup_link = &ixgbe_setup_phy_link_generic, | 1341 | .setup_link = &ixgbe_setup_phy_link_generic, |
1330 | .setup_link_speed = &ixgbe_setup_phy_link_speed_generic, | 1342 | .setup_link_speed = &ixgbe_setup_phy_link_speed_generic, |
1331 | .read_i2c_sff8472 = &ixgbe_read_i2c_sff8472_82598, | 1343 | .read_i2c_sff8472 = &ixgbe_read_i2c_sff8472_82598, |