aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/intel/igb
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/ethernet/intel/igb')
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_82575.c17
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_defines.h11
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_phy.c29
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_phy.h5
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_regs.h3
-rw-r--r--drivers/net/ethernet/intel/igb/igb.h41
-rw-r--r--drivers/net/ethernet/intel/igb/igb_ethtool.c198
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c711
-rw-r--r--drivers/net/ethernet/intel/igb/igb_ptp.c677
9 files changed, 964 insertions, 728 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c
index ba994fb4cec6..ca4641e2f748 100644
--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
@@ -2223,11 +2223,10 @@ out:
2223s32 igb_set_eee_i350(struct e1000_hw *hw) 2223s32 igb_set_eee_i350(struct e1000_hw *hw)
2224{ 2224{
2225 s32 ret_val = 0; 2225 s32 ret_val = 0;
2226 u32 ipcnfg, eeer, ctrl_ext; 2226 u32 ipcnfg, eeer;
2227 2227
2228 ctrl_ext = rd32(E1000_CTRL_EXT); 2228 if ((hw->mac.type < e1000_i350) ||
2229 if ((hw->mac.type != e1000_i350) || 2229 (hw->phy.media_type != e1000_media_type_copper))
2230 (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK))
2231 goto out; 2230 goto out;
2232 ipcnfg = rd32(E1000_IPCNFG); 2231 ipcnfg = rd32(E1000_IPCNFG);
2233 eeer = rd32(E1000_EEER); 2232 eeer = rd32(E1000_EEER);
@@ -2240,6 +2239,14 @@ s32 igb_set_eee_i350(struct e1000_hw *hw)
2240 E1000_EEER_RX_LPI_EN | 2239 E1000_EEER_RX_LPI_EN |
2241 E1000_EEER_LPI_FC); 2240 E1000_EEER_LPI_FC);
2242 2241
2242 /* keep the LPI clock running before EEE is enabled */
2243 if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {
2244 u32 eee_su;
2245 eee_su = rd32(E1000_EEE_SU);
2246 eee_su &= ~E1000_EEE_SU_LPI_CLK_STP;
2247 wr32(E1000_EEE_SU, eee_su);
2248 }
2249
2243 } else { 2250 } else {
2244 ipcnfg &= ~(E1000_IPCNFG_EEE_1G_AN | 2251 ipcnfg &= ~(E1000_IPCNFG_EEE_1G_AN |
2245 E1000_IPCNFG_EEE_100M_AN); 2252 E1000_IPCNFG_EEE_100M_AN);
@@ -2249,6 +2256,8 @@ s32 igb_set_eee_i350(struct e1000_hw *hw)
2249 } 2256 }
2250 wr32(E1000_IPCNFG, ipcnfg); 2257 wr32(E1000_IPCNFG, ipcnfg);
2251 wr32(E1000_EEER, eeer); 2258 wr32(E1000_EEER, eeer);
2259 rd32(E1000_IPCNFG);
2260 rd32(E1000_EEER);
2252out: 2261out:
2253 2262
2254 return ret_val; 2263 return ret_val;
diff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h
index ec7e4fe3e3ee..de4b41ec3c40 100644
--- a/drivers/net/ethernet/intel/igb/e1000_defines.h
+++ b/drivers/net/ethernet/intel/igb/e1000_defines.h
@@ -322,6 +322,9 @@
322#define E1000_FCRTC_RTH_COAL_SHIFT 4 322#define E1000_FCRTC_RTH_COAL_SHIFT 4
323#define E1000_PCIEMISC_LX_DECISION 0x00000080 /* Lx power decision */ 323#define E1000_PCIEMISC_LX_DECISION 0x00000080 /* Lx power decision */
324 324
325/* Timestamp in Rx buffer */
326#define E1000_RXPBS_CFG_TS_EN 0x80000000
327
325/* SerDes Control */ 328/* SerDes Control */
326#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400 329#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400
327 330
@@ -360,6 +363,7 @@
360#define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */ 363#define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */
361#define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */ 364#define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */
362#define E1000_ICR_VMMB 0x00000100 /* VM MB event */ 365#define E1000_ICR_VMMB 0x00000100 /* VM MB event */
366#define E1000_ICR_TS 0x00080000 /* Time Sync Interrupt */
363#define E1000_ICR_DRSTA 0x40000000 /* Device Reset Asserted */ 367#define E1000_ICR_DRSTA 0x40000000 /* Device Reset Asserted */
364/* If this bit asserted, the driver should claim the interrupt */ 368/* If this bit asserted, the driver should claim the interrupt */
365#define E1000_ICR_INT_ASSERTED 0x80000000 369#define E1000_ICR_INT_ASSERTED 0x80000000
@@ -399,6 +403,7 @@
399#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */ 403#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */
400#define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */ 404#define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */
401#define E1000_IMS_VMMB E1000_ICR_VMMB /* Mail box activity */ 405#define E1000_IMS_VMMB E1000_ICR_VMMB /* Mail box activity */
406#define E1000_IMS_TS E1000_ICR_TS /* Time Sync Interrupt */
402#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* rx sequence error */ 407#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* rx sequence error */
403#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */ 408#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */
404#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */ 409#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */
@@ -510,6 +515,9 @@
510 515
511#define E1000_TIMINCA_16NS_SHIFT 24 516#define E1000_TIMINCA_16NS_SHIFT 24
512 517
518#define E1000_TSICR_TXTS 0x00000002
519#define E1000_TSIM_TXTS 0x00000002
520
513#define E1000_MDICNFG_EXT_MDIO 0x80000000 /* MDI ext/int destination */ 521#define E1000_MDICNFG_EXT_MDIO 0x80000000 /* MDI ext/int destination */
514#define E1000_MDICNFG_COM_MDIO 0x40000000 /* MDI shared w/ lan 0 */ 522#define E1000_MDICNFG_COM_MDIO 0x40000000 /* MDI shared w/ lan 0 */
515#define E1000_MDICNFG_PHY_MASK 0x03E00000 523#define E1000_MDICNFG_PHY_MASK 0x03E00000
@@ -849,8 +857,9 @@
849#define E1000_IPCNFG_EEE_100M_AN 0x00000004 /* EEE Enable 100M AN */ 857#define E1000_IPCNFG_EEE_100M_AN 0x00000004 /* EEE Enable 100M AN */
850#define E1000_EEER_TX_LPI_EN 0x00010000 /* EEE Tx LPI Enable */ 858#define E1000_EEER_TX_LPI_EN 0x00010000 /* EEE Tx LPI Enable */
851#define E1000_EEER_RX_LPI_EN 0x00020000 /* EEE Rx LPI Enable */ 859#define E1000_EEER_RX_LPI_EN 0x00020000 /* EEE Rx LPI Enable */
852#define E1000_EEER_FRC_AN 0x10000000 /* Enable EEE in loopback */ 860#define E1000_EEER_FRC_AN 0x10000000 /* Enable EEE in loopback */
853#define E1000_EEER_LPI_FC 0x00040000 /* EEE Enable on FC */ 861#define E1000_EEER_LPI_FC 0x00040000 /* EEE Enable on FC */
862#define E1000_EEE_SU_LPI_CLK_STP 0X00800000 /* EEE LPI Clock Stop */
854 863
855/* SerDes Control */ 864/* SerDes Control */
856#define E1000_GEN_CTL_READY 0x80000000 865#define E1000_GEN_CTL_READY 0x80000000
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
index 7be98b6f1052..3404bc79f4ca 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -464,6 +464,32 @@ s32 igb_copper_link_setup_82580(struct e1000_hw *hw)
464 phy_data |= I82580_CFG_ENABLE_DOWNSHIFT; 464 phy_data |= I82580_CFG_ENABLE_DOWNSHIFT;
465 465
466 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data); 466 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data);
467 if (ret_val)
468 goto out;
469
470 /* Set MDI/MDIX mode */
471 ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data);
472 if (ret_val)
473 goto out;
474 phy_data &= ~I82580_PHY_CTRL2_MDIX_CFG_MASK;
475 /*
476 * Options:
477 * 0 - Auto (default)
478 * 1 - MDI mode
479 * 2 - MDI-X mode
480 */
481 switch (hw->phy.mdix) {
482 case 1:
483 break;
484 case 2:
485 phy_data |= I82580_PHY_CTRL2_MANUAL_MDIX;
486 break;
487 case 0:
488 default:
489 phy_data |= I82580_PHY_CTRL2_AUTO_MDI_MDIX;
490 break;
491 }
492 ret_val = hw->phy.ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data);
467 493
468out: 494out:
469 return ret_val; 495 return ret_val;
@@ -2246,8 +2272,7 @@ s32 igb_phy_force_speed_duplex_82580(struct e1000_hw *hw)
2246 if (ret_val) 2272 if (ret_val)
2247 goto out; 2273 goto out;
2248 2274
2249 phy_data &= ~I82580_PHY_CTRL2_AUTO_MDIX; 2275 phy_data &= ~I82580_PHY_CTRL2_MDIX_CFG_MASK;
2250 phy_data &= ~I82580_PHY_CTRL2_FORCE_MDI_MDIX;
2251 2276
2252 ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data); 2277 ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data);
2253 if (ret_val) 2278 if (ret_val)
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h
index 34e40619f16b..6ac3299bfcb9 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.h
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.h
@@ -111,8 +111,9 @@ s32 igb_check_polarity_m88(struct e1000_hw *hw);
111#define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100 111#define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100
112 112
113/* I82580 PHY Control 2 */ 113/* I82580 PHY Control 2 */
114#define I82580_PHY_CTRL2_AUTO_MDIX 0x0400 114#define I82580_PHY_CTRL2_MANUAL_MDIX 0x0200
115#define I82580_PHY_CTRL2_FORCE_MDI_MDIX 0x0200 115#define I82580_PHY_CTRL2_AUTO_MDI_MDIX 0x0400
116#define I82580_PHY_CTRL2_MDIX_CFG_MASK 0x0600
116 117
117/* I82580 PHY Diagnostics Status */ 118/* I82580 PHY Diagnostics Status */
118#define I82580_DSTATUS_CABLE_LENGTH 0x03FC 119#define I82580_DSTATUS_CABLE_LENGTH 0x03FC
diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h
index 28394bea5253..e5db48594e8a 100644
--- a/drivers/net/ethernet/intel/igb/e1000_regs.h
+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h
@@ -91,6 +91,8 @@
91#define E1000_TIMINCA 0x0B608 /* Increment attributes register - RW */ 91#define E1000_TIMINCA 0x0B608 /* Increment attributes register - RW */
92#define E1000_TSAUXC 0x0B640 /* Timesync Auxiliary Control register */ 92#define E1000_TSAUXC 0x0B640 /* Timesync Auxiliary Control register */
93#define E1000_SYSTIMR 0x0B6F8 /* System time register Residue */ 93#define E1000_SYSTIMR 0x0B6F8 /* System time register Residue */
94#define E1000_TSICR 0x0B66C /* Interrupt Cause Register */
95#define E1000_TSIM 0x0B674 /* Interrupt Mask Register */
94 96
95/* Filtering Registers */ 97/* Filtering Registers */
96#define E1000_SAQF(_n) (0x5980 + 4 * (_n)) 98#define E1000_SAQF(_n) (0x5980 + 4 * (_n))
@@ -347,6 +349,7 @@
347/* Energy Efficient Ethernet "EEE" register */ 349/* Energy Efficient Ethernet "EEE" register */
348#define E1000_IPCNFG 0x0E38 /* Internal PHY Configuration */ 350#define E1000_IPCNFG 0x0E38 /* Internal PHY Configuration */
349#define E1000_EEER 0x0E30 /* Energy Efficient Ethernet */ 351#define E1000_EEER 0x0E30 /* Energy Efficient Ethernet */
352#define E1000_EEE_SU 0X0E34 /* EEE Setup */
350 353
351/* Thermal Sensor Register */ 354/* Thermal Sensor Register */
352#define E1000_THSTAT 0x08110 /* Thermal Sensor Status */ 355#define E1000_THSTAT 0x08110 /* Thermal Sensor Status */
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h
index 9e572dd29ab2..8aad230c0592 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -34,9 +34,11 @@
34#include "e1000_mac.h" 34#include "e1000_mac.h"
35#include "e1000_82575.h" 35#include "e1000_82575.h"
36 36
37#ifdef CONFIG_IGB_PTP
37#include <linux/clocksource.h> 38#include <linux/clocksource.h>
38#include <linux/net_tstamp.h> 39#include <linux/net_tstamp.h>
39#include <linux/ptp_clock_kernel.h> 40#include <linux/ptp_clock_kernel.h>
41#endif /* CONFIG_IGB_PTP */
40#include <linux/bitops.h> 42#include <linux/bitops.h>
41#include <linux/if_vlan.h> 43#include <linux/if_vlan.h>
42 44
@@ -99,7 +101,6 @@ struct vf_data_storage {
99 u16 pf_vlan; /* When set, guest VLAN config not allowed. */ 101 u16 pf_vlan; /* When set, guest VLAN config not allowed. */
100 u16 pf_qos; 102 u16 pf_qos;
101 u16 tx_rate; 103 u16 tx_rate;
102 struct pci_dev *vfdev;
103}; 104};
104 105
105#define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */ 106#define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */
@@ -131,9 +132,9 @@ struct vf_data_storage {
131#define MAXIMUM_ETHERNET_VLAN_SIZE 1522 132#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
132 133
133/* Supported Rx Buffer Sizes */ 134/* Supported Rx Buffer Sizes */
134#define IGB_RXBUFFER_512 512 135#define IGB_RXBUFFER_256 256
135#define IGB_RXBUFFER_16384 16384 136#define IGB_RXBUFFER_16384 16384
136#define IGB_RX_HDR_LEN IGB_RXBUFFER_512 137#define IGB_RX_HDR_LEN IGB_RXBUFFER_256
137 138
138/* How many Tx Descriptors do we need to call netif_wake_queue ? */ 139/* How many Tx Descriptors do we need to call netif_wake_queue ? */
139#define IGB_TX_QUEUE_WAKE 16 140#define IGB_TX_QUEUE_WAKE 16
@@ -167,8 +168,8 @@ struct igb_tx_buffer {
167 unsigned int bytecount; 168 unsigned int bytecount;
168 u16 gso_segs; 169 u16 gso_segs;
169 __be16 protocol; 170 __be16 protocol;
170 dma_addr_t dma; 171 DEFINE_DMA_UNMAP_ADDR(dma);
171 u32 length; 172 DEFINE_DMA_UNMAP_LEN(len);
172 u32 tx_flags; 173 u32 tx_flags;
173}; 174};
174 175
@@ -212,7 +213,6 @@ struct igb_q_vector {
212 struct igb_ring_container rx, tx; 213 struct igb_ring_container rx, tx;
213 214
214 struct napi_struct napi; 215 struct napi_struct napi;
215 int numa_node;
216 216
217 u16 itr_val; 217 u16 itr_val;
218 u8 set_itr; 218 u8 set_itr;
@@ -257,7 +257,6 @@ struct igb_ring {
257 }; 257 };
258 /* Items past this point are only used during ring alloc / free */ 258 /* Items past this point are only used during ring alloc / free */
259 dma_addr_t dma; /* phys address of the ring */ 259 dma_addr_t dma; /* phys address of the ring */
260 int numa_node; /* node to alloc ring memory on */
261}; 260};
262 261
263enum e1000_ring_flags_t { 262enum e1000_ring_flags_t {
@@ -342,7 +341,6 @@ struct igb_adapter {
342 341
343 /* OS defined structs */ 342 /* OS defined structs */
344 struct pci_dev *pdev; 343 struct pci_dev *pdev;
345 struct hwtstamp_config hwtstamp_config;
346 344
347 spinlock_t stats64_lock; 345 spinlock_t stats64_lock;
348 struct rtnl_link_stats64 stats64; 346 struct rtnl_link_stats64 stats64;
@@ -373,15 +371,19 @@ struct igb_adapter {
373 int vf_rate_link_speed; 371 int vf_rate_link_speed;
374 u32 rss_queues; 372 u32 rss_queues;
375 u32 wvbr; 373 u32 wvbr;
376 int node;
377 u32 *shadow_vfta; 374 u32 *shadow_vfta;
378 375
376#ifdef CONFIG_IGB_PTP
379 struct ptp_clock *ptp_clock; 377 struct ptp_clock *ptp_clock;
380 struct ptp_clock_info caps; 378 struct ptp_clock_info ptp_caps;
381 struct delayed_work overflow_work; 379 struct delayed_work ptp_overflow_work;
380 struct work_struct ptp_tx_work;
381 struct sk_buff *ptp_tx_skb;
382 spinlock_t tmreg_lock; 382 spinlock_t tmreg_lock;
383 struct cyclecounter cc; 383 struct cyclecounter cc;
384 struct timecounter tc; 384 struct timecounter tc;
385#endif /* CONFIG_IGB_PTP */
386
385 char fw_version[32]; 387 char fw_version[32];
386}; 388};
387 389
@@ -390,6 +392,7 @@ struct igb_adapter {
390#define IGB_FLAG_QUAD_PORT_A (1 << 2) 392#define IGB_FLAG_QUAD_PORT_A (1 << 2)
391#define IGB_FLAG_QUEUE_PAIRS (1 << 3) 393#define IGB_FLAG_QUEUE_PAIRS (1 << 3)
392#define IGB_FLAG_DMAC (1 << 4) 394#define IGB_FLAG_DMAC (1 << 4)
395#define IGB_FLAG_PTP (1 << 5)
393 396
394/* DMA Coalescing defines */ 397/* DMA Coalescing defines */
395#define IGB_MIN_TXPBSIZE 20408 398#define IGB_MIN_TXPBSIZE 20408
@@ -435,13 +438,17 @@ extern void igb_power_up_link(struct igb_adapter *);
435extern void igb_set_fw_version(struct igb_adapter *); 438extern void igb_set_fw_version(struct igb_adapter *);
436#ifdef CONFIG_IGB_PTP 439#ifdef CONFIG_IGB_PTP
437extern void igb_ptp_init(struct igb_adapter *adapter); 440extern void igb_ptp_init(struct igb_adapter *adapter);
438extern void igb_ptp_remove(struct igb_adapter *adapter); 441extern void igb_ptp_stop(struct igb_adapter *adapter);
439 442extern void igb_ptp_reset(struct igb_adapter *adapter);
440extern void igb_systim_to_hwtstamp(struct igb_adapter *adapter, 443extern void igb_ptp_tx_work(struct work_struct *work);
441 struct skb_shared_hwtstamps *hwtstamps, 444extern void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
442 u64 systim); 445extern void igb_ptp_rx_hwtstamp(struct igb_q_vector *q_vector,
446 union e1000_adv_rx_desc *rx_desc,
447 struct sk_buff *skb);
448extern int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
449 struct ifreq *ifr, int cmd);
450#endif /* CONFIG_IGB_PTP */
443 451
444#endif
445static inline s32 igb_reset_phy(struct e1000_hw *hw) 452static inline s32 igb_reset_phy(struct e1000_hw *hw)
446{ 453{
447 if (hw->phy.ops.reset) 454 if (hw->phy.ops.reset)
diff --git a/drivers/net/ethernet/intel/igb/igb_ethtool.c b/drivers/net/ethernet/intel/igb/igb_ethtool.c
index 70591117051b..2ea012849825 100644
--- a/drivers/net/ethernet/intel/igb/igb_ethtool.c
+++ b/drivers/net/ethernet/intel/igb/igb_ethtool.c
@@ -148,9 +148,9 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
148 SUPPORTED_100baseT_Full | 148 SUPPORTED_100baseT_Full |
149 SUPPORTED_1000baseT_Full| 149 SUPPORTED_1000baseT_Full|
150 SUPPORTED_Autoneg | 150 SUPPORTED_Autoneg |
151 SUPPORTED_TP); 151 SUPPORTED_TP |
152 ecmd->advertising = (ADVERTISED_TP | 152 SUPPORTED_Pause);
153 ADVERTISED_Pause); 153 ecmd->advertising = ADVERTISED_TP;
154 154
155 if (hw->mac.autoneg == 1) { 155 if (hw->mac.autoneg == 1) {
156 ecmd->advertising |= ADVERTISED_Autoneg; 156 ecmd->advertising |= ADVERTISED_Autoneg;
@@ -158,6 +158,21 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
158 ecmd->advertising |= hw->phy.autoneg_advertised; 158 ecmd->advertising |= hw->phy.autoneg_advertised;
159 } 159 }
160 160
161 if (hw->mac.autoneg != 1)
162 ecmd->advertising &= ~(ADVERTISED_Pause |
163 ADVERTISED_Asym_Pause);
164
165 if (hw->fc.requested_mode == e1000_fc_full)
166 ecmd->advertising |= ADVERTISED_Pause;
167 else if (hw->fc.requested_mode == e1000_fc_rx_pause)
168 ecmd->advertising |= (ADVERTISED_Pause |
169 ADVERTISED_Asym_Pause);
170 else if (hw->fc.requested_mode == e1000_fc_tx_pause)
171 ecmd->advertising |= ADVERTISED_Asym_Pause;
172 else
173 ecmd->advertising &= ~(ADVERTISED_Pause |
174 ADVERTISED_Asym_Pause);
175
161 ecmd->port = PORT_TP; 176 ecmd->port = PORT_TP;
162 ecmd->phy_address = hw->phy.addr; 177 ecmd->phy_address = hw->phy.addr;
163 } else { 178 } else {
@@ -198,6 +213,19 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
198 } 213 }
199 214
200 ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE; 215 ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
216
217 /* MDI-X => 2; MDI =>1; Invalid =>0 */
218 if (hw->phy.media_type == e1000_media_type_copper)
219 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
220 ETH_TP_MDI;
221 else
222 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
223
224 if (hw->phy.mdix == AUTO_ALL_MODES)
225 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
226 else
227 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
228
201 return 0; 229 return 0;
202} 230}
203 231
@@ -214,6 +242,22 @@ static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
214 return -EINVAL; 242 return -EINVAL;
215 } 243 }
216 244
245 /*
246 * MDI setting is only allowed when autoneg enabled because
247 * some hardware doesn't allow MDI setting when speed or
248 * duplex is forced.
249 */
250 if (ecmd->eth_tp_mdix_ctrl) {
251 if (hw->phy.media_type != e1000_media_type_copper)
252 return -EOPNOTSUPP;
253
254 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
255 (ecmd->autoneg != AUTONEG_ENABLE)) {
256 dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
257 return -EINVAL;
258 }
259 }
260
217 while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) 261 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
218 msleep(1); 262 msleep(1);
219 263
@@ -227,12 +271,25 @@ static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
227 hw->fc.requested_mode = e1000_fc_default; 271 hw->fc.requested_mode = e1000_fc_default;
228 } else { 272 } else {
229 u32 speed = ethtool_cmd_speed(ecmd); 273 u32 speed = ethtool_cmd_speed(ecmd);
274 /* calling this overrides forced MDI setting */
230 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) { 275 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
231 clear_bit(__IGB_RESETTING, &adapter->state); 276 clear_bit(__IGB_RESETTING, &adapter->state);
232 return -EINVAL; 277 return -EINVAL;
233 } 278 }
234 } 279 }
235 280
281 /* MDI-X => 2; MDI => 1; Auto => 3 */
282 if (ecmd->eth_tp_mdix_ctrl) {
283 /*
284 * fix up the value for auto (3 => 0) as zero is mapped
285 * internally to auto
286 */
287 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
288 hw->phy.mdix = AUTO_ALL_MODES;
289 else
290 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
291 }
292
236 /* reset the link */ 293 /* reset the link */
237 if (netif_running(adapter->netdev)) { 294 if (netif_running(adapter->netdev)) {
238 igb_down(adapter); 295 igb_down(adapter);
@@ -1469,33 +1526,22 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1469{ 1526{
1470 struct e1000_hw *hw = &adapter->hw; 1527 struct e1000_hw *hw = &adapter->hw;
1471 u32 ctrl_reg = 0; 1528 u32 ctrl_reg = 0;
1472 u16 phy_reg = 0;
1473 1529
1474 hw->mac.autoneg = false; 1530 hw->mac.autoneg = false;
1475 1531
1476 switch (hw->phy.type) { 1532 if (hw->phy.type == e1000_phy_m88) {
1477 case e1000_phy_m88: 1533 if (hw->phy.id != I210_I_PHY_ID) {
1478 /* Auto-MDI/MDIX Off */ 1534 /* Auto-MDI/MDIX Off */
1479 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808); 1535 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1480 /* reset to update Auto-MDI/MDIX */ 1536 /* reset to update Auto-MDI/MDIX */
1481 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140); 1537 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1482 /* autoneg off */ 1538 /* autoneg off */
1483 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140); 1539 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1484 break; 1540 } else {
1485 case e1000_phy_82580: 1541 /* force 1000, set loopback */
1486 /* enable MII loopback */ 1542 igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1487 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041); 1543 igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1488 break; 1544 }
1489 case e1000_phy_i210:
1490 /* set loopback speed in PHY */
1491 igb_read_phy_reg(hw, (GS40G_PAGE_SELECT & GS40G_PAGE_2),
1492 &phy_reg);
1493 phy_reg |= GS40G_MAC_SPEED_1G;
1494 igb_write_phy_reg(hw, (GS40G_PAGE_SELECT & GS40G_PAGE_2),
1495 phy_reg);
1496 ctrl_reg = rd32(E1000_CTRL_EXT);
1497 default:
1498 break;
1499 } 1545 }
1500 1546
1501 /* add small delay to avoid loopback test failure */ 1547 /* add small delay to avoid loopback test failure */
@@ -1513,7 +1559,7 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1513 E1000_CTRL_FD | /* Force Duplex to FULL */ 1559 E1000_CTRL_FD | /* Force Duplex to FULL */
1514 E1000_CTRL_SLU); /* Set link up enable bit */ 1560 E1000_CTRL_SLU); /* Set link up enable bit */
1515 1561
1516 if ((hw->phy.type == e1000_phy_m88) || (hw->phy.type == e1000_phy_i210)) 1562 if (hw->phy.type == e1000_phy_m88)
1517 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ 1563 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1518 1564
1519 wr32(E1000_CTRL, ctrl_reg); 1565 wr32(E1000_CTRL, ctrl_reg);
@@ -1521,11 +1567,10 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1521 /* Disable the receiver on the PHY so when a cable is plugged in, the 1567 /* Disable the receiver on the PHY so when a cable is plugged in, the
1522 * PHY does not begin to autoneg when a cable is reconnected to the NIC. 1568 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1523 */ 1569 */
1524 if ((hw->phy.type == e1000_phy_m88) || (hw->phy.type == e1000_phy_i210)) 1570 if (hw->phy.type == e1000_phy_m88)
1525 igb_phy_disable_receiver(adapter); 1571 igb_phy_disable_receiver(adapter);
1526 1572
1527 udelay(500); 1573 mdelay(500);
1528
1529 return 0; 1574 return 0;
1530} 1575}
1531 1576
@@ -1785,13 +1830,6 @@ static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1785 *data = 0; 1830 *data = 0;
1786 goto out; 1831 goto out;
1787 } 1832 }
1788 if ((adapter->hw.mac.type == e1000_i210)
1789 || (adapter->hw.mac.type == e1000_i211)) {
1790 dev_err(&adapter->pdev->dev,
1791 "Loopback test not supported on this part at this time.\n");
1792 *data = 0;
1793 goto out;
1794 }
1795 *data = igb_setup_desc_rings(adapter); 1833 *data = igb_setup_desc_rings(adapter);
1796 if (*data) 1834 if (*data)
1797 goto out; 1835 goto out;
@@ -2257,6 +2295,54 @@ static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2257 } 2295 }
2258} 2296}
2259 2297
2298static int igb_get_ts_info(struct net_device *dev,
2299 struct ethtool_ts_info *info)
2300{
2301 struct igb_adapter *adapter = netdev_priv(dev);
2302
2303 switch (adapter->hw.mac.type) {
2304#ifdef CONFIG_IGB_PTP
2305 case e1000_82576:
2306 case e1000_82580:
2307 case e1000_i350:
2308 case e1000_i210:
2309 case e1000_i211:
2310 info->so_timestamping =
2311 SOF_TIMESTAMPING_TX_HARDWARE |
2312 SOF_TIMESTAMPING_RX_HARDWARE |
2313 SOF_TIMESTAMPING_RAW_HARDWARE;
2314
2315 if (adapter->ptp_clock)
2316 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2317 else
2318 info->phc_index = -1;
2319
2320 info->tx_types =
2321 (1 << HWTSTAMP_TX_OFF) |
2322 (1 << HWTSTAMP_TX_ON);
2323
2324 info->rx_filters = 1 << HWTSTAMP_FILTER_NONE;
2325
2326 /* 82576 does not support timestamping all packets. */
2327 if (adapter->hw.mac.type >= e1000_82580)
2328 info->rx_filters |= 1 << HWTSTAMP_FILTER_ALL;
2329 else
2330 info->rx_filters |=
2331 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2332 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2333 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2334 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2335 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2336 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2337 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2338
2339 return 0;
2340#endif /* CONFIG_IGB_PTP */
2341 default:
2342 return -EOPNOTSUPP;
2343 }
2344}
2345
2260static int igb_ethtool_begin(struct net_device *netdev) 2346static int igb_ethtool_begin(struct net_device *netdev)
2261{ 2347{
2262 struct igb_adapter *adapter = netdev_priv(netdev); 2348 struct igb_adapter *adapter = netdev_priv(netdev);
@@ -2270,38 +2356,6 @@ static void igb_ethtool_complete(struct net_device *netdev)
2270 pm_runtime_put(&adapter->pdev->dev); 2356 pm_runtime_put(&adapter->pdev->dev);
2271} 2357}
2272 2358
2273#ifdef CONFIG_IGB_PTP
2274static int igb_ethtool_get_ts_info(struct net_device *dev,
2275 struct ethtool_ts_info *info)
2276{
2277 struct igb_adapter *adapter = netdev_priv(dev);
2278
2279 info->so_timestamping =
2280 SOF_TIMESTAMPING_TX_HARDWARE |
2281 SOF_TIMESTAMPING_RX_HARDWARE |
2282 SOF_TIMESTAMPING_RAW_HARDWARE;
2283
2284 if (adapter->ptp_clock)
2285 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2286 else
2287 info->phc_index = -1;
2288
2289 info->tx_types =
2290 (1 << HWTSTAMP_TX_OFF) |
2291 (1 << HWTSTAMP_TX_ON);
2292
2293 info->rx_filters =
2294 (1 << HWTSTAMP_FILTER_NONE) |
2295 (1 << HWTSTAMP_FILTER_ALL) |
2296 (1 << HWTSTAMP_FILTER_SOME) |
2297 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2298 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2299 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2300
2301 return 0;
2302}
2303
2304#endif
2305static const struct ethtool_ops igb_ethtool_ops = { 2359static const struct ethtool_ops igb_ethtool_ops = {
2306 .get_settings = igb_get_settings, 2360 .get_settings = igb_get_settings,
2307 .set_settings = igb_set_settings, 2361 .set_settings = igb_set_settings,
@@ -2328,11 +2382,9 @@ static const struct ethtool_ops igb_ethtool_ops = {
2328 .get_ethtool_stats = igb_get_ethtool_stats, 2382 .get_ethtool_stats = igb_get_ethtool_stats,
2329 .get_coalesce = igb_get_coalesce, 2383 .get_coalesce = igb_get_coalesce,
2330 .set_coalesce = igb_set_coalesce, 2384 .set_coalesce = igb_set_coalesce,
2385 .get_ts_info = igb_get_ts_info,
2331 .begin = igb_ethtool_begin, 2386 .begin = igb_ethtool_begin,
2332 .complete = igb_ethtool_complete, 2387 .complete = igb_ethtool_complete,
2333#ifdef CONFIG_IGB_PTP
2334 .get_ts_info = igb_ethtool_get_ts_info,
2335#endif
2336}; 2388};
2337 2389
2338void igb_set_ethtool_ops(struct net_device *netdev) 2390void igb_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index f88c822e57a6..e1ceb37ef12e 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -172,8 +172,7 @@ static void igb_check_vf_rate_limit(struct igb_adapter *);
172 172
173#ifdef CONFIG_PCI_IOV 173#ifdef CONFIG_PCI_IOV
174static int igb_vf_configure(struct igb_adapter *adapter, int vf); 174static int igb_vf_configure(struct igb_adapter *adapter, int vf);
175static int igb_find_enabled_vfs(struct igb_adapter *adapter); 175static bool igb_vfs_are_assigned(struct igb_adapter *adapter);
176static int igb_check_vf_assignment(struct igb_adapter *adapter);
177#endif 176#endif
178 177
179#ifdef CONFIG_PM 178#ifdef CONFIG_PM
@@ -404,8 +403,8 @@ static void igb_dump(struct igb_adapter *adapter)
404 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean]; 403 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
405 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n", 404 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
406 n, tx_ring->next_to_use, tx_ring->next_to_clean, 405 n, tx_ring->next_to_use, tx_ring->next_to_clean,
407 (u64)buffer_info->dma, 406 (u64)dma_unmap_addr(buffer_info, dma),
408 buffer_info->length, 407 dma_unmap_len(buffer_info, len),
409 buffer_info->next_to_watch, 408 buffer_info->next_to_watch,
410 (u64)buffer_info->time_stamp); 409 (u64)buffer_info->time_stamp);
411 } 410 }
@@ -456,8 +455,8 @@ static void igb_dump(struct igb_adapter *adapter)
456 " %04X %p %016llX %p%s\n", i, 455 " %04X %p %016llX %p%s\n", i,
457 le64_to_cpu(u0->a), 456 le64_to_cpu(u0->a),
458 le64_to_cpu(u0->b), 457 le64_to_cpu(u0->b),
459 (u64)buffer_info->dma, 458 (u64)dma_unmap_addr(buffer_info, dma),
460 buffer_info->length, 459 dma_unmap_len(buffer_info, len),
461 buffer_info->next_to_watch, 460 buffer_info->next_to_watch,
462 (u64)buffer_info->time_stamp, 461 (u64)buffer_info->time_stamp,
463 buffer_info->skb, next_desc); 462 buffer_info->skb, next_desc);
@@ -466,7 +465,8 @@ static void igb_dump(struct igb_adapter *adapter)
466 print_hex_dump(KERN_INFO, "", 465 print_hex_dump(KERN_INFO, "",
467 DUMP_PREFIX_ADDRESS, 466 DUMP_PREFIX_ADDRESS,
468 16, 1, buffer_info->skb->data, 467 16, 1, buffer_info->skb->data,
469 buffer_info->length, true); 468 dma_unmap_len(buffer_info, len),
469 true);
470 } 470 }
471 } 471 }
472 472
@@ -683,52 +683,29 @@ static int igb_alloc_queues(struct igb_adapter *adapter)
683{ 683{
684 struct igb_ring *ring; 684 struct igb_ring *ring;
685 int i; 685 int i;
686 int orig_node = adapter->node;
687 686
688 for (i = 0; i < adapter->num_tx_queues; i++) { 687 for (i = 0; i < adapter->num_tx_queues; i++) {
689 if (orig_node == -1) { 688 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
690 int cur_node = next_online_node(adapter->node);
691 if (cur_node == MAX_NUMNODES)
692 cur_node = first_online_node;
693 adapter->node = cur_node;
694 }
695 ring = kzalloc_node(sizeof(struct igb_ring), GFP_KERNEL,
696 adapter->node);
697 if (!ring)
698 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
699 if (!ring) 689 if (!ring)
700 goto err; 690 goto err;
701 ring->count = adapter->tx_ring_count; 691 ring->count = adapter->tx_ring_count;
702 ring->queue_index = i; 692 ring->queue_index = i;
703 ring->dev = &adapter->pdev->dev; 693 ring->dev = &adapter->pdev->dev;
704 ring->netdev = adapter->netdev; 694 ring->netdev = adapter->netdev;
705 ring->numa_node = adapter->node;
706 /* For 82575, context index must be unique per ring. */ 695 /* For 82575, context index must be unique per ring. */
707 if (adapter->hw.mac.type == e1000_82575) 696 if (adapter->hw.mac.type == e1000_82575)
708 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags); 697 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
709 adapter->tx_ring[i] = ring; 698 adapter->tx_ring[i] = ring;
710 } 699 }
711 /* Restore the adapter's original node */
712 adapter->node = orig_node;
713 700
714 for (i = 0; i < adapter->num_rx_queues; i++) { 701 for (i = 0; i < adapter->num_rx_queues; i++) {
715 if (orig_node == -1) { 702 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
716 int cur_node = next_online_node(adapter->node);
717 if (cur_node == MAX_NUMNODES)
718 cur_node = first_online_node;
719 adapter->node = cur_node;
720 }
721 ring = kzalloc_node(sizeof(struct igb_ring), GFP_KERNEL,
722 adapter->node);
723 if (!ring)
724 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
725 if (!ring) 703 if (!ring)
726 goto err; 704 goto err;
727 ring->count = adapter->rx_ring_count; 705 ring->count = adapter->rx_ring_count;
728 ring->queue_index = i; 706 ring->queue_index = i;
729 ring->dev = &adapter->pdev->dev; 707 ring->dev = &adapter->pdev->dev;
730 ring->netdev = adapter->netdev; 708 ring->netdev = adapter->netdev;
731 ring->numa_node = adapter->node;
732 /* set flag indicating ring supports SCTP checksum offload */ 709 /* set flag indicating ring supports SCTP checksum offload */
733 if (adapter->hw.mac.type >= e1000_82576) 710 if (adapter->hw.mac.type >= e1000_82576)
734 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags); 711 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
@@ -742,16 +719,12 @@ static int igb_alloc_queues(struct igb_adapter *adapter)
742 719
743 adapter->rx_ring[i] = ring; 720 adapter->rx_ring[i] = ring;
744 } 721 }
745 /* Restore the adapter's original node */
746 adapter->node = orig_node;
747 722
748 igb_cache_ring_register(adapter); 723 igb_cache_ring_register(adapter);
749 724
750 return 0; 725 return 0;
751 726
752err: 727err:
753 /* Restore the adapter's original node */
754 adapter->node = orig_node;
755 igb_free_queues(adapter); 728 igb_free_queues(adapter);
756 729
757 return -ENOMEM; 730 return -ENOMEM;
@@ -1117,24 +1090,10 @@ static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1117 struct igb_q_vector *q_vector; 1090 struct igb_q_vector *q_vector;
1118 struct e1000_hw *hw = &adapter->hw; 1091 struct e1000_hw *hw = &adapter->hw;
1119 int v_idx; 1092 int v_idx;
1120 int orig_node = adapter->node;
1121 1093
1122 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) { 1094 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1123 if ((adapter->num_q_vectors == (adapter->num_rx_queues + 1095 q_vector = kzalloc(sizeof(struct igb_q_vector),
1124 adapter->num_tx_queues)) && 1096 GFP_KERNEL);
1125 (adapter->num_rx_queues == v_idx))
1126 adapter->node = orig_node;
1127 if (orig_node == -1) {
1128 int cur_node = next_online_node(adapter->node);
1129 if (cur_node == MAX_NUMNODES)
1130 cur_node = first_online_node;
1131 adapter->node = cur_node;
1132 }
1133 q_vector = kzalloc_node(sizeof(struct igb_q_vector), GFP_KERNEL,
1134 adapter->node);
1135 if (!q_vector)
1136 q_vector = kzalloc(sizeof(struct igb_q_vector),
1137 GFP_KERNEL);
1138 if (!q_vector) 1097 if (!q_vector)
1139 goto err_out; 1098 goto err_out;
1140 q_vector->adapter = adapter; 1099 q_vector->adapter = adapter;
@@ -1143,14 +1102,10 @@ static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1143 netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll, 64); 1102 netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll, 64);
1144 adapter->q_vector[v_idx] = q_vector; 1103 adapter->q_vector[v_idx] = q_vector;
1145 } 1104 }
1146 /* Restore the adapter's original node */
1147 adapter->node = orig_node;
1148 1105
1149 return 0; 1106 return 0;
1150 1107
1151err_out: 1108err_out:
1152 /* Restore the adapter's original node */
1153 adapter->node = orig_node;
1154 igb_free_q_vectors(adapter); 1109 igb_free_q_vectors(adapter);
1155 return -ENOMEM; 1110 return -ENOMEM;
1156} 1111}
@@ -1751,6 +1706,11 @@ void igb_reset(struct igb_adapter *adapter)
1751 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 1706 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1752 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE); 1707 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1753 1708
1709#ifdef CONFIG_IGB_PTP
1710 /* Re-enable PTP, where applicable. */
1711 igb_ptp_reset(adapter);
1712#endif /* CONFIG_IGB_PTP */
1713
1754 igb_get_phy_info(hw); 1714 igb_get_phy_info(hw);
1755} 1715}
1756 1716
@@ -2180,11 +2140,12 @@ static int __devinit igb_probe(struct pci_dev *pdev,
2180 } 2140 }
2181 2141
2182#endif 2142#endif
2143
2183#ifdef CONFIG_IGB_PTP 2144#ifdef CONFIG_IGB_PTP
2184 /* do hw tstamp init after resetting */ 2145 /* do hw tstamp init after resetting */
2185 igb_ptp_init(adapter); 2146 igb_ptp_init(adapter);
2147#endif /* CONFIG_IGB_PTP */
2186 2148
2187#endif
2188 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n"); 2149 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2189 /* print bus type/speed/width info */ 2150 /* print bus type/speed/width info */
2190 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n", 2151 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
@@ -2259,9 +2220,9 @@ static void __devexit igb_remove(struct pci_dev *pdev)
2259 2220
2260 pm_runtime_get_noresume(&pdev->dev); 2221 pm_runtime_get_noresume(&pdev->dev);
2261#ifdef CONFIG_IGB_PTP 2222#ifdef CONFIG_IGB_PTP
2262 igb_ptp_remove(adapter); 2223 igb_ptp_stop(adapter);
2224#endif /* CONFIG_IGB_PTP */
2263 2225
2264#endif
2265 /* 2226 /*
2266 * The watchdog timer may be rescheduled, so explicitly 2227 * The watchdog timer may be rescheduled, so explicitly
2267 * disable watchdog from being rescheduled. 2228 * disable watchdog from being rescheduled.
@@ -2294,11 +2255,11 @@ static void __devexit igb_remove(struct pci_dev *pdev)
2294 /* reclaim resources allocated to VFs */ 2255 /* reclaim resources allocated to VFs */
2295 if (adapter->vf_data) { 2256 if (adapter->vf_data) {
2296 /* disable iov and allow time for transactions to clear */ 2257 /* disable iov and allow time for transactions to clear */
2297 if (!igb_check_vf_assignment(adapter)) { 2258 if (igb_vfs_are_assigned(adapter)) {
2259 dev_info(&pdev->dev, "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2260 } else {
2298 pci_disable_sriov(pdev); 2261 pci_disable_sriov(pdev);
2299 msleep(500); 2262 msleep(500);
2300 } else {
2301 dev_info(&pdev->dev, "VF(s) assigned to guests!\n");
2302 } 2263 }
2303 2264
2304 kfree(adapter->vf_data); 2265 kfree(adapter->vf_data);
@@ -2338,7 +2299,7 @@ static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
2338#ifdef CONFIG_PCI_IOV 2299#ifdef CONFIG_PCI_IOV
2339 struct pci_dev *pdev = adapter->pdev; 2300 struct pci_dev *pdev = adapter->pdev;
2340 struct e1000_hw *hw = &adapter->hw; 2301 struct e1000_hw *hw = &adapter->hw;
2341 int old_vfs = igb_find_enabled_vfs(adapter); 2302 int old_vfs = pci_num_vf(adapter->pdev);
2342 int i; 2303 int i;
2343 2304
2344 /* Virtualization features not supported on i210 family. */ 2305 /* Virtualization features not supported on i210 family. */
@@ -2418,8 +2379,6 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter)
2418 VLAN_HLEN; 2379 VLAN_HLEN;
2419 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 2380 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2420 2381
2421 adapter->node = -1;
2422
2423 spin_lock_init(&adapter->stats64_lock); 2382 spin_lock_init(&adapter->stats64_lock);
2424#ifdef CONFIG_PCI_IOV 2383#ifdef CONFIG_PCI_IOV
2425 switch (hw->mac.type) { 2384 switch (hw->mac.type) {
@@ -2666,13 +2625,11 @@ static int igb_close(struct net_device *netdev)
2666int igb_setup_tx_resources(struct igb_ring *tx_ring) 2625int igb_setup_tx_resources(struct igb_ring *tx_ring)
2667{ 2626{
2668 struct device *dev = tx_ring->dev; 2627 struct device *dev = tx_ring->dev;
2669 int orig_node = dev_to_node(dev);
2670 int size; 2628 int size;
2671 2629
2672 size = sizeof(struct igb_tx_buffer) * tx_ring->count; 2630 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2673 tx_ring->tx_buffer_info = vzalloc_node(size, tx_ring->numa_node); 2631
2674 if (!tx_ring->tx_buffer_info) 2632 tx_ring->tx_buffer_info = vzalloc(size);
2675 tx_ring->tx_buffer_info = vzalloc(size);
2676 if (!tx_ring->tx_buffer_info) 2633 if (!tx_ring->tx_buffer_info)
2677 goto err; 2634 goto err;
2678 2635
@@ -2680,18 +2637,10 @@ int igb_setup_tx_resources(struct igb_ring *tx_ring)
2680 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc); 2637 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2681 tx_ring->size = ALIGN(tx_ring->size, 4096); 2638 tx_ring->size = ALIGN(tx_ring->size, 4096);
2682 2639
2683 set_dev_node(dev, tx_ring->numa_node);
2684 tx_ring->desc = dma_alloc_coherent(dev, 2640 tx_ring->desc = dma_alloc_coherent(dev,
2685 tx_ring->size, 2641 tx_ring->size,
2686 &tx_ring->dma, 2642 &tx_ring->dma,
2687 GFP_KERNEL); 2643 GFP_KERNEL);
2688 set_dev_node(dev, orig_node);
2689 if (!tx_ring->desc)
2690 tx_ring->desc = dma_alloc_coherent(dev,
2691 tx_ring->size,
2692 &tx_ring->dma,
2693 GFP_KERNEL);
2694
2695 if (!tx_ring->desc) 2644 if (!tx_ring->desc)
2696 goto err; 2645 goto err;
2697 2646
@@ -2702,8 +2651,8 @@ int igb_setup_tx_resources(struct igb_ring *tx_ring)
2702 2651
2703err: 2652err:
2704 vfree(tx_ring->tx_buffer_info); 2653 vfree(tx_ring->tx_buffer_info);
2705 dev_err(dev, 2654 tx_ring->tx_buffer_info = NULL;
2706 "Unable to allocate memory for the transmit descriptor ring\n"); 2655 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2707 return -ENOMEM; 2656 return -ENOMEM;
2708} 2657}
2709 2658
@@ -2820,34 +2769,23 @@ static void igb_configure_tx(struct igb_adapter *adapter)
2820int igb_setup_rx_resources(struct igb_ring *rx_ring) 2769int igb_setup_rx_resources(struct igb_ring *rx_ring)
2821{ 2770{
2822 struct device *dev = rx_ring->dev; 2771 struct device *dev = rx_ring->dev;
2823 int orig_node = dev_to_node(dev); 2772 int size;
2824 int size, desc_len;
2825 2773
2826 size = sizeof(struct igb_rx_buffer) * rx_ring->count; 2774 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
2827 rx_ring->rx_buffer_info = vzalloc_node(size, rx_ring->numa_node); 2775
2828 if (!rx_ring->rx_buffer_info) 2776 rx_ring->rx_buffer_info = vzalloc(size);
2829 rx_ring->rx_buffer_info = vzalloc(size);
2830 if (!rx_ring->rx_buffer_info) 2777 if (!rx_ring->rx_buffer_info)
2831 goto err; 2778 goto err;
2832 2779
2833 desc_len = sizeof(union e1000_adv_rx_desc);
2834 2780
2835 /* Round up to nearest 4K */ 2781 /* Round up to nearest 4K */
2836 rx_ring->size = rx_ring->count * desc_len; 2782 rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
2837 rx_ring->size = ALIGN(rx_ring->size, 4096); 2783 rx_ring->size = ALIGN(rx_ring->size, 4096);
2838 2784
2839 set_dev_node(dev, rx_ring->numa_node);
2840 rx_ring->desc = dma_alloc_coherent(dev, 2785 rx_ring->desc = dma_alloc_coherent(dev,
2841 rx_ring->size, 2786 rx_ring->size,
2842 &rx_ring->dma, 2787 &rx_ring->dma,
2843 GFP_KERNEL); 2788 GFP_KERNEL);
2844 set_dev_node(dev, orig_node);
2845 if (!rx_ring->desc)
2846 rx_ring->desc = dma_alloc_coherent(dev,
2847 rx_ring->size,
2848 &rx_ring->dma,
2849 GFP_KERNEL);
2850
2851 if (!rx_ring->desc) 2789 if (!rx_ring->desc)
2852 goto err; 2790 goto err;
2853 2791
@@ -2859,8 +2797,7 @@ int igb_setup_rx_resources(struct igb_ring *rx_ring)
2859err: 2797err:
2860 vfree(rx_ring->rx_buffer_info); 2798 vfree(rx_ring->rx_buffer_info);
2861 rx_ring->rx_buffer_info = NULL; 2799 rx_ring->rx_buffer_info = NULL;
2862 dev_err(dev, "Unable to allocate memory for the receive descriptor" 2800 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
2863 " ring\n");
2864 return -ENOMEM; 2801 return -ENOMEM;
2865} 2802}
2866 2803
@@ -2898,57 +2835,48 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)
2898{ 2835{
2899 struct e1000_hw *hw = &adapter->hw; 2836 struct e1000_hw *hw = &adapter->hw;
2900 u32 mrqc, rxcsum; 2837 u32 mrqc, rxcsum;
2901 u32 j, num_rx_queues, shift = 0, shift2 = 0; 2838 u32 j, num_rx_queues, shift = 0;
2902 union e1000_reta { 2839 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
2903 u32 dword; 2840 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
2904 u8 bytes[4]; 2841 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
2905 } reta; 2842 0xFA01ACBE };
2906 static const u8 rsshash[40] = {
2907 0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2, 0x41, 0x67,
2908 0x25, 0x3d, 0x43, 0xa3, 0x8f, 0xb0, 0xd0, 0xca, 0x2b, 0xcb,
2909 0xae, 0x7b, 0x30, 0xb4, 0x77, 0xcb, 0x2d, 0xa3, 0x80, 0x30,
2910 0xf2, 0x0c, 0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa };
2911 2843
2912 /* Fill out hash function seeds */ 2844 /* Fill out hash function seeds */
2913 for (j = 0; j < 10; j++) { 2845 for (j = 0; j < 10; j++)
2914 u32 rsskey = rsshash[(j * 4)]; 2846 wr32(E1000_RSSRK(j), rsskey[j]);
2915 rsskey |= rsshash[(j * 4) + 1] << 8;
2916 rsskey |= rsshash[(j * 4) + 2] << 16;
2917 rsskey |= rsshash[(j * 4) + 3] << 24;
2918 array_wr32(E1000_RSSRK(0), j, rsskey);
2919 }
2920 2847
2921 num_rx_queues = adapter->rss_queues; 2848 num_rx_queues = adapter->rss_queues;
2922 2849
2923 if (adapter->vfs_allocated_count) { 2850 switch (hw->mac.type) {
2924 /* 82575 and 82576 supports 2 RSS queues for VMDq */ 2851 case e1000_82575:
2925 switch (hw->mac.type) { 2852 shift = 6;
2926 case e1000_i350: 2853 break;
2927 case e1000_82580: 2854 case e1000_82576:
2928 num_rx_queues = 1; 2855 /* 82576 supports 2 RSS queues for SR-IOV */
2929 shift = 0; 2856 if (adapter->vfs_allocated_count) {
2930 break;
2931 case e1000_82576:
2932 shift = 3; 2857 shift = 3;
2933 num_rx_queues = 2; 2858 num_rx_queues = 2;
2934 break;
2935 case e1000_82575:
2936 shift = 2;
2937 shift2 = 6;
2938 default:
2939 break;
2940 } 2859 }
2941 } else { 2860 break;
2942 if (hw->mac.type == e1000_82575) 2861 default:
2943 shift = 6; 2862 break;
2944 } 2863 }
2945 2864
2946 for (j = 0; j < (32 * 4); j++) { 2865 /*
2947 reta.bytes[j & 3] = (j % num_rx_queues) << shift; 2866 * Populate the indirection table 4 entries at a time. To do this
2948 if (shift2) 2867 * we are generating the results for n and n+2 and then interleaving
2949 reta.bytes[j & 3] |= num_rx_queues << shift2; 2868 * those with the results with n+1 and n+3.
2950 if ((j & 3) == 3) 2869 */
2951 wr32(E1000_RETA(j >> 2), reta.dword); 2870 for (j = 0; j < 32; j++) {
2871 /* first pass generates n and n+2 */
2872 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
2873 u32 reta = (base & 0x07800780) >> (7 - shift);
2874
2875 /* second pass generates n+1 and n+3 */
2876 base += 0x00010001 * num_rx_queues;
2877 reta |= (base & 0x07800780) << (1 + shift);
2878
2879 wr32(E1000_RETA(j), reta);
2952 } 2880 }
2953 2881
2954 /* 2882 /*
@@ -3184,8 +3112,10 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,
3184 srrctl |= (PAGE_SIZE / 2) >> E1000_SRRCTL_BSIZEPKT_SHIFT; 3112 srrctl |= (PAGE_SIZE / 2) >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3185#endif 3113#endif
3186 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; 3114 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
3115#ifdef CONFIG_IGB_PTP
3187 if (hw->mac.type >= e1000_82580) 3116 if (hw->mac.type >= e1000_82580)
3188 srrctl |= E1000_SRRCTL_TIMESTAMP; 3117 srrctl |= E1000_SRRCTL_TIMESTAMP;
3118#endif /* CONFIG_IGB_PTP */
3189 /* Only set Drop Enable if we are supporting multiple queues */ 3119 /* Only set Drop Enable if we are supporting multiple queues */
3190 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1) 3120 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3191 srrctl |= E1000_SRRCTL_DROP_EN; 3121 srrctl |= E1000_SRRCTL_DROP_EN;
@@ -3269,20 +3199,20 @@ void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3269{ 3199{
3270 if (tx_buffer->skb) { 3200 if (tx_buffer->skb) {
3271 dev_kfree_skb_any(tx_buffer->skb); 3201 dev_kfree_skb_any(tx_buffer->skb);
3272 if (tx_buffer->dma) 3202 if (dma_unmap_len(tx_buffer, len))
3273 dma_unmap_single(ring->dev, 3203 dma_unmap_single(ring->dev,
3274 tx_buffer->dma, 3204 dma_unmap_addr(tx_buffer, dma),
3275 tx_buffer->length, 3205 dma_unmap_len(tx_buffer, len),
3276 DMA_TO_DEVICE); 3206 DMA_TO_DEVICE);
3277 } else if (tx_buffer->dma) { 3207 } else if (dma_unmap_len(tx_buffer, len)) {
3278 dma_unmap_page(ring->dev, 3208 dma_unmap_page(ring->dev,
3279 tx_buffer->dma, 3209 dma_unmap_addr(tx_buffer, dma),
3280 tx_buffer->length, 3210 dma_unmap_len(tx_buffer, len),
3281 DMA_TO_DEVICE); 3211 DMA_TO_DEVICE);
3282 } 3212 }
3283 tx_buffer->next_to_watch = NULL; 3213 tx_buffer->next_to_watch = NULL;
3284 tx_buffer->skb = NULL; 3214 tx_buffer->skb = NULL;
3285 tx_buffer->dma = 0; 3215 dma_unmap_len_set(tx_buffer, len, 0);
3286 /* buffer_info must be completely set up in the transmit path */ 3216 /* buffer_info must be completely set up in the transmit path */
3287} 3217}
3288 3218
@@ -4229,9 +4159,11 @@ static __le32 igb_tx_cmd_type(u32 tx_flags)
4229 if (tx_flags & IGB_TX_FLAGS_VLAN) 4159 if (tx_flags & IGB_TX_FLAGS_VLAN)
4230 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_VLE); 4160 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_VLE);
4231 4161
4162#ifdef CONFIG_IGB_PTP
4232 /* set timestamp bit if present */ 4163 /* set timestamp bit if present */
4233 if (tx_flags & IGB_TX_FLAGS_TSTAMP) 4164 if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP))
4234 cmd_type |= cpu_to_le32(E1000_ADVTXD_MAC_TSTAMP); 4165 cmd_type |= cpu_to_le32(E1000_ADVTXD_MAC_TSTAMP);
4166#endif /* CONFIG_IGB_PTP */
4235 4167
4236 /* set segmentation bits for TSO */ 4168 /* set segmentation bits for TSO */
4237 if (tx_flags & IGB_TX_FLAGS_TSO) 4169 if (tx_flags & IGB_TX_FLAGS_TSO)
@@ -4275,7 +4207,7 @@ static void igb_tx_map(struct igb_ring *tx_ring,
4275 const u8 hdr_len) 4207 const u8 hdr_len)
4276{ 4208{
4277 struct sk_buff *skb = first->skb; 4209 struct sk_buff *skb = first->skb;
4278 struct igb_tx_buffer *tx_buffer_info; 4210 struct igb_tx_buffer *tx_buffer;
4279 union e1000_adv_tx_desc *tx_desc; 4211 union e1000_adv_tx_desc *tx_desc;
4280 dma_addr_t dma; 4212 dma_addr_t dma;
4281 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0]; 4213 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
@@ -4296,8 +4228,8 @@ static void igb_tx_map(struct igb_ring *tx_ring,
4296 goto dma_error; 4228 goto dma_error;
4297 4229
4298 /* record length, and DMA address */ 4230 /* record length, and DMA address */
4299 first->length = size; 4231 dma_unmap_len_set(first, len, size);
4300 first->dma = dma; 4232 dma_unmap_addr_set(first, dma, dma);
4301 tx_desc->read.buffer_addr = cpu_to_le64(dma); 4233 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4302 4234
4303 for (;;) { 4235 for (;;) {
@@ -4339,9 +4271,9 @@ static void igb_tx_map(struct igb_ring *tx_ring,
4339 if (dma_mapping_error(tx_ring->dev, dma)) 4271 if (dma_mapping_error(tx_ring->dev, dma))
4340 goto dma_error; 4272 goto dma_error;
4341 4273
4342 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 4274 tx_buffer = &tx_ring->tx_buffer_info[i];
4343 tx_buffer_info->length = size; 4275 dma_unmap_len_set(tx_buffer, len, size);
4344 tx_buffer_info->dma = dma; 4276 dma_unmap_addr_set(tx_buffer, dma, dma);
4345 4277
4346 tx_desc->read.olinfo_status = 0; 4278 tx_desc->read.olinfo_status = 0;
4347 tx_desc->read.buffer_addr = cpu_to_le64(dma); 4279 tx_desc->read.buffer_addr = cpu_to_le64(dma);
@@ -4392,9 +4324,9 @@ dma_error:
4392 4324
4393 /* clear dma mappings for failed tx_buffer_info map */ 4325 /* clear dma mappings for failed tx_buffer_info map */
4394 for (;;) { 4326 for (;;) {
4395 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 4327 tx_buffer = &tx_ring->tx_buffer_info[i];
4396 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info); 4328 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4397 if (tx_buffer_info == first) 4329 if (tx_buffer == first)
4398 break; 4330 break;
4399 if (i == 0) 4331 if (i == 0)
4400 i = tx_ring->count; 4332 i = tx_ring->count;
@@ -4440,6 +4372,9 @@ static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4440netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb, 4372netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4441 struct igb_ring *tx_ring) 4373 struct igb_ring *tx_ring)
4442{ 4374{
4375#ifdef CONFIG_IGB_PTP
4376 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4377#endif /* CONFIG_IGB_PTP */
4443 struct igb_tx_buffer *first; 4378 struct igb_tx_buffer *first;
4444 int tso; 4379 int tso;
4445 u32 tx_flags = 0; 4380 u32 tx_flags = 0;
@@ -4462,10 +4397,17 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4462 first->bytecount = skb->len; 4397 first->bytecount = skb->len;
4463 first->gso_segs = 1; 4398 first->gso_segs = 1;
4464 4399
4465 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { 4400#ifdef CONFIG_IGB_PTP
4401 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
4402 !(adapter->ptp_tx_skb))) {
4466 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 4403 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4467 tx_flags |= IGB_TX_FLAGS_TSTAMP; 4404 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4405
4406 adapter->ptp_tx_skb = skb_get(skb);
4407 if (adapter->hw.mac.type == e1000_82576)
4408 schedule_work(&adapter->ptp_tx_work);
4468 } 4409 }
4410#endif /* CONFIG_IGB_PTP */
4469 4411
4470 if (vlan_tx_tag_present(skb)) { 4412 if (vlan_tx_tag_present(skb)) {
4471 tx_flags |= IGB_TX_FLAGS_VLAN; 4413 tx_flags |= IGB_TX_FLAGS_VLAN;
@@ -4661,11 +4603,13 @@ void igb_update_stats(struct igb_adapter *adapter,
4661 bytes = 0; 4603 bytes = 0;
4662 packets = 0; 4604 packets = 0;
4663 for (i = 0; i < adapter->num_rx_queues; i++) { 4605 for (i = 0; i < adapter->num_rx_queues; i++) {
4664 u32 rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0x0FFF; 4606 u32 rqdpc = rd32(E1000_RQDPC(i));
4665 struct igb_ring *ring = adapter->rx_ring[i]; 4607 struct igb_ring *ring = adapter->rx_ring[i];
4666 4608
4667 ring->rx_stats.drops += rqdpc_tmp; 4609 if (rqdpc) {
4668 net_stats->rx_fifo_errors += rqdpc_tmp; 4610 ring->rx_stats.drops += rqdpc;
4611 net_stats->rx_fifo_errors += rqdpc;
4612 }
4669 4613
4670 do { 4614 do {
4671 start = u64_stats_fetch_begin_bh(&ring->rx_syncp); 4615 start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
@@ -4755,7 +4699,11 @@ void igb_update_stats(struct igb_adapter *adapter,
4755 reg = rd32(E1000_CTRL_EXT); 4699 reg = rd32(E1000_CTRL_EXT);
4756 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) { 4700 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4757 adapter->stats.rxerrc += rd32(E1000_RXERRC); 4701 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4758 adapter->stats.tncrs += rd32(E1000_TNCRS); 4702
4703 /* this stat has invalid values on i210/i211 */
4704 if ((hw->mac.type != e1000_i210) &&
4705 (hw->mac.type != e1000_i211))
4706 adapter->stats.tncrs += rd32(E1000_TNCRS);
4759 } 4707 }
4760 4708
4761 adapter->stats.tsctc += rd32(E1000_TSCTC); 4709 adapter->stats.tsctc += rd32(E1000_TSCTC);
@@ -4852,6 +4800,19 @@ static irqreturn_t igb_msix_other(int irq, void *data)
4852 mod_timer(&adapter->watchdog_timer, jiffies + 1); 4800 mod_timer(&adapter->watchdog_timer, jiffies + 1);
4853 } 4801 }
4854 4802
4803#ifdef CONFIG_IGB_PTP
4804 if (icr & E1000_ICR_TS) {
4805 u32 tsicr = rd32(E1000_TSICR);
4806
4807 if (tsicr & E1000_TSICR_TXTS) {
4808 /* acknowledge the interrupt */
4809 wr32(E1000_TSICR, E1000_TSICR_TXTS);
4810 /* retrieve hardware timestamp */
4811 schedule_work(&adapter->ptp_tx_work);
4812 }
4813 }
4814#endif /* CONFIG_IGB_PTP */
4815
4855 wr32(E1000_EIMS, adapter->eims_other); 4816 wr32(E1000_EIMS, adapter->eims_other);
4856 4817
4857 return IRQ_HANDLED; 4818 return IRQ_HANDLED;
@@ -5002,102 +4963,43 @@ static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5002static int igb_vf_configure(struct igb_adapter *adapter, int vf) 4963static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5003{ 4964{
5004 unsigned char mac_addr[ETH_ALEN]; 4965 unsigned char mac_addr[ETH_ALEN];
5005 struct pci_dev *pdev = adapter->pdev;
5006 struct e1000_hw *hw = &adapter->hw;
5007 struct pci_dev *pvfdev;
5008 unsigned int device_id;
5009 u16 thisvf_devfn;
5010 4966
5011 eth_random_addr(mac_addr); 4967 eth_random_addr(mac_addr);
5012 igb_set_vf_mac(adapter, vf, mac_addr); 4968 igb_set_vf_mac(adapter, vf, mac_addr);
5013 4969
5014 switch (adapter->hw.mac.type) { 4970 return 0;
5015 case e1000_82576:
5016 device_id = IGB_82576_VF_DEV_ID;
5017 /* VF Stride for 82576 is 2 */
5018 thisvf_devfn = (pdev->devfn + 0x80 + (vf << 1)) |
5019 (pdev->devfn & 1);
5020 break;
5021 case e1000_i350:
5022 device_id = IGB_I350_VF_DEV_ID;
5023 /* VF Stride for I350 is 4 */
5024 thisvf_devfn = (pdev->devfn + 0x80 + (vf << 2)) |
5025 (pdev->devfn & 3);
5026 break;
5027 default:
5028 device_id = 0;
5029 thisvf_devfn = 0;
5030 break;
5031 }
5032
5033 pvfdev = pci_get_device(hw->vendor_id, device_id, NULL);
5034 while (pvfdev) {
5035 if (pvfdev->devfn == thisvf_devfn)
5036 break;
5037 pvfdev = pci_get_device(hw->vendor_id,
5038 device_id, pvfdev);
5039 }
5040
5041 if (pvfdev)
5042 adapter->vf_data[vf].vfdev = pvfdev;
5043 else
5044 dev_err(&pdev->dev,
5045 "Couldn't find pci dev ptr for VF %4.4x\n",
5046 thisvf_devfn);
5047 return pvfdev != NULL;
5048} 4971}
5049 4972
5050static int igb_find_enabled_vfs(struct igb_adapter *adapter) 4973static bool igb_vfs_are_assigned(struct igb_adapter *adapter)
5051{ 4974{
5052 struct e1000_hw *hw = &adapter->hw;
5053 struct pci_dev *pdev = adapter->pdev; 4975 struct pci_dev *pdev = adapter->pdev;
5054 struct pci_dev *pvfdev; 4976 struct pci_dev *vfdev;
5055 u16 vf_devfn = 0; 4977 int dev_id;
5056 u16 vf_stride;
5057 unsigned int device_id;
5058 int vfs_found = 0;
5059 4978
5060 switch (adapter->hw.mac.type) { 4979 switch (adapter->hw.mac.type) {
5061 case e1000_82576: 4980 case e1000_82576:
5062 device_id = IGB_82576_VF_DEV_ID; 4981 dev_id = IGB_82576_VF_DEV_ID;
5063 /* VF Stride for 82576 is 2 */
5064 vf_stride = 2;
5065 break; 4982 break;
5066 case e1000_i350: 4983 case e1000_i350:
5067 device_id = IGB_I350_VF_DEV_ID; 4984 dev_id = IGB_I350_VF_DEV_ID;
5068 /* VF Stride for I350 is 4 */
5069 vf_stride = 4;
5070 break; 4985 break;
5071 default: 4986 default:
5072 device_id = 0; 4987 return false;
5073 vf_stride = 0;
5074 break;
5075 }
5076
5077 vf_devfn = pdev->devfn + 0x80;
5078 pvfdev = pci_get_device(hw->vendor_id, device_id, NULL);
5079 while (pvfdev) {
5080 if (pvfdev->devfn == vf_devfn &&
5081 (pvfdev->bus->number >= pdev->bus->number))
5082 vfs_found++;
5083 vf_devfn += vf_stride;
5084 pvfdev = pci_get_device(hw->vendor_id,
5085 device_id, pvfdev);
5086 } 4988 }
5087 4989
5088 return vfs_found; 4990 /* loop through all the VFs to see if we own any that are assigned */
5089} 4991 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, NULL);
5090 4992 while (vfdev) {
5091static int igb_check_vf_assignment(struct igb_adapter *adapter) 4993 /* if we don't own it we don't care */
5092{ 4994 if (vfdev->is_virtfn && vfdev->physfn == pdev) {
5093 int i; 4995 /* if it is assigned we cannot release it */
5094 for (i = 0; i < adapter->vfs_allocated_count; i++) { 4996 if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
5095 if (adapter->vf_data[i].vfdev) {
5096 if (adapter->vf_data[i].vfdev->dev_flags &
5097 PCI_DEV_FLAGS_ASSIGNED)
5098 return true; 4997 return true;
5099 } 4998 }
4999
5000 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, vfdev);
5100 } 5001 }
5002
5101 return false; 5003 return false;
5102} 5004}
5103 5005
@@ -5643,6 +5545,19 @@ static irqreturn_t igb_intr_msi(int irq, void *data)
5643 mod_timer(&adapter->watchdog_timer, jiffies + 1); 5545 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5644 } 5546 }
5645 5547
5548#ifdef CONFIG_IGB_PTP
5549 if (icr & E1000_ICR_TS) {
5550 u32 tsicr = rd32(E1000_TSICR);
5551
5552 if (tsicr & E1000_TSICR_TXTS) {
5553 /* acknowledge the interrupt */
5554 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5555 /* retrieve hardware timestamp */
5556 schedule_work(&adapter->ptp_tx_work);
5557 }
5558 }
5559#endif /* CONFIG_IGB_PTP */
5560
5646 napi_schedule(&q_vector->napi); 5561 napi_schedule(&q_vector->napi);
5647 5562
5648 return IRQ_HANDLED; 5563 return IRQ_HANDLED;
@@ -5684,6 +5599,19 @@ static irqreturn_t igb_intr(int irq, void *data)
5684 mod_timer(&adapter->watchdog_timer, jiffies + 1); 5599 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5685 } 5600 }
5686 5601
5602#ifdef CONFIG_IGB_PTP
5603 if (icr & E1000_ICR_TS) {
5604 u32 tsicr = rd32(E1000_TSICR);
5605
5606 if (tsicr & E1000_TSICR_TXTS) {
5607 /* acknowledge the interrupt */
5608 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5609 /* retrieve hardware timestamp */
5610 schedule_work(&adapter->ptp_tx_work);
5611 }
5612 }
5613#endif /* CONFIG_IGB_PTP */
5614
5687 napi_schedule(&q_vector->napi); 5615 napi_schedule(&q_vector->napi);
5688 5616
5689 return IRQ_HANDLED; 5617 return IRQ_HANDLED;
@@ -5743,37 +5671,6 @@ static int igb_poll(struct napi_struct *napi, int budget)
5743 return 0; 5671 return 0;
5744} 5672}
5745 5673
5746#ifdef CONFIG_IGB_PTP
5747/**
5748 * igb_tx_hwtstamp - utility function which checks for TX time stamp
5749 * @q_vector: pointer to q_vector containing needed info
5750 * @buffer: pointer to igb_tx_buffer structure
5751 *
5752 * If we were asked to do hardware stamping and such a time stamp is
5753 * available, then it must have been for this skb here because we only
5754 * allow only one such packet into the queue.
5755 */
5756static void igb_tx_hwtstamp(struct igb_q_vector *q_vector,
5757 struct igb_tx_buffer *buffer_info)
5758{
5759 struct igb_adapter *adapter = q_vector->adapter;
5760 struct e1000_hw *hw = &adapter->hw;
5761 struct skb_shared_hwtstamps shhwtstamps;
5762 u64 regval;
5763
5764 /* if skb does not support hw timestamp or TX stamp not valid exit */
5765 if (likely(!(buffer_info->tx_flags & IGB_TX_FLAGS_TSTAMP)) ||
5766 !(rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID))
5767 return;
5768
5769 regval = rd32(E1000_TXSTMPL);
5770 regval |= (u64)rd32(E1000_TXSTMPH) << 32;
5771
5772 igb_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
5773 skb_tstamp_tx(buffer_info->skb, &shhwtstamps);
5774}
5775
5776#endif
5777/** 5674/**
5778 * igb_clean_tx_irq - Reclaim resources after transmit completes 5675 * igb_clean_tx_irq - Reclaim resources after transmit completes
5779 * @q_vector: pointer to q_vector containing needed info 5676 * @q_vector: pointer to q_vector containing needed info
@@ -5785,7 +5682,7 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5785 struct igb_adapter *adapter = q_vector->adapter; 5682 struct igb_adapter *adapter = q_vector->adapter;
5786 struct igb_ring *tx_ring = q_vector->tx.ring; 5683 struct igb_ring *tx_ring = q_vector->tx.ring;
5787 struct igb_tx_buffer *tx_buffer; 5684 struct igb_tx_buffer *tx_buffer;
5788 union e1000_adv_tx_desc *tx_desc, *eop_desc; 5685 union e1000_adv_tx_desc *tx_desc;
5789 unsigned int total_bytes = 0, total_packets = 0; 5686 unsigned int total_bytes = 0, total_packets = 0;
5790 unsigned int budget = q_vector->tx.work_limit; 5687 unsigned int budget = q_vector->tx.work_limit;
5791 unsigned int i = tx_ring->next_to_clean; 5688 unsigned int i = tx_ring->next_to_clean;
@@ -5797,16 +5694,16 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5797 tx_desc = IGB_TX_DESC(tx_ring, i); 5694 tx_desc = IGB_TX_DESC(tx_ring, i);
5798 i -= tx_ring->count; 5695 i -= tx_ring->count;
5799 5696
5800 for (; budget; budget--) { 5697 do {
5801 eop_desc = tx_buffer->next_to_watch; 5698 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
5802
5803 /* prevent any other reads prior to eop_desc */
5804 rmb();
5805 5699
5806 /* if next_to_watch is not set then there is no work pending */ 5700 /* if next_to_watch is not set then there is no work pending */
5807 if (!eop_desc) 5701 if (!eop_desc)
5808 break; 5702 break;
5809 5703
5704 /* prevent any other reads prior to eop_desc */
5705 rmb();
5706
5810 /* if DD is not set pending work has not been completed */ 5707 /* if DD is not set pending work has not been completed */
5811 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD))) 5708 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
5812 break; 5709 break;
@@ -5818,25 +5715,21 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5818 total_bytes += tx_buffer->bytecount; 5715 total_bytes += tx_buffer->bytecount;
5819 total_packets += tx_buffer->gso_segs; 5716 total_packets += tx_buffer->gso_segs;
5820 5717
5821#ifdef CONFIG_IGB_PTP
5822 /* retrieve hardware timestamp */
5823 igb_tx_hwtstamp(q_vector, tx_buffer);
5824
5825#endif
5826 /* free the skb */ 5718 /* free the skb */
5827 dev_kfree_skb_any(tx_buffer->skb); 5719 dev_kfree_skb_any(tx_buffer->skb);
5828 tx_buffer->skb = NULL;
5829 5720
5830 /* unmap skb header data */ 5721 /* unmap skb header data */
5831 dma_unmap_single(tx_ring->dev, 5722 dma_unmap_single(tx_ring->dev,
5832 tx_buffer->dma, 5723 dma_unmap_addr(tx_buffer, dma),
5833 tx_buffer->length, 5724 dma_unmap_len(tx_buffer, len),
5834 DMA_TO_DEVICE); 5725 DMA_TO_DEVICE);
5835 5726
5727 /* clear tx_buffer data */
5728 tx_buffer->skb = NULL;
5729 dma_unmap_len_set(tx_buffer, len, 0);
5730
5836 /* clear last DMA location and unmap remaining buffers */ 5731 /* clear last DMA location and unmap remaining buffers */
5837 while (tx_desc != eop_desc) { 5732 while (tx_desc != eop_desc) {
5838 tx_buffer->dma = 0;
5839
5840 tx_buffer++; 5733 tx_buffer++;
5841 tx_desc++; 5734 tx_desc++;
5842 i++; 5735 i++;
@@ -5847,17 +5740,15 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5847 } 5740 }
5848 5741
5849 /* unmap any remaining paged data */ 5742 /* unmap any remaining paged data */
5850 if (tx_buffer->dma) { 5743 if (dma_unmap_len(tx_buffer, len)) {
5851 dma_unmap_page(tx_ring->dev, 5744 dma_unmap_page(tx_ring->dev,
5852 tx_buffer->dma, 5745 dma_unmap_addr(tx_buffer, dma),
5853 tx_buffer->length, 5746 dma_unmap_len(tx_buffer, len),
5854 DMA_TO_DEVICE); 5747 DMA_TO_DEVICE);
5748 dma_unmap_len_set(tx_buffer, len, 0);
5855 } 5749 }
5856 } 5750 }
5857 5751
5858 /* clear last DMA location */
5859 tx_buffer->dma = 0;
5860
5861 /* move us one more past the eop_desc for start of next pkt */ 5752 /* move us one more past the eop_desc for start of next pkt */
5862 tx_buffer++; 5753 tx_buffer++;
5863 tx_desc++; 5754 tx_desc++;
@@ -5867,7 +5758,13 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5867 tx_buffer = tx_ring->tx_buffer_info; 5758 tx_buffer = tx_ring->tx_buffer_info;
5868 tx_desc = IGB_TX_DESC(tx_ring, 0); 5759 tx_desc = IGB_TX_DESC(tx_ring, 0);
5869 } 5760 }
5870 } 5761
5762 /* issue prefetch for next Tx descriptor */
5763 prefetch(tx_desc);
5764
5765 /* update budget accounting */
5766 budget--;
5767 } while (likely(budget));
5871 5768
5872 netdev_tx_completed_queue(txring_txq(tx_ring), 5769 netdev_tx_completed_queue(txring_txq(tx_ring),
5873 total_packets, total_bytes); 5770 total_packets, total_bytes);
@@ -5883,12 +5780,10 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5883 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) { 5780 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
5884 struct e1000_hw *hw = &adapter->hw; 5781 struct e1000_hw *hw = &adapter->hw;
5885 5782
5886 eop_desc = tx_buffer->next_to_watch;
5887
5888 /* Detect a transmit hang in hardware, this serializes the 5783 /* Detect a transmit hang in hardware, this serializes the
5889 * check with the clearing of time_stamp and movement of i */ 5784 * check with the clearing of time_stamp and movement of i */
5890 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags); 5785 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5891 if (eop_desc && 5786 if (tx_buffer->next_to_watch &&
5892 time_after(jiffies, tx_buffer->time_stamp + 5787 time_after(jiffies, tx_buffer->time_stamp +
5893 (adapter->tx_timeout_factor * HZ)) && 5788 (adapter->tx_timeout_factor * HZ)) &&
5894 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) { 5789 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
@@ -5912,9 +5807,9 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5912 tx_ring->next_to_use, 5807 tx_ring->next_to_use,
5913 tx_ring->next_to_clean, 5808 tx_ring->next_to_clean,
5914 tx_buffer->time_stamp, 5809 tx_buffer->time_stamp,
5915 eop_desc, 5810 tx_buffer->next_to_watch,
5916 jiffies, 5811 jiffies,
5917 eop_desc->wb.status); 5812 tx_buffer->next_to_watch->wb.status);
5918 netif_stop_subqueue(tx_ring->netdev, 5813 netif_stop_subqueue(tx_ring->netdev,
5919 tx_ring->queue_index); 5814 tx_ring->queue_index);
5920 5815
@@ -5994,47 +5889,6 @@ static inline void igb_rx_hash(struct igb_ring *ring,
5994 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss); 5889 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
5995} 5890}
5996 5891
5997#ifdef CONFIG_IGB_PTP
5998static void igb_rx_hwtstamp(struct igb_q_vector *q_vector,
5999 union e1000_adv_rx_desc *rx_desc,
6000 struct sk_buff *skb)
6001{
6002 struct igb_adapter *adapter = q_vector->adapter;
6003 struct e1000_hw *hw = &adapter->hw;
6004 u64 regval;
6005
6006 if (!igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP |
6007 E1000_RXDADV_STAT_TS))
6008 return;
6009
6010 /*
6011 * If this bit is set, then the RX registers contain the time stamp. No
6012 * other packet will be time stamped until we read these registers, so
6013 * read the registers to make them available again. Because only one
6014 * packet can be time stamped at a time, we know that the register
6015 * values must belong to this one here and therefore we don't need to
6016 * compare any of the additional attributes stored for it.
6017 *
6018 * If nothing went wrong, then it should have a shared tx_flags that we
6019 * can turn into a skb_shared_hwtstamps.
6020 */
6021 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6022 u32 *stamp = (u32 *)skb->data;
6023 regval = le32_to_cpu(*(stamp + 2));
6024 regval |= (u64)le32_to_cpu(*(stamp + 3)) << 32;
6025 skb_pull(skb, IGB_TS_HDR_LEN);
6026 } else {
6027 if(!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
6028 return;
6029
6030 regval = rd32(E1000_RXSTMPL);
6031 regval |= (u64)rd32(E1000_RXSTMPH) << 32;
6032 }
6033
6034 igb_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
6035}
6036
6037#endif
6038static void igb_rx_vlan(struct igb_ring *ring, 5892static void igb_rx_vlan(struct igb_ring *ring,
6039 union e1000_adv_rx_desc *rx_desc, 5893 union e1000_adv_rx_desc *rx_desc,
6040 struct sk_buff *skb) 5894 struct sk_buff *skb)
@@ -6146,8 +6000,8 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
6146 } 6000 }
6147 6001
6148#ifdef CONFIG_IGB_PTP 6002#ifdef CONFIG_IGB_PTP
6149 igb_rx_hwtstamp(q_vector, rx_desc, skb); 6003 igb_ptp_rx_hwtstamp(q_vector, rx_desc, skb);
6150#endif 6004#endif /* CONFIG_IGB_PTP */
6151 igb_rx_hash(rx_ring, rx_desc, skb); 6005 igb_rx_hash(rx_ring, rx_desc, skb);
6152 igb_rx_checksum(rx_ring, rx_desc, skb); 6006 igb_rx_checksum(rx_ring, rx_desc, skb);
6153 igb_rx_vlan(rx_ring, rx_desc, skb); 6007 igb_rx_vlan(rx_ring, rx_desc, skb);
@@ -6341,181 +6195,6 @@ static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6341} 6195}
6342 6196
6343/** 6197/**
6344 * igb_hwtstamp_ioctl - control hardware time stamping
6345 * @netdev:
6346 * @ifreq:
6347 * @cmd:
6348 *
6349 * Outgoing time stamping can be enabled and disabled. Play nice and
6350 * disable it when requested, although it shouldn't case any overhead
6351 * when no packet needs it. At most one packet in the queue may be
6352 * marked for time stamping, otherwise it would be impossible to tell
6353 * for sure to which packet the hardware time stamp belongs.
6354 *
6355 * Incoming time stamping has to be configured via the hardware
6356 * filters. Not all combinations are supported, in particular event
6357 * type has to be specified. Matching the kind of event packet is
6358 * not supported, with the exception of "all V2 events regardless of
6359 * level 2 or 4".
6360 *
6361 **/
6362static int igb_hwtstamp_ioctl(struct net_device *netdev,
6363 struct ifreq *ifr, int cmd)
6364{
6365 struct igb_adapter *adapter = netdev_priv(netdev);
6366 struct e1000_hw *hw = &adapter->hw;
6367 struct hwtstamp_config config;
6368 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
6369 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
6370 u32 tsync_rx_cfg = 0;
6371 bool is_l4 = false;
6372 bool is_l2 = false;
6373 u32 regval;
6374
6375 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6376 return -EFAULT;
6377
6378 /* reserved for future extensions */
6379 if (config.flags)
6380 return -EINVAL;
6381
6382 switch (config.tx_type) {
6383 case HWTSTAMP_TX_OFF:
6384 tsync_tx_ctl = 0;
6385 case HWTSTAMP_TX_ON:
6386 break;
6387 default:
6388 return -ERANGE;
6389 }
6390
6391 switch (config.rx_filter) {
6392 case HWTSTAMP_FILTER_NONE:
6393 tsync_rx_ctl = 0;
6394 break;
6395 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
6396 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
6397 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
6398 case HWTSTAMP_FILTER_ALL:
6399 /*
6400 * register TSYNCRXCFG must be set, therefore it is not
6401 * possible to time stamp both Sync and Delay_Req messages
6402 * => fall back to time stamping all packets
6403 */
6404 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
6405 config.rx_filter = HWTSTAMP_FILTER_ALL;
6406 break;
6407 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
6408 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
6409 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
6410 is_l4 = true;
6411 break;
6412 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
6413 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
6414 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
6415 is_l4 = true;
6416 break;
6417 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6418 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6419 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
6420 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE;
6421 is_l2 = true;
6422 is_l4 = true;
6423 config.rx_filter = HWTSTAMP_FILTER_SOME;
6424 break;
6425 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6426 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6427 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
6428 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE;
6429 is_l2 = true;
6430 is_l4 = true;
6431 config.rx_filter = HWTSTAMP_FILTER_SOME;
6432 break;
6433 case HWTSTAMP_FILTER_PTP_V2_EVENT:
6434 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6435 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6436 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
6437 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
6438 is_l2 = true;
6439 is_l4 = true;
6440 break;
6441 default:
6442 return -ERANGE;
6443 }
6444
6445 if (hw->mac.type == e1000_82575) {
6446 if (tsync_rx_ctl | tsync_tx_ctl)
6447 return -EINVAL;
6448 return 0;
6449 }
6450
6451 /*
6452 * Per-packet timestamping only works if all packets are
6453 * timestamped, so enable timestamping in all packets as
6454 * long as one rx filter was configured.
6455 */
6456 if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
6457 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
6458 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
6459 }
6460
6461 /* enable/disable TX */
6462 regval = rd32(E1000_TSYNCTXCTL);
6463 regval &= ~E1000_TSYNCTXCTL_ENABLED;
6464 regval |= tsync_tx_ctl;
6465 wr32(E1000_TSYNCTXCTL, regval);
6466
6467 /* enable/disable RX */
6468 regval = rd32(E1000_TSYNCRXCTL);
6469 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
6470 regval |= tsync_rx_ctl;
6471 wr32(E1000_TSYNCRXCTL, regval);
6472
6473 /* define which PTP packets are time stamped */
6474 wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
6475
6476 /* define ethertype filter for timestamped packets */
6477 if (is_l2)
6478 wr32(E1000_ETQF(3),
6479 (E1000_ETQF_FILTER_ENABLE | /* enable filter */
6480 E1000_ETQF_1588 | /* enable timestamping */
6481 ETH_P_1588)); /* 1588 eth protocol type */
6482 else
6483 wr32(E1000_ETQF(3), 0);
6484
6485#define PTP_PORT 319
6486 /* L4 Queue Filter[3]: filter by destination port and protocol */
6487 if (is_l4) {
6488 u32 ftqf = (IPPROTO_UDP /* UDP */
6489 | E1000_FTQF_VF_BP /* VF not compared */
6490 | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
6491 | E1000_FTQF_MASK); /* mask all inputs */
6492 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
6493
6494 wr32(E1000_IMIR(3), htons(PTP_PORT));
6495 wr32(E1000_IMIREXT(3),
6496 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
6497 if (hw->mac.type == e1000_82576) {
6498 /* enable source port check */
6499 wr32(E1000_SPQF(3), htons(PTP_PORT));
6500 ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
6501 }
6502 wr32(E1000_FTQF(3), ftqf);
6503 } else {
6504 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
6505 }
6506 wrfl();
6507
6508 adapter->hwtstamp_config = config;
6509
6510 /* clear TX/RX time stamp registers, just to be sure */
6511 regval = rd32(E1000_TXSTMPH);
6512 regval = rd32(E1000_RXSTMPH);
6513
6514 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
6515 -EFAULT : 0;
6516}
6517
6518/**
6519 * igb_ioctl - 6198 * igb_ioctl -
6520 * @netdev: 6199 * @netdev:
6521 * @ifreq: 6200 * @ifreq:
@@ -6528,8 +6207,10 @@ static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6528 case SIOCGMIIREG: 6207 case SIOCGMIIREG:
6529 case SIOCSMIIREG: 6208 case SIOCSMIIREG:
6530 return igb_mii_ioctl(netdev, ifr, cmd); 6209 return igb_mii_ioctl(netdev, ifr, cmd);
6210#ifdef CONFIG_IGB_PTP
6531 case SIOCSHWTSTAMP: 6211 case SIOCSHWTSTAMP:
6532 return igb_hwtstamp_ioctl(netdev, ifr, cmd); 6212 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6213#endif /* CONFIG_IGB_PTP */
6533 default: 6214 default:
6534 return -EOPNOTSUPP; 6215 return -EOPNOTSUPP;
6535 } 6216 }
@@ -6667,6 +6348,10 @@ int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
6667 default: 6348 default:
6668 goto err_inval; 6349 goto err_inval;
6669 } 6350 }
6351
6352 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
6353 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6354
6670 return 0; 6355 return 0;
6671 6356
6672err_inval: 6357err_inval:
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c
index c846ea9131a3..ee21445157a3 100644
--- a/drivers/net/ethernet/intel/igb/igb_ptp.c
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -69,22 +69,22 @@
69 * 2^40 * 10^-9 / 60 = 18.3 minutes. 69 * 2^40 * 10^-9 / 60 = 18.3 minutes.
70 */ 70 */
71 71
72#define IGB_OVERFLOW_PERIOD (HZ * 60 * 9) 72#define IGB_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 9)
73#define INCPERIOD_82576 (1 << E1000_TIMINCA_16NS_SHIFT) 73#define INCPERIOD_82576 (1 << E1000_TIMINCA_16NS_SHIFT)
74#define INCVALUE_82576_MASK ((1 << E1000_TIMINCA_16NS_SHIFT) - 1) 74#define INCVALUE_82576_MASK ((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
75#define INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT) 75#define INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
76#define IGB_NBITS_82580 40 76#define IGB_NBITS_82580 40
77 77
78/* 78/*
79 * SYSTIM read access for the 82576 79 * SYSTIM read access for the 82576
80 */ 80 */
81 81
82static cycle_t igb_82576_systim_read(const struct cyclecounter *cc) 82static cycle_t igb_ptp_read_82576(const struct cyclecounter *cc)
83{ 83{
84 u64 val;
85 u32 lo, hi;
86 struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc); 84 struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
87 struct e1000_hw *hw = &igb->hw; 85 struct e1000_hw *hw = &igb->hw;
86 u64 val;
87 u32 lo, hi;
88 88
89 lo = rd32(E1000_SYSTIML); 89 lo = rd32(E1000_SYSTIML);
90 hi = rd32(E1000_SYSTIMH); 90 hi = rd32(E1000_SYSTIMH);
@@ -99,12 +99,12 @@ static cycle_t igb_82576_systim_read(const struct cyclecounter *cc)
99 * SYSTIM read access for the 82580 99 * SYSTIM read access for the 82580
100 */ 100 */
101 101
102static cycle_t igb_82580_systim_read(const struct cyclecounter *cc) 102static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc)
103{ 103{
104 u64 val;
105 u32 lo, hi, jk;
106 struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc); 104 struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
107 struct e1000_hw *hw = &igb->hw; 105 struct e1000_hw *hw = &igb->hw;
106 u64 val;
107 u32 lo, hi, jk;
108 108
109 /* 109 /*
110 * The timestamp latches on lowest register read. For the 82580 110 * The timestamp latches on lowest register read. For the 82580
@@ -122,16 +122,101 @@ static cycle_t igb_82580_systim_read(const struct cyclecounter *cc)
122} 122}
123 123
124/* 124/*
125 * SYSTIM read access for I210/I211
126 */
127
128static void igb_ptp_read_i210(struct igb_adapter *adapter, struct timespec *ts)
129{
130 struct e1000_hw *hw = &adapter->hw;
131 u32 sec, nsec, jk;
132
133 /*
134 * The timestamp latches on lowest register read. For I210/I211, the
135 * lowest register is SYSTIMR. Since we only need to provide nanosecond
136 * resolution, we can ignore it.
137 */
138 jk = rd32(E1000_SYSTIMR);
139 nsec = rd32(E1000_SYSTIML);
140 sec = rd32(E1000_SYSTIMH);
141
142 ts->tv_sec = sec;
143 ts->tv_nsec = nsec;
144}
145
146static void igb_ptp_write_i210(struct igb_adapter *adapter,
147 const struct timespec *ts)
148{
149 struct e1000_hw *hw = &adapter->hw;
150
151 /*
152 * Writing the SYSTIMR register is not necessary as it only provides
153 * sub-nanosecond resolution.
154 */
155 wr32(E1000_SYSTIML, ts->tv_nsec);
156 wr32(E1000_SYSTIMH, ts->tv_sec);
157}
158
159/**
160 * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
161 * @adapter: board private structure
162 * @hwtstamps: timestamp structure to update
163 * @systim: unsigned 64bit system time value.
164 *
165 * We need to convert the system time value stored in the RX/TXSTMP registers
166 * into a hwtstamp which can be used by the upper level timestamping functions.
167 *
168 * The 'tmreg_lock' spinlock is used to protect the consistency of the
169 * system time value. This is needed because reading the 64 bit time
170 * value involves reading two (or three) 32 bit registers. The first
171 * read latches the value. Ditto for writing.
172 *
173 * In addition, here have extended the system time with an overflow
174 * counter in software.
175 **/
176static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
177 struct skb_shared_hwtstamps *hwtstamps,
178 u64 systim)
179{
180 unsigned long flags;
181 u64 ns;
182
183 switch (adapter->hw.mac.type) {
184 case e1000_82576:
185 case e1000_82580:
186 case e1000_i350:
187 spin_lock_irqsave(&adapter->tmreg_lock, flags);
188
189 ns = timecounter_cyc2time(&adapter->tc, systim);
190
191 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
192
193 memset(hwtstamps, 0, sizeof(*hwtstamps));
194 hwtstamps->hwtstamp = ns_to_ktime(ns);
195 break;
196 case e1000_i210:
197 case e1000_i211:
198 memset(hwtstamps, 0, sizeof(*hwtstamps));
199 /* Upper 32 bits contain s, lower 32 bits contain ns. */
200 hwtstamps->hwtstamp = ktime_set(systim >> 32,
201 systim & 0xFFFFFFFF);
202 break;
203 default:
204 break;
205 }
206}
207
208/*
125 * PTP clock operations 209 * PTP clock operations
126 */ 210 */
127 211
128static int ptp_82576_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 212static int igb_ptp_adjfreq_82576(struct ptp_clock_info *ptp, s32 ppb)
129{ 213{
214 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
215 ptp_caps);
216 struct e1000_hw *hw = &igb->hw;
217 int neg_adj = 0;
130 u64 rate; 218 u64 rate;
131 u32 incvalue; 219 u32 incvalue;
132 int neg_adj = 0;
133 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
134 struct e1000_hw *hw = &igb->hw;
135 220
136 if (ppb < 0) { 221 if (ppb < 0) {
137 neg_adj = 1; 222 neg_adj = 1;
@@ -153,13 +238,14 @@ static int ptp_82576_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
153 return 0; 238 return 0;
154} 239}
155 240
156static int ptp_82580_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 241static int igb_ptp_adjfreq_82580(struct ptp_clock_info *ptp, s32 ppb)
157{ 242{
243 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
244 ptp_caps);
245 struct e1000_hw *hw = &igb->hw;
246 int neg_adj = 0;
158 u64 rate; 247 u64 rate;
159 u32 inca; 248 u32 inca;
160 int neg_adj = 0;
161 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
162 struct e1000_hw *hw = &igb->hw;
163 249
164 if (ppb < 0) { 250 if (ppb < 0) {
165 neg_adj = 1; 251 neg_adj = 1;
@@ -178,11 +264,12 @@ static int ptp_82580_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
178 return 0; 264 return 0;
179} 265}
180 266
181static int igb_adjtime(struct ptp_clock_info *ptp, s64 delta) 267static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
182{ 268{
183 s64 now; 269 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
270 ptp_caps);
184 unsigned long flags; 271 unsigned long flags;
185 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps); 272 s64 now;
186 273
187 spin_lock_irqsave(&igb->tmreg_lock, flags); 274 spin_lock_irqsave(&igb->tmreg_lock, flags);
188 275
@@ -195,12 +282,32 @@ static int igb_adjtime(struct ptp_clock_info *ptp, s64 delta)
195 return 0; 282 return 0;
196} 283}
197 284
198static int igb_gettime(struct ptp_clock_info *ptp, struct timespec *ts) 285static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
199{ 286{
287 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
288 ptp_caps);
289 unsigned long flags;
290 struct timespec now, then = ns_to_timespec(delta);
291
292 spin_lock_irqsave(&igb->tmreg_lock, flags);
293
294 igb_ptp_read_i210(igb, &now);
295 now = timespec_add(now, then);
296 igb_ptp_write_i210(igb, (const struct timespec *)&now);
297
298 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
299
300 return 0;
301}
302
303static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
304 struct timespec *ts)
305{
306 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
307 ptp_caps);
308 unsigned long flags;
200 u64 ns; 309 u64 ns;
201 u32 remainder; 310 u32 remainder;
202 unsigned long flags;
203 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);
204 311
205 spin_lock_irqsave(&igb->tmreg_lock, flags); 312 spin_lock_irqsave(&igb->tmreg_lock, flags);
206 313
@@ -214,11 +321,29 @@ static int igb_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
214 return 0; 321 return 0;
215} 322}
216 323
217static int igb_settime(struct ptp_clock_info *ptp, const struct timespec *ts) 324static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
325 struct timespec *ts)
218{ 326{
219 u64 ns; 327 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
328 ptp_caps);
220 unsigned long flags; 329 unsigned long flags;
221 struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps); 330
331 spin_lock_irqsave(&igb->tmreg_lock, flags);
332
333 igb_ptp_read_i210(igb, ts);
334
335 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
336
337 return 0;
338}
339
340static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
341 const struct timespec *ts)
342{
343 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
344 ptp_caps);
345 unsigned long flags;
346 u64 ns;
222 347
223 ns = ts->tv_sec * 1000000000ULL; 348 ns = ts->tv_sec * 1000000000ULL;
224 ns += ts->tv_nsec; 349 ns += ts->tv_nsec;
@@ -232,77 +357,369 @@ static int igb_settime(struct ptp_clock_info *ptp, const struct timespec *ts)
232 return 0; 357 return 0;
233} 358}
234 359
235static int ptp_82576_enable(struct ptp_clock_info *ptp, 360static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
236 struct ptp_clock_request *rq, int on) 361 const struct timespec *ts)
237{ 362{
238 return -EOPNOTSUPP; 363 struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
364 ptp_caps);
365 unsigned long flags;
366
367 spin_lock_irqsave(&igb->tmreg_lock, flags);
368
369 igb_ptp_write_i210(igb, ts);
370
371 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
372
373 return 0;
239} 374}
240 375
241static int ptp_82580_enable(struct ptp_clock_info *ptp, 376static int igb_ptp_enable(struct ptp_clock_info *ptp,
242 struct ptp_clock_request *rq, int on) 377 struct ptp_clock_request *rq, int on)
243{ 378{
244 return -EOPNOTSUPP; 379 return -EOPNOTSUPP;
245} 380}
246 381
247static void igb_overflow_check(struct work_struct *work) 382/**
383 * igb_ptp_tx_work
384 * @work: pointer to work struct
385 *
386 * This work function polls the TSYNCTXCTL valid bit to determine when a
387 * timestamp has been taken for the current stored skb.
388 */
389void igb_ptp_tx_work(struct work_struct *work)
390{
391 struct igb_adapter *adapter = container_of(work, struct igb_adapter,
392 ptp_tx_work);
393 struct e1000_hw *hw = &adapter->hw;
394 u32 tsynctxctl;
395
396 if (!adapter->ptp_tx_skb)
397 return;
398
399 tsynctxctl = rd32(E1000_TSYNCTXCTL);
400 if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
401 igb_ptp_tx_hwtstamp(adapter);
402 else
403 /* reschedule to check later */
404 schedule_work(&adapter->ptp_tx_work);
405}
406
407static void igb_ptp_overflow_check(struct work_struct *work)
248{ 408{
249 struct timespec ts;
250 struct igb_adapter *igb = 409 struct igb_adapter *igb =
251 container_of(work, struct igb_adapter, overflow_work.work); 410 container_of(work, struct igb_adapter, ptp_overflow_work.work);
411 struct timespec ts;
252 412
253 igb_gettime(&igb->caps, &ts); 413 igb->ptp_caps.gettime(&igb->ptp_caps, &ts);
254 414
255 pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec); 415 pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
256 416
257 schedule_delayed_work(&igb->overflow_work, IGB_OVERFLOW_PERIOD); 417 schedule_delayed_work(&igb->ptp_overflow_work,
418 IGB_SYSTIM_OVERFLOW_PERIOD);
419}
420
421/**
422 * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
423 * @adapter: Board private structure.
424 *
425 * If we were asked to do hardware stamping and such a time stamp is
426 * available, then it must have been for this skb here because we only
427 * allow only one such packet into the queue.
428 */
429void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
430{
431 struct e1000_hw *hw = &adapter->hw;
432 struct skb_shared_hwtstamps shhwtstamps;
433 u64 regval;
434
435 regval = rd32(E1000_TXSTMPL);
436 regval |= (u64)rd32(E1000_TXSTMPH) << 32;
437
438 igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
439 skb_tstamp_tx(adapter->ptp_tx_skb, &shhwtstamps);
440 dev_kfree_skb_any(adapter->ptp_tx_skb);
441 adapter->ptp_tx_skb = NULL;
442}
443
444void igb_ptp_rx_hwtstamp(struct igb_q_vector *q_vector,
445 union e1000_adv_rx_desc *rx_desc,
446 struct sk_buff *skb)
447{
448 struct igb_adapter *adapter = q_vector->adapter;
449 struct e1000_hw *hw = &adapter->hw;
450 u64 regval;
451
452 if (!igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP |
453 E1000_RXDADV_STAT_TS))
454 return;
455
456 /*
457 * If this bit is set, then the RX registers contain the time stamp. No
458 * other packet will be time stamped until we read these registers, so
459 * read the registers to make them available again. Because only one
460 * packet can be time stamped at a time, we know that the register
461 * values must belong to this one here and therefore we don't need to
462 * compare any of the additional attributes stored for it.
463 *
464 * If nothing went wrong, then it should have a shared tx_flags that we
465 * can turn into a skb_shared_hwtstamps.
466 */
467 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
468 u32 *stamp = (u32 *)skb->data;
469 regval = le32_to_cpu(*(stamp + 2));
470 regval |= (u64)le32_to_cpu(*(stamp + 3)) << 32;
471 skb_pull(skb, IGB_TS_HDR_LEN);
472 } else {
473 if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
474 return;
475
476 regval = rd32(E1000_RXSTMPL);
477 regval |= (u64)rd32(E1000_RXSTMPH) << 32;
478 }
479
480 igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
481}
482
483/**
484 * igb_ptp_hwtstamp_ioctl - control hardware time stamping
485 * @netdev:
486 * @ifreq:
487 * @cmd:
488 *
489 * Outgoing time stamping can be enabled and disabled. Play nice and
490 * disable it when requested, although it shouldn't case any overhead
491 * when no packet needs it. At most one packet in the queue may be
492 * marked for time stamping, otherwise it would be impossible to tell
493 * for sure to which packet the hardware time stamp belongs.
494 *
495 * Incoming time stamping has to be configured via the hardware
496 * filters. Not all combinations are supported, in particular event
497 * type has to be specified. Matching the kind of event packet is
498 * not supported, with the exception of "all V2 events regardless of
499 * level 2 or 4".
500 *
501 **/
502int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
503 struct ifreq *ifr, int cmd)
504{
505 struct igb_adapter *adapter = netdev_priv(netdev);
506 struct e1000_hw *hw = &adapter->hw;
507 struct hwtstamp_config config;
508 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
509 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
510 u32 tsync_rx_cfg = 0;
511 bool is_l4 = false;
512 bool is_l2 = false;
513 u32 regval;
514
515 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
516 return -EFAULT;
517
518 /* reserved for future extensions */
519 if (config.flags)
520 return -EINVAL;
521
522 switch (config.tx_type) {
523 case HWTSTAMP_TX_OFF:
524 tsync_tx_ctl = 0;
525 case HWTSTAMP_TX_ON:
526 break;
527 default:
528 return -ERANGE;
529 }
530
531 switch (config.rx_filter) {
532 case HWTSTAMP_FILTER_NONE:
533 tsync_rx_ctl = 0;
534 break;
535 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
536 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
537 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
538 case HWTSTAMP_FILTER_ALL:
539 /*
540 * register TSYNCRXCFG must be set, therefore it is not
541 * possible to time stamp both Sync and Delay_Req messages
542 * => fall back to time stamping all packets
543 */
544 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
545 config.rx_filter = HWTSTAMP_FILTER_ALL;
546 break;
547 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
548 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
549 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
550 is_l4 = true;
551 break;
552 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
553 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
554 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
555 is_l4 = true;
556 break;
557 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
558 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
559 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
560 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE;
561 is_l2 = true;
562 is_l4 = true;
563 config.rx_filter = HWTSTAMP_FILTER_SOME;
564 break;
565 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
566 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
567 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
568 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE;
569 is_l2 = true;
570 is_l4 = true;
571 config.rx_filter = HWTSTAMP_FILTER_SOME;
572 break;
573 case HWTSTAMP_FILTER_PTP_V2_EVENT:
574 case HWTSTAMP_FILTER_PTP_V2_SYNC:
575 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
576 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
577 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
578 is_l2 = true;
579 is_l4 = true;
580 break;
581 default:
582 return -ERANGE;
583 }
584
585 if (hw->mac.type == e1000_82575) {
586 if (tsync_rx_ctl | tsync_tx_ctl)
587 return -EINVAL;
588 return 0;
589 }
590
591 /*
592 * Per-packet timestamping only works if all packets are
593 * timestamped, so enable timestamping in all packets as
594 * long as one rx filter was configured.
595 */
596 if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
597 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
598 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
599
600 if ((hw->mac.type == e1000_i210) ||
601 (hw->mac.type == e1000_i211)) {
602 regval = rd32(E1000_RXPBS);
603 regval |= E1000_RXPBS_CFG_TS_EN;
604 wr32(E1000_RXPBS, regval);
605 }
606 }
607
608 /* enable/disable TX */
609 regval = rd32(E1000_TSYNCTXCTL);
610 regval &= ~E1000_TSYNCTXCTL_ENABLED;
611 regval |= tsync_tx_ctl;
612 wr32(E1000_TSYNCTXCTL, regval);
613
614 /* enable/disable RX */
615 regval = rd32(E1000_TSYNCRXCTL);
616 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
617 regval |= tsync_rx_ctl;
618 wr32(E1000_TSYNCRXCTL, regval);
619
620 /* define which PTP packets are time stamped */
621 wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
622
623 /* define ethertype filter for timestamped packets */
624 if (is_l2)
625 wr32(E1000_ETQF(3),
626 (E1000_ETQF_FILTER_ENABLE | /* enable filter */
627 E1000_ETQF_1588 | /* enable timestamping */
628 ETH_P_1588)); /* 1588 eth protocol type */
629 else
630 wr32(E1000_ETQF(3), 0);
631
632#define PTP_PORT 319
633 /* L4 Queue Filter[3]: filter by destination port and protocol */
634 if (is_l4) {
635 u32 ftqf = (IPPROTO_UDP /* UDP */
636 | E1000_FTQF_VF_BP /* VF not compared */
637 | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
638 | E1000_FTQF_MASK); /* mask all inputs */
639 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
640
641 wr32(E1000_IMIR(3), htons(PTP_PORT));
642 wr32(E1000_IMIREXT(3),
643 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
644 if (hw->mac.type == e1000_82576) {
645 /* enable source port check */
646 wr32(E1000_SPQF(3), htons(PTP_PORT));
647 ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
648 }
649 wr32(E1000_FTQF(3), ftqf);
650 } else {
651 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
652 }
653 wrfl();
654
655 /* clear TX/RX time stamp registers, just to be sure */
656 regval = rd32(E1000_TXSTMPL);
657 regval = rd32(E1000_TXSTMPH);
658 regval = rd32(E1000_RXSTMPL);
659 regval = rd32(E1000_RXSTMPH);
660
661 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
662 -EFAULT : 0;
258} 663}
259 664
260void igb_ptp_init(struct igb_adapter *adapter) 665void igb_ptp_init(struct igb_adapter *adapter)
261{ 666{
262 struct e1000_hw *hw = &adapter->hw; 667 struct e1000_hw *hw = &adapter->hw;
668 struct net_device *netdev = adapter->netdev;
263 669
264 switch (hw->mac.type) { 670 switch (hw->mac.type) {
265 case e1000_i210: 671 case e1000_82576:
266 case e1000_i211: 672 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
267 case e1000_i350: 673 adapter->ptp_caps.owner = THIS_MODULE;
674 adapter->ptp_caps.max_adj = 1000000000;
675 adapter->ptp_caps.n_ext_ts = 0;
676 adapter->ptp_caps.pps = 0;
677 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
678 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
679 adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
680 adapter->ptp_caps.settime = igb_ptp_settime_82576;
681 adapter->ptp_caps.enable = igb_ptp_enable;
682 adapter->cc.read = igb_ptp_read_82576;
683 adapter->cc.mask = CLOCKSOURCE_MASK(64);
684 adapter->cc.mult = 1;
685 adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
686 /* Dial the nominal frequency. */
687 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
688 break;
268 case e1000_82580: 689 case e1000_82580:
269 adapter->caps.owner = THIS_MODULE; 690 case e1000_i350:
270 strcpy(adapter->caps.name, "igb-82580"); 691 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
271 adapter->caps.max_adj = 62499999; 692 adapter->ptp_caps.owner = THIS_MODULE;
272 adapter->caps.n_ext_ts = 0; 693 adapter->ptp_caps.max_adj = 62499999;
273 adapter->caps.pps = 0; 694 adapter->ptp_caps.n_ext_ts = 0;
274 adapter->caps.adjfreq = ptp_82580_adjfreq; 695 adapter->ptp_caps.pps = 0;
275 adapter->caps.adjtime = igb_adjtime; 696 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
276 adapter->caps.gettime = igb_gettime; 697 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
277 adapter->caps.settime = igb_settime; 698 adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
278 adapter->caps.enable = ptp_82580_enable; 699 adapter->ptp_caps.settime = igb_ptp_settime_82576;
279 adapter->cc.read = igb_82580_systim_read; 700 adapter->ptp_caps.enable = igb_ptp_enable;
280 adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580); 701 adapter->cc.read = igb_ptp_read_82580;
281 adapter->cc.mult = 1; 702 adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580);
282 adapter->cc.shift = 0; 703 adapter->cc.mult = 1;
704 adapter->cc.shift = 0;
283 /* Enable the timer functions by clearing bit 31. */ 705 /* Enable the timer functions by clearing bit 31. */
284 wr32(E1000_TSAUXC, 0x0); 706 wr32(E1000_TSAUXC, 0x0);
285 break; 707 break;
286 708 case e1000_i210:
287 case e1000_82576: 709 case e1000_i211:
288 adapter->caps.owner = THIS_MODULE; 710 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
289 strcpy(adapter->caps.name, "igb-82576"); 711 adapter->ptp_caps.owner = THIS_MODULE;
290 adapter->caps.max_adj = 1000000000; 712 adapter->ptp_caps.max_adj = 62499999;
291 adapter->caps.n_ext_ts = 0; 713 adapter->ptp_caps.n_ext_ts = 0;
292 adapter->caps.pps = 0; 714 adapter->ptp_caps.pps = 0;
293 adapter->caps.adjfreq = ptp_82576_adjfreq; 715 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
294 adapter->caps.adjtime = igb_adjtime; 716 adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
295 adapter->caps.gettime = igb_gettime; 717 adapter->ptp_caps.gettime = igb_ptp_gettime_i210;
296 adapter->caps.settime = igb_settime; 718 adapter->ptp_caps.settime = igb_ptp_settime_i210;
297 adapter->caps.enable = ptp_82576_enable; 719 adapter->ptp_caps.enable = igb_ptp_enable;
298 adapter->cc.read = igb_82576_systim_read; 720 /* Enable the timer functions by clearing bit 31. */
299 adapter->cc.mask = CLOCKSOURCE_MASK(64); 721 wr32(E1000_TSAUXC, 0x0);
300 adapter->cc.mult = 1;
301 adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
302 /* Dial the nominal frequency. */
303 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
304 break; 722 break;
305
306 default: 723 default:
307 adapter->ptp_clock = NULL; 724 adapter->ptp_clock = NULL;
308 return; 725 return;
@@ -310,86 +727,114 @@ void igb_ptp_init(struct igb_adapter *adapter)
310 727
311 wrfl(); 728 wrfl();
312 729
313 timecounter_init(&adapter->tc, &adapter->cc, 730 spin_lock_init(&adapter->tmreg_lock);
314 ktime_to_ns(ktime_get_real())); 731 INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
732
733 /* Initialize the clock and overflow work for devices that need it. */
734 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
735 struct timespec ts = ktime_to_timespec(ktime_get_real());
315 736
316 INIT_DELAYED_WORK(&adapter->overflow_work, igb_overflow_check); 737 igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
738 } else {
739 timecounter_init(&adapter->tc, &adapter->cc,
740 ktime_to_ns(ktime_get_real()));
317 741
318 spin_lock_init(&adapter->tmreg_lock); 742 INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
743 igb_ptp_overflow_check);
319 744
320 schedule_delayed_work(&adapter->overflow_work, IGB_OVERFLOW_PERIOD); 745 schedule_delayed_work(&adapter->ptp_overflow_work,
746 IGB_SYSTIM_OVERFLOW_PERIOD);
747 }
748
749 /* Initialize the time sync interrupts for devices that support it. */
750 if (hw->mac.type >= e1000_82580) {
751 wr32(E1000_TSIM, E1000_TSIM_TXTS);
752 wr32(E1000_IMS, E1000_IMS_TS);
753 }
321 754
322 adapter->ptp_clock = ptp_clock_register(&adapter->caps); 755 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
756 &adapter->pdev->dev);
323 if (IS_ERR(adapter->ptp_clock)) { 757 if (IS_ERR(adapter->ptp_clock)) {
324 adapter->ptp_clock = NULL; 758 adapter->ptp_clock = NULL;
325 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n"); 759 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
326 } else 760 } else {
327 dev_info(&adapter->pdev->dev, "added PHC on %s\n", 761 dev_info(&adapter->pdev->dev, "added PHC on %s\n",
328 adapter->netdev->name); 762 adapter->netdev->name);
763 adapter->flags |= IGB_FLAG_PTP;
764 }
329} 765}
330 766
331void igb_ptp_remove(struct igb_adapter *adapter) 767/**
768 * igb_ptp_stop - Disable PTP device and stop the overflow check.
769 * @adapter: Board private structure.
770 *
771 * This function stops the PTP support and cancels the delayed work.
772 **/
773void igb_ptp_stop(struct igb_adapter *adapter)
332{ 774{
333 switch (adapter->hw.mac.type) { 775 switch (adapter->hw.mac.type) {
334 case e1000_i211:
335 case e1000_i210:
336 case e1000_i350:
337 case e1000_82580:
338 case e1000_82576: 776 case e1000_82576:
339 cancel_delayed_work_sync(&adapter->overflow_work); 777 case e1000_82580:
778 case e1000_i350:
779 cancel_delayed_work_sync(&adapter->ptp_overflow_work);
780 break;
781 case e1000_i210:
782 case e1000_i211:
783 /* No delayed work to cancel. */
340 break; 784 break;
341 default: 785 default:
342 return; 786 return;
343 } 787 }
344 788
789 cancel_work_sync(&adapter->ptp_tx_work);
790
345 if (adapter->ptp_clock) { 791 if (adapter->ptp_clock) {
346 ptp_clock_unregister(adapter->ptp_clock); 792 ptp_clock_unregister(adapter->ptp_clock);
347 dev_info(&adapter->pdev->dev, "removed PHC on %s\n", 793 dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
348 adapter->netdev->name); 794 adapter->netdev->name);
795 adapter->flags &= ~IGB_FLAG_PTP;
349 } 796 }
350} 797}
351 798
352/** 799/**
353 * igb_systim_to_hwtstamp - convert system time value to hw timestamp 800 * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
354 * @adapter: board private structure 801 * @adapter: Board private structure.
355 * @hwtstamps: timestamp structure to update
356 * @systim: unsigned 64bit system time value.
357 *
358 * We need to convert the system time value stored in the RX/TXSTMP registers
359 * into a hwtstamp which can be used by the upper level timestamping functions.
360 * 802 *
361 * The 'tmreg_lock' spinlock is used to protect the consistency of the 803 * This function handles the reset work required to re-enable the PTP device.
362 * system time value. This is needed because reading the 64 bit time
363 * value involves reading two (or three) 32 bit registers. The first
364 * read latches the value. Ditto for writing.
365 *
366 * In addition, here have extended the system time with an overflow
367 * counter in software.
368 **/ 804 **/
369void igb_systim_to_hwtstamp(struct igb_adapter *adapter, 805void igb_ptp_reset(struct igb_adapter *adapter)
370 struct skb_shared_hwtstamps *hwtstamps,
371 u64 systim)
372{ 806{
373 u64 ns; 807 struct e1000_hw *hw = &adapter->hw;
374 unsigned long flags; 808
809 if (!(adapter->flags & IGB_FLAG_PTP))
810 return;
375 811
376 switch (adapter->hw.mac.type) { 812 switch (adapter->hw.mac.type) {
813 case e1000_82576:
814 /* Dial the nominal frequency. */
815 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
816 break;
817 case e1000_82580:
818 case e1000_i350:
377 case e1000_i210: 819 case e1000_i210:
378 case e1000_i211: 820 case e1000_i211:
379 case e1000_i350: 821 /* Enable the timer functions and interrupts. */
380 case e1000_82580: 822 wr32(E1000_TSAUXC, 0x0);
381 case e1000_82576: 823 wr32(E1000_TSIM, E1000_TSIM_TXTS);
824 wr32(E1000_IMS, E1000_IMS_TS);
382 break; 825 break;
383 default: 826 default:
827 /* No work to do. */
384 return; 828 return;
385 } 829 }
386 830
387 spin_lock_irqsave(&adapter->tmreg_lock, flags); 831 /* Re-initialize the timer. */
832 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
833 struct timespec ts = ktime_to_timespec(ktime_get_real());
388 834
389 ns = timecounter_cyc2time(&adapter->tc, systim); 835 igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
390 836 } else {
391 spin_unlock_irqrestore(&adapter->tmreg_lock, flags); 837 timecounter_init(&adapter->tc, &adapter->cc,
392 838 ktime_to_ns(ktime_get_real()));
393 memset(hwtstamps, 0, sizeof(*hwtstamps)); 839 }
394 hwtstamps->hwtstamp = ns_to_ktime(ns);
395} 840}
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 03:36:42 -0400