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path: root/drivers/net/ethernet/intel/igb/e1000_82575.c
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Diffstat (limited to 'drivers/net/ethernet/intel/igb/e1000_82575.c')
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_82575.c198
1 files changed, 109 insertions, 89 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c
index f21a91a299a2..79b58353d849 100644
--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
@@ -176,7 +176,7 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
176 176
177 /* Verify phy id and set remaining function pointers */ 177 /* Verify phy id and set remaining function pointers */
178 switch (phy->id) { 178 switch (phy->id) {
179 case M88E1545_E_PHY_ID: 179 case M88E1543_E_PHY_ID:
180 case I347AT4_E_PHY_ID: 180 case I347AT4_E_PHY_ID:
181 case M88E1112_E_PHY_ID: 181 case M88E1112_E_PHY_ID:
182 case M88E1111_I_PHY_ID: 182 case M88E1111_I_PHY_ID:
@@ -238,6 +238,7 @@ static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
238 238
239 size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >> 239 size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
240 E1000_EECD_SIZE_EX_SHIFT); 240 E1000_EECD_SIZE_EX_SHIFT);
241
241 /* Added to a constant, "size" becomes the left-shift value 242 /* Added to a constant, "size" becomes the left-shift value
242 * for setting word_size. 243 * for setting word_size.
243 */ 244 */
@@ -250,86 +251,52 @@ static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
250 size = 15; 251 size = 15;
251 252
252 nvm->word_size = 1 << size; 253 nvm->word_size = 1 << size;
253 if (hw->mac.type < e1000_i210) { 254 nvm->opcode_bits = 8;
254 nvm->opcode_bits = 8; 255 nvm->delay_usec = 1;
255 nvm->delay_usec = 1;
256
257 switch (nvm->override) {
258 case e1000_nvm_override_spi_large:
259 nvm->page_size = 32;
260 nvm->address_bits = 16;
261 break;
262 case e1000_nvm_override_spi_small:
263 nvm->page_size = 8;
264 nvm->address_bits = 8;
265 break;
266 default:
267 nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
268 nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
269 16 : 8;
270 break;
271 }
272 if (nvm->word_size == (1 << 15))
273 nvm->page_size = 128;
274 256
275 nvm->type = e1000_nvm_eeprom_spi; 257 switch (nvm->override) {
276 } else { 258 case e1000_nvm_override_spi_large:
277 nvm->type = e1000_nvm_flash_hw; 259 nvm->page_size = 32;
260 nvm->address_bits = 16;
261 break;
262 case e1000_nvm_override_spi_small:
263 nvm->page_size = 8;
264 nvm->address_bits = 8;
265 break;
266 default:
267 nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
268 nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
269 16 : 8;
270 break;
278 } 271 }
272 if (nvm->word_size == (1 << 15))
273 nvm->page_size = 128;
274
275 nvm->type = e1000_nvm_eeprom_spi;
279 276
280 /* NVM Function Pointers */ 277 /* NVM Function Pointers */
278 nvm->ops.acquire = igb_acquire_nvm_82575;
279 nvm->ops.release = igb_release_nvm_82575;
280 nvm->ops.write = igb_write_nvm_spi;
281 nvm->ops.validate = igb_validate_nvm_checksum;
282 nvm->ops.update = igb_update_nvm_checksum;
283 if (nvm->word_size < (1 << 15))
284 nvm->ops.read = igb_read_nvm_eerd;
285 else
286 nvm->ops.read = igb_read_nvm_spi;
287
288 /* override generic family function pointers for specific descendants */
281 switch (hw->mac.type) { 289 switch (hw->mac.type) {
282 case e1000_82580: 290 case e1000_82580:
283 nvm->ops.validate = igb_validate_nvm_checksum_82580; 291 nvm->ops.validate = igb_validate_nvm_checksum_82580;
284 nvm->ops.update = igb_update_nvm_checksum_82580; 292 nvm->ops.update = igb_update_nvm_checksum_82580;
285 nvm->ops.acquire = igb_acquire_nvm_82575;
286 nvm->ops.release = igb_release_nvm_82575;
287 if (nvm->word_size < (1 << 15))
288 nvm->ops.read = igb_read_nvm_eerd;
289 else
290 nvm->ops.read = igb_read_nvm_spi;
291 nvm->ops.write = igb_write_nvm_spi;
292 break; 293 break;
293 case e1000_i354: 294 case e1000_i354:
294 case e1000_i350: 295 case e1000_i350:
295 nvm->ops.validate = igb_validate_nvm_checksum_i350; 296 nvm->ops.validate = igb_validate_nvm_checksum_i350;
296 nvm->ops.update = igb_update_nvm_checksum_i350; 297 nvm->ops.update = igb_update_nvm_checksum_i350;
297 nvm->ops.acquire = igb_acquire_nvm_82575;
298 nvm->ops.release = igb_release_nvm_82575;
299 if (nvm->word_size < (1 << 15))
300 nvm->ops.read = igb_read_nvm_eerd;
301 else
302 nvm->ops.read = igb_read_nvm_spi;
303 nvm->ops.write = igb_write_nvm_spi;
304 break;
305 case e1000_i210:
306 nvm->ops.validate = igb_validate_nvm_checksum_i210;
307 nvm->ops.update = igb_update_nvm_checksum_i210;
308 nvm->ops.acquire = igb_acquire_nvm_i210;
309 nvm->ops.release = igb_release_nvm_i210;
310 nvm->ops.read = igb_read_nvm_srrd_i210;
311 nvm->ops.write = igb_write_nvm_srwr_i210;
312 nvm->ops.valid_led_default = igb_valid_led_default_i210;
313 break;
314 case e1000_i211:
315 nvm->ops.acquire = igb_acquire_nvm_i210;
316 nvm->ops.release = igb_release_nvm_i210;
317 nvm->ops.read = igb_read_nvm_i211;
318 nvm->ops.valid_led_default = igb_valid_led_default_i210;
319 nvm->ops.validate = NULL;
320 nvm->ops.update = NULL;
321 nvm->ops.write = NULL;
322 break; 298 break;
323 default: 299 default:
324 nvm->ops.validate = igb_validate_nvm_checksum;
325 nvm->ops.update = igb_update_nvm_checksum;
326 nvm->ops.acquire = igb_acquire_nvm_82575;
327 nvm->ops.release = igb_release_nvm_82575;
328 if (nvm->word_size < (1 << 15))
329 nvm->ops.read = igb_read_nvm_eerd;
330 else
331 nvm->ops.read = igb_read_nvm_spi;
332 nvm->ops.write = igb_write_nvm_spi;
333 break; 300 break;
334 } 301 }
335 302
@@ -516,6 +483,8 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
516 case E1000_DEV_ID_I210_FIBER: 483 case E1000_DEV_ID_I210_FIBER:
517 case E1000_DEV_ID_I210_SERDES: 484 case E1000_DEV_ID_I210_SERDES:
518 case E1000_DEV_ID_I210_SGMII: 485 case E1000_DEV_ID_I210_SGMII:
486 case E1000_DEV_ID_I210_COPPER_FLASHLESS:
487 case E1000_DEV_ID_I210_SERDES_FLASHLESS:
519 mac->type = e1000_i210; 488 mac->type = e1000_i210;
520 break; 489 break;
521 case E1000_DEV_ID_I211_COPPER: 490 case E1000_DEV_ID_I211_COPPER:
@@ -601,6 +570,15 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
601 570
602 /* NVM initialization */ 571 /* NVM initialization */
603 ret_val = igb_init_nvm_params_82575(hw); 572 ret_val = igb_init_nvm_params_82575(hw);
573 switch (hw->mac.type) {
574 case e1000_i210:
575 case e1000_i211:
576 ret_val = igb_init_nvm_params_i210(hw);
577 break;
578 default:
579 break;
580 }
581
604 if (ret_val) 582 if (ret_val)
605 goto out; 583 goto out;
606 584
@@ -1163,6 +1141,31 @@ static s32 igb_get_cfg_done_82575(struct e1000_hw *hw)
1163} 1141}
1164 1142
1165/** 1143/**
1144 * igb_get_link_up_info_82575 - Get link speed/duplex info
1145 * @hw: pointer to the HW structure
1146 * @speed: stores the current speed
1147 * @duplex: stores the current duplex
1148 *
1149 * This is a wrapper function, if using the serial gigabit media independent
1150 * interface, use PCS to retrieve the link speed and duplex information.
1151 * Otherwise, use the generic function to get the link speed and duplex info.
1152 **/
1153static s32 igb_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,
1154 u16 *duplex)
1155{
1156 s32 ret_val;
1157
1158 if (hw->phy.media_type != e1000_media_type_copper)
1159 ret_val = igb_get_pcs_speed_and_duplex_82575(hw, speed,
1160 duplex);
1161 else
1162 ret_val = igb_get_speed_and_duplex_copper(hw, speed,
1163 duplex);
1164
1165 return ret_val;
1166}
1167
1168/**
1166 * igb_check_for_link_82575 - Check for link 1169 * igb_check_for_link_82575 - Check for link
1167 * @hw: pointer to the HW structure 1170 * @hw: pointer to the HW structure
1168 * 1171 *
@@ -1239,7 +1242,7 @@ static s32 igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, u16 *speed,
1239 u16 *duplex) 1242 u16 *duplex)
1240{ 1243{
1241 struct e1000_mac_info *mac = &hw->mac; 1244 struct e1000_mac_info *mac = &hw->mac;
1242 u32 pcs; 1245 u32 pcs, status;
1243 1246
1244 /* Set up defaults for the return values of this function */ 1247 /* Set up defaults for the return values of this function */
1245 mac->serdes_has_link = false; 1248 mac->serdes_has_link = false;
@@ -1260,20 +1263,31 @@ static s32 igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, u16 *speed,
1260 mac->serdes_has_link = true; 1263 mac->serdes_has_link = true;
1261 1264
1262 /* Detect and store PCS speed */ 1265 /* Detect and store PCS speed */
1263 if (pcs & E1000_PCS_LSTS_SPEED_1000) { 1266 if (pcs & E1000_PCS_LSTS_SPEED_1000)
1264 *speed = SPEED_1000; 1267 *speed = SPEED_1000;
1265 } else if (pcs & E1000_PCS_LSTS_SPEED_100) { 1268 else if (pcs & E1000_PCS_LSTS_SPEED_100)
1266 *speed = SPEED_100; 1269 *speed = SPEED_100;
1267 } else { 1270 else
1268 *speed = SPEED_10; 1271 *speed = SPEED_10;
1269 }
1270 1272
1271 /* Detect and store PCS duplex */ 1273 /* Detect and store PCS duplex */
1272 if (pcs & E1000_PCS_LSTS_DUPLEX_FULL) { 1274 if (pcs & E1000_PCS_LSTS_DUPLEX_FULL)
1273 *duplex = FULL_DUPLEX; 1275 *duplex = FULL_DUPLEX;
1274 } else { 1276 else
1275 *duplex = HALF_DUPLEX; 1277 *duplex = HALF_DUPLEX;
1278
1279 /* Check if it is an I354 2.5Gb backplane connection. */
1280 if (mac->type == e1000_i354) {
1281 status = rd32(E1000_STATUS);
1282 if ((status & E1000_STATUS_2P5_SKU) &&
1283 !(status & E1000_STATUS_2P5_SKU_OVER)) {
1284 *speed = SPEED_2500;
1285 *duplex = FULL_DUPLEX;
1286 hw_dbg("2500 Mbs, ");
1287 hw_dbg("Full Duplex\n");
1288 }
1276 } 1289 }
1290
1277 } 1291 }
1278 1292
1279 return 0; 1293 return 0;
@@ -1320,7 +1334,7 @@ void igb_shutdown_serdes_link_82575(struct e1000_hw *hw)
1320 **/ 1334 **/
1321static s32 igb_reset_hw_82575(struct e1000_hw *hw) 1335static s32 igb_reset_hw_82575(struct e1000_hw *hw)
1322{ 1336{
1323 u32 ctrl, icr; 1337 u32 ctrl;
1324 s32 ret_val; 1338 s32 ret_val;
1325 1339
1326 /* Prevent the PCI-E bus from sticking if there is no TLP connection 1340 /* Prevent the PCI-E bus from sticking if there is no TLP connection
@@ -1365,7 +1379,7 @@ static s32 igb_reset_hw_82575(struct e1000_hw *hw)
1365 1379
1366 /* Clear any pending interrupt events. */ 1380 /* Clear any pending interrupt events. */
1367 wr32(E1000_IMC, 0xffffffff); 1381 wr32(E1000_IMC, 0xffffffff);
1368 icr = rd32(E1000_ICR); 1382 rd32(E1000_ICR);
1369 1383
1370 /* Install any alternate MAC address into RAR0 */ 1384 /* Install any alternate MAC address into RAR0 */
1371 ret_val = igb_check_alt_mac_addr(hw); 1385 ret_val = igb_check_alt_mac_addr(hw);
@@ -1443,11 +1457,18 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
1443 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); 1457 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1444 wr32(E1000_CTRL, ctrl); 1458 wr32(E1000_CTRL, ctrl);
1445 1459
1446 /* Clear Go Link Disconnect bit */ 1460 /* Clear Go Link Disconnect bit on supported devices */
1447 if (hw->mac.type >= e1000_82580) { 1461 switch (hw->mac.type) {
1462 case e1000_82580:
1463 case e1000_i350:
1464 case e1000_i210:
1465 case e1000_i211:
1448 phpm_reg = rd32(E1000_82580_PHY_POWER_MGMT); 1466 phpm_reg = rd32(E1000_82580_PHY_POWER_MGMT);
1449 phpm_reg &= ~E1000_82580_PM_GO_LINKD; 1467 phpm_reg &= ~E1000_82580_PM_GO_LINKD;
1450 wr32(E1000_82580_PHY_POWER_MGMT, phpm_reg); 1468 wr32(E1000_82580_PHY_POWER_MGMT, phpm_reg);
1469 break;
1470 default:
1471 break;
1451 } 1472 }
1452 1473
1453 ret_val = igb_setup_serdes_link_82575(hw); 1474 ret_val = igb_setup_serdes_link_82575(hw);
@@ -1470,7 +1491,7 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
1470 switch (hw->phy.id) { 1491 switch (hw->phy.id) {
1471 case I347AT4_E_PHY_ID: 1492 case I347AT4_E_PHY_ID:
1472 case M88E1112_E_PHY_ID: 1493 case M88E1112_E_PHY_ID:
1473 case M88E1545_E_PHY_ID: 1494 case M88E1543_E_PHY_ID:
1474 case I210_I_PHY_ID: 1495 case I210_I_PHY_ID:
1475 ret_val = igb_copper_link_setup_m88_gen2(hw); 1496 ret_val = igb_copper_link_setup_m88_gen2(hw);
1476 break; 1497 break;
@@ -2103,10 +2124,9 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)
2103 s32 ret_val = 0; 2124 s32 ret_val = 0;
2104 /* BH SW mailbox bit in SW_FW_SYNC */ 2125 /* BH SW mailbox bit in SW_FW_SYNC */
2105 u16 swmbsw_mask = E1000_SW_SYNCH_MB; 2126 u16 swmbsw_mask = E1000_SW_SYNCH_MB;
2106 u32 ctrl, icr; 2127 u32 ctrl;
2107 bool global_device_reset = hw->dev_spec._82575.global_device_reset; 2128 bool global_device_reset = hw->dev_spec._82575.global_device_reset;
2108 2129
2109
2110 hw->dev_spec._82575.global_device_reset = false; 2130 hw->dev_spec._82575.global_device_reset = false;
2111 2131
2112 /* due to hw errata, global device reset doesn't always 2132 /* due to hw errata, global device reset doesn't always
@@ -2165,7 +2185,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)
2165 2185
2166 /* Clear any pending interrupt events. */ 2186 /* Clear any pending interrupt events. */
2167 wr32(E1000_IMC, 0xffffffff); 2187 wr32(E1000_IMC, 0xffffffff);
2168 icr = rd32(E1000_ICR); 2188 rd32(E1000_ICR);
2169 2189
2170 ret_val = igb_reset_mdicnfg_82580(hw); 2190 ret_val = igb_reset_mdicnfg_82580(hw);
2171 if (ret_val) 2191 if (ret_val)
@@ -2500,28 +2520,28 @@ s32 igb_set_eee_i354(struct e1000_hw *hw)
2500 u16 phy_data; 2520 u16 phy_data;
2501 2521
2502 if ((hw->phy.media_type != e1000_media_type_copper) || 2522 if ((hw->phy.media_type != e1000_media_type_copper) ||
2503 (phy->id != M88E1545_E_PHY_ID)) 2523 (phy->id != M88E1543_E_PHY_ID))
2504 goto out; 2524 goto out;
2505 2525
2506 if (!hw->dev_spec._82575.eee_disable) { 2526 if (!hw->dev_spec._82575.eee_disable) {
2507 /* Switch to PHY page 18. */ 2527 /* Switch to PHY page 18. */
2508 ret_val = phy->ops.write_reg(hw, E1000_M88E1545_PAGE_ADDR, 18); 2528 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 18);
2509 if (ret_val) 2529 if (ret_val)
2510 goto out; 2530 goto out;
2511 2531
2512 ret_val = phy->ops.read_reg(hw, E1000_M88E1545_EEE_CTRL_1, 2532 ret_val = phy->ops.read_reg(hw, E1000_M88E1543_EEE_CTRL_1,
2513 &phy_data); 2533 &phy_data);
2514 if (ret_val) 2534 if (ret_val)
2515 goto out; 2535 goto out;
2516 2536
2517 phy_data |= E1000_M88E1545_EEE_CTRL_1_MS; 2537 phy_data |= E1000_M88E1543_EEE_CTRL_1_MS;
2518 ret_val = phy->ops.write_reg(hw, E1000_M88E1545_EEE_CTRL_1, 2538 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_EEE_CTRL_1,
2519 phy_data); 2539 phy_data);
2520 if (ret_val) 2540 if (ret_val)
2521 goto out; 2541 goto out;
2522 2542
2523 /* Return the PHY to page 0. */ 2543 /* Return the PHY to page 0. */
2524 ret_val = phy->ops.write_reg(hw, E1000_M88E1545_PAGE_ADDR, 0); 2544 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0);
2525 if (ret_val) 2545 if (ret_val)
2526 goto out; 2546 goto out;
2527 2547
@@ -2572,7 +2592,7 @@ s32 igb_get_eee_status_i354(struct e1000_hw *hw, bool *status)
2572 2592
2573 /* Check if EEE is supported on this device. */ 2593 /* Check if EEE is supported on this device. */
2574 if ((hw->phy.media_type != e1000_media_type_copper) || 2594 if ((hw->phy.media_type != e1000_media_type_copper) ||
2575 (phy->id != M88E1545_E_PHY_ID)) 2595 (phy->id != M88E1543_E_PHY_ID))
2576 goto out; 2596 goto out;
2577 2597
2578 ret_val = igb_read_xmdio_reg(hw, E1000_PCS_STATUS_ADDR_I354, 2598 ret_val = igb_read_xmdio_reg(hw, E1000_PCS_STATUS_ADDR_I354,
@@ -2728,7 +2748,7 @@ static struct e1000_mac_operations e1000_mac_ops_82575 = {
2728 .check_for_link = igb_check_for_link_82575, 2748 .check_for_link = igb_check_for_link_82575,
2729 .rar_set = igb_rar_set, 2749 .rar_set = igb_rar_set,
2730 .read_mac_addr = igb_read_mac_addr_82575, 2750 .read_mac_addr = igb_read_mac_addr_82575,
2731 .get_speed_and_duplex = igb_get_speed_and_duplex_copper, 2751 .get_speed_and_duplex = igb_get_link_up_info_82575,
2732#ifdef CONFIG_IGB_HWMON 2752#ifdef CONFIG_IGB_HWMON
2733 .get_thermal_sensor_data = igb_get_thermal_sensor_data_generic, 2753 .get_thermal_sensor_data = igb_get_thermal_sensor_data_generic,
2734 .init_thermal_sensor_thresh = igb_init_thermal_sensor_thresh_generic, 2754 .init_thermal_sensor_thresh = igb_init_thermal_sensor_thresh_generic,