aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/intel/i40e
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/ethernet/intel/i40e')
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e.h35
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_adminq.c60
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_adminq.h1
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h137
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_common.c141
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c6
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_debugfs.c21
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_diag.c50
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_ethtool.c311
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_hmc.c7
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_hmc.h7
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c12
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h1
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_main.c1124
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_prototype.h12
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_ptp.c37
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_register.h12
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_txrx.c131
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_txrx.h18
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_type.h53
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_virtchnl.h4
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c209
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h6
23 files changed, 1582 insertions, 813 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h
index beb7b4393a6c..65985846345d 100644
--- a/drivers/net/ethernet/intel/i40e/i40e.h
+++ b/drivers/net/ethernet/intel/i40e/i40e.h
@@ -72,6 +72,7 @@
72#define I40E_MIN_NUM_DESCRIPTORS 64 72#define I40E_MIN_NUM_DESCRIPTORS 64
73#define I40E_MIN_MSIX 2 73#define I40E_MIN_MSIX 2
74#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */ 74#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
75#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
75#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */ 76#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
76#define I40E_DEFAULT_QUEUES_PER_VF 4 77#define I40E_DEFAULT_QUEUES_PER_VF 4
77#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */ 78#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
@@ -97,10 +98,6 @@
97#define STRINGIFY(foo) #foo 98#define STRINGIFY(foo) #foo
98#define XSTRINGIFY(bar) STRINGIFY(bar) 99#define XSTRINGIFY(bar) STRINGIFY(bar)
99 100
100#ifndef ARCH_HAS_PREFETCH
101#define prefetch(X)
102#endif
103
104#define I40E_RX_DESC(R, i) \ 101#define I40E_RX_DESC(R, i) \
105 ((ring_is_16byte_desc_enabled(R)) \ 102 ((ring_is_16byte_desc_enabled(R)) \
106 ? (union i40e_32byte_rx_desc *) \ 103 ? (union i40e_32byte_rx_desc *) \
@@ -157,11 +154,23 @@ struct i40e_lump_tracking {
157#define I40E_FDIR_BUFFER_FULL_MARGIN 10 154#define I40E_FDIR_BUFFER_FULL_MARGIN 10
158#define I40E_FDIR_BUFFER_HEAD_ROOM 200 155#define I40E_FDIR_BUFFER_HEAD_ROOM 200
159 156
157enum i40e_fd_stat_idx {
158 I40E_FD_STAT_ATR,
159 I40E_FD_STAT_SB,
160 I40E_FD_STAT_PF_COUNT
161};
162#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
163#define I40E_FD_ATR_STAT_IDX(pf_id) \
164 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
165#define I40E_FD_SB_STAT_IDX(pf_id) \
166 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
167
160struct i40e_fdir_filter { 168struct i40e_fdir_filter {
161 struct hlist_node fdir_node; 169 struct hlist_node fdir_node;
162 /* filter ipnut set */ 170 /* filter ipnut set */
163 u8 flow_type; 171 u8 flow_type;
164 u8 ip4_proto; 172 u8 ip4_proto;
173 /* TX packet view of src and dst */
165 __be32 dst_ip[4]; 174 __be32 dst_ip[4];
166 __be32 src_ip[4]; 175 __be32 src_ip[4];
167 __be16 src_port; 176 __be16 src_port;
@@ -205,7 +214,6 @@ struct i40e_pf {
205 unsigned long state; 214 unsigned long state;
206 unsigned long link_check_timeout; 215 unsigned long link_check_timeout;
207 struct msix_entry *msix_entries; 216 struct msix_entry *msix_entries;
208 u16 num_msix_entries;
209 bool fc_autoneg_status; 217 bool fc_autoneg_status;
210 218
211 u16 eeprom_version; 219 u16 eeprom_version;
@@ -220,11 +228,14 @@ struct i40e_pf {
220 u16 rss_size; /* num queues in the RSS array */ 228 u16 rss_size; /* num queues in the RSS array */
221 u16 rss_size_max; /* HW defined max RSS queues */ 229 u16 rss_size_max; /* HW defined max RSS queues */
222 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */ 230 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
231 u16 num_alloc_vsi; /* num VSIs this driver supports */
223 u8 atr_sample_rate; 232 u8 atr_sample_rate;
224 bool wol_en; 233 bool wol_en;
225 234
226 struct hlist_head fdir_filter_list; 235 struct hlist_head fdir_filter_list;
227 u16 fdir_pf_active_filters; 236 u16 fdir_pf_active_filters;
237 u16 fd_sb_cnt_idx;
238 u16 fd_atr_cnt_idx;
228 239
229#ifdef CONFIG_I40E_VXLAN 240#ifdef CONFIG_I40E_VXLAN
230 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS]; 241 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
@@ -266,6 +277,7 @@ struct i40e_pf {
266#ifdef CONFIG_I40E_VXLAN 277#ifdef CONFIG_I40E_VXLAN
267#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27) 278#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
268#endif 279#endif
280#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
269 281
270 /* tracks features that get auto disabled by errors */ 282 /* tracks features that get auto disabled by errors */
271 u64 auto_disable_flags; 283 u64 auto_disable_flags;
@@ -300,7 +312,6 @@ struct i40e_pf {
300 u16 pf_seid; 312 u16 pf_seid;
301 u16 main_vsi_seid; 313 u16 main_vsi_seid;
302 u16 mac_seid; 314 u16 mac_seid;
303 struct i40e_aqc_get_switch_config_data *sw_config;
304 struct kobject *switch_kobj; 315 struct kobject *switch_kobj;
305#ifdef CONFIG_DEBUG_FS 316#ifdef CONFIG_DEBUG_FS
306 struct dentry *i40e_dbg_pf; 317 struct dentry *i40e_dbg_pf;
@@ -329,9 +340,7 @@ struct i40e_pf {
329 struct ptp_clock *ptp_clock; 340 struct ptp_clock *ptp_clock;
330 struct ptp_clock_info ptp_caps; 341 struct ptp_clock_info ptp_caps;
331 struct sk_buff *ptp_tx_skb; 342 struct sk_buff *ptp_tx_skb;
332 struct work_struct ptp_tx_work;
333 struct hwtstamp_config tstamp_config; 343 struct hwtstamp_config tstamp_config;
334 unsigned long ptp_tx_start;
335 unsigned long last_rx_ptp_check; 344 unsigned long last_rx_ptp_check;
336 spinlock_t tmreg_lock; /* Used to protect the device time registers. */ 345 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
337 u64 ptp_base_adj; 346 u64 ptp_base_adj;
@@ -420,6 +429,7 @@ struct i40e_vsi {
420 struct i40e_q_vector **q_vectors; 429 struct i40e_q_vector **q_vectors;
421 int num_q_vectors; 430 int num_q_vectors;
422 int base_vector; 431 int base_vector;
432 bool irqs_ready;
423 433
424 u16 seid; /* HW index of this VSI (absolute index) */ 434 u16 seid; /* HW index of this VSI (absolute index) */
425 u16 id; /* VSI number */ 435 u16 id; /* VSI number */
@@ -540,6 +550,15 @@ static inline bool i40e_rx_is_programming_status(u64 qw)
540 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT); 550 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
541} 551}
542 552
553/**
554 * i40e_get_fd_cnt_all - get the total FD filter space available
555 * @pf: pointer to the pf struct
556 **/
557static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
558{
559 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
560}
561
543/* needed by i40e_ethtool.c */ 562/* needed by i40e_ethtool.c */
544int i40e_up(struct i40e_vsi *vsi); 563int i40e_up(struct i40e_vsi *vsi);
545void i40e_down(struct i40e_vsi *vsi); 564void i40e_down(struct i40e_vsi *vsi);
diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
index ed3902bf249b..7a027499fc57 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
@@ -33,6 +33,16 @@
33static void i40e_resume_aq(struct i40e_hw *hw); 33static void i40e_resume_aq(struct i40e_hw *hw);
34 34
35/** 35/**
36 * i40e_is_nvm_update_op - return true if this is an NVM update operation
37 * @desc: API request descriptor
38 **/
39static inline bool i40e_is_nvm_update_op(struct i40e_aq_desc *desc)
40{
41 return (desc->opcode == i40e_aqc_opc_nvm_erase) ||
42 (desc->opcode == i40e_aqc_opc_nvm_update);
43}
44
45/**
36 * i40e_adminq_init_regs - Initialize AdminQ registers 46 * i40e_adminq_init_regs - Initialize AdminQ registers
37 * @hw: pointer to the hardware structure 47 * @hw: pointer to the hardware structure
38 * 48 *
@@ -281,8 +291,11 @@ static void i40e_free_asq_bufs(struct i40e_hw *hw)
281 * 291 *
282 * Configure base address and length registers for the transmit queue 292 * Configure base address and length registers for the transmit queue
283 **/ 293 **/
284static void i40e_config_asq_regs(struct i40e_hw *hw) 294static i40e_status i40e_config_asq_regs(struct i40e_hw *hw)
285{ 295{
296 i40e_status ret_code = 0;
297 u32 reg = 0;
298
286 if (hw->mac.type == I40E_MAC_VF) { 299 if (hw->mac.type == I40E_MAC_VF) {
287 /* configure the transmit queue */ 300 /* configure the transmit queue */
288 wr32(hw, I40E_VF_ATQBAH1, 301 wr32(hw, I40E_VF_ATQBAH1,
@@ -291,6 +304,7 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
291 lower_32_bits(hw->aq.asq.desc_buf.pa)); 304 lower_32_bits(hw->aq.asq.desc_buf.pa));
292 wr32(hw, I40E_VF_ATQLEN1, (hw->aq.num_asq_entries | 305 wr32(hw, I40E_VF_ATQLEN1, (hw->aq.num_asq_entries |
293 I40E_VF_ATQLEN1_ATQENABLE_MASK)); 306 I40E_VF_ATQLEN1_ATQENABLE_MASK));
307 reg = rd32(hw, I40E_VF_ATQBAL1);
294 } else { 308 } else {
295 /* configure the transmit queue */ 309 /* configure the transmit queue */
296 wr32(hw, I40E_PF_ATQBAH, 310 wr32(hw, I40E_PF_ATQBAH,
@@ -299,7 +313,14 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
299 lower_32_bits(hw->aq.asq.desc_buf.pa)); 313 lower_32_bits(hw->aq.asq.desc_buf.pa));
300 wr32(hw, I40E_PF_ATQLEN, (hw->aq.num_asq_entries | 314 wr32(hw, I40E_PF_ATQLEN, (hw->aq.num_asq_entries |
301 I40E_PF_ATQLEN_ATQENABLE_MASK)); 315 I40E_PF_ATQLEN_ATQENABLE_MASK));
316 reg = rd32(hw, I40E_PF_ATQBAL);
302 } 317 }
318
319 /* Check one register to verify that config was applied */
320 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa))
321 ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
322
323 return ret_code;
303} 324}
304 325
305/** 326/**
@@ -308,8 +329,11 @@ static void i40e_config_asq_regs(struct i40e_hw *hw)
308 * 329 *
309 * Configure base address and length registers for the receive (event queue) 330 * Configure base address and length registers for the receive (event queue)
310 **/ 331 **/
311static void i40e_config_arq_regs(struct i40e_hw *hw) 332static i40e_status i40e_config_arq_regs(struct i40e_hw *hw)
312{ 333{
334 i40e_status ret_code = 0;
335 u32 reg = 0;
336
313 if (hw->mac.type == I40E_MAC_VF) { 337 if (hw->mac.type == I40E_MAC_VF) {
314 /* configure the receive queue */ 338 /* configure the receive queue */
315 wr32(hw, I40E_VF_ARQBAH1, 339 wr32(hw, I40E_VF_ARQBAH1,
@@ -318,6 +342,7 @@ static void i40e_config_arq_regs(struct i40e_hw *hw)
318 lower_32_bits(hw->aq.arq.desc_buf.pa)); 342 lower_32_bits(hw->aq.arq.desc_buf.pa));
319 wr32(hw, I40E_VF_ARQLEN1, (hw->aq.num_arq_entries | 343 wr32(hw, I40E_VF_ARQLEN1, (hw->aq.num_arq_entries |
320 I40E_VF_ARQLEN1_ARQENABLE_MASK)); 344 I40E_VF_ARQLEN1_ARQENABLE_MASK));
345 reg = rd32(hw, I40E_VF_ARQBAL1);
321 } else { 346 } else {
322 /* configure the receive queue */ 347 /* configure the receive queue */
323 wr32(hw, I40E_PF_ARQBAH, 348 wr32(hw, I40E_PF_ARQBAH,
@@ -326,10 +351,17 @@ static void i40e_config_arq_regs(struct i40e_hw *hw)
326 lower_32_bits(hw->aq.arq.desc_buf.pa)); 351 lower_32_bits(hw->aq.arq.desc_buf.pa));
327 wr32(hw, I40E_PF_ARQLEN, (hw->aq.num_arq_entries | 352 wr32(hw, I40E_PF_ARQLEN, (hw->aq.num_arq_entries |
328 I40E_PF_ARQLEN_ARQENABLE_MASK)); 353 I40E_PF_ARQLEN_ARQENABLE_MASK));
354 reg = rd32(hw, I40E_PF_ARQBAL);
329 } 355 }
330 356
331 /* Update tail in the HW to post pre-allocated buffers */ 357 /* Update tail in the HW to post pre-allocated buffers */
332 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); 358 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);
359
360 /* Check one register to verify that config was applied */
361 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa))
362 ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
363
364 return ret_code;
333} 365}
334 366
335/** 367/**
@@ -377,7 +409,9 @@ static i40e_status i40e_init_asq(struct i40e_hw *hw)
377 goto init_adminq_free_rings; 409 goto init_adminq_free_rings;
378 410
379 /* initialize base registers */ 411 /* initialize base registers */
380 i40e_config_asq_regs(hw); 412 ret_code = i40e_config_asq_regs(hw);
413 if (ret_code)
414 goto init_adminq_free_rings;
381 415
382 /* success! */ 416 /* success! */
383 goto init_adminq_exit; 417 goto init_adminq_exit;
@@ -434,7 +468,9 @@ static i40e_status i40e_init_arq(struct i40e_hw *hw)
434 goto init_adminq_free_rings; 468 goto init_adminq_free_rings;
435 469
436 /* initialize base registers */ 470 /* initialize base registers */
437 i40e_config_arq_regs(hw); 471 ret_code = i40e_config_arq_regs(hw);
472 if (ret_code)
473 goto init_adminq_free_rings;
438 474
439 /* success! */ 475 /* success! */
440 goto init_adminq_exit; 476 goto init_adminq_exit;
@@ -577,14 +613,14 @@ i40e_status i40e_init_adminq(struct i40e_hw *hw)
577 i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi); 613 i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi);
578 hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo; 614 hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo;
579 615
580 if (hw->aq.api_maj_ver != I40E_FW_API_VERSION_MAJOR || 616 if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {
581 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) {
582 ret_code = I40E_ERR_FIRMWARE_API_VERSION; 617 ret_code = I40E_ERR_FIRMWARE_API_VERSION;
583 goto init_adminq_free_arq; 618 goto init_adminq_free_arq;
584 } 619 }
585 620
586 /* pre-emptive resource lock release */ 621 /* pre-emptive resource lock release */
587 i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); 622 i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL);
623 hw->aq.nvm_busy = false;
588 624
589 ret_code = i40e_aq_set_hmc_resource_profile(hw, 625 ret_code = i40e_aq_set_hmc_resource_profile(hw,
590 I40E_HMC_PROFILE_DEFAULT, 626 I40E_HMC_PROFILE_DEFAULT,
@@ -708,6 +744,12 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw,
708 goto asq_send_command_exit; 744 goto asq_send_command_exit;
709 } 745 }
710 746
747 if (i40e_is_nvm_update_op(desc) && hw->aq.nvm_busy) {
748 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, "AQTX: NVM busy.\n");
749 status = I40E_ERR_NVM;
750 goto asq_send_command_exit;
751 }
752
711 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); 753 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use);
712 if (cmd_details) { 754 if (cmd_details) {
713 *details = *cmd_details; 755 *details = *cmd_details;
@@ -835,6 +877,9 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw,
835 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; 877 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval;
836 } 878 }
837 879
880 if (i40e_is_nvm_update_op(desc))
881 hw->aq.nvm_busy = true;
882
838 /* update the error if time out occurred */ 883 /* update the error if time out occurred */
839 if ((!cmd_completed) && 884 if ((!cmd_completed) &&
840 (!details->async && !details->postpone)) { 885 (!details->async && !details->postpone)) {
@@ -929,6 +974,9 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw,
929 e->msg_size); 974 e->msg_size);
930 } 975 }
931 976
977 if (i40e_is_nvm_update_op(&e->desc))
978 hw->aq.nvm_busy = false;
979
932 /* Restore the original datalen and buffer address in the desc, 980 /* Restore the original datalen and buffer address in the desc,
933 * FW updates datalen to indicate the event message 981 * FW updates datalen to indicate the event message
934 * size 982 * size
diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.h b/drivers/net/ethernet/intel/i40e/i40e_adminq.h
index 993f7685a911..b1552fbc48a0 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.h
@@ -90,6 +90,7 @@ struct i40e_adminq_info {
90 u16 fw_min_ver; /* firmware minor version */ 90 u16 fw_min_ver; /* firmware minor version */
91 u16 api_maj_ver; /* api major version */ 91 u16 api_maj_ver; /* api major version */
92 u16 api_min_ver; /* api minor version */ 92 u16 api_min_ver; /* api minor version */
93 bool nvm_busy;
93 94
94 struct mutex asq_mutex; /* Send queue lock */ 95 struct mutex asq_mutex; /* Send queue lock */
95 struct mutex arq_mutex; /* Receive queue lock */ 96 struct mutex arq_mutex; /* Receive queue lock */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
index 7b6374a8f8da..15f289f2917f 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
@@ -34,7 +34,7 @@
34 */ 34 */
35 35
36#define I40E_FW_API_VERSION_MAJOR 0x0001 36#define I40E_FW_API_VERSION_MAJOR 0x0001
37#define I40E_FW_API_VERSION_MINOR 0x0001 37#define I40E_FW_API_VERSION_MINOR 0x0002
38 38
39struct i40e_aq_desc { 39struct i40e_aq_desc {
40 __le16 flags; 40 __le16 flags;
@@ -123,6 +123,7 @@ enum i40e_admin_queue_opc {
123 i40e_aqc_opc_get_version = 0x0001, 123 i40e_aqc_opc_get_version = 0x0001,
124 i40e_aqc_opc_driver_version = 0x0002, 124 i40e_aqc_opc_driver_version = 0x0002,
125 i40e_aqc_opc_queue_shutdown = 0x0003, 125 i40e_aqc_opc_queue_shutdown = 0x0003,
126 i40e_aqc_opc_set_pf_context = 0x0004,
126 127
127 /* resource ownership */ 128 /* resource ownership */
128 i40e_aqc_opc_request_resource = 0x0008, 129 i40e_aqc_opc_request_resource = 0x0008,
@@ -182,9 +183,6 @@ enum i40e_admin_queue_opc {
182 i40e_aqc_opc_add_mirror_rule = 0x0260, 183 i40e_aqc_opc_add_mirror_rule = 0x0260,
183 i40e_aqc_opc_delete_mirror_rule = 0x0261, 184 i40e_aqc_opc_delete_mirror_rule = 0x0261,
184 185
185 i40e_aqc_opc_set_storm_control_config = 0x0280,
186 i40e_aqc_opc_get_storm_control_config = 0x0281,
187
188 /* DCB commands */ 186 /* DCB commands */
189 i40e_aqc_opc_dcb_ignore_pfc = 0x0301, 187 i40e_aqc_opc_dcb_ignore_pfc = 0x0301,
190 i40e_aqc_opc_dcb_updated = 0x0302, 188 i40e_aqc_opc_dcb_updated = 0x0302,
@@ -207,6 +205,7 @@ enum i40e_admin_queue_opc {
207 i40e_aqc_opc_query_switching_comp_bw_config = 0x041A, 205 i40e_aqc_opc_query_switching_comp_bw_config = 0x041A,
208 i40e_aqc_opc_suspend_port_tx = 0x041B, 206 i40e_aqc_opc_suspend_port_tx = 0x041B,
209 i40e_aqc_opc_resume_port_tx = 0x041C, 207 i40e_aqc_opc_resume_port_tx = 0x041C,
208 i40e_aqc_opc_configure_partition_bw = 0x041D,
210 209
211 /* hmc */ 210 /* hmc */
212 i40e_aqc_opc_query_hmc_resource_profile = 0x0500, 211 i40e_aqc_opc_query_hmc_resource_profile = 0x0500,
@@ -224,13 +223,15 @@ enum i40e_admin_queue_opc {
224 i40e_aqc_opc_get_partner_advt = 0x0616, 223 i40e_aqc_opc_get_partner_advt = 0x0616,
225 i40e_aqc_opc_set_lb_modes = 0x0618, 224 i40e_aqc_opc_set_lb_modes = 0x0618,
226 i40e_aqc_opc_get_phy_wol_caps = 0x0621, 225 i40e_aqc_opc_get_phy_wol_caps = 0x0621,
227 i40e_aqc_opc_set_phy_reset = 0x0622, 226 i40e_aqc_opc_set_phy_debug = 0x0622,
228 i40e_aqc_opc_upload_ext_phy_fm = 0x0625, 227 i40e_aqc_opc_upload_ext_phy_fm = 0x0625,
229 228
230 /* NVM commands */ 229 /* NVM commands */
231 i40e_aqc_opc_nvm_read = 0x0701, 230 i40e_aqc_opc_nvm_read = 0x0701,
232 i40e_aqc_opc_nvm_erase = 0x0702, 231 i40e_aqc_opc_nvm_erase = 0x0702,
233 i40e_aqc_opc_nvm_update = 0x0703, 232 i40e_aqc_opc_nvm_update = 0x0703,
233 i40e_aqc_opc_nvm_config_read = 0x0704,
234 i40e_aqc_opc_nvm_config_write = 0x0705,
234 235
235 /* virtualization commands */ 236 /* virtualization commands */
236 i40e_aqc_opc_send_msg_to_pf = 0x0801, 237 i40e_aqc_opc_send_msg_to_pf = 0x0801,
@@ -272,8 +273,6 @@ enum i40e_admin_queue_opc {
272 i40e_aqc_opc_debug_set_mode = 0xFF01, 273 i40e_aqc_opc_debug_set_mode = 0xFF01,
273 i40e_aqc_opc_debug_read_reg = 0xFF03, 274 i40e_aqc_opc_debug_read_reg = 0xFF03,
274 i40e_aqc_opc_debug_write_reg = 0xFF04, 275 i40e_aqc_opc_debug_write_reg = 0xFF04,
275 i40e_aqc_opc_debug_read_reg_sg = 0xFF05,
276 i40e_aqc_opc_debug_write_reg_sg = 0xFF06,
277 i40e_aqc_opc_debug_modify_reg = 0xFF07, 276 i40e_aqc_opc_debug_modify_reg = 0xFF07,
278 i40e_aqc_opc_debug_dump_internals = 0xFF08, 277 i40e_aqc_opc_debug_dump_internals = 0xFF08,
279 i40e_aqc_opc_debug_modify_internals = 0xFF09, 278 i40e_aqc_opc_debug_modify_internals = 0xFF09,
@@ -341,6 +340,14 @@ struct i40e_aqc_queue_shutdown {
341 340
342I40E_CHECK_CMD_LENGTH(i40e_aqc_queue_shutdown); 341I40E_CHECK_CMD_LENGTH(i40e_aqc_queue_shutdown);
343 342
343/* Set PF context (0x0004, direct) */
344struct i40e_aqc_set_pf_context {
345 u8 pf_id;
346 u8 reserved[15];
347};
348
349I40E_CHECK_CMD_LENGTH(i40e_aqc_set_pf_context);
350
344/* Request resource ownership (direct 0x0008) 351/* Request resource ownership (direct 0x0008)
345 * Release resource ownership (direct 0x0009) 352 * Release resource ownership (direct 0x0009)
346 */ 353 */
@@ -1289,27 +1296,6 @@ struct i40e_aqc_add_delete_mirror_rule_completion {
1289 1296
1290I40E_CHECK_CMD_LENGTH(i40e_aqc_add_delete_mirror_rule_completion); 1297I40E_CHECK_CMD_LENGTH(i40e_aqc_add_delete_mirror_rule_completion);
1291 1298
1292/* Set Storm Control Configuration (direct 0x0280)
1293 * Get Storm Control Configuration (direct 0x0281)
1294 * the command and response use the same descriptor structure
1295 */
1296struct i40e_aqc_set_get_storm_control_config {
1297 __le32 broadcast_threshold;
1298 __le32 multicast_threshold;
1299 __le32 control_flags;
1300#define I40E_AQC_STORM_CONTROL_MDIPW 0x01
1301#define I40E_AQC_STORM_CONTROL_MDICW 0x02
1302#define I40E_AQC_STORM_CONTROL_BDIPW 0x04
1303#define I40E_AQC_STORM_CONTROL_BDICW 0x08
1304#define I40E_AQC_STORM_CONTROL_BIDU 0x10
1305#define I40E_AQC_STORM_CONTROL_INTERVAL_SHIFT 8
1306#define I40E_AQC_STORM_CONTROL_INTERVAL_MASK (0x3FF << \
1307 I40E_AQC_STORM_CONTROL_INTERVAL_SHIFT)
1308 u8 reserved[4];
1309};
1310
1311I40E_CHECK_CMD_LENGTH(i40e_aqc_set_get_storm_control_config);
1312
1313/* DCB 0x03xx*/ 1299/* DCB 0x03xx*/
1314 1300
1315/* PFC Ignore (direct 0x0301) 1301/* PFC Ignore (direct 0x0301)
@@ -1427,11 +1413,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_configure_switching_comp_bw_limit);
1427struct i40e_aqc_configure_switching_comp_ets_data { 1413struct i40e_aqc_configure_switching_comp_ets_data {
1428 u8 reserved[4]; 1414 u8 reserved[4];
1429 u8 tc_valid_bits; 1415 u8 tc_valid_bits;
1430 u8 reserved1; 1416 u8 seepage;
1417#define I40E_AQ_ETS_SEEPAGE_EN_MASK 0x1
1431 u8 tc_strict_priority_flags; 1418 u8 tc_strict_priority_flags;
1432 u8 reserved2[17]; 1419 u8 reserved1[17];
1433 u8 tc_bw_share_credits[8]; 1420 u8 tc_bw_share_credits[8];
1434 u8 reserved3[96]; 1421 u8 reserved2[96];
1435}; 1422};
1436 1423
1437/* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */ 1424/* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */
@@ -1499,6 +1486,15 @@ struct i40e_aqc_query_switching_comp_bw_config_resp {
1499 * (direct 0x041B and 0x041C) uses the generic SEID struct 1486 * (direct 0x041B and 0x041C) uses the generic SEID struct
1500 */ 1487 */
1501 1488
1489/* Configure partition BW
1490 * (indirect 0x041D)
1491 */
1492struct i40e_aqc_configure_partition_bw_data {
1493 __le16 pf_valid_bits;
1494 u8 min_bw[16]; /* guaranteed bandwidth */
1495 u8 max_bw[16]; /* bandwidth limit */
1496};
1497
1502/* Get and set the active HMC resource profile and status. 1498/* Get and set the active HMC resource profile and status.
1503 * (direct 0x0500) and (direct 0x0501) 1499 * (direct 0x0500) and (direct 0x0501)
1504 */ 1500 */
@@ -1539,6 +1535,8 @@ enum i40e_aq_phy_type {
1539 I40E_PHY_TYPE_XLPPI = 0x9, 1535 I40E_PHY_TYPE_XLPPI = 0x9,
1540 I40E_PHY_TYPE_40GBASE_CR4_CU = 0xA, 1536 I40E_PHY_TYPE_40GBASE_CR4_CU = 0xA,
1541 I40E_PHY_TYPE_10GBASE_CR1_CU = 0xB, 1537 I40E_PHY_TYPE_10GBASE_CR1_CU = 0xB,
1538 I40E_PHY_TYPE_10GBASE_AOC = 0xC,
1539 I40E_PHY_TYPE_40GBASE_AOC = 0xD,
1542 I40E_PHY_TYPE_100BASE_TX = 0x11, 1540 I40E_PHY_TYPE_100BASE_TX = 0x11,
1543 I40E_PHY_TYPE_1000BASE_T = 0x12, 1541 I40E_PHY_TYPE_1000BASE_T = 0x12,
1544 I40E_PHY_TYPE_10GBASE_T = 0x13, 1542 I40E_PHY_TYPE_10GBASE_T = 0x13,
@@ -1549,7 +1547,10 @@ enum i40e_aq_phy_type {
1549 I40E_PHY_TYPE_40GBASE_CR4 = 0x18, 1547 I40E_PHY_TYPE_40GBASE_CR4 = 0x18,
1550 I40E_PHY_TYPE_40GBASE_SR4 = 0x19, 1548 I40E_PHY_TYPE_40GBASE_SR4 = 0x19,
1551 I40E_PHY_TYPE_40GBASE_LR4 = 0x1A, 1549 I40E_PHY_TYPE_40GBASE_LR4 = 0x1A,
1552 I40E_PHY_TYPE_20GBASE_KR2 = 0x1B, 1550 I40E_PHY_TYPE_1000BASE_SX = 0x1B,
1551 I40E_PHY_TYPE_1000BASE_LX = 0x1C,
1552 I40E_PHY_TYPE_1000BASE_T_OPTICAL = 0x1D,
1553 I40E_PHY_TYPE_20GBASE_KR2 = 0x1E,
1553 I40E_PHY_TYPE_MAX 1554 I40E_PHY_TYPE_MAX
1554}; 1555};
1555 1556
@@ -1583,11 +1584,8 @@ struct i40e_aq_get_phy_abilities_resp {
1583#define I40E_AQ_PHY_FLAG_PAUSE_TX 0x01 1584#define I40E_AQ_PHY_FLAG_PAUSE_TX 0x01
1584#define I40E_AQ_PHY_FLAG_PAUSE_RX 0x02 1585#define I40E_AQ_PHY_FLAG_PAUSE_RX 0x02
1585#define I40E_AQ_PHY_FLAG_LOW_POWER 0x04 1586#define I40E_AQ_PHY_FLAG_LOW_POWER 0x04
1586#define I40E_AQ_PHY_FLAG_AN_SHIFT 3 1587#define I40E_AQ_PHY_LINK_ENABLED 0x08
1587#define I40E_AQ_PHY_FLAG_AN_MASK (0x3 << I40E_AQ_PHY_FLAG_AN_SHIFT) 1588#define I40E_AQ_PHY_AN_ENABLED 0x10
1588#define I40E_AQ_PHY_FLAG_AN_OFF 0x00 /* link forced on */
1589#define I40E_AQ_PHY_FLAG_AN_OFF_LINK_DOWN 0x01
1590#define I40E_AQ_PHY_FLAG_AN_ON 0x02
1591#define I40E_AQ_PHY_FLAG_MODULE_QUAL 0x20 1589#define I40E_AQ_PHY_FLAG_MODULE_QUAL 0x20
1592 __le16 eee_capability; 1590 __le16 eee_capability;
1593#define I40E_AQ_EEE_100BASE_TX 0x0002 1591#define I40E_AQ_EEE_100BASE_TX 0x0002
@@ -1696,6 +1694,7 @@ struct i40e_aqc_get_link_status {
1696#define I40E_AQ_LINK_TX_ACTIVE 0x00 1694#define I40E_AQ_LINK_TX_ACTIVE 0x00
1697#define I40E_AQ_LINK_TX_DRAINED 0x01 1695#define I40E_AQ_LINK_TX_DRAINED 0x01
1698#define I40E_AQ_LINK_TX_FLUSHED 0x03 1696#define I40E_AQ_LINK_TX_FLUSHED 0x03
1697#define I40E_AQ_LINK_FORCED_40G 0x10
1699 u8 loopback; /* use defines from i40e_aqc_set_lb_mode */ 1698 u8 loopback; /* use defines from i40e_aqc_set_lb_mode */
1700 __le16 max_frame_size; 1699 __le16 max_frame_size;
1701 u8 config; 1700 u8 config;
@@ -1747,14 +1746,21 @@ struct i40e_aqc_set_lb_mode {
1747 1746
1748I40E_CHECK_CMD_LENGTH(i40e_aqc_set_lb_mode); 1747I40E_CHECK_CMD_LENGTH(i40e_aqc_set_lb_mode);
1749 1748
1750/* Set PHY Reset command (0x0622) */ 1749/* Set PHY Debug command (0x0622) */
1751struct i40e_aqc_set_phy_reset { 1750struct i40e_aqc_set_phy_debug {
1752 u8 reset_flags; 1751 u8 command_flags;
1753#define I40E_AQ_PHY_RESET_REQUEST 0x02 1752#define I40E_AQ_PHY_DEBUG_RESET_INTERNAL 0x02
1753#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SHIFT 2
1754#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_MASK (0x03 << \
1755 I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SHIFT)
1756#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_NONE 0x00
1757#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_HARD 0x01
1758#define I40E_AQ_PHY_DEBUG_RESET_EXTERNAL_SOFT 0x02
1759#define I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW 0x10
1754 u8 reserved[15]; 1760 u8 reserved[15];
1755}; 1761};
1756 1762
1757I40E_CHECK_CMD_LENGTH(i40e_aqc_set_phy_reset); 1763I40E_CHECK_CMD_LENGTH(i40e_aqc_set_phy_debug);
1758 1764
1759enum i40e_aq_phy_reg_type { 1765enum i40e_aq_phy_reg_type {
1760 I40E_AQC_PHY_REG_INTERNAL = 0x1, 1766 I40E_AQC_PHY_REG_INTERNAL = 0x1,
@@ -1779,6 +1785,47 @@ struct i40e_aqc_nvm_update {
1779 1785
1780I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_update); 1786I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_update);
1781 1787
1788/* NVM Config Read (indirect 0x0704) */
1789struct i40e_aqc_nvm_config_read {
1790 __le16 cmd_flags;
1791#define ANVM_SINGLE_OR_MULTIPLE_FEATURES_MASK 1
1792#define ANVM_READ_SINGLE_FEATURE 0
1793#define ANVM_READ_MULTIPLE_FEATURES 1
1794 __le16 element_count;
1795 __le16 element_id; /* Feature/field ID */
1796 u8 reserved[2];
1797 __le32 address_high;
1798 __le32 address_low;
1799};
1800
1801I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_read);
1802
1803/* NVM Config Write (indirect 0x0705) */
1804struct i40e_aqc_nvm_config_write {
1805 __le16 cmd_flags;
1806 __le16 element_count;
1807 u8 reserved[4];
1808 __le32 address_high;
1809 __le32 address_low;
1810};
1811
1812I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_write);
1813
1814struct i40e_aqc_nvm_config_data_feature {
1815 __le16 feature_id;
1816 __le16 instance_id;
1817 __le16 feature_options;
1818 __le16 feature_selection;
1819};
1820
1821struct i40e_aqc_nvm_config_data_immediate_field {
1822#define ANVM_FEATURE_OR_IMMEDIATE_MASK 0x2
1823 __le16 field_id;
1824 __le16 instance_id;
1825 __le16 field_options;
1826 __le16 field_value;
1827};
1828
1782/* Send to PF command (indirect 0x0801) id is only used by PF 1829/* Send to PF command (indirect 0x0801) id is only used by PF
1783 * Send to VF command (indirect 0x0802) id is only used by PF 1830 * Send to VF command (indirect 0x0802) id is only used by PF
1784 * Send to Peer PF command (indirect 0x0803) 1831 * Send to Peer PF command (indirect 0x0803)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
index 922cdcc45c54..6e65f19dd6e5 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_common.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
@@ -43,12 +43,10 @@ static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
43 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) { 43 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
44 switch (hw->device_id) { 44 switch (hw->device_id) {
45 case I40E_DEV_ID_SFP_XL710: 45 case I40E_DEV_ID_SFP_XL710:
46 case I40E_DEV_ID_SFP_X710:
47 case I40E_DEV_ID_QEMU: 46 case I40E_DEV_ID_QEMU:
48 case I40E_DEV_ID_KX_A: 47 case I40E_DEV_ID_KX_A:
49 case I40E_DEV_ID_KX_B: 48 case I40E_DEV_ID_KX_B:
50 case I40E_DEV_ID_KX_C: 49 case I40E_DEV_ID_KX_C:
51 case I40E_DEV_ID_KX_D:
52 case I40E_DEV_ID_QSFP_A: 50 case I40E_DEV_ID_QSFP_A:
53 case I40E_DEV_ID_QSFP_B: 51 case I40E_DEV_ID_QSFP_B:
54 case I40E_DEV_ID_QSFP_C: 52 case I40E_DEV_ID_QSFP_C:
@@ -133,7 +131,11 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
133 **/ 131 **/
134bool i40e_check_asq_alive(struct i40e_hw *hw) 132bool i40e_check_asq_alive(struct i40e_hw *hw)
135{ 133{
136 return !!(rd32(hw, hw->aq.asq.len) & I40E_PF_ATQLEN_ATQENABLE_MASK); 134 if (hw->aq.asq.len)
135 return !!(rd32(hw, hw->aq.asq.len) &
136 I40E_PF_ATQLEN_ATQENABLE_MASK);
137 else
138 return false;
137} 139}
138 140
139/** 141/**
@@ -653,6 +655,36 @@ i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
653} 655}
654 656
655/** 657/**
658 * i40e_pre_tx_queue_cfg - pre tx queue configure
659 * @hw: pointer to the HW structure
660 * @queue: target pf queue index
661 * @enable: state change request
662 *
663 * Handles hw requirement to indicate intention to enable
664 * or disable target queue.
665 **/
666void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
667{
668 u32 abs_queue_idx = hw->func_caps.base_queue + queue;
669 u32 reg_block = 0;
670 u32 reg_val;
671
672 if (abs_queue_idx >= 128)
673 reg_block = abs_queue_idx / 128;
674
675 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
676 reg_val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;
677 reg_val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT);
678
679 if (enable)
680 reg_val |= I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK;
681 else
682 reg_val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK;
683
684 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val);
685}
686
687/**
656 * i40e_get_media_type - Gets media type 688 * i40e_get_media_type - Gets media type
657 * @hw: pointer to the hardware structure 689 * @hw: pointer to the hardware structure
658 **/ 690 **/
@@ -699,7 +731,7 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
699} 731}
700 732
701#define I40E_PF_RESET_WAIT_COUNT_A0 200 733#define I40E_PF_RESET_WAIT_COUNT_A0 200
702#define I40E_PF_RESET_WAIT_COUNT 10 734#define I40E_PF_RESET_WAIT_COUNT 100
703/** 735/**
704 * i40e_pf_reset - Reset the PF 736 * i40e_pf_reset - Reset the PF
705 * @hw: pointer to the hardware structure 737 * @hw: pointer to the hardware structure
@@ -789,6 +821,9 @@ void i40e_clear_pxe_mode(struct i40e_hw *hw)
789{ 821{
790 u32 reg; 822 u32 reg;
791 823
824 if (i40e_check_asq_alive(hw))
825 i40e_aq_clear_pxe_mode(hw, NULL);
826
792 /* Clear single descriptor fetch/write-back mode */ 827 /* Clear single descriptor fetch/write-back mode */
793 reg = rd32(hw, I40E_GLLAN_RCTL_0); 828 reg = rd32(hw, I40E_GLLAN_RCTL_0);
794 829
@@ -907,6 +942,33 @@ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
907/* Admin command wrappers */ 942/* Admin command wrappers */
908 943
909/** 944/**
945 * i40e_aq_clear_pxe_mode
946 * @hw: pointer to the hw struct
947 * @cmd_details: pointer to command details structure or NULL
948 *
949 * Tell the firmware that the driver is taking over from PXE
950 **/
951i40e_status i40e_aq_clear_pxe_mode(struct i40e_hw *hw,
952 struct i40e_asq_cmd_details *cmd_details)
953{
954 i40e_status status;
955 struct i40e_aq_desc desc;
956 struct i40e_aqc_clear_pxe *cmd =
957 (struct i40e_aqc_clear_pxe *)&desc.params.raw;
958
959 i40e_fill_default_direct_cmd_desc(&desc,
960 i40e_aqc_opc_clear_pxe_mode);
961
962 cmd->rx_cnt = 0x2;
963
964 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
965
966 wr32(hw, I40E_GLLAN_RCTL_0, 0x1);
967
968 return status;
969}
970
971/**
910 * i40e_aq_set_link_restart_an 972 * i40e_aq_set_link_restart_an
911 * @hw: pointer to the hw struct 973 * @hw: pointer to the hw struct
912 * @cmd_details: pointer to command details structure or NULL 974 * @cmd_details: pointer to command details structure or NULL
@@ -975,6 +1037,13 @@ i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
975 hw_link_info->an_info = resp->an_info; 1037 hw_link_info->an_info = resp->an_info;
976 hw_link_info->ext_info = resp->ext_info; 1038 hw_link_info->ext_info = resp->ext_info;
977 hw_link_info->loopback = resp->loopback; 1039 hw_link_info->loopback = resp->loopback;
1040 hw_link_info->max_frame_size = le16_to_cpu(resp->max_frame_size);
1041 hw_link_info->pacing = resp->config & I40E_AQ_CONFIG_PACING_MASK;
1042
1043 if (resp->config & I40E_AQ_CONFIG_CRC_ENA)
1044 hw_link_info->crc_enable = true;
1045 else
1046 hw_link_info->crc_enable = false;
978 1047
979 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE)) 1048 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
980 hw_link_info->lse_enable = true; 1049 hw_link_info->lse_enable = true;
@@ -1021,8 +1090,6 @@ i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
1021 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags); 1090 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
1022 1091
1023 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 1092 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1024 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
1025 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1026 1093
1027 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info, 1094 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
1028 sizeof(vsi_ctx->info), cmd_details); 1095 sizeof(vsi_ctx->info), cmd_details);
@@ -1163,8 +1230,6 @@ i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
1163 cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid); 1230 cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
1164 1231
1165 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF); 1232 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1166 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
1167 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1168 1233
1169 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info, 1234 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
1170 sizeof(vsi_ctx->info), NULL); 1235 sizeof(vsi_ctx->info), NULL);
@@ -1203,8 +1268,6 @@ i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
1203 cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid); 1268 cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
1204 1269
1205 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD)); 1270 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1206 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
1207 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1208 1271
1209 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info, 1272 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
1210 sizeof(vsi_ctx->info), cmd_details); 1273 sizeof(vsi_ctx->info), cmd_details);
@@ -1300,6 +1363,7 @@ i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
1300 struct i40e_aqc_driver_version *cmd = 1363 struct i40e_aqc_driver_version *cmd =
1301 (struct i40e_aqc_driver_version *)&desc.params.raw; 1364 (struct i40e_aqc_driver_version *)&desc.params.raw;
1302 i40e_status status; 1365 i40e_status status;
1366 u16 len;
1303 1367
1304 if (dv == NULL) 1368 if (dv == NULL)
1305 return I40E_ERR_PARAM; 1369 return I40E_ERR_PARAM;
@@ -1311,7 +1375,14 @@ i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
1311 cmd->driver_minor_ver = dv->minor_version; 1375 cmd->driver_minor_ver = dv->minor_version;
1312 cmd->driver_build_ver = dv->build_version; 1376 cmd->driver_build_ver = dv->build_version;
1313 cmd->driver_subbuild_ver = dv->subbuild_version; 1377 cmd->driver_subbuild_ver = dv->subbuild_version;
1314 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 1378
1379 len = 0;
1380 while (len < sizeof(dv->driver_string) &&
1381 (dv->driver_string[len] < 0x80) &&
1382 dv->driver_string[len])
1383 len++;
1384 status = i40e_asq_send_command(hw, &desc, dv->driver_string,
1385 len, cmd_details);
1315 1386
1316 return status; 1387 return status;
1317} 1388}
@@ -1900,6 +1971,12 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1900 } 1971 }
1901 } 1972 }
1902 1973
1974 /* Software override ensuring FCoE is disabled if npar or mfp
1975 * mode because it is not supported in these modes.
1976 */
1977 if (p->npar_enable || p->mfp_mode_1)
1978 p->fcoe = false;
1979
1903 /* additional HW specific goodies that might 1980 /* additional HW specific goodies that might
1904 * someday be HW version specific 1981 * someday be HW version specific
1905 */ 1982 */
@@ -2094,8 +2171,8 @@ i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
2094 * @cmd_details: pointer to command details structure or NULL 2171 * @cmd_details: pointer to command details structure or NULL
2095 **/ 2172 **/
2096i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw, 2173i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
2097 u16 udp_port, u8 header_len, 2174 u16 udp_port, u8 protocol_index,
2098 u8 protocol_index, u8 *filter_index, 2175 u8 *filter_index,
2099 struct i40e_asq_cmd_details *cmd_details) 2176 struct i40e_asq_cmd_details *cmd_details)
2100{ 2177{
2101 struct i40e_aq_desc desc; 2178 struct i40e_aq_desc desc;
@@ -2253,6 +2330,35 @@ static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
2253} 2330}
2254 2331
2255/** 2332/**
2333 * i40e_aq_config_vsi_bw_limit - Configure VSI BW Limit
2334 * @hw: pointer to the hw struct
2335 * @seid: VSI seid
2336 * @credit: BW limit credits (0 = disabled)
2337 * @max_credit: Max BW limit credits
2338 * @cmd_details: pointer to command details structure or NULL
2339 **/
2340i40e_status i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw,
2341 u16 seid, u16 credit, u8 max_credit,
2342 struct i40e_asq_cmd_details *cmd_details)
2343{
2344 struct i40e_aq_desc desc;
2345 struct i40e_aqc_configure_vsi_bw_limit *cmd =
2346 (struct i40e_aqc_configure_vsi_bw_limit *)&desc.params.raw;
2347 i40e_status status;
2348
2349 i40e_fill_default_direct_cmd_desc(&desc,
2350 i40e_aqc_opc_configure_vsi_bw_limit);
2351
2352 cmd->vsi_seid = cpu_to_le16(seid);
2353 cmd->credit = cpu_to_le16(credit);
2354 cmd->max_credit = max_credit;
2355
2356 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
2357
2358 return status;
2359}
2360
2361/**
2256 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC 2362 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
2257 * @hw: pointer to the hw struct 2363 * @hw: pointer to the hw struct
2258 * @seid: VSI seid 2364 * @seid: VSI seid
@@ -2405,7 +2511,7 @@ static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
2405{ 2511{
2406 u32 fcoe_cntx_size, fcoe_filt_size; 2512 u32 fcoe_cntx_size, fcoe_filt_size;
2407 u32 pe_cntx_size, pe_filt_size; 2513 u32 pe_cntx_size, pe_filt_size;
2408 u32 fcoe_fmax, pe_fmax; 2514 u32 fcoe_fmax;
2409 u32 val; 2515 u32 val;
2410 2516
2411 /* Validate FCoE settings passed */ 2517 /* Validate FCoE settings passed */
@@ -2480,13 +2586,6 @@ static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
2480 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax) 2586 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
2481 return I40E_ERR_INVALID_SIZE; 2587 return I40E_ERR_INVALID_SIZE;
2482 2588
2483 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2484 val = rd32(hw, I40E_GLHMC_PEXFMAX);
2485 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2486 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2487 if (pe_filt_size + pe_cntx_size > pe_fmax)
2488 return I40E_ERR_INVALID_SIZE;
2489
2490 return 0; 2589 return 0;
2491} 2590}
2492 2591
diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c b/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
index 6e8103abfd0d..00bc0cdb3a03 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
@@ -232,7 +232,7 @@ static void i40e_dcbnl_del_app(struct i40e_pf *pf,
232 struct i40e_ieee_app_priority_table *app) 232 struct i40e_ieee_app_priority_table *app)
233{ 233{
234 int v, err; 234 int v, err;
235 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 235 for (v = 0; v < pf->num_alloc_vsi; v++) {
236 if (pf->vsi[v] && pf->vsi[v]->netdev) { 236 if (pf->vsi[v] && pf->vsi[v]->netdev) {
237 err = i40e_dcbnl_vsi_del_app(pf->vsi[v], app); 237 err = i40e_dcbnl_vsi_del_app(pf->vsi[v], app);
238 if (err) 238 if (err)
@@ -302,8 +302,8 @@ void i40e_dcbnl_setup(struct i40e_vsi *vsi)
302 struct net_device *dev = vsi->netdev; 302 struct net_device *dev = vsi->netdev;
303 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 303 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
304 304
305 /* DCB not enabled */ 305 /* Not DCB capable */
306 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 306 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
307 return; 307 return;
308 308
309 /* Do not setup DCB NL ops for MFP mode */ 309 /* Do not setup DCB NL ops for MFP mode */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_debugfs.c b/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
index 3c37386fd138..cffdfc21290f 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
@@ -45,7 +45,7 @@ static struct i40e_vsi *i40e_dbg_find_vsi(struct i40e_pf *pf, int seid)
45 if (seid < 0) 45 if (seid < 0)
46 dev_info(&pf->pdev->dev, "%d: bad seid\n", seid); 46 dev_info(&pf->pdev->dev, "%d: bad seid\n", seid);
47 else 47 else
48 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) 48 for (i = 0; i < pf->num_alloc_vsi; i++)
49 if (pf->vsi[i] && (pf->vsi[i]->seid == seid)) 49 if (pf->vsi[i] && (pf->vsi[i]->seid == seid))
50 return pf->vsi[i]; 50 return pf->vsi[i];
51 51
@@ -843,7 +843,7 @@ static void i40e_dbg_dump_vsi_no_seid(struct i40e_pf *pf)
843{ 843{
844 int i; 844 int i;
845 845
846 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) 846 for (i = 0; i < pf->num_alloc_vsi; i++)
847 if (pf->vsi[i]) 847 if (pf->vsi[i])
848 dev_info(&pf->pdev->dev, "dump vsi[%d]: %d\n", 848 dev_info(&pf->pdev->dev, "dump vsi[%d]: %d\n",
849 i, pf->vsi[i]->seid); 849 i, pf->vsi[i]->seid);
@@ -862,12 +862,11 @@ static void i40e_dbg_dump_eth_stats(struct i40e_pf *pf,
862 " rx_bytes = \t%lld \trx_unicast = \t\t%lld \trx_multicast = \t%lld\n", 862 " rx_bytes = \t%lld \trx_unicast = \t\t%lld \trx_multicast = \t%lld\n",
863 estats->rx_bytes, estats->rx_unicast, estats->rx_multicast); 863 estats->rx_bytes, estats->rx_unicast, estats->rx_multicast);
864 dev_info(&pf->pdev->dev, 864 dev_info(&pf->pdev->dev,
865 " rx_broadcast = \t%lld \trx_discards = \t\t%lld \trx_errors = \t%lld\n", 865 " rx_broadcast = \t%lld \trx_discards = \t\t%lld\n",
866 estats->rx_broadcast, estats->rx_discards, estats->rx_errors); 866 estats->rx_broadcast, estats->rx_discards);
867 dev_info(&pf->pdev->dev, 867 dev_info(&pf->pdev->dev,
868 " rx_missed = \t%lld \trx_unknown_protocol = \t%lld \ttx_bytes = \t%lld\n", 868 " rx_unknown_protocol = \t%lld \ttx_bytes = \t%lld\n",
869 estats->rx_missed, estats->rx_unknown_protocol, 869 estats->rx_unknown_protocol, estats->tx_bytes);
870 estats->tx_bytes);
871 dev_info(&pf->pdev->dev, 870 dev_info(&pf->pdev->dev,
872 " tx_unicast = \t%lld \ttx_multicast = \t\t%lld \ttx_broadcast = \t%lld\n", 871 " tx_unicast = \t%lld \ttx_multicast = \t\t%lld \ttx_broadcast = \t%lld\n",
873 estats->tx_unicast, estats->tx_multicast, estats->tx_broadcast); 872 estats->tx_unicast, estats->tx_multicast, estats->tx_broadcast);
@@ -1527,7 +1526,7 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
1527 cnt = sscanf(&cmd_buf[15], "%i", &vsi_seid); 1526 cnt = sscanf(&cmd_buf[15], "%i", &vsi_seid);
1528 if (cnt == 0) { 1527 if (cnt == 0) {
1529 int i; 1528 int i;
1530 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) 1529 for (i = 0; i < pf->num_alloc_vsi; i++)
1531 i40e_vsi_reset_stats(pf->vsi[i]); 1530 i40e_vsi_reset_stats(pf->vsi[i]);
1532 dev_info(&pf->pdev->dev, "vsi clear stats called for all vsi's\n"); 1531 dev_info(&pf->pdev->dev, "vsi clear stats called for all vsi's\n");
1533 } else if (cnt == 1) { 1532 } else if (cnt == 1) {
@@ -1744,10 +1743,6 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
1744 i40e_dbg_cmd_fd_ctrl(pf, I40E_FLAG_FD_ATR_ENABLED, false); 1743 i40e_dbg_cmd_fd_ctrl(pf, I40E_FLAG_FD_ATR_ENABLED, false);
1745 } else if (strncmp(cmd_buf, "fd-atr on", 9) == 0) { 1744 } else if (strncmp(cmd_buf, "fd-atr on", 9) == 0) {
1746 i40e_dbg_cmd_fd_ctrl(pf, I40E_FLAG_FD_ATR_ENABLED, true); 1745 i40e_dbg_cmd_fd_ctrl(pf, I40E_FLAG_FD_ATR_ENABLED, true);
1747 } else if (strncmp(cmd_buf, "fd-sb off", 9) == 0) {
1748 i40e_dbg_cmd_fd_ctrl(pf, I40E_FLAG_FD_SB_ENABLED, false);
1749 } else if (strncmp(cmd_buf, "fd-sb on", 8) == 0) {
1750 i40e_dbg_cmd_fd_ctrl(pf, I40E_FLAG_FD_SB_ENABLED, true);
1751 } else if (strncmp(cmd_buf, "lldp", 4) == 0) { 1746 } else if (strncmp(cmd_buf, "lldp", 4) == 0) {
1752 if (strncmp(&cmd_buf[5], "stop", 4) == 0) { 1747 if (strncmp(&cmd_buf[5], "stop", 4) == 0) {
1753 int ret; 1748 int ret;
@@ -1967,8 +1962,6 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
1967 dev_info(&pf->pdev->dev, " rem fd_filter <dest q_index> <flex_off> <pctype> <dest_vsi> <dest_ctl> <fd_status> <cnt_index> <fd_id> <packet_len> <packet>\n"); 1962 dev_info(&pf->pdev->dev, " rem fd_filter <dest q_index> <flex_off> <pctype> <dest_vsi> <dest_ctl> <fd_status> <cnt_index> <fd_id> <packet_len> <packet>\n");
1968 dev_info(&pf->pdev->dev, " fd-atr off\n"); 1963 dev_info(&pf->pdev->dev, " fd-atr off\n");
1969 dev_info(&pf->pdev->dev, " fd-atr on\n"); 1964 dev_info(&pf->pdev->dev, " fd-atr on\n");
1970 dev_info(&pf->pdev->dev, " fd-sb off\n");
1971 dev_info(&pf->pdev->dev, " fd-sb on\n");
1972 dev_info(&pf->pdev->dev, " lldp start\n"); 1965 dev_info(&pf->pdev->dev, " lldp start\n");
1973 dev_info(&pf->pdev->dev, " lldp stop\n"); 1966 dev_info(&pf->pdev->dev, " lldp stop\n");
1974 dev_info(&pf->pdev->dev, " lldp get local\n"); 1967 dev_info(&pf->pdev->dev, " lldp get local\n");
diff --git a/drivers/net/ethernet/intel/i40e/i40e_diag.c b/drivers/net/ethernet/intel/i40e/i40e_diag.c
index b2380daef8c1..56438bd579e6 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_diag.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_diag.c
@@ -67,17 +67,25 @@ static i40e_status i40e_diag_reg_pattern_test(struct i40e_hw *hw,
67 67
68struct i40e_diag_reg_test_info i40e_reg_list[] = { 68struct i40e_diag_reg_test_info i40e_reg_list[] = {
69 /* offset mask elements stride */ 69 /* offset mask elements stride */
70 {I40E_QTX_CTL(0), 0x0000FFBF, 4, I40E_QTX_CTL(1) - I40E_QTX_CTL(0)}, 70 {I40E_QTX_CTL(0), 0x0000FFBF, 1,
71 {I40E_PFINT_ITR0(0), 0x00000FFF, 3, I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)}, 71 I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
72 {I40E_PFINT_ITRN(0, 0), 0x00000FFF, 8, I40E_PFINT_ITRN(0, 1) - I40E_PFINT_ITRN(0, 0)}, 72 {I40E_PFINT_ITR0(0), 0x00000FFF, 3,
73 {I40E_PFINT_ITRN(1, 0), 0x00000FFF, 8, I40E_PFINT_ITRN(1, 1) - I40E_PFINT_ITRN(1, 0)}, 73 I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)},
74 {I40E_PFINT_ITRN(2, 0), 0x00000FFF, 8, I40E_PFINT_ITRN(2, 1) - I40E_PFINT_ITRN(2, 0)}, 74 {I40E_PFINT_ITRN(0, 0), 0x00000FFF, 1,
75 {I40E_PFINT_STAT_CTL0, 0x0000000C, 1, 0}, 75 I40E_PFINT_ITRN(0, 1) - I40E_PFINT_ITRN(0, 0)},
76 {I40E_PFINT_LNKLST0, 0x00001FFF, 1, 0}, 76 {I40E_PFINT_ITRN(1, 0), 0x00000FFF, 1,
77 {I40E_PFINT_LNKLSTN(0), 0x000007FF, 64, I40E_PFINT_LNKLSTN(1) - I40E_PFINT_LNKLSTN(0)}, 77 I40E_PFINT_ITRN(1, 1) - I40E_PFINT_ITRN(1, 0)},
78 {I40E_QINT_TQCTL(0), 0x000000FF, 64, I40E_QINT_TQCTL(1) - I40E_QINT_TQCTL(0)}, 78 {I40E_PFINT_ITRN(2, 0), 0x00000FFF, 1,
79 {I40E_QINT_RQCTL(0), 0x000000FF, 64, I40E_QINT_RQCTL(1) - I40E_QINT_RQCTL(0)}, 79 I40E_PFINT_ITRN(2, 1) - I40E_PFINT_ITRN(2, 0)},
80 {I40E_PFINT_ICR0_ENA, 0xF7F20000, 1, 0}, 80 {I40E_PFINT_STAT_CTL0, 0x0000000C, 1, 0},
81 {I40E_PFINT_LNKLST0, 0x00001FFF, 1, 0},
82 {I40E_PFINT_LNKLSTN(0), 0x000007FF, 1,
83 I40E_PFINT_LNKLSTN(1) - I40E_PFINT_LNKLSTN(0)},
84 {I40E_QINT_TQCTL(0), 0x000000FF, 1,
85 I40E_QINT_TQCTL(1) - I40E_QINT_TQCTL(0)},
86 {I40E_QINT_RQCTL(0), 0x000000FF, 1,
87 I40E_QINT_RQCTL(1) - I40E_QINT_RQCTL(0)},
88 {I40E_PFINT_ICR0_ENA, 0xF7F20000, 1, 0},
81 { 0 } 89 { 0 }
82}; 90};
83 91
@@ -93,9 +101,25 @@ i40e_status i40e_diag_reg_test(struct i40e_hw *hw)
93 u32 reg, mask; 101 u32 reg, mask;
94 u32 i, j; 102 u32 i, j;
95 103
96 for (i = 0; (i40e_reg_list[i].offset != 0) && !ret_code; i++) { 104 for (i = 0; i40e_reg_list[i].offset != 0 &&
105 !ret_code; i++) {
106
107 /* set actual reg range for dynamically allocated resources */
108 if (i40e_reg_list[i].offset == I40E_QTX_CTL(0) &&
109 hw->func_caps.num_tx_qp != 0)
110 i40e_reg_list[i].elements = hw->func_caps.num_tx_qp;
111 if ((i40e_reg_list[i].offset == I40E_PFINT_ITRN(0, 0) ||
112 i40e_reg_list[i].offset == I40E_PFINT_ITRN(1, 0) ||
113 i40e_reg_list[i].offset == I40E_PFINT_ITRN(2, 0) ||
114 i40e_reg_list[i].offset == I40E_QINT_TQCTL(0) ||
115 i40e_reg_list[i].offset == I40E_QINT_RQCTL(0)) &&
116 hw->func_caps.num_msix_vectors != 0)
117 i40e_reg_list[i].elements =
118 hw->func_caps.num_msix_vectors - 1;
119
120 /* test register access */
97 mask = i40e_reg_list[i].mask; 121 mask = i40e_reg_list[i].mask;
98 for (j = 0; (j < i40e_reg_list[i].elements) && !ret_code; j++) { 122 for (j = 0; j < i40e_reg_list[i].elements && !ret_code; j++) {
99 reg = i40e_reg_list[i].offset + 123 reg = i40e_reg_list[i].offset +
100 (j * i40e_reg_list[i].stride); 124 (j * i40e_reg_list[i].stride);
101 ret_code = i40e_diag_reg_pattern_test(hw, reg, mask); 125 ret_code = i40e_diag_reg_pattern_test(hw, reg, mask);
diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
index 03d99cbc5c25..4a488ffcd6b0 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
@@ -46,6 +46,8 @@ struct i40e_stats {
46 I40E_STAT(struct i40e_pf, _name, _stat) 46 I40E_STAT(struct i40e_pf, _name, _stat)
47#define I40E_VSI_STAT(_name, _stat) \ 47#define I40E_VSI_STAT(_name, _stat) \
48 I40E_STAT(struct i40e_vsi, _name, _stat) 48 I40E_STAT(struct i40e_vsi, _name, _stat)
49#define I40E_VEB_STAT(_name, _stat) \
50 I40E_STAT(struct i40e_veb, _name, _stat)
49 51
50static const struct i40e_stats i40e_gstrings_net_stats[] = { 52static const struct i40e_stats i40e_gstrings_net_stats[] = {
51 I40E_NETDEV_STAT(rx_packets), 53 I40E_NETDEV_STAT(rx_packets),
@@ -56,12 +58,36 @@ static const struct i40e_stats i40e_gstrings_net_stats[] = {
56 I40E_NETDEV_STAT(tx_errors), 58 I40E_NETDEV_STAT(tx_errors),
57 I40E_NETDEV_STAT(rx_dropped), 59 I40E_NETDEV_STAT(rx_dropped),
58 I40E_NETDEV_STAT(tx_dropped), 60 I40E_NETDEV_STAT(tx_dropped),
59 I40E_NETDEV_STAT(multicast),
60 I40E_NETDEV_STAT(collisions), 61 I40E_NETDEV_STAT(collisions),
61 I40E_NETDEV_STAT(rx_length_errors), 62 I40E_NETDEV_STAT(rx_length_errors),
62 I40E_NETDEV_STAT(rx_crc_errors), 63 I40E_NETDEV_STAT(rx_crc_errors),
63}; 64};
64 65
66static const struct i40e_stats i40e_gstrings_veb_stats[] = {
67 I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
68 I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
69 I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
70 I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
71 I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
72 I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
73 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
74 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
75 I40E_VEB_STAT("rx_discards", stats.rx_discards),
76 I40E_VEB_STAT("tx_discards", stats.tx_discards),
77 I40E_VEB_STAT("tx_errors", stats.tx_errors),
78 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
79};
80
81static const struct i40e_stats i40e_gstrings_misc_stats[] = {
82 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
83 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
84 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
85 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
86 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
87 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
88 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
89};
90
65static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 91static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
66 struct ethtool_rxnfc *cmd); 92 struct ethtool_rxnfc *cmd);
67 93
@@ -78,7 +104,12 @@ static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
78static struct i40e_stats i40e_gstrings_stats[] = { 104static struct i40e_stats i40e_gstrings_stats[] = {
79 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 105 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
80 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 106 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
81 I40E_PF_STAT("rx_errors", stats.eth.rx_errors), 107 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
108 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
109 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
110 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
111 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
112 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
82 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 113 I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
83 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 114 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
84 I40E_PF_STAT("tx_dropped", stats.eth.tx_discards), 115 I40E_PF_STAT("tx_dropped", stats.eth.tx_discards),
@@ -88,6 +119,7 @@ static struct i40e_stats i40e_gstrings_stats[] = {
88 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 119 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults),
89 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 120 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults),
90 I40E_PF_STAT("tx_timeout", tx_timeout_count), 121 I40E_PF_STAT("tx_timeout", tx_timeout_count),
122 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error),
91 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 123 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors),
92 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 124 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx),
93 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 125 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx),
@@ -112,8 +144,10 @@ static struct i40e_stats i40e_gstrings_stats[] = {
112 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 144 I40E_PF_STAT("rx_oversize", stats.rx_oversize),
113 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 145 I40E_PF_STAT("rx_jabber", stats.rx_jabber),
114 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 146 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
115 I40E_PF_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
116 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 147 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
148 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match),
149 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match),
150
117 /* LPI stats */ 151 /* LPI stats */
118 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 152 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
119 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 153 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
@@ -122,11 +156,14 @@ static struct i40e_stats i40e_gstrings_stats[] = {
122}; 156};
123 157
124#define I40E_QUEUE_STATS_LEN(n) \ 158#define I40E_QUEUE_STATS_LEN(n) \
125 ((((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs + \ 159 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \
126 ((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs) * 2) 160 * 2 /* Tx and Rx together */ \
161 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
127#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 162#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
128#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 163#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
164#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
129#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 165#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
166 I40E_MISC_STATS_LEN + \
130 I40E_QUEUE_STATS_LEN((n))) 167 I40E_QUEUE_STATS_LEN((n)))
131#define I40E_PFC_STATS_LEN ( \ 168#define I40E_PFC_STATS_LEN ( \
132 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 169 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
@@ -135,6 +172,7 @@ static struct i40e_stats i40e_gstrings_stats[] = {
135 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 172 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
136 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 173 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
137 / sizeof(u64)) 174 / sizeof(u64))
175#define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
138#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 176#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
139 I40E_PFC_STATS_LEN + \ 177 I40E_PFC_STATS_LEN + \
140 I40E_VSI_STATS_LEN((n))) 178 I40E_VSI_STATS_LEN((n)))
@@ -620,10 +658,15 @@ static int i40e_get_sset_count(struct net_device *netdev, int sset)
620 case ETH_SS_TEST: 658 case ETH_SS_TEST:
621 return I40E_TEST_LEN; 659 return I40E_TEST_LEN;
622 case ETH_SS_STATS: 660 case ETH_SS_STATS:
623 if (vsi == pf->vsi[pf->lan_vsi]) 661 if (vsi == pf->vsi[pf->lan_vsi]) {
624 return I40E_PF_STATS_LEN(netdev); 662 int len = I40E_PF_STATS_LEN(netdev);
625 else 663
664 if (pf->lan_veb != I40E_NO_VEB)
665 len += I40E_VEB_STATS_LEN;
666 return len;
667 } else {
626 return I40E_VSI_STATS_LEN(netdev); 668 return I40E_VSI_STATS_LEN(netdev);
669 }
627 default: 670 default:
628 return -EOPNOTSUPP; 671 return -EOPNOTSUPP;
629 } 672 }
@@ -633,6 +676,7 @@ static void i40e_get_ethtool_stats(struct net_device *netdev,
633 struct ethtool_stats *stats, u64 *data) 676 struct ethtool_stats *stats, u64 *data)
634{ 677{
635 struct i40e_netdev_priv *np = netdev_priv(netdev); 678 struct i40e_netdev_priv *np = netdev_priv(netdev);
679 struct i40e_ring *tx_ring, *rx_ring;
636 struct i40e_vsi *vsi = np->vsi; 680 struct i40e_vsi *vsi = np->vsi;
637 struct i40e_pf *pf = vsi->back; 681 struct i40e_pf *pf = vsi->back;
638 int i = 0; 682 int i = 0;
@@ -648,10 +692,14 @@ static void i40e_get_ethtool_stats(struct net_device *netdev,
648 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 692 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
649 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 693 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
650 } 694 }
695 for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
696 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
697 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
698 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
699 }
651 rcu_read_lock(); 700 rcu_read_lock();
652 for (j = 0; j < vsi->num_queue_pairs; j++, i += 4) { 701 for (j = 0; j < vsi->num_queue_pairs; j++) {
653 struct i40e_ring *tx_ring = ACCESS_ONCE(vsi->tx_rings[j]); 702 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]);
654 struct i40e_ring *rx_ring;
655 703
656 if (!tx_ring) 704 if (!tx_ring)
657 continue; 705 continue;
@@ -662,33 +710,45 @@ static void i40e_get_ethtool_stats(struct net_device *netdev,
662 data[i] = tx_ring->stats.packets; 710 data[i] = tx_ring->stats.packets;
663 data[i + 1] = tx_ring->stats.bytes; 711 data[i + 1] = tx_ring->stats.bytes;
664 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 712 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
713 i += 2;
665 714
666 /* Rx ring is the 2nd half of the queue pair */ 715 /* Rx ring is the 2nd half of the queue pair */
667 rx_ring = &tx_ring[1]; 716 rx_ring = &tx_ring[1];
668 do { 717 do {
669 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 718 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
670 data[i + 2] = rx_ring->stats.packets; 719 data[i] = rx_ring->stats.packets;
671 data[i + 3] = rx_ring->stats.bytes; 720 data[i + 1] = rx_ring->stats.bytes;
672 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 721 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
722 i += 2;
673 } 723 }
674 rcu_read_unlock(); 724 rcu_read_unlock();
675 if (vsi == pf->vsi[pf->lan_vsi]) { 725 if (vsi != pf->vsi[pf->lan_vsi])
676 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 726 return;
677 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 727
678 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 728 if (pf->lan_veb != I40E_NO_VEB) {
679 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 729 struct i40e_veb *veb = pf->veb[pf->lan_veb];
680 } 730 for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
681 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 731 p = (char *)veb;
682 data[i++] = pf->stats.priority_xon_tx[j]; 732 p += i40e_gstrings_veb_stats[j].stat_offset;
683 data[i++] = pf->stats.priority_xoff_tx[j]; 733 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
684 } 734 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
685 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
686 data[i++] = pf->stats.priority_xon_rx[j];
687 data[i++] = pf->stats.priority_xoff_rx[j];
688 } 735 }
689 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
690 data[i++] = pf->stats.priority_xon_2_xoff[j];
691 } 736 }
737 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
738 p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
739 data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
740 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
741 }
742 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
743 data[i++] = pf->stats.priority_xon_tx[j];
744 data[i++] = pf->stats.priority_xoff_tx[j];
745 }
746 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
747 data[i++] = pf->stats.priority_xon_rx[j];
748 data[i++] = pf->stats.priority_xoff_rx[j];
749 }
750 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
751 data[i++] = pf->stats.priority_xon_2_xoff[j];
692} 752}
693 753
694static void i40e_get_strings(struct net_device *netdev, u32 stringset, 754static void i40e_get_strings(struct net_device *netdev, u32 stringset,
@@ -713,6 +773,11 @@ static void i40e_get_strings(struct net_device *netdev, u32 stringset,
713 i40e_gstrings_net_stats[i].stat_string); 773 i40e_gstrings_net_stats[i].stat_string);
714 p += ETH_GSTRING_LEN; 774 p += ETH_GSTRING_LEN;
715 } 775 }
776 for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
777 snprintf(p, ETH_GSTRING_LEN, "%s",
778 i40e_gstrings_misc_stats[i].stat_string);
779 p += ETH_GSTRING_LEN;
780 }
716 for (i = 0; i < vsi->num_queue_pairs; i++) { 781 for (i = 0; i < vsi->num_queue_pairs; i++) {
717 snprintf(p, ETH_GSTRING_LEN, "tx-%u.tx_packets", i); 782 snprintf(p, ETH_GSTRING_LEN, "tx-%u.tx_packets", i);
718 p += ETH_GSTRING_LEN; 783 p += ETH_GSTRING_LEN;
@@ -723,34 +788,42 @@ static void i40e_get_strings(struct net_device *netdev, u32 stringset,
723 snprintf(p, ETH_GSTRING_LEN, "rx-%u.rx_bytes", i); 788 snprintf(p, ETH_GSTRING_LEN, "rx-%u.rx_bytes", i);
724 p += ETH_GSTRING_LEN; 789 p += ETH_GSTRING_LEN;
725 } 790 }
726 if (vsi == pf->vsi[pf->lan_vsi]) { 791 if (vsi != pf->vsi[pf->lan_vsi])
727 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 792 return;
728 snprintf(p, ETH_GSTRING_LEN, "port.%s", 793
729 i40e_gstrings_stats[i].stat_string); 794 if (pf->lan_veb != I40E_NO_VEB) {
730 p += ETH_GSTRING_LEN; 795 for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
731 } 796 snprintf(p, ETH_GSTRING_LEN, "veb.%s",
732 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 797 i40e_gstrings_veb_stats[i].stat_string);
733 snprintf(p, ETH_GSTRING_LEN,
734 "port.tx_priority_%u_xon", i);
735 p += ETH_GSTRING_LEN;
736 snprintf(p, ETH_GSTRING_LEN,
737 "port.tx_priority_%u_xoff", i);
738 p += ETH_GSTRING_LEN;
739 }
740 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
741 snprintf(p, ETH_GSTRING_LEN,
742 "port.rx_priority_%u_xon", i);
743 p += ETH_GSTRING_LEN;
744 snprintf(p, ETH_GSTRING_LEN,
745 "port.rx_priority_%u_xoff", i);
746 p += ETH_GSTRING_LEN;
747 }
748 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
749 snprintf(p, ETH_GSTRING_LEN,
750 "port.rx_priority_%u_xon_2_xoff", i);
751 p += ETH_GSTRING_LEN; 798 p += ETH_GSTRING_LEN;
752 } 799 }
753 } 800 }
801 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
802 snprintf(p, ETH_GSTRING_LEN, "port.%s",
803 i40e_gstrings_stats[i].stat_string);
804 p += ETH_GSTRING_LEN;
805 }
806 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
807 snprintf(p, ETH_GSTRING_LEN,
808 "port.tx_priority_%u_xon", i);
809 p += ETH_GSTRING_LEN;
810 snprintf(p, ETH_GSTRING_LEN,
811 "port.tx_priority_%u_xoff", i);
812 p += ETH_GSTRING_LEN;
813 }
814 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
815 snprintf(p, ETH_GSTRING_LEN,
816 "port.rx_priority_%u_xon", i);
817 p += ETH_GSTRING_LEN;
818 snprintf(p, ETH_GSTRING_LEN,
819 "port.rx_priority_%u_xoff", i);
820 p += ETH_GSTRING_LEN;
821 }
822 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
823 snprintf(p, ETH_GSTRING_LEN,
824 "port.rx_priority_%u_xon_2_xoff", i);
825 p += ETH_GSTRING_LEN;
826 }
754 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 827 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */
755 break; 828 break;
756 } 829 }
@@ -1007,14 +1080,13 @@ static int i40e_get_coalesce(struct net_device *netdev,
1007 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 1080 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
1008 1081
1009 if (ITR_IS_DYNAMIC(vsi->rx_itr_setting)) 1082 if (ITR_IS_DYNAMIC(vsi->rx_itr_setting))
1010 ec->rx_coalesce_usecs = 1; 1083 ec->use_adaptive_rx_coalesce = 1;
1011 else
1012 ec->rx_coalesce_usecs = vsi->rx_itr_setting;
1013 1084
1014 if (ITR_IS_DYNAMIC(vsi->tx_itr_setting)) 1085 if (ITR_IS_DYNAMIC(vsi->tx_itr_setting))
1015 ec->tx_coalesce_usecs = 1; 1086 ec->use_adaptive_tx_coalesce = 1;
1016 else 1087
1017 ec->tx_coalesce_usecs = vsi->tx_itr_setting; 1088 ec->rx_coalesce_usecs = vsi->rx_itr_setting & ~I40E_ITR_DYNAMIC;
1089 ec->tx_coalesce_usecs = vsi->tx_itr_setting & ~I40E_ITR_DYNAMIC;
1018 1090
1019 return 0; 1091 return 0;
1020} 1092}
@@ -1033,37 +1105,27 @@ static int i40e_set_coalesce(struct net_device *netdev,
1033 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 1105 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
1034 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 1106 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
1035 1107
1036 switch (ec->rx_coalesce_usecs) { 1108 if ((ec->rx_coalesce_usecs >= (I40E_MIN_ITR << 1)) &&
1037 case 0: 1109 (ec->rx_coalesce_usecs <= (I40E_MAX_ITR << 1)))
1038 vsi->rx_itr_setting = 0;
1039 break;
1040 case 1:
1041 vsi->rx_itr_setting = (I40E_ITR_DYNAMIC |
1042 ITR_REG_TO_USEC(I40E_ITR_RX_DEF));
1043 break;
1044 default:
1045 if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
1046 (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)))
1047 return -EINVAL;
1048 vsi->rx_itr_setting = ec->rx_coalesce_usecs; 1110 vsi->rx_itr_setting = ec->rx_coalesce_usecs;
1049 break; 1111 else
1050 } 1112 return -EINVAL;
1051 1113
1052 switch (ec->tx_coalesce_usecs) { 1114 if ((ec->tx_coalesce_usecs >= (I40E_MIN_ITR << 1)) &&
1053 case 0: 1115 (ec->tx_coalesce_usecs <= (I40E_MAX_ITR << 1)))
1054 vsi->tx_itr_setting = 0;
1055 break;
1056 case 1:
1057 vsi->tx_itr_setting = (I40E_ITR_DYNAMIC |
1058 ITR_REG_TO_USEC(I40E_ITR_TX_DEF));
1059 break;
1060 default:
1061 if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
1062 (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)))
1063 return -EINVAL;
1064 vsi->tx_itr_setting = ec->tx_coalesce_usecs; 1116 vsi->tx_itr_setting = ec->tx_coalesce_usecs;
1065 break; 1117 else
1066 } 1118 return -EINVAL;
1119
1120 if (ec->use_adaptive_rx_coalesce)
1121 vsi->rx_itr_setting |= I40E_ITR_DYNAMIC;
1122 else
1123 vsi->rx_itr_setting &= ~I40E_ITR_DYNAMIC;
1124
1125 if (ec->use_adaptive_tx_coalesce)
1126 vsi->tx_itr_setting |= I40E_ITR_DYNAMIC;
1127 else
1128 vsi->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
1067 1129
1068 vector = vsi->base_vector; 1130 vector = vsi->base_vector;
1069 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 1131 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
@@ -1140,8 +1202,7 @@ static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
1140 int cnt = 0; 1202 int cnt = 0;
1141 1203
1142 /* report total rule count */ 1204 /* report total rule count */
1143 cmd->data = pf->hw.fdir_shared_filter_count + 1205 cmd->data = i40e_get_fd_cnt_all(pf);
1144 pf->fdir_pf_filter_count;
1145 1206
1146 hlist_for_each_entry_safe(rule, node2, 1207 hlist_for_each_entry_safe(rule, node2,
1147 &pf->fdir_filter_list, fdir_node) { 1208 &pf->fdir_filter_list, fdir_node) {
@@ -1175,10 +1236,6 @@ static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
1175 struct i40e_fdir_filter *rule = NULL; 1236 struct i40e_fdir_filter *rule = NULL;
1176 struct hlist_node *node2; 1237 struct hlist_node *node2;
1177 1238
1178 /* report total rule count */
1179 cmd->data = pf->hw.fdir_shared_filter_count +
1180 pf->fdir_pf_filter_count;
1181
1182 hlist_for_each_entry_safe(rule, node2, 1239 hlist_for_each_entry_safe(rule, node2,
1183 &pf->fdir_filter_list, fdir_node) { 1240 &pf->fdir_filter_list, fdir_node) {
1184 if (fsp->location <= rule->fd_id) 1241 if (fsp->location <= rule->fd_id)
@@ -1189,11 +1246,24 @@ static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
1189 return -EINVAL; 1246 return -EINVAL;
1190 1247
1191 fsp->flow_type = rule->flow_type; 1248 fsp->flow_type = rule->flow_type;
1192 fsp->h_u.tcp_ip4_spec.psrc = rule->src_port; 1249 if (fsp->flow_type == IP_USER_FLOW) {
1193 fsp->h_u.tcp_ip4_spec.pdst = rule->dst_port; 1250 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
1194 fsp->h_u.tcp_ip4_spec.ip4src = rule->src_ip[0]; 1251 fsp->h_u.usr_ip4_spec.proto = 0;
1195 fsp->h_u.tcp_ip4_spec.ip4dst = rule->dst_ip[0]; 1252 fsp->m_u.usr_ip4_spec.proto = 0;
1196 fsp->ring_cookie = rule->q_index; 1253 }
1254
1255 /* Reverse the src and dest notion, since the HW views them from
1256 * Tx perspective where as the user expects it from Rx filter view.
1257 */
1258 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
1259 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
1260 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip[0];
1261 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip[0];
1262
1263 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
1264 fsp->ring_cookie = RX_CLS_FLOW_DISC;
1265 else
1266 fsp->ring_cookie = rule->q_index;
1197 1267
1198 return 0; 1268 return 0;
1199} 1269}
@@ -1223,6 +1293,8 @@ static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
1223 break; 1293 break;
1224 case ETHTOOL_GRXCLSRLCNT: 1294 case ETHTOOL_GRXCLSRLCNT:
1225 cmd->rule_cnt = pf->fdir_pf_active_filters; 1295 cmd->rule_cnt = pf->fdir_pf_active_filters;
1296 /* report total rule count */
1297 cmd->data = i40e_get_fd_cnt_all(pf);
1226 ret = 0; 1298 ret = 0;
1227 break; 1299 break;
1228 case ETHTOOL_GRXCLSRULE: 1300 case ETHTOOL_GRXCLSRULE:
@@ -1291,16 +1363,12 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
1291 case UDP_V4_FLOW: 1363 case UDP_V4_FLOW:
1292 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1364 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1293 case 0: 1365 case 0:
1294 hena &= 1366 hena &= ~(((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
1295 ~(((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 1367 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4));
1296 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) |
1297 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4));
1298 break; 1368 break;
1299 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 1369 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
1300 hena |= 1370 hena |= (((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
1301 (((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 1371 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4));
1302 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) |
1303 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4));
1304 break; 1372 break;
1305 default: 1373 default:
1306 return -EINVAL; 1374 return -EINVAL;
@@ -1309,16 +1377,12 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
1309 case UDP_V6_FLOW: 1377 case UDP_V6_FLOW:
1310 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1378 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1311 case 0: 1379 case 0:
1312 hena &= 1380 hena &= ~(((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
1313 ~(((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 1381 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6));
1314 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) |
1315 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6));
1316 break; 1382 break;
1317 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 1383 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
1318 hena |= 1384 hena |= (((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
1319 (((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 1385 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6));
1320 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) |
1321 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6));
1322 break; 1386 break;
1323 default: 1387 default:
1324 return -EINVAL; 1388 return -EINVAL;
@@ -1503,7 +1567,8 @@ static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
1503 return -EINVAL; 1567 return -EINVAL;
1504 } 1568 }
1505 1569
1506 if (fsp->ring_cookie >= vsi->num_queue_pairs) 1570 if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
1571 (fsp->ring_cookie >= vsi->num_queue_pairs))
1507 return -EINVAL; 1572 return -EINVAL;
1508 1573
1509 input = kzalloc(sizeof(*input), GFP_KERNEL); 1574 input = kzalloc(sizeof(*input), GFP_KERNEL);
@@ -1524,13 +1589,17 @@ static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
1524 input->pctype = 0; 1589 input->pctype = 0;
1525 input->dest_vsi = vsi->id; 1590 input->dest_vsi = vsi->id;
1526 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 1591 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
1527 input->cnt_index = 0; 1592 input->cnt_index = pf->fd_sb_cnt_idx;
1528 input->flow_type = fsp->flow_type; 1593 input->flow_type = fsp->flow_type;
1529 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 1594 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
1530 input->src_port = fsp->h_u.tcp_ip4_spec.psrc; 1595
1531 input->dst_port = fsp->h_u.tcp_ip4_spec.pdst; 1596 /* Reverse the src and dest notion, since the HW expects them to be from
1532 input->src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; 1597 * Tx perspective where as the input from user is from Rx filter view.
1533 input->dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; 1598 */
1599 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
1600 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
1601 input->dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
1602 input->src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
1534 1603
1535 ret = i40e_add_del_fdir(vsi, input, true); 1604 ret = i40e_add_del_fdir(vsi, input, true);
1536 if (ret) 1605 if (ret)
@@ -1692,5 +1761,5 @@ static const struct ethtool_ops i40e_ethtool_ops = {
1692 1761
1693void i40e_set_ethtool_ops(struct net_device *netdev) 1762void i40e_set_ethtool_ops(struct net_device *netdev)
1694{ 1763{
1695 SET_ETHTOOL_OPS(netdev, &i40e_ethtool_ops); 1764 netdev->ethtool_ops = &i40e_ethtool_ops;
1696} 1765}
diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
index bf2d4cc5b569..9b987ccc9e82 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_hmc.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.c
@@ -201,7 +201,7 @@ exit:
201 **/ 201 **/
202i40e_status i40e_remove_pd_bp(struct i40e_hw *hw, 202i40e_status i40e_remove_pd_bp(struct i40e_hw *hw,
203 struct i40e_hmc_info *hmc_info, 203 struct i40e_hmc_info *hmc_info,
204 u32 idx, bool is_pf) 204 u32 idx)
205{ 205{
206 i40e_status ret_code = 0; 206 i40e_status ret_code = 0;
207 struct i40e_hmc_pd_entry *pd_entry; 207 struct i40e_hmc_pd_entry *pd_entry;
@@ -237,10 +237,7 @@ i40e_status i40e_remove_pd_bp(struct i40e_hw *hw,
237 pd_addr = (u64 *)pd_table->pd_page_addr.va; 237 pd_addr = (u64 *)pd_table->pd_page_addr.va;
238 pd_addr += rel_pd_idx; 238 pd_addr += rel_pd_idx;
239 memset(pd_addr, 0, sizeof(u64)); 239 memset(pd_addr, 0, sizeof(u64));
240 if (is_pf) 240 I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, idx);
241 I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, idx);
242 else
243 I40E_INVALIDATE_VF_HMC_PD(hw, sd_idx, idx, hmc_info->hmc_fn_id);
244 241
245 /* free memory here */ 242 /* free memory here */
246 ret_code = i40e_free_dma_mem(hw, &(pd_entry->bp.addr)); 243 ret_code = i40e_free_dma_mem(hw, &(pd_entry->bp.addr));
diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.h b/drivers/net/ethernet/intel/i40e/i40e_hmc.h
index 0cd4701234f8..b45d8fedc5e7 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_hmc.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.h
@@ -163,11 +163,6 @@ struct i40e_hmc_info {
163 (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \ 163 (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \
164 ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT))) 164 ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
165 165
166#define I40E_INVALIDATE_VF_HMC_PD(hw, sd_idx, pd_idx, hmc_fn_id) \
167 wr32((hw), I40E_GLHMC_VFPDINV((hmc_fn_id) - I40E_FIRST_VF_FPM_ID), \
168 (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \
169 ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
170
171/** 166/**
172 * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit 167 * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
173 * @hmc_info: pointer to the HMC configuration information structure 168 * @hmc_info: pointer to the HMC configuration information structure
@@ -226,7 +221,7 @@ i40e_status i40e_add_pd_table_entry(struct i40e_hw *hw,
226 u32 pd_index); 221 u32 pd_index);
227i40e_status i40e_remove_pd_bp(struct i40e_hw *hw, 222i40e_status i40e_remove_pd_bp(struct i40e_hw *hw,
228 struct i40e_hmc_info *hmc_info, 223 struct i40e_hmc_info *hmc_info,
229 u32 idx, bool is_pf); 224 u32 idx);
230i40e_status i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info, 225i40e_status i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
231 u32 idx); 226 u32 idx);
232i40e_status i40e_remove_sd_bp_new(struct i40e_hw *hw, 227i40e_status i40e_remove_sd_bp_new(struct i40e_hw *hw,
diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
index d5d98fe2691d..870ab1ee072c 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
@@ -397,7 +397,7 @@ static i40e_status i40e_create_lan_hmc_object(struct i40e_hw *hw,
397 /* remove the backing pages from pd_idx1 to i */ 397 /* remove the backing pages from pd_idx1 to i */
398 while (i && (i > pd_idx1)) { 398 while (i && (i > pd_idx1)) {
399 i40e_remove_pd_bp(hw, info->hmc_info, 399 i40e_remove_pd_bp(hw, info->hmc_info,
400 (i - 1), true); 400 (i - 1));
401 i--; 401 i--;
402 } 402 }
403 } 403 }
@@ -433,11 +433,7 @@ exit_sd_error:
433 ((j - 1) * I40E_HMC_MAX_BP_COUNT)); 433 ((j - 1) * I40E_HMC_MAX_BP_COUNT));
434 pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT)); 434 pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT));
435 for (i = pd_idx1; i < pd_lmt1; i++) { 435 for (i = pd_idx1; i < pd_lmt1; i++) {
436 i40e_remove_pd_bp( 436 i40e_remove_pd_bp(hw, info->hmc_info, i);
437 hw,
438 info->hmc_info,
439 i,
440 true);
441 } 437 }
442 i40e_remove_pd_page(hw, info->hmc_info, (j - 1)); 438 i40e_remove_pd_page(hw, info->hmc_info, (j - 1));
443 break; 439 break;
@@ -616,8 +612,7 @@ static i40e_status i40e_delete_lan_hmc_object(struct i40e_hw *hw,
616 pd_table = 612 pd_table =
617 &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table; 613 &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table;
618 if (pd_table->pd_entry[rel_pd_idx].valid) { 614 if (pd_table->pd_entry[rel_pd_idx].valid) {
619 ret_code = i40e_remove_pd_bp(hw, info->hmc_info, 615 ret_code = i40e_remove_pd_bp(hw, info->hmc_info, j);
620 j, true);
621 if (ret_code) 616 if (ret_code)
622 goto exit; 617 goto exit;
623 } 618 }
@@ -747,6 +742,7 @@ static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = {
747 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 }, 742 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 },
748 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 }, 743 { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 },
749 { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 }, 744 { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 },
745 { I40E_HMC_STORE(i40e_hmc_obj_rxq, prefena), 1, 201 },
750 { 0 } 746 { 0 }
751}; 747};
752 748
diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h
index 341de925a298..eb65fe23c4a7 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h
@@ -56,6 +56,7 @@ struct i40e_hmc_obj_rxq {
56 u8 tphdata_ena; 56 u8 tphdata_ena;
57 u8 tphhead_ena; 57 u8 tphhead_ena;
58 u8 lrxqthresh; 58 u8 lrxqthresh;
59 u8 prefena; /* NOTE: normally must be set to 1 at init */
59}; 60};
60 61
61/* Tx queue context data */ 62/* Tx queue context data */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 2e72449f1265..275ca9a1719e 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -38,8 +38,8 @@ static const char i40e_driver_string[] =
38#define DRV_KERN "-k" 38#define DRV_KERN "-k"
39 39
40#define DRV_VERSION_MAJOR 0 40#define DRV_VERSION_MAJOR 0
41#define DRV_VERSION_MINOR 3 41#define DRV_VERSION_MINOR 4
42#define DRV_VERSION_BUILD 36 42#define DRV_VERSION_BUILD 10
43#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 43#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \ 44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN 45 __stringify(DRV_VERSION_BUILD) DRV_KERN
@@ -67,12 +67,10 @@ static int i40e_veb_get_bw_info(struct i40e_veb *veb);
67 */ 67 */
68static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = { 68static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X710), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0}, 71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_D), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
@@ -356,6 +354,7 @@ static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
356 struct rtnl_link_stats64 *stats) 354 struct rtnl_link_stats64 *stats)
357{ 355{
358 struct i40e_netdev_priv *np = netdev_priv(netdev); 356 struct i40e_netdev_priv *np = netdev_priv(netdev);
357 struct i40e_ring *tx_ring, *rx_ring;
359 struct i40e_vsi *vsi = np->vsi; 358 struct i40e_vsi *vsi = np->vsi;
360 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 359 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
361 int i; 360 int i;
@@ -368,7 +367,6 @@ static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
368 367
369 rcu_read_lock(); 368 rcu_read_lock();
370 for (i = 0; i < vsi->num_queue_pairs; i++) { 369 for (i = 0; i < vsi->num_queue_pairs; i++) {
371 struct i40e_ring *tx_ring, *rx_ring;
372 u64 bytes, packets; 370 u64 bytes, packets;
373 unsigned int start; 371 unsigned int start;
374 372
@@ -397,7 +395,7 @@ static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
397 } 395 }
398 rcu_read_unlock(); 396 rcu_read_unlock();
399 397
400 /* following stats updated by ixgbe_watchdog_task() */ 398 /* following stats updated by i40e_watchdog_subtask() */
401 stats->multicast = vsi_stats->multicast; 399 stats->multicast = vsi_stats->multicast;
402 stats->tx_errors = vsi_stats->tx_errors; 400 stats->tx_errors = vsi_stats->tx_errors;
403 stats->tx_dropped = vsi_stats->tx_dropped; 401 stats->tx_dropped = vsi_stats->tx_dropped;
@@ -530,6 +528,12 @@ void i40e_update_eth_stats(struct i40e_vsi *vsi)
530 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 528 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
531 vsi->stat_offsets_loaded, 529 vsi->stat_offsets_loaded,
532 &oes->rx_discards, &es->rx_discards); 530 &oes->rx_discards, &es->rx_discards);
531 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
532 vsi->stat_offsets_loaded,
533 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
534 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
535 vsi->stat_offsets_loaded,
536 &oes->tx_errors, &es->tx_errors);
533 537
534 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 538 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
535 I40E_GLV_GORCL(stat_idx), 539 I40E_GLV_GORCL(stat_idx),
@@ -648,10 +652,10 @@ static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
648 return; 652 return;
649 653
650 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ 654 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
651 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 655 for (v = 0; v < pf->num_alloc_vsi; v++) {
652 struct i40e_vsi *vsi = pf->vsi[v]; 656 struct i40e_vsi *vsi = pf->vsi[v];
653 657
654 if (!vsi) 658 if (!vsi || !vsi->tx_rings[0])
655 continue; 659 continue;
656 660
657 for (i = 0; i < vsi->num_queue_pairs; i++) { 661 for (i = 0; i < vsi->num_queue_pairs; i++) {
@@ -702,10 +706,10 @@ static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
702 } 706 }
703 707
704 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ 708 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
705 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 709 for (v = 0; v < pf->num_alloc_vsi; v++) {
706 struct i40e_vsi *vsi = pf->vsi[v]; 710 struct i40e_vsi *vsi = pf->vsi[v];
707 711
708 if (!vsi) 712 if (!vsi || !vsi->tx_rings[0])
709 continue; 713 continue;
710 714
711 for (i = 0; i < vsi->num_queue_pairs; i++) { 715 for (i = 0; i < vsi->num_queue_pairs; i++) {
@@ -720,19 +724,18 @@ static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
720} 724}
721 725
722/** 726/**
723 * i40e_update_stats - Update the board statistics counters. 727 * i40e_update_vsi_stats - Update the vsi statistics counters.
724 * @vsi: the VSI to be updated 728 * @vsi: the VSI to be updated
725 * 729 *
726 * There are a few instances where we store the same stat in a 730 * There are a few instances where we store the same stat in a
727 * couple of different structs. This is partly because we have 731 * couple of different structs. This is partly because we have
728 * the netdev stats that need to be filled out, which is slightly 732 * the netdev stats that need to be filled out, which is slightly
729 * different from the "eth_stats" defined by the chip and used in 733 * different from the "eth_stats" defined by the chip and used in
730 * VF communications. We sort it all out here in a central place. 734 * VF communications. We sort it out here.
731 **/ 735 **/
732void i40e_update_stats(struct i40e_vsi *vsi) 736static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
733{ 737{
734 struct i40e_pf *pf = vsi->back; 738 struct i40e_pf *pf = vsi->back;
735 struct i40e_hw *hw = &pf->hw;
736 struct rtnl_link_stats64 *ons; 739 struct rtnl_link_stats64 *ons;
737 struct rtnl_link_stats64 *ns; /* netdev stats */ 740 struct rtnl_link_stats64 *ns; /* netdev stats */
738 struct i40e_eth_stats *oes; 741 struct i40e_eth_stats *oes;
@@ -741,8 +744,6 @@ void i40e_update_stats(struct i40e_vsi *vsi)
741 u32 rx_page, rx_buf; 744 u32 rx_page, rx_buf;
742 u64 rx_p, rx_b; 745 u64 rx_p, rx_b;
743 u64 tx_p, tx_b; 746 u64 tx_p, tx_b;
744 u32 val;
745 int i;
746 u16 q; 747 u16 q;
747 748
748 if (test_bit(__I40E_DOWN, &vsi->state) || 749 if (test_bit(__I40E_DOWN, &vsi->state) ||
@@ -804,196 +805,256 @@ void i40e_update_stats(struct i40e_vsi *vsi)
804 ns->tx_packets = tx_p; 805 ns->tx_packets = tx_p;
805 ns->tx_bytes = tx_b; 806 ns->tx_bytes = tx_b;
806 807
807 i40e_update_eth_stats(vsi);
808 /* update netdev stats from eth stats */ 808 /* update netdev stats from eth stats */
809 ons->rx_errors = oes->rx_errors; 809 i40e_update_eth_stats(vsi);
810 ns->rx_errors = es->rx_errors;
811 ons->tx_errors = oes->tx_errors; 810 ons->tx_errors = oes->tx_errors;
812 ns->tx_errors = es->tx_errors; 811 ns->tx_errors = es->tx_errors;
813 ons->multicast = oes->rx_multicast; 812 ons->multicast = oes->rx_multicast;
814 ns->multicast = es->rx_multicast; 813 ns->multicast = es->rx_multicast;
814 ons->rx_dropped = oes->rx_discards;
815 ns->rx_dropped = es->rx_discards;
815 ons->tx_dropped = oes->tx_discards; 816 ons->tx_dropped = oes->tx_discards;
816 ns->tx_dropped = es->tx_discards; 817 ns->tx_dropped = es->tx_discards;
817 818
818 /* Get the port data only if this is the main PF VSI */ 819 /* pull in a couple PF stats if this is the main vsi */
819 if (vsi == pf->vsi[pf->lan_vsi]) { 820 if (vsi == pf->vsi[pf->lan_vsi]) {
820 struct i40e_hw_port_stats *nsd = &pf->stats; 821 ns->rx_crc_errors = pf->stats.crc_errors;
821 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 822 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
823 ns->rx_length_errors = pf->stats.rx_length_errors;
824 }
825}
822 826
823 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 827/**
824 I40E_GLPRT_GORCL(hw->port), 828 * i40e_update_pf_stats - Update the pf statistics counters.
825 pf->stat_offsets_loaded, 829 * @pf: the PF to be updated
826 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 830 **/
827 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 831static void i40e_update_pf_stats(struct i40e_pf *pf)
828 I40E_GLPRT_GOTCL(hw->port), 832{
829 pf->stat_offsets_loaded, 833 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
830 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 834 struct i40e_hw_port_stats *nsd = &pf->stats;
831 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 835 struct i40e_hw *hw = &pf->hw;
832 pf->stat_offsets_loaded, 836 u32 val;
833 &osd->eth.rx_discards, 837 int i;
834 &nsd->eth.rx_discards);
835 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
836 pf->stat_offsets_loaded,
837 &osd->eth.tx_discards,
838 &nsd->eth.tx_discards);
839 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
840 I40E_GLPRT_MPRCL(hw->port),
841 pf->stat_offsets_loaded,
842 &osd->eth.rx_multicast,
843 &nsd->eth.rx_multicast);
844 838
845 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 839 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
846 pf->stat_offsets_loaded, 840 I40E_GLPRT_GORCL(hw->port),
847 &osd->tx_dropped_link_down, 841 pf->stat_offsets_loaded,
848 &nsd->tx_dropped_link_down); 842 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
843 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
844 I40E_GLPRT_GOTCL(hw->port),
845 pf->stat_offsets_loaded,
846 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
847 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
848 pf->stat_offsets_loaded,
849 &osd->eth.rx_discards,
850 &nsd->eth.rx_discards);
851 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
852 pf->stat_offsets_loaded,
853 &osd->eth.tx_discards,
854 &nsd->eth.tx_discards);
849 855
850 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 856 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
851 pf->stat_offsets_loaded, 857 I40E_GLPRT_UPRCL(hw->port),
852 &osd->crc_errors, &nsd->crc_errors); 858 pf->stat_offsets_loaded,
853 ns->rx_crc_errors = nsd->crc_errors; 859 &osd->eth.rx_unicast,
860 &nsd->eth.rx_unicast);
861 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
862 I40E_GLPRT_MPRCL(hw->port),
863 pf->stat_offsets_loaded,
864 &osd->eth.rx_multicast,
865 &nsd->eth.rx_multicast);
866 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
867 I40E_GLPRT_BPRCL(hw->port),
868 pf->stat_offsets_loaded,
869 &osd->eth.rx_broadcast,
870 &nsd->eth.rx_broadcast);
871 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
872 I40E_GLPRT_UPTCL(hw->port),
873 pf->stat_offsets_loaded,
874 &osd->eth.tx_unicast,
875 &nsd->eth.tx_unicast);
876 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
877 I40E_GLPRT_MPTCL(hw->port),
878 pf->stat_offsets_loaded,
879 &osd->eth.tx_multicast,
880 &nsd->eth.tx_multicast);
881 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
882 I40E_GLPRT_BPTCL(hw->port),
883 pf->stat_offsets_loaded,
884 &osd->eth.tx_broadcast,
885 &nsd->eth.tx_broadcast);
854 886
855 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 887 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
856 pf->stat_offsets_loaded, 888 pf->stat_offsets_loaded,
857 &osd->illegal_bytes, &nsd->illegal_bytes); 889 &osd->tx_dropped_link_down,
858 ns->rx_errors = nsd->crc_errors 890 &nsd->tx_dropped_link_down);
859 + nsd->illegal_bytes;
860 891
861 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 892 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
862 pf->stat_offsets_loaded, 893 pf->stat_offsets_loaded,
863 &osd->mac_local_faults, 894 &osd->crc_errors, &nsd->crc_errors);
864 &nsd->mac_local_faults);
865 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
866 pf->stat_offsets_loaded,
867 &osd->mac_remote_faults,
868 &nsd->mac_remote_faults);
869 895
870 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 896 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
871 pf->stat_offsets_loaded, 897 pf->stat_offsets_loaded,
872 &osd->rx_length_errors, 898 &osd->illegal_bytes, &nsd->illegal_bytes);
873 &nsd->rx_length_errors);
874 ns->rx_length_errors = nsd->rx_length_errors;
875 899
876 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 900 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
877 pf->stat_offsets_loaded, 901 pf->stat_offsets_loaded,
878 &osd->link_xon_rx, &nsd->link_xon_rx); 902 &osd->mac_local_faults,
879 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 903 &nsd->mac_local_faults);
880 pf->stat_offsets_loaded, 904 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
881 &osd->link_xon_tx, &nsd->link_xon_tx); 905 pf->stat_offsets_loaded,
882 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ 906 &osd->mac_remote_faults,
883 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 907 &nsd->mac_remote_faults);
884 pf->stat_offsets_loaded,
885 &osd->link_xoff_tx, &nsd->link_xoff_tx);
886
887 for (i = 0; i < 8; i++) {
888 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
889 pf->stat_offsets_loaded,
890 &osd->priority_xon_rx[i],
891 &nsd->priority_xon_rx[i]);
892 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
893 pf->stat_offsets_loaded,
894 &osd->priority_xon_tx[i],
895 &nsd->priority_xon_tx[i]);
896 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
897 pf->stat_offsets_loaded,
898 &osd->priority_xoff_tx[i],
899 &nsd->priority_xoff_tx[i]);
900 i40e_stat_update32(hw,
901 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
902 pf->stat_offsets_loaded,
903 &osd->priority_xon_2_xoff[i],
904 &nsd->priority_xon_2_xoff[i]);
905 }
906 908
907 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 909 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
908 I40E_GLPRT_PRC64L(hw->port), 910 pf->stat_offsets_loaded,
909 pf->stat_offsets_loaded, 911 &osd->rx_length_errors,
910 &osd->rx_size_64, &nsd->rx_size_64); 912 &nsd->rx_length_errors);
911 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
912 I40E_GLPRT_PRC127L(hw->port),
913 pf->stat_offsets_loaded,
914 &osd->rx_size_127, &nsd->rx_size_127);
915 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
916 I40E_GLPRT_PRC255L(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->rx_size_255, &nsd->rx_size_255);
919 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
920 I40E_GLPRT_PRC511L(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->rx_size_511, &nsd->rx_size_511);
923 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
924 I40E_GLPRT_PRC1023L(hw->port),
925 pf->stat_offsets_loaded,
926 &osd->rx_size_1023, &nsd->rx_size_1023);
927 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
928 I40E_GLPRT_PRC1522L(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->rx_size_1522, &nsd->rx_size_1522);
931 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
932 I40E_GLPRT_PRC9522L(hw->port),
933 pf->stat_offsets_loaded,
934 &osd->rx_size_big, &nsd->rx_size_big);
935 913
936 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 914 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
937 I40E_GLPRT_PTC64L(hw->port), 915 pf->stat_offsets_loaded,
938 pf->stat_offsets_loaded, 916 &osd->link_xon_rx, &nsd->link_xon_rx);
939 &osd->tx_size_64, &nsd->tx_size_64); 917 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
940 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 918 pf->stat_offsets_loaded,
941 I40E_GLPRT_PTC127L(hw->port), 919 &osd->link_xon_tx, &nsd->link_xon_tx);
942 pf->stat_offsets_loaded, 920 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
943 &osd->tx_size_127, &nsd->tx_size_127); 921 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
944 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 922 pf->stat_offsets_loaded,
945 I40E_GLPRT_PTC255L(hw->port), 923 &osd->link_xoff_tx, &nsd->link_xoff_tx);
946 pf->stat_offsets_loaded,
947 &osd->tx_size_255, &nsd->tx_size_255);
948 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
949 I40E_GLPRT_PTC511L(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->tx_size_511, &nsd->tx_size_511);
952 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
953 I40E_GLPRT_PTC1023L(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_size_1023, &nsd->tx_size_1023);
956 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
957 I40E_GLPRT_PTC1522L(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->tx_size_1522, &nsd->tx_size_1522);
960 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
961 I40E_GLPRT_PTC9522L(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->tx_size_big, &nsd->tx_size_big);
964 924
965 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 925 for (i = 0; i < 8; i++) {
966 pf->stat_offsets_loaded, 926 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
967 &osd->rx_undersize, &nsd->rx_undersize);
968 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
969 pf->stat_offsets_loaded, 927 pf->stat_offsets_loaded,
970 &osd->rx_fragments, &nsd->rx_fragments); 928 &osd->priority_xon_rx[i],
971 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 929 &nsd->priority_xon_rx[i]);
930 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
972 pf->stat_offsets_loaded, 931 pf->stat_offsets_loaded,
973 &osd->rx_oversize, &nsd->rx_oversize); 932 &osd->priority_xon_tx[i],
974 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 933 &nsd->priority_xon_tx[i]);
934 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
975 pf->stat_offsets_loaded, 935 pf->stat_offsets_loaded,
976 &osd->rx_jabber, &nsd->rx_jabber); 936 &osd->priority_xoff_tx[i],
977 937 &nsd->priority_xoff_tx[i]);
978 val = rd32(hw, I40E_PRTPM_EEE_STAT); 938 i40e_stat_update32(hw,
979 nsd->tx_lpi_status = 939 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
980 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
981 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
982 nsd->rx_lpi_status =
983 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
984 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
985 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
986 pf->stat_offsets_loaded, 940 pf->stat_offsets_loaded,
987 &osd->tx_lpi_count, &nsd->tx_lpi_count); 941 &osd->priority_xon_2_xoff[i],
988 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 942 &nsd->priority_xon_2_xoff[i]);
989 pf->stat_offsets_loaded,
990 &osd->rx_lpi_count, &nsd->rx_lpi_count);
991 } 943 }
992 944
945 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
946 I40E_GLPRT_PRC64L(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->rx_size_64, &nsd->rx_size_64);
949 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
950 I40E_GLPRT_PRC127L(hw->port),
951 pf->stat_offsets_loaded,
952 &osd->rx_size_127, &nsd->rx_size_127);
953 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
954 I40E_GLPRT_PRC255L(hw->port),
955 pf->stat_offsets_loaded,
956 &osd->rx_size_255, &nsd->rx_size_255);
957 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
958 I40E_GLPRT_PRC511L(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->rx_size_511, &nsd->rx_size_511);
961 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
962 I40E_GLPRT_PRC1023L(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_size_1023, &nsd->rx_size_1023);
965 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
966 I40E_GLPRT_PRC1522L(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_size_1522, &nsd->rx_size_1522);
969 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
970 I40E_GLPRT_PRC9522L(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_size_big, &nsd->rx_size_big);
973
974 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
975 I40E_GLPRT_PTC64L(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->tx_size_64, &nsd->tx_size_64);
978 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
979 I40E_GLPRT_PTC127L(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->tx_size_127, &nsd->tx_size_127);
982 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
983 I40E_GLPRT_PTC255L(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->tx_size_255, &nsd->tx_size_255);
986 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
987 I40E_GLPRT_PTC511L(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->tx_size_511, &nsd->tx_size_511);
990 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
991 I40E_GLPRT_PTC1023L(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->tx_size_1023, &nsd->tx_size_1023);
994 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
995 I40E_GLPRT_PTC1522L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->tx_size_1522, &nsd->tx_size_1522);
998 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
999 I40E_GLPRT_PTC9522L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->tx_size_big, &nsd->tx_size_big);
1002
1003 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->rx_undersize, &nsd->rx_undersize);
1006 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->rx_fragments, &nsd->rx_fragments);
1009 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->rx_oversize, &nsd->rx_oversize);
1012 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->rx_jabber, &nsd->rx_jabber);
1015
1016 /* FDIR stats */
1017 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1018 pf->stat_offsets_loaded,
1019 &osd->fd_atr_match, &nsd->fd_atr_match);
1020 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1021 pf->stat_offsets_loaded,
1022 &osd->fd_sb_match, &nsd->fd_sb_match);
1023
1024 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1025 nsd->tx_lpi_status =
1026 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1027 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1028 nsd->rx_lpi_status =
1029 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1030 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1031 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1032 pf->stat_offsets_loaded,
1033 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1034 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1035 pf->stat_offsets_loaded,
1036 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1037
993 pf->stat_offsets_loaded = true; 1038 pf->stat_offsets_loaded = true;
994} 1039}
995 1040
996/** 1041/**
1042 * i40e_update_stats - Update the various statistics counters.
1043 * @vsi: the VSI to be updated
1044 *
1045 * Update the various stats for this VSI and its related entities.
1046 **/
1047void i40e_update_stats(struct i40e_vsi *vsi)
1048{
1049 struct i40e_pf *pf = vsi->back;
1050
1051 if (vsi == pf->vsi[pf->lan_vsi])
1052 i40e_update_pf_stats(pf);
1053
1054 i40e_update_vsi_stats(vsi);
1055}
1056
1057/**
997 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1058 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
998 * @vsi: the VSI to be searched 1059 * @vsi: the VSI to be searched
999 * @macaddr: the MAC address 1060 * @macaddr: the MAC address
@@ -1101,6 +1162,30 @@ struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1101} 1162}
1102 1163
1103/** 1164/**
1165 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1166 * @vsi: the PF Main VSI - inappropriate for any other VSI
1167 * @macaddr: the MAC address
1168 **/
1169static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1170{
1171 struct i40e_aqc_remove_macvlan_element_data element;
1172 struct i40e_pf *pf = vsi->back;
1173 i40e_status aq_ret;
1174
1175 /* Only appropriate for the PF main VSI */
1176 if (vsi->type != I40E_VSI_MAIN)
1177 return;
1178
1179 ether_addr_copy(element.mac_addr, macaddr);
1180 element.vlan_tag = 0;
1181 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1182 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1183 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1184 if (aq_ret)
1185 dev_err(&pf->pdev->dev, "Could not remove default MAC-VLAN\n");
1186}
1187
1188/**
1104 * i40e_add_filter - Add a mac/vlan filter to the VSI 1189 * i40e_add_filter - Add a mac/vlan filter to the VSI
1105 * @vsi: the VSI to be searched 1190 * @vsi: the VSI to be searched
1106 * @macaddr: the MAC address 1191 * @macaddr: the MAC address
@@ -1125,7 +1210,7 @@ struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1125 if (!f) 1210 if (!f)
1126 goto add_filter_out; 1211 goto add_filter_out;
1127 1212
1128 memcpy(f->macaddr, macaddr, ETH_ALEN); 1213 ether_addr_copy(f->macaddr, macaddr);
1129 f->vlan = vlan; 1214 f->vlan = vlan;
1130 f->changed = true; 1215 f->changed = true;
1131 1216
@@ -1249,7 +1334,7 @@ static int i40e_set_mac(struct net_device *netdev, void *p)
1249 return -EADDRNOTAVAIL; 1334 return -EADDRNOTAVAIL;
1250 } 1335 }
1251 1336
1252 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len); 1337 ether_addr_copy(vsi->back->hw.mac.addr, addr->sa_data);
1253 } 1338 }
1254 1339
1255 /* In order to be sure to not drop any packets, add the new address 1340 /* In order to be sure to not drop any packets, add the new address
@@ -1263,7 +1348,7 @@ static int i40e_set_mac(struct net_device *netdev, void *p)
1263 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false); 1348 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1264 i40e_sync_vsi_filters(vsi); 1349 i40e_sync_vsi_filters(vsi);
1265 1350
1266 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 1351 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1267 1352
1268 return 0; 1353 return 0;
1269} 1354}
@@ -1313,7 +1398,7 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1313 vsi->tc_config.numtc = numtc; 1398 vsi->tc_config.numtc = numtc;
1314 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1399 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1315 /* Number of queues per enabled TC */ 1400 /* Number of queues per enabled TC */
1316 num_tc_qps = rounddown_pow_of_two(vsi->alloc_queue_pairs/numtc); 1401 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1317 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC); 1402 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1318 1403
1319 /* Setup queue offset/count for all TCs for given VSI */ 1404 /* Setup queue offset/count for all TCs for given VSI */
@@ -1520,8 +1605,7 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1520 cmd_flags = 0; 1605 cmd_flags = 0;
1521 1606
1522 /* add to delete list */ 1607 /* add to delete list */
1523 memcpy(del_list[num_del].mac_addr, 1608 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1524 f->macaddr, ETH_ALEN);
1525 del_list[num_del].vlan_tag = 1609 del_list[num_del].vlan_tag =
1526 cpu_to_le16((u16)(f->vlan == 1610 cpu_to_le16((u16)(f->vlan ==
1527 I40E_VLAN_ANY ? 0 : f->vlan)); 1611 I40E_VLAN_ANY ? 0 : f->vlan));
@@ -1542,7 +1626,9 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1542 num_del = 0; 1626 num_del = 0;
1543 memset(del_list, 0, sizeof(*del_list)); 1627 memset(del_list, 0, sizeof(*del_list));
1544 1628
1545 if (aq_ret) 1629 if (aq_ret &&
1630 pf->hw.aq.asq_last_status !=
1631 I40E_AQ_RC_ENOENT)
1546 dev_info(&pf->pdev->dev, 1632 dev_info(&pf->pdev->dev,
1547 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", 1633 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1548 aq_ret, 1634 aq_ret,
@@ -1554,7 +1640,8 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1554 del_list, num_del, NULL); 1640 del_list, num_del, NULL);
1555 num_del = 0; 1641 num_del = 0;
1556 1642
1557 if (aq_ret) 1643 if (aq_ret &&
1644 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1558 dev_info(&pf->pdev->dev, 1645 dev_info(&pf->pdev->dev,
1559 "ignoring delete macvlan error, err %d, aq_err %d\n", 1646 "ignoring delete macvlan error, err %d, aq_err %d\n",
1560 aq_ret, pf->hw.aq.asq_last_status); 1647 aq_ret, pf->hw.aq.asq_last_status);
@@ -1583,8 +1670,7 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1583 cmd_flags = 0; 1670 cmd_flags = 0;
1584 1671
1585 /* add to add array */ 1672 /* add to add array */
1586 memcpy(add_list[num_add].mac_addr, 1673 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1587 f->macaddr, ETH_ALEN);
1588 add_list[num_add].vlan_tag = 1674 add_list[num_add].vlan_tag =
1589 cpu_to_le16( 1675 cpu_to_le16(
1590 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); 1676 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
@@ -1681,7 +1767,7 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1681 return; 1767 return;
1682 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 1768 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1683 1769
1684 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 1770 for (v = 0; v < pf->num_alloc_vsi; v++) {
1685 if (pf->vsi[v] && 1771 if (pf->vsi[v] &&
1686 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) 1772 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1687 i40e_sync_vsi_filters(pf->vsi[v]); 1773 i40e_sync_vsi_filters(pf->vsi[v]);
@@ -1698,7 +1784,7 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1698static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 1784static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1699{ 1785{
1700 struct i40e_netdev_priv *np = netdev_priv(netdev); 1786 struct i40e_netdev_priv *np = netdev_priv(netdev);
1701 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 1787 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1702 struct i40e_vsi *vsi = np->vsi; 1788 struct i40e_vsi *vsi = np->vsi;
1703 1789
1704 /* MTU < 68 is an error and causes problems on some kernels */ 1790 /* MTU < 68 is an error and causes problems on some kernels */
@@ -2312,6 +2398,8 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
2312 rx_ctx.crcstrip = 1; 2398 rx_ctx.crcstrip = 1;
2313 rx_ctx.l2tsel = 1; 2399 rx_ctx.l2tsel = 1;
2314 rx_ctx.showiv = 1; 2400 rx_ctx.showiv = 1;
2401 /* set the prefena field to 1 because the manual says to */
2402 rx_ctx.prefena = 1;
2315 2403
2316 /* clear the context in the HMC */ 2404 /* clear the context in the HMC */
2317 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 2405 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
@@ -2413,6 +2501,7 @@ static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2413 **/ 2501 **/
2414static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 2502static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2415{ 2503{
2504 struct i40e_ring *tx_ring, *rx_ring;
2416 u16 qoffset, qcount; 2505 u16 qoffset, qcount;
2417 int i, n; 2506 int i, n;
2418 2507
@@ -2426,8 +2515,8 @@ static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2426 qoffset = vsi->tc_config.tc_info[n].qoffset; 2515 qoffset = vsi->tc_config.tc_info[n].qoffset;
2427 qcount = vsi->tc_config.tc_info[n].qcount; 2516 qcount = vsi->tc_config.tc_info[n].qcount;
2428 for (i = qoffset; i < (qoffset + qcount); i++) { 2517 for (i = qoffset; i < (qoffset + qcount); i++) {
2429 struct i40e_ring *rx_ring = vsi->rx_rings[i]; 2518 rx_ring = vsi->rx_rings[i];
2430 struct i40e_ring *tx_ring = vsi->tx_rings[i]; 2519 tx_ring = vsi->tx_rings[i];
2431 rx_ring->dcb_tc = n; 2520 rx_ring->dcb_tc = n;
2432 tx_ring->dcb_tc = n; 2521 tx_ring->dcb_tc = n;
2433 } 2522 }
@@ -2565,7 +2654,6 @@ static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2565 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 2654 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2566 I40E_PFINT_ICR0_ENA_GPIO_MASK | 2655 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2567 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK | 2656 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2568 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2569 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 2657 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2570 I40E_PFINT_ICR0_ENA_VFLR_MASK | 2658 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2571 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 2659 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
@@ -2733,6 +2821,7 @@ static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2733 &q_vector->affinity_mask); 2821 &q_vector->affinity_mask);
2734 } 2822 }
2735 2823
2824 vsi->irqs_ready = true;
2736 return 0; 2825 return 0;
2737 2826
2738free_queue_irqs: 2827free_queue_irqs:
@@ -3152,6 +3241,12 @@ static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3152 3241
3153 pf_q = vsi->base_queue; 3242 pf_q = vsi->base_queue;
3154 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 3243 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3244
3245 /* warn the TX unit of coming changes */
3246 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3247 if (!enable)
3248 udelay(10);
3249
3155 for (j = 0; j < 50; j++) { 3250 for (j = 0; j < 50; j++) {
3156 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 3251 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3157 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 3252 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
@@ -3160,9 +3255,7 @@ static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3160 usleep_range(1000, 2000); 3255 usleep_range(1000, 2000);
3161 } 3256 }
3162 /* Skip if the queue is already in the requested state */ 3257 /* Skip if the queue is already in the requested state */
3163 if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3258 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3164 continue;
3165 if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3166 continue; 3259 continue;
3167 3260
3168 /* turn on/off the queue */ 3261 /* turn on/off the queue */
@@ -3178,13 +3271,8 @@ static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3178 /* wait for the change to finish */ 3271 /* wait for the change to finish */
3179 for (j = 0; j < 10; j++) { 3272 for (j = 0; j < 10; j++) {
3180 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 3273 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3181 if (enable) { 3274 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3182 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 3275 break;
3183 break;
3184 } else {
3185 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3186 break;
3187 }
3188 3276
3189 udelay(10); 3277 udelay(10);
3190 } 3278 }
@@ -3223,15 +3311,9 @@ static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3223 usleep_range(1000, 2000); 3311 usleep_range(1000, 2000);
3224 } 3312 }
3225 3313
3226 if (enable) { 3314 /* Skip if the queue is already in the requested state */
3227 /* is STAT set ? */ 3315 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3228 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3316 continue;
3229 continue;
3230 } else {
3231 /* is !STAT set ? */
3232 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3233 continue;
3234 }
3235 3317
3236 /* turn on/off the queue */ 3318 /* turn on/off the queue */
3237 if (enable) 3319 if (enable)
@@ -3244,13 +3326,8 @@ static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3244 for (j = 0; j < 10; j++) { 3326 for (j = 0; j < 10; j++) {
3245 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 3327 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3246 3328
3247 if (enable) { 3329 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3248 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 3330 break;
3249 break;
3250 } else {
3251 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3252 break;
3253 }
3254 3331
3255 udelay(10); 3332 udelay(10);
3256 } 3333 }
@@ -3304,6 +3381,10 @@ static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3304 if (!vsi->q_vectors) 3381 if (!vsi->q_vectors)
3305 return; 3382 return;
3306 3383
3384 if (!vsi->irqs_ready)
3385 return;
3386
3387 vsi->irqs_ready = false;
3307 for (i = 0; i < vsi->num_q_vectors; i++) { 3388 for (i = 0; i < vsi->num_q_vectors; i++) {
3308 u16 vector = i + base; 3389 u16 vector = i + base;
3309 3390
@@ -3476,7 +3557,7 @@ static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3476 int i; 3557 int i;
3477 3558
3478 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 3559 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3479 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) 3560 for (i = 0; i < pf->num_alloc_vsi; i++)
3480 if (pf->vsi[i]) 3561 if (pf->vsi[i])
3481 i40e_vsi_free_q_vectors(pf->vsi[i]); 3562 i40e_vsi_free_q_vectors(pf->vsi[i]);
3482 i40e_reset_interrupt_capability(pf); 3563 i40e_reset_interrupt_capability(pf);
@@ -3513,6 +3594,19 @@ static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3513} 3594}
3514 3595
3515/** 3596/**
3597 * i40e_vsi_close - Shut down a VSI
3598 * @vsi: the vsi to be quelled
3599 **/
3600static void i40e_vsi_close(struct i40e_vsi *vsi)
3601{
3602 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3603 i40e_down(vsi);
3604 i40e_vsi_free_irq(vsi);
3605 i40e_vsi_free_tx_resources(vsi);
3606 i40e_vsi_free_rx_resources(vsi);
3607}
3608
3609/**
3516 * i40e_quiesce_vsi - Pause a given VSI 3610 * i40e_quiesce_vsi - Pause a given VSI
3517 * @vsi: the VSI being paused 3611 * @vsi: the VSI being paused
3518 **/ 3612 **/
@@ -3525,8 +3619,7 @@ static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3525 if (vsi->netdev && netif_running(vsi->netdev)) { 3619 if (vsi->netdev && netif_running(vsi->netdev)) {
3526 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 3620 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3527 } else { 3621 } else {
3528 set_bit(__I40E_DOWN, &vsi->state); 3622 i40e_vsi_close(vsi);
3529 i40e_down(vsi);
3530 } 3623 }
3531} 3624}
3532 3625
@@ -3543,7 +3636,7 @@ static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3543 if (vsi->netdev && netif_running(vsi->netdev)) 3636 if (vsi->netdev && netif_running(vsi->netdev))
3544 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 3637 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3545 else 3638 else
3546 i40e_up(vsi); /* this clears the DOWN bit */ 3639 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3547} 3640}
3548 3641
3549/** 3642/**
@@ -3554,7 +3647,7 @@ static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3554{ 3647{
3555 int v; 3648 int v;
3556 3649
3557 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 3650 for (v = 0; v < pf->num_alloc_vsi; v++) {
3558 if (pf->vsi[v]) 3651 if (pf->vsi[v])
3559 i40e_quiesce_vsi(pf->vsi[v]); 3652 i40e_quiesce_vsi(pf->vsi[v]);
3560 } 3653 }
@@ -3568,7 +3661,7 @@ static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3568{ 3661{
3569 int v; 3662 int v;
3570 3663
3571 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 3664 for (v = 0; v < pf->num_alloc_vsi; v++) {
3572 if (pf->vsi[v]) 3665 if (pf->vsi[v])
3573 i40e_unquiesce_vsi(pf->vsi[v]); 3666 i40e_unquiesce_vsi(pf->vsi[v]);
3574 } 3667 }
@@ -4009,7 +4102,7 @@ static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4009 } 4102 }
4010 4103
4011 /* Update each VSI */ 4104 /* Update each VSI */
4012 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4105 for (v = 0; v < pf->num_alloc_vsi; v++) {
4013 if (!pf->vsi[v]) 4106 if (!pf->vsi[v])
4014 continue; 4107 continue;
4015 4108
@@ -4028,6 +4121,8 @@ static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4028 pf->vsi[v]->seid); 4121 pf->vsi[v]->seid);
4029 /* Will try to configure as many components */ 4122 /* Will try to configure as many components */
4030 } else { 4123 } else {
4124 /* Re-configure VSI vectors based on updated TC map */
4125 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4031 if (pf->vsi[v]->netdev) 4126 if (pf->vsi[v]->netdev)
4032 i40e_dcbnl_set_all(pf->vsi[v]); 4127 i40e_dcbnl_set_all(pf->vsi[v]);
4033 } 4128 }
@@ -4065,14 +4160,69 @@ static int i40e_init_pf_dcb(struct i40e_pf *pf)
4065 /* When status is not DISABLED then DCBX in FW */ 4160 /* When status is not DISABLED then DCBX in FW */
4066 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 4161 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4067 DCB_CAP_DCBX_VER_IEEE; 4162 DCB_CAP_DCBX_VER_IEEE;
4068 pf->flags |= I40E_FLAG_DCB_ENABLED; 4163
4164 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4165 /* Enable DCB tagging only when more than one TC */
4166 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4167 pf->flags |= I40E_FLAG_DCB_ENABLED;
4069 } 4168 }
4169 } else {
4170 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n",
4171 pf->hw.aq.asq_last_status);
4070 } 4172 }
4071 4173
4072out: 4174out:
4073 return err; 4175 return err;
4074} 4176}
4075#endif /* CONFIG_I40E_DCB */ 4177#endif /* CONFIG_I40E_DCB */
4178#define SPEED_SIZE 14
4179#define FC_SIZE 8
4180/**
4181 * i40e_print_link_message - print link up or down
4182 * @vsi: the VSI for which link needs a message
4183 */
4184static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4185{
4186 char speed[SPEED_SIZE] = "Unknown";
4187 char fc[FC_SIZE] = "RX/TX";
4188
4189 if (!isup) {
4190 netdev_info(vsi->netdev, "NIC Link is Down\n");
4191 return;
4192 }
4193
4194 switch (vsi->back->hw.phy.link_info.link_speed) {
4195 case I40E_LINK_SPEED_40GB:
4196 strncpy(speed, "40 Gbps", SPEED_SIZE);
4197 break;
4198 case I40E_LINK_SPEED_10GB:
4199 strncpy(speed, "10 Gbps", SPEED_SIZE);
4200 break;
4201 case I40E_LINK_SPEED_1GB:
4202 strncpy(speed, "1000 Mbps", SPEED_SIZE);
4203 break;
4204 default:
4205 break;
4206 }
4207
4208 switch (vsi->back->hw.fc.current_mode) {
4209 case I40E_FC_FULL:
4210 strncpy(fc, "RX/TX", FC_SIZE);
4211 break;
4212 case I40E_FC_TX_PAUSE:
4213 strncpy(fc, "TX", FC_SIZE);
4214 break;
4215 case I40E_FC_RX_PAUSE:
4216 strncpy(fc, "RX", FC_SIZE);
4217 break;
4218 default:
4219 strncpy(fc, "None", FC_SIZE);
4220 break;
4221 }
4222
4223 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4224 speed, fc);
4225}
4076 4226
4077/** 4227/**
4078 * i40e_up_complete - Finish the last steps of bringing up a connection 4228 * i40e_up_complete - Finish the last steps of bringing up a connection
@@ -4099,11 +4249,11 @@ static int i40e_up_complete(struct i40e_vsi *vsi)
4099 4249
4100 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 4250 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4101 (vsi->netdev)) { 4251 (vsi->netdev)) {
4102 netdev_info(vsi->netdev, "NIC Link is Up\n"); 4252 i40e_print_link_message(vsi, true);
4103 netif_tx_start_all_queues(vsi->netdev); 4253 netif_tx_start_all_queues(vsi->netdev);
4104 netif_carrier_on(vsi->netdev); 4254 netif_carrier_on(vsi->netdev);
4105 } else if (vsi->netdev) { 4255 } else if (vsi->netdev) {
4106 netdev_info(vsi->netdev, "NIC Link is Down\n"); 4256 i40e_print_link_message(vsi, false);
4107 } 4257 }
4108 4258
4109 /* replay FDIR SB filters */ 4259 /* replay FDIR SB filters */
@@ -4309,24 +4459,32 @@ int i40e_vsi_open(struct i40e_vsi *vsi)
4309 if (err) 4459 if (err)
4310 goto err_setup_rx; 4460 goto err_setup_rx;
4311 4461
4312 if (!vsi->netdev) { 4462 if (vsi->netdev) {
4313 err = EINVAL; 4463 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4314 goto err_setup_rx; 4464 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4315 } 4465 err = i40e_vsi_request_irq(vsi, int_name);
4316 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 4466 if (err)
4317 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 4467 goto err_setup_rx;
4318 err = i40e_vsi_request_irq(vsi, int_name);
4319 if (err)
4320 goto err_setup_rx;
4321 4468
4322 /* Notify the stack of the actual queue counts. */ 4469 /* Notify the stack of the actual queue counts. */
4323 err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_queue_pairs); 4470 err = netif_set_real_num_tx_queues(vsi->netdev,
4324 if (err) 4471 vsi->num_queue_pairs);
4325 goto err_set_queues; 4472 if (err)
4473 goto err_set_queues;
4326 4474
4327 err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_queue_pairs); 4475 err = netif_set_real_num_rx_queues(vsi->netdev,
4328 if (err) 4476 vsi->num_queue_pairs);
4329 goto err_set_queues; 4477 if (err)
4478 goto err_set_queues;
4479
4480 } else if (vsi->type == I40E_VSI_FDIR) {
4481 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4482 dev_driver_string(&pf->pdev->dev));
4483 err = i40e_vsi_request_irq(vsi, int_name);
4484 } else {
4485 err = -EINVAL;
4486 goto err_setup_rx;
4487 }
4330 4488
4331 err = i40e_up_complete(vsi); 4489 err = i40e_up_complete(vsi);
4332 if (err) 4490 if (err)
@@ -4383,14 +4541,7 @@ static int i40e_close(struct net_device *netdev)
4383 struct i40e_netdev_priv *np = netdev_priv(netdev); 4541 struct i40e_netdev_priv *np = netdev_priv(netdev);
4384 struct i40e_vsi *vsi = np->vsi; 4542 struct i40e_vsi *vsi = np->vsi;
4385 4543
4386 if (test_and_set_bit(__I40E_DOWN, &vsi->state)) 4544 i40e_vsi_close(vsi);
4387 return 0;
4388
4389 i40e_down(vsi);
4390 i40e_vsi_free_irq(vsi);
4391
4392 i40e_vsi_free_tx_resources(vsi);
4393 i40e_vsi_free_rx_resources(vsi);
4394 4545
4395 return 0; 4546 return 0;
4396} 4547}
@@ -4410,6 +4561,9 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4410 4561
4411 WARN_ON(in_interrupt()); 4562 WARN_ON(in_interrupt());
4412 4563
4564 if (i40e_check_asq_alive(&pf->hw))
4565 i40e_vc_notify_reset(pf);
4566
4413 /* do the biggest reset indicated */ 4567 /* do the biggest reset indicated */
4414 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) { 4568 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4415 4569
@@ -4475,7 +4629,7 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4475 /* Find the VSI(s) that requested a re-init */ 4629 /* Find the VSI(s) that requested a re-init */
4476 dev_info(&pf->pdev->dev, 4630 dev_info(&pf->pdev->dev,
4477 "VSI reinit requested\n"); 4631 "VSI reinit requested\n");
4478 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4632 for (v = 0; v < pf->num_alloc_vsi; v++) {
4479 struct i40e_vsi *vsi = pf->vsi[v]; 4633 struct i40e_vsi *vsi = pf->vsi[v];
4480 if (vsi != NULL && 4634 if (vsi != NULL &&
4481 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { 4635 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
@@ -4565,6 +4719,10 @@ static int i40e_handle_lldp_event(struct i40e_pf *pf,
4565 int ret = 0; 4719 int ret = 0;
4566 u8 type; 4720 u8 type;
4567 4721
4722 /* Not DCB capable or capability disabled */
4723 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
4724 return ret;
4725
4568 /* Ignore if event is not for Nearest Bridge */ 4726 /* Ignore if event is not for Nearest Bridge */
4569 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 4727 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4570 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 4728 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
@@ -4606,6 +4764,12 @@ static int i40e_handle_lldp_event(struct i40e_pf *pf,
4606 if (!need_reconfig) 4764 if (!need_reconfig)
4607 goto exit; 4765 goto exit;
4608 4766
4767 /* Enable DCB tagging only when more than one TC */
4768 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
4769 pf->flags |= I40E_FLAG_DCB_ENABLED;
4770 else
4771 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
4772
4609 /* Reconfiguration needed quiesce all VSIs */ 4773 /* Reconfiguration needed quiesce all VSIs */
4610 i40e_pf_quiesce_all_vsi(pf); 4774 i40e_pf_quiesce_all_vsi(pf);
4611 4775
@@ -4709,8 +4873,7 @@ void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
4709 (pf->flags & I40E_FLAG_FD_SB_ENABLED)) 4873 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4710 return; 4874 return;
4711 fcnt_prog = i40e_get_current_fd_count(pf); 4875 fcnt_prog = i40e_get_current_fd_count(pf);
4712 fcnt_avail = pf->hw.fdir_shared_filter_count + 4876 fcnt_avail = i40e_get_fd_cnt_all(pf);
4713 pf->fdir_pf_filter_count;
4714 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) { 4877 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) {
4715 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 4878 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
4716 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { 4879 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
@@ -4803,7 +4966,7 @@ static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4803 i40e_veb_link_event(pf->veb[i], link_up); 4966 i40e_veb_link_event(pf->veb[i], link_up);
4804 4967
4805 /* ... now the local VSIs */ 4968 /* ... now the local VSIs */
4806 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) 4969 for (i = 0; i < pf->num_alloc_vsi; i++)
4807 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 4970 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4808 i40e_vsi_link_event(pf->vsi[i], link_up); 4971 i40e_vsi_link_event(pf->vsi[i], link_up);
4809} 4972}
@@ -4821,10 +4984,8 @@ static void i40e_link_event(struct i40e_pf *pf)
4821 4984
4822 if (new_link == old_link) 4985 if (new_link == old_link)
4823 return; 4986 return;
4824
4825 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state)) 4987 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4826 netdev_info(pf->vsi[pf->lan_vsi]->netdev, 4988 i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link);
4827 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4828 4989
4829 /* Notify the base of the switch tree connected to 4990 /* Notify the base of the switch tree connected to
4830 * the link. Floating VEBs are not notified. 4991 * the link. Floating VEBs are not notified.
@@ -4862,7 +5023,7 @@ static void i40e_check_hang_subtask(struct i40e_pf *pf)
4862 * for each q_vector 5023 * for each q_vector
4863 * force an interrupt 5024 * force an interrupt
4864 */ 5025 */
4865 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 5026 for (v = 0; v < pf->num_alloc_vsi; v++) {
4866 struct i40e_vsi *vsi = pf->vsi[v]; 5027 struct i40e_vsi *vsi = pf->vsi[v];
4867 int armed = 0; 5028 int armed = 0;
4868 5029
@@ -4912,7 +5073,7 @@ static void i40e_watchdog_subtask(struct i40e_pf *pf)
4912 /* Update the stats for active netdevs so the network stack 5073 /* Update the stats for active netdevs so the network stack
4913 * can look at updated numbers whenever it cares to 5074 * can look at updated numbers whenever it cares to
4914 */ 5075 */
4915 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) 5076 for (i = 0; i < pf->num_alloc_vsi; i++)
4916 if (pf->vsi[i] && pf->vsi[i]->netdev) 5077 if (pf->vsi[i] && pf->vsi[i]->netdev)
4917 i40e_update_stats(pf->vsi[i]); 5078 i40e_update_stats(pf->vsi[i]);
4918 5079
@@ -5018,11 +5179,47 @@ static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5018 u16 pending, i = 0; 5179 u16 pending, i = 0;
5019 i40e_status ret; 5180 i40e_status ret;
5020 u16 opcode; 5181 u16 opcode;
5182 u32 oldval;
5021 u32 val; 5183 u32 val;
5022 5184
5023 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state)) 5185 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
5024 return; 5186 return;
5025 5187
5188 /* check for error indications */
5189 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5190 oldval = val;
5191 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5192 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5193 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5194 }
5195 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5196 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5197 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5198 }
5199 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5200 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5201 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5202 }
5203 if (oldval != val)
5204 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5205
5206 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5207 oldval = val;
5208 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5209 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5210 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5211 }
5212 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5213 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5214 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5215 }
5216 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5217 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5218 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5219 }
5220 if (oldval != val)
5221 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5222
5026 event.msg_size = I40E_MAX_AQ_BUF_SIZE; 5223 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5027 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL); 5224 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5028 if (!event.msg_buf) 5225 if (!event.msg_buf)
@@ -5128,7 +5325,7 @@ static int i40e_reconstitute_veb(struct i40e_veb *veb)
5128 int ret; 5325 int ret;
5129 5326
5130 /* build VSI that owns this VEB, temporarily attached to base VEB */ 5327 /* build VSI that owns this VEB, temporarily attached to base VEB */
5131 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) { 5328 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5132 if (pf->vsi[v] && 5329 if (pf->vsi[v] &&
5133 pf->vsi[v]->veb_idx == veb->idx && 5330 pf->vsi[v]->veb_idx == veb->idx &&
5134 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 5331 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
@@ -5158,7 +5355,7 @@ static int i40e_reconstitute_veb(struct i40e_veb *veb)
5158 goto end_reconstitute; 5355 goto end_reconstitute;
5159 5356
5160 /* create the remaining VSIs attached to this VEB */ 5357 /* create the remaining VSIs attached to this VEB */
5161 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 5358 for (v = 0; v < pf->num_alloc_vsi; v++) {
5162 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 5359 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5163 continue; 5360 continue;
5164 5361
@@ -5226,9 +5423,6 @@ static int i40e_get_capabilities(struct i40e_pf *pf)
5226 } 5423 }
5227 } while (err); 5424 } while (err);
5228 5425
5229 /* increment MSI-X count because current FW skips one */
5230 pf->hw.func_caps.num_msix_vectors++;
5231
5232 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) || 5426 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5233 (pf->hw.aq.fw_maj_ver < 2)) { 5427 (pf->hw.aq.fw_maj_ver < 2)) {
5234 pf->hw.func_caps.num_msix_vectors++; 5428 pf->hw.func_caps.num_msix_vectors++;
@@ -5267,15 +5461,14 @@ static int i40e_vsi_clear(struct i40e_vsi *vsi);
5267static void i40e_fdir_sb_setup(struct i40e_pf *pf) 5461static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5268{ 5462{
5269 struct i40e_vsi *vsi; 5463 struct i40e_vsi *vsi;
5270 bool new_vsi = false; 5464 int i;
5271 int err, i;
5272 5465
5273 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 5466 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5274 return; 5467 return;
5275 5468
5276 /* find existing VSI and see if it needs configuring */ 5469 /* find existing VSI and see if it needs configuring */
5277 vsi = NULL; 5470 vsi = NULL;
5278 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { 5471 for (i = 0; i < pf->num_alloc_vsi; i++) {
5279 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 5472 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5280 vsi = pf->vsi[i]; 5473 vsi = pf->vsi[i];
5281 break; 5474 break;
@@ -5288,47 +5481,12 @@ static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5288 pf->vsi[pf->lan_vsi]->seid, 0); 5481 pf->vsi[pf->lan_vsi]->seid, 0);
5289 if (!vsi) { 5482 if (!vsi) {
5290 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 5483 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5291 goto err_vsi; 5484 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5485 return;
5292 } 5486 }
5293 new_vsi = true;
5294 }
5295 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5296
5297 err = i40e_vsi_setup_tx_resources(vsi);
5298 if (err)
5299 goto err_setup_tx;
5300 err = i40e_vsi_setup_rx_resources(vsi);
5301 if (err)
5302 goto err_setup_rx;
5303
5304 if (new_vsi) {
5305 char int_name[IFNAMSIZ + 9];
5306 err = i40e_vsi_configure(vsi);
5307 if (err)
5308 goto err_setup_rx;
5309 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
5310 dev_driver_string(&pf->pdev->dev));
5311 err = i40e_vsi_request_irq(vsi, int_name);
5312 if (err)
5313 goto err_setup_rx;
5314 err = i40e_up_complete(vsi);
5315 if (err)
5316 goto err_up_complete;
5317 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
5318 } 5487 }
5319 5488
5320 return; 5489 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5321
5322err_up_complete:
5323 i40e_down(vsi);
5324 i40e_vsi_free_irq(vsi);
5325err_setup_rx:
5326 i40e_vsi_free_rx_resources(vsi);
5327err_setup_tx:
5328 i40e_vsi_free_tx_resources(vsi);
5329err_vsi:
5330 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5331 i40e_vsi_clear(vsi);
5332} 5490}
5333 5491
5334/** 5492/**
@@ -5340,7 +5498,7 @@ static void i40e_fdir_teardown(struct i40e_pf *pf)
5340 int i; 5498 int i;
5341 5499
5342 i40e_fdir_filter_exit(pf); 5500 i40e_fdir_filter_exit(pf);
5343 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { 5501 for (i = 0; i < pf->num_alloc_vsi; i++) {
5344 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 5502 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5345 i40e_vsi_release(pf->vsi[i]); 5503 i40e_vsi_release(pf->vsi[i]);
5346 break; 5504 break;
@@ -5357,7 +5515,7 @@ static void i40e_fdir_teardown(struct i40e_pf *pf)
5357static int i40e_prep_for_reset(struct i40e_pf *pf) 5515static int i40e_prep_for_reset(struct i40e_pf *pf)
5358{ 5516{
5359 struct i40e_hw *hw = &pf->hw; 5517 struct i40e_hw *hw = &pf->hw;
5360 i40e_status ret; 5518 i40e_status ret = 0;
5361 u32 v; 5519 u32 v;
5362 5520
5363 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); 5521 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
@@ -5366,13 +5524,10 @@ static int i40e_prep_for_reset(struct i40e_pf *pf)
5366 5524
5367 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 5525 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5368 5526
5369 if (i40e_check_asq_alive(hw))
5370 i40e_vc_notify_reset(pf);
5371
5372 /* quiesce the VSIs and their queues that are not already DOWN */ 5527 /* quiesce the VSIs and their queues that are not already DOWN */
5373 i40e_pf_quiesce_all_vsi(pf); 5528 i40e_pf_quiesce_all_vsi(pf);
5374 5529
5375 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 5530 for (v = 0; v < pf->num_alloc_vsi; v++) {
5376 if (pf->vsi[v]) 5531 if (pf->vsi[v])
5377 pf->vsi[v]->seid = 0; 5532 pf->vsi[v]->seid = 0;
5378 } 5533 }
@@ -5380,22 +5535,40 @@ static int i40e_prep_for_reset(struct i40e_pf *pf)
5380 i40e_shutdown_adminq(&pf->hw); 5535 i40e_shutdown_adminq(&pf->hw);
5381 5536
5382 /* call shutdown HMC */ 5537 /* call shutdown HMC */
5383 ret = i40e_shutdown_lan_hmc(hw); 5538 if (hw->hmc.hmc_obj) {
5384 if (ret) { 5539 ret = i40e_shutdown_lan_hmc(hw);
5385 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret); 5540 if (ret) {
5386 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 5541 dev_warn(&pf->pdev->dev,
5542 "shutdown_lan_hmc failed: %d\n", ret);
5543 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5544 }
5387 } 5545 }
5388 return ret; 5546 return ret;
5389} 5547}
5390 5548
5391/** 5549/**
5550 * i40e_send_version - update firmware with driver version
5551 * @pf: PF struct
5552 */
5553static void i40e_send_version(struct i40e_pf *pf)
5554{
5555 struct i40e_driver_version dv;
5556
5557 dv.major_version = DRV_VERSION_MAJOR;
5558 dv.minor_version = DRV_VERSION_MINOR;
5559 dv.build_version = DRV_VERSION_BUILD;
5560 dv.subbuild_version = 0;
5561 strncpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
5562 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5563}
5564
5565/**
5392 * i40e_reset_and_rebuild - reset and rebuild using a saved config 5566 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5393 * @pf: board private structure 5567 * @pf: board private structure
5394 * @reinit: if the Main VSI needs to re-initialized. 5568 * @reinit: if the Main VSI needs to re-initialized.
5395 **/ 5569 **/
5396static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) 5570static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5397{ 5571{
5398 struct i40e_driver_version dv;
5399 struct i40e_hw *hw = &pf->hw; 5572 struct i40e_hw *hw = &pf->hw;
5400 i40e_status ret; 5573 i40e_status ret;
5401 u32 v; 5574 u32 v;
@@ -5405,8 +5578,10 @@ static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5405 * because the reset will make them disappear. 5578 * because the reset will make them disappear.
5406 */ 5579 */
5407 ret = i40e_pf_reset(hw); 5580 ret = i40e_pf_reset(hw);
5408 if (ret) 5581 if (ret) {
5409 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 5582 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5583 goto end_core_reset;
5584 }
5410 pf->pfr_count++; 5585 pf->pfr_count++;
5411 5586
5412 if (test_bit(__I40E_DOWN, &pf->state)) 5587 if (test_bit(__I40E_DOWN, &pf->state))
@@ -5426,6 +5601,7 @@ static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5426 i40e_verify_eeprom(pf); 5601 i40e_verify_eeprom(pf);
5427 } 5602 }
5428 5603
5604 i40e_clear_pxe_mode(hw);
5429 ret = i40e_get_capabilities(pf); 5605 ret = i40e_get_capabilities(pf);
5430 if (ret) { 5606 if (ret) {
5431 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n", 5607 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
@@ -5526,13 +5702,7 @@ static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5526 } 5702 }
5527 5703
5528 /* tell the firmware that we're starting */ 5704 /* tell the firmware that we're starting */
5529 dv.major_version = DRV_VERSION_MAJOR; 5705 i40e_send_version(pf);
5530 dv.minor_version = DRV_VERSION_MINOR;
5531 dv.build_version = DRV_VERSION_BUILD;
5532 dv.subbuild_version = 0;
5533 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5534
5535 dev_info(&pf->pdev->dev, "reset complete\n");
5536 5706
5537end_core_reset: 5707end_core_reset:
5538 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); 5708 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
@@ -5642,7 +5812,6 @@ static void i40e_handle_mdd_event(struct i40e_pf *pf)
5642 **/ 5812 **/
5643static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf) 5813static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5644{ 5814{
5645 const int vxlan_hdr_qwords = 4;
5646 struct i40e_hw *hw = &pf->hw; 5815 struct i40e_hw *hw = &pf->hw;
5647 i40e_status ret; 5816 i40e_status ret;
5648 u8 filter_index; 5817 u8 filter_index;
@@ -5660,7 +5829,6 @@ static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5660 port = pf->vxlan_ports[i]; 5829 port = pf->vxlan_ports[i];
5661 ret = port ? 5830 ret = port ?
5662 i40e_aq_add_udp_tunnel(hw, ntohs(port), 5831 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5663 vxlan_hdr_qwords,
5664 I40E_AQC_TUNNEL_TYPE_VXLAN, 5832 I40E_AQC_TUNNEL_TYPE_VXLAN,
5665 &filter_index, NULL) 5833 &filter_index, NULL)
5666 : i40e_aq_del_udp_tunnel(hw, i, NULL); 5834 : i40e_aq_del_udp_tunnel(hw, i, NULL);
@@ -5839,15 +6007,15 @@ static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5839 * find next empty vsi slot, looping back around if necessary 6007 * find next empty vsi slot, looping back around if necessary
5840 */ 6008 */
5841 i = pf->next_vsi; 6009 i = pf->next_vsi;
5842 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i]) 6010 while (i < pf->num_alloc_vsi && pf->vsi[i])
5843 i++; 6011 i++;
5844 if (i >= pf->hw.func_caps.num_vsis) { 6012 if (i >= pf->num_alloc_vsi) {
5845 i = 0; 6013 i = 0;
5846 while (i < pf->next_vsi && pf->vsi[i]) 6014 while (i < pf->next_vsi && pf->vsi[i])
5847 i++; 6015 i++;
5848 } 6016 }
5849 6017
5850 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) { 6018 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
5851 vsi_idx = i; /* Found one! */ 6019 vsi_idx = i; /* Found one! */
5852 } else { 6020 } else {
5853 ret = -ENODEV; 6021 ret = -ENODEV;
@@ -5870,6 +6038,7 @@ static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5870 vsi->netdev_registered = false; 6038 vsi->netdev_registered = false;
5871 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 6039 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5872 INIT_LIST_HEAD(&vsi->mac_filter_list); 6040 INIT_LIST_HEAD(&vsi->mac_filter_list);
6041 vsi->irqs_ready = false;
5873 6042
5874 ret = i40e_set_num_rings_in_vsi(vsi); 6043 ret = i40e_set_num_rings_in_vsi(vsi);
5875 if (ret) 6044 if (ret)
@@ -5987,14 +6156,12 @@ static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5987 **/ 6156 **/
5988static int i40e_alloc_rings(struct i40e_vsi *vsi) 6157static int i40e_alloc_rings(struct i40e_vsi *vsi)
5989{ 6158{
6159 struct i40e_ring *tx_ring, *rx_ring;
5990 struct i40e_pf *pf = vsi->back; 6160 struct i40e_pf *pf = vsi->back;
5991 int i; 6161 int i;
5992 6162
5993 /* Set basic values in the rings to be used later during open() */ 6163 /* Set basic values in the rings to be used later during open() */
5994 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 6164 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5995 struct i40e_ring *tx_ring;
5996 struct i40e_ring *rx_ring;
5997
5998 /* allocate space for both Tx and Rx in one shot */ 6165 /* allocate space for both Tx and Rx in one shot */
5999 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); 6166 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6000 if (!tx_ring) 6167 if (!tx_ring)
@@ -6052,8 +6219,6 @@ static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6052 vectors = 0; 6219 vectors = 0;
6053 } 6220 }
6054 6221
6055 pf->num_msix_entries = vectors;
6056
6057 return vectors; 6222 return vectors;
6058} 6223}
6059 6224
@@ -6107,6 +6272,16 @@ static int i40e_init_msix(struct i40e_pf *pf)
6107 for (i = 0; i < v_budget; i++) 6272 for (i = 0; i < v_budget; i++)
6108 pf->msix_entries[i].entry = i; 6273 pf->msix_entries[i].entry = i;
6109 vec = i40e_reserve_msix_vectors(pf, v_budget); 6274 vec = i40e_reserve_msix_vectors(pf, v_budget);
6275
6276 if (vec != v_budget) {
6277 /* If we have limited resources, we will start with no vectors
6278 * for the special features and then allocate vectors to some
6279 * of these features based on the policy and at the end disable
6280 * the features that did not get any vectors.
6281 */
6282 pf->num_vmdq_msix = 0;
6283 }
6284
6110 if (vec < I40E_MIN_MSIX) { 6285 if (vec < I40E_MIN_MSIX) {
6111 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 6286 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6112 kfree(pf->msix_entries); 6287 kfree(pf->msix_entries);
@@ -6115,27 +6290,25 @@ static int i40e_init_msix(struct i40e_pf *pf)
6115 6290
6116 } else if (vec == I40E_MIN_MSIX) { 6291 } else if (vec == I40E_MIN_MSIX) {
6117 /* Adjust for minimal MSIX use */ 6292 /* Adjust for minimal MSIX use */
6118 dev_info(&pf->pdev->dev, "Features disabled, not enough MSI-X vectors\n");
6119 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6120 pf->num_vmdq_vsis = 0; 6293 pf->num_vmdq_vsis = 0;
6121 pf->num_vmdq_qps = 0; 6294 pf->num_vmdq_qps = 0;
6122 pf->num_vmdq_msix = 0;
6123 pf->num_lan_qps = 1; 6295 pf->num_lan_qps = 1;
6124 pf->num_lan_msix = 1; 6296 pf->num_lan_msix = 1;
6125 6297
6126 } else if (vec != v_budget) { 6298 } else if (vec != v_budget) {
6299 /* reserve the misc vector */
6300 vec--;
6301
6127 /* Scale vector usage down */ 6302 /* Scale vector usage down */
6128 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 6303 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6129 vec--; /* reserve the misc vector */ 6304 pf->num_vmdq_vsis = 1;
6130 6305
6131 /* partition out the remaining vectors */ 6306 /* partition out the remaining vectors */
6132 switch (vec) { 6307 switch (vec) {
6133 case 2: 6308 case 2:
6134 pf->num_vmdq_vsis = 1;
6135 pf->num_lan_msix = 1; 6309 pf->num_lan_msix = 1;
6136 break; 6310 break;
6137 case 3: 6311 case 3:
6138 pf->num_vmdq_vsis = 1;
6139 pf->num_lan_msix = 2; 6312 pf->num_lan_msix = 2;
6140 break; 6313 break;
6141 default: 6314 default:
@@ -6147,6 +6320,11 @@ static int i40e_init_msix(struct i40e_pf *pf)
6147 } 6320 }
6148 } 6321 }
6149 6322
6323 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6324 (pf->num_vmdq_msix == 0)) {
6325 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
6326 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6327 }
6150 return err; 6328 return err;
6151} 6329}
6152 6330
@@ -6171,7 +6349,7 @@ static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6171 cpumask_set_cpu(v_idx, &q_vector->affinity_mask); 6349 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6172 if (vsi->netdev) 6350 if (vsi->netdev)
6173 netif_napi_add(vsi->netdev, &q_vector->napi, 6351 netif_napi_add(vsi->netdev, &q_vector->napi,
6174 i40e_napi_poll, vsi->work_limit); 6352 i40e_napi_poll, NAPI_POLL_WEIGHT);
6175 6353
6176 q_vector->rx.latency_range = I40E_LOW_LATENCY; 6354 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6177 q_vector->tx.latency_range = I40E_LOW_LATENCY; 6355 q_vector->tx.latency_range = I40E_LOW_LATENCY;
@@ -6231,7 +6409,7 @@ static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6231 if (err) { 6409 if (err) {
6232 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 6410 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6233 I40E_FLAG_RSS_ENABLED | 6411 I40E_FLAG_RSS_ENABLED |
6234 I40E_FLAG_DCB_ENABLED | 6412 I40E_FLAG_DCB_CAPABLE |
6235 I40E_FLAG_SRIOV_ENABLED | 6413 I40E_FLAG_SRIOV_ENABLED |
6236 I40E_FLAG_FD_SB_ENABLED | 6414 I40E_FLAG_FD_SB_ENABLED |
6237 I40E_FLAG_FD_ATR_ENABLED | 6415 I40E_FLAG_FD_ATR_ENABLED |
@@ -6364,7 +6542,6 @@ int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6364 return 0; 6542 return 0;
6365 6543
6366 queue_count = min_t(int, queue_count, pf->rss_size_max); 6544 queue_count = min_t(int, queue_count, pf->rss_size_max);
6367 queue_count = rounddown_pow_of_two(queue_count);
6368 6545
6369 if (queue_count != pf->rss_size) { 6546 if (queue_count != pf->rss_size) {
6370 i40e_prep_for_reset(pf); 6547 i40e_prep_for_reset(pf);
@@ -6407,6 +6584,10 @@ static int i40e_sw_init(struct i40e_pf *pf)
6407 I40E_FLAG_MSIX_ENABLED | 6584 I40E_FLAG_MSIX_ENABLED |
6408 I40E_FLAG_RX_1BUF_ENABLED; 6585 I40E_FLAG_RX_1BUF_ENABLED;
6409 6586
6587 /* Set default ITR */
6588 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
6589 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
6590
6410 /* Depending on PF configurations, it is possible that the RSS 6591 /* Depending on PF configurations, it is possible that the RSS
6411 * maximum might end up larger than the available queues 6592 * maximum might end up larger than the available queues
6412 */ 6593 */
@@ -6416,7 +6597,6 @@ static int i40e_sw_init(struct i40e_pf *pf)
6416 if (pf->hw.func_caps.rss) { 6597 if (pf->hw.func_caps.rss) {
6417 pf->flags |= I40E_FLAG_RSS_ENABLED; 6598 pf->flags |= I40E_FLAG_RSS_ENABLED;
6418 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus()); 6599 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6419 pf->rss_size = rounddown_pow_of_two(pf->rss_size);
6420 } else { 6600 } else {
6421 pf->rss_size = 1; 6601 pf->rss_size = 1;
6422 } 6602 }
@@ -6432,8 +6612,12 @@ static int i40e_sw_init(struct i40e_pf *pf)
6432 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 6612 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6433 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 6613 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6434 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 6614 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6615 /* Setup a counter for fd_atr per pf */
6616 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
6435 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) { 6617 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6436 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 6618 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6619 /* Setup a counter for fd_sb per pf */
6620 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
6437 } else { 6621 } else {
6438 dev_info(&pf->pdev->dev, 6622 dev_info(&pf->pdev->dev,
6439 "Flow Director Sideband mode Disabled in MFP mode\n"); 6623 "Flow Director Sideband mode Disabled in MFP mode\n");
@@ -6649,6 +6833,96 @@ static void i40e_del_vxlan_port(struct net_device *netdev,
6649} 6833}
6650 6834
6651#endif 6835#endif
6836#ifdef HAVE_FDB_OPS
6837#ifdef USE_CONST_DEV_UC_CHAR
6838static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
6839 struct net_device *dev,
6840 const unsigned char *addr,
6841 u16 flags)
6842#else
6843static int i40e_ndo_fdb_add(struct ndmsg *ndm,
6844 struct net_device *dev,
6845 unsigned char *addr,
6846 u16 flags)
6847#endif
6848{
6849 struct i40e_netdev_priv *np = netdev_priv(dev);
6850 struct i40e_pf *pf = np->vsi->back;
6851 int err = 0;
6852
6853 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
6854 return -EOPNOTSUPP;
6855
6856 /* Hardware does not support aging addresses so if a
6857 * ndm_state is given only allow permanent addresses
6858 */
6859 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
6860 netdev_info(dev, "FDB only supports static addresses\n");
6861 return -EINVAL;
6862 }
6863
6864 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
6865 err = dev_uc_add_excl(dev, addr);
6866 else if (is_multicast_ether_addr(addr))
6867 err = dev_mc_add_excl(dev, addr);
6868 else
6869 err = -EINVAL;
6870
6871 /* Only return duplicate errors if NLM_F_EXCL is set */
6872 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6873 err = 0;
6874
6875 return err;
6876}
6877
6878#ifndef USE_DEFAULT_FDB_DEL_DUMP
6879#ifdef USE_CONST_DEV_UC_CHAR
6880static int i40e_ndo_fdb_del(struct ndmsg *ndm,
6881 struct net_device *dev,
6882 const unsigned char *addr)
6883#else
6884static int i40e_ndo_fdb_del(struct ndmsg *ndm,
6885 struct net_device *dev,
6886 unsigned char *addr)
6887#endif
6888{
6889 struct i40e_netdev_priv *np = netdev_priv(dev);
6890 struct i40e_pf *pf = np->vsi->back;
6891 int err = -EOPNOTSUPP;
6892
6893 if (ndm->ndm_state & NUD_PERMANENT) {
6894 netdev_info(dev, "FDB only supports static addresses\n");
6895 return -EINVAL;
6896 }
6897
6898 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
6899 if (is_unicast_ether_addr(addr))
6900 err = dev_uc_del(dev, addr);
6901 else if (is_multicast_ether_addr(addr))
6902 err = dev_mc_del(dev, addr);
6903 else
6904 err = -EINVAL;
6905 }
6906
6907 return err;
6908}
6909
6910static int i40e_ndo_fdb_dump(struct sk_buff *skb,
6911 struct netlink_callback *cb,
6912 struct net_device *dev,
6913 int idx)
6914{
6915 struct i40e_netdev_priv *np = netdev_priv(dev);
6916 struct i40e_pf *pf = np->vsi->back;
6917
6918 if (pf->flags & I40E_FLAG_SRIOV_ENABLED)
6919 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
6920
6921 return idx;
6922}
6923
6924#endif /* USE_DEFAULT_FDB_DEL_DUMP */
6925#endif /* HAVE_FDB_OPS */
6652static const struct net_device_ops i40e_netdev_ops = { 6926static const struct net_device_ops i40e_netdev_ops = {
6653 .ndo_open = i40e_open, 6927 .ndo_open = i40e_open,
6654 .ndo_stop = i40e_close, 6928 .ndo_stop = i40e_close,
@@ -6669,13 +6943,21 @@ static const struct net_device_ops i40e_netdev_ops = {
6669 .ndo_set_features = i40e_set_features, 6943 .ndo_set_features = i40e_set_features,
6670 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 6944 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
6671 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 6945 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
6672 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw, 6946 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
6673 .ndo_get_vf_config = i40e_ndo_get_vf_config, 6947 .ndo_get_vf_config = i40e_ndo_get_vf_config,
6674 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 6948 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
6949 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofck,
6675#ifdef CONFIG_I40E_VXLAN 6950#ifdef CONFIG_I40E_VXLAN
6676 .ndo_add_vxlan_port = i40e_add_vxlan_port, 6951 .ndo_add_vxlan_port = i40e_add_vxlan_port,
6677 .ndo_del_vxlan_port = i40e_del_vxlan_port, 6952 .ndo_del_vxlan_port = i40e_del_vxlan_port,
6678#endif 6953#endif
6954#ifdef HAVE_FDB_OPS
6955 .ndo_fdb_add = i40e_ndo_fdb_add,
6956#ifndef USE_DEFAULT_FDB_DEL_DUMP
6957 .ndo_fdb_del = i40e_ndo_fdb_del,
6958 .ndo_fdb_dump = i40e_ndo_fdb_dump,
6959#endif
6960#endif
6679}; 6961};
6680 6962
6681/** 6963/**
@@ -6720,16 +7002,26 @@ static int i40e_config_netdev(struct i40e_vsi *vsi)
6720 NETIF_F_TSO_ECN | 7002 NETIF_F_TSO_ECN |
6721 NETIF_F_TSO6 | 7003 NETIF_F_TSO6 |
6722 NETIF_F_RXCSUM | 7004 NETIF_F_RXCSUM |
6723 NETIF_F_NTUPLE |
6724 NETIF_F_RXHASH | 7005 NETIF_F_RXHASH |
6725 0; 7006 0;
6726 7007
7008 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7009 netdev->features |= NETIF_F_NTUPLE;
7010
6727 /* copy netdev features into list of user selectable features */ 7011 /* copy netdev features into list of user selectable features */
6728 netdev->hw_features |= netdev->features; 7012 netdev->hw_features |= netdev->features;
6729 7013
6730 if (vsi->type == I40E_VSI_MAIN) { 7014 if (vsi->type == I40E_VSI_MAIN) {
6731 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 7015 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
6732 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN); 7016 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7017 /* The following two steps are necessary to prevent reception
7018 * of tagged packets - by default the NVM loads a MAC-VLAN
7019 * filter that will accept any tagged packet. This is to
7020 * prevent that during normal operations until a specific
7021 * VLAN tag filter has been set.
7022 */
7023 i40e_rm_default_mac_filter(vsi, mac_addr);
7024 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
6733 } else { 7025 } else {
6734 /* relate the VSI_VMDQ name to the VSI_MAIN name */ 7026 /* relate the VSI_VMDQ name to the VSI_MAIN name */
6735 snprintf(netdev->name, IFNAMSIZ, "%sv%%d", 7027 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
@@ -6739,8 +7031,8 @@ static int i40e_config_netdev(struct i40e_vsi *vsi)
6739 } 7031 }
6740 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false); 7032 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
6741 7033
6742 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN); 7034 ether_addr_copy(netdev->dev_addr, mac_addr);
6743 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN); 7035 ether_addr_copy(netdev->perm_addr, mac_addr);
6744 /* vlan gets same features (except vlan offload) 7036 /* vlan gets same features (except vlan offload)
6745 * after any tweaks for specific VSI types 7037 * after any tweaks for specific VSI types
6746 */ 7038 */
@@ -6772,7 +7064,6 @@ static void i40e_vsi_delete(struct i40e_vsi *vsi)
6772 return; 7064 return;
6773 7065
6774 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 7066 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6775 return;
6776} 7067}
6777 7068
6778/** 7069/**
@@ -6898,6 +7189,13 @@ static int i40e_add_vsi(struct i40e_vsi *vsi)
6898 7189
6899 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 7190 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
6900 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 7191 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
7192 if (pf->vf[vsi->vf_id].spoofchk) {
7193 ctxt.info.valid_sections |=
7194 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
7195 ctxt.info.sec_flags |=
7196 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
7197 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
7198 }
6901 /* Setup the VSI tx/rx queue map for TC0 only for now */ 7199 /* Setup the VSI tx/rx queue map for TC0 only for now */
6902 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 7200 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6903 break; 7201 break;
@@ -6982,11 +7280,7 @@ int i40e_vsi_release(struct i40e_vsi *vsi)
6982 unregister_netdev(vsi->netdev); 7280 unregister_netdev(vsi->netdev);
6983 } 7281 }
6984 } else { 7282 } else {
6985 if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) 7283 i40e_vsi_close(vsi);
6986 i40e_down(vsi);
6987 i40e_vsi_free_irq(vsi);
6988 i40e_vsi_free_tx_resources(vsi);
6989 i40e_vsi_free_rx_resources(vsi);
6990 } 7284 }
6991 i40e_vsi_disable_irq(vsi); 7285 i40e_vsi_disable_irq(vsi);
6992 } 7286 }
@@ -7013,7 +7307,7 @@ int i40e_vsi_release(struct i40e_vsi *vsi)
7013 * the orphan VEBs yet. We'll wait for an explicit remove request 7307 * the orphan VEBs yet. We'll wait for an explicit remove request
7014 * from up the network stack. 7308 * from up the network stack.
7015 */ 7309 */
7016 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) { 7310 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
7017 if (pf->vsi[i] && 7311 if (pf->vsi[i] &&
7018 pf->vsi[i]->uplink_seid == uplink_seid && 7312 pf->vsi[i]->uplink_seid == uplink_seid &&
7019 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 7313 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
@@ -7192,7 +7486,7 @@ struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
7192 7486
7193 if (!veb && uplink_seid != pf->mac_seid) { 7487 if (!veb && uplink_seid != pf->mac_seid) {
7194 7488
7195 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { 7489 for (i = 0; i < pf->num_alloc_vsi; i++) {
7196 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 7490 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7197 vsi = pf->vsi[i]; 7491 vsi = pf->vsi[i];
7198 break; 7492 break;
@@ -7435,7 +7729,7 @@ static void i40e_switch_branch_release(struct i40e_veb *branch)
7435 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 7729 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7436 * the VEB itself, so don't use (*branch) after this loop. 7730 * the VEB itself, so don't use (*branch) after this loop.
7437 */ 7731 */
7438 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { 7732 for (i = 0; i < pf->num_alloc_vsi; i++) {
7439 if (!pf->vsi[i]) 7733 if (!pf->vsi[i])
7440 continue; 7734 continue;
7441 if (pf->vsi[i]->uplink_seid == branch_seid && 7735 if (pf->vsi[i]->uplink_seid == branch_seid &&
@@ -7487,7 +7781,7 @@ void i40e_veb_release(struct i40e_veb *veb)
7487 pf = veb->pf; 7781 pf = veb->pf;
7488 7782
7489 /* find the remaining VSI and check for extras */ 7783 /* find the remaining VSI and check for extras */
7490 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { 7784 for (i = 0; i < pf->num_alloc_vsi; i++) {
7491 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 7785 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7492 n++; 7786 n++;
7493 vsi = pf->vsi[i]; 7787 vsi = pf->vsi[i];
@@ -7516,8 +7810,6 @@ void i40e_veb_release(struct i40e_veb *veb)
7516 7810
7517 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 7811 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7518 i40e_veb_clear(veb); 7812 i40e_veb_clear(veb);
7519
7520 return;
7521} 7813}
7522 7814
7523/** 7815/**
@@ -7601,10 +7893,10 @@ struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7601 } 7893 }
7602 7894
7603 /* make sure there is such a vsi and uplink */ 7895 /* make sure there is such a vsi and uplink */
7604 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++) 7896 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
7605 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 7897 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
7606 break; 7898 break;
7607 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) { 7899 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
7608 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 7900 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
7609 vsi_seid); 7901 vsi_seid);
7610 return NULL; 7902 return NULL;
@@ -7639,6 +7931,8 @@ struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7639 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 7931 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
7640 if (ret) 7932 if (ret)
7641 goto err_veb; 7933 goto err_veb;
7934 if (vsi_idx == pf->lan_vsi)
7935 pf->lan_veb = veb->idx;
7642 7936
7643 return veb; 7937 return veb;
7644 7938
@@ -7774,15 +8068,6 @@ int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
7774 "header: %d reported %d total\n", 8068 "header: %d reported %d total\n",
7775 num_reported, num_total); 8069 num_reported, num_total);
7776 8070
7777 if (num_reported) {
7778 int sz = sizeof(*sw_config) * num_reported;
7779
7780 kfree(pf->sw_config);
7781 pf->sw_config = kzalloc(sz, GFP_KERNEL);
7782 if (pf->sw_config)
7783 memcpy(pf->sw_config, sw_config, sz);
7784 }
7785
7786 for (i = 0; i < num_reported; i++) { 8071 for (i = 0; i < num_reported; i++) {
7787 struct i40e_aqc_switch_config_element_resp *ele = 8072 struct i40e_aqc_switch_config_element_resp *ele =
7788 &sw_config->element[i]; 8073 &sw_config->element[i];
@@ -7949,9 +8234,7 @@ static void i40e_determine_queue_usage(struct i40e_pf *pf)
7949 queues_left = pf->hw.func_caps.num_tx_qp; 8234 queues_left = pf->hw.func_caps.num_tx_qp;
7950 8235
7951 if ((queues_left == 1) || 8236 if ((queues_left == 1) ||
7952 !(pf->flags & I40E_FLAG_MSIX_ENABLED) || 8237 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
7953 !(pf->flags & (I40E_FLAG_RSS_ENABLED | I40E_FLAG_FD_SB_ENABLED |
7954 I40E_FLAG_DCB_ENABLED))) {
7955 /* one qp for PF, no queues for anything else */ 8238 /* one qp for PF, no queues for anything else */
7956 queues_left = 0; 8239 queues_left = 0;
7957 pf->rss_size = pf->num_lan_qps = 1; 8240 pf->rss_size = pf->num_lan_qps = 1;
@@ -7960,14 +8243,27 @@ static void i40e_determine_queue_usage(struct i40e_pf *pf)
7960 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 8243 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
7961 I40E_FLAG_FD_SB_ENABLED | 8244 I40E_FLAG_FD_SB_ENABLED |
7962 I40E_FLAG_FD_ATR_ENABLED | 8245 I40E_FLAG_FD_ATR_ENABLED |
7963 I40E_FLAG_DCB_ENABLED | 8246 I40E_FLAG_DCB_CAPABLE |
7964 I40E_FLAG_SRIOV_ENABLED | 8247 I40E_FLAG_SRIOV_ENABLED |
7965 I40E_FLAG_VMDQ_ENABLED); 8248 I40E_FLAG_VMDQ_ENABLED);
8249 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
8250 I40E_FLAG_FD_SB_ENABLED |
8251 I40E_FLAG_FD_ATR_ENABLED |
8252 I40E_FLAG_DCB_CAPABLE))) {
8253 /* one qp for PF */
8254 pf->rss_size = pf->num_lan_qps = 1;
8255 queues_left -= pf->num_lan_qps;
8256
8257 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8258 I40E_FLAG_FD_SB_ENABLED |
8259 I40E_FLAG_FD_ATR_ENABLED |
8260 I40E_FLAG_DCB_ENABLED |
8261 I40E_FLAG_VMDQ_ENABLED);
7966 } else { 8262 } else {
7967 /* Not enough queues for all TCs */ 8263 /* Not enough queues for all TCs */
7968 if ((pf->flags & I40E_FLAG_DCB_ENABLED) && 8264 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
7969 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 8265 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
7970 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 8266 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
7971 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 8267 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
7972 } 8268 }
7973 pf->num_lan_qps = pf->rss_size_max; 8269 pf->num_lan_qps = pf->rss_size_max;
@@ -7998,7 +8294,6 @@ static void i40e_determine_queue_usage(struct i40e_pf *pf)
7998 } 8294 }
7999 8295
8000 pf->queues_left = queues_left; 8296 pf->queues_left = queues_left;
8001 return;
8002} 8297}
8003 8298
8004/** 8299/**
@@ -8055,12 +8350,13 @@ static void i40e_print_features(struct i40e_pf *pf)
8055 8350
8056 if (pf->flags & I40E_FLAG_RSS_ENABLED) 8351 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8057 buf += sprintf(buf, "RSS "); 8352 buf += sprintf(buf, "RSS ");
8058 buf += sprintf(buf, "FDir ");
8059 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 8353 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8060 buf += sprintf(buf, "ATR "); 8354 buf += sprintf(buf, "FD_ATR ");
8061 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) 8355 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8356 buf += sprintf(buf, "FD_SB ");
8062 buf += sprintf(buf, "NTUPLE "); 8357 buf += sprintf(buf, "NTUPLE ");
8063 if (pf->flags & I40E_FLAG_DCB_ENABLED) 8358 }
8359 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
8064 buf += sprintf(buf, "DCB "); 8360 buf += sprintf(buf, "DCB ");
8065 if (pf->flags & I40E_FLAG_PTP) 8361 if (pf->flags & I40E_FLAG_PTP)
8066 buf += sprintf(buf, "PTP "); 8362 buf += sprintf(buf, "PTP ");
@@ -8083,13 +8379,13 @@ static void i40e_print_features(struct i40e_pf *pf)
8083 **/ 8379 **/
8084static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 8380static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8085{ 8381{
8086 struct i40e_driver_version dv;
8087 struct i40e_pf *pf; 8382 struct i40e_pf *pf;
8088 struct i40e_hw *hw; 8383 struct i40e_hw *hw;
8089 static u16 pfs_found; 8384 static u16 pfs_found;
8090 u16 link_status; 8385 u16 link_status;
8091 int err = 0; 8386 int err = 0;
8092 u32 len; 8387 u32 len;
8388 u32 i;
8093 8389
8094 err = pci_enable_device_mem(pdev); 8390 err = pci_enable_device_mem(pdev);
8095 if (err) 8391 if (err)
@@ -8201,6 +8497,10 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8201 8497
8202 i40e_verify_eeprom(pf); 8498 i40e_verify_eeprom(pf);
8203 8499
8500 /* Rev 0 hardware was never productized */
8501 if (hw->revision_id < 1)
8502 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
8503
8204 i40e_clear_pxe_mode(hw); 8504 i40e_clear_pxe_mode(hw);
8205 err = i40e_get_capabilities(pf); 8505 err = i40e_get_capabilities(pf);
8206 if (err) 8506 if (err)
@@ -8234,7 +8534,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8234 goto err_mac_addr; 8534 goto err_mac_addr;
8235 } 8535 }
8236 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 8536 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8237 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN); 8537 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
8238 8538
8239 pci_set_drvdata(pdev, pf); 8539 pci_set_drvdata(pdev, pf);
8240 pci_save_state(pdev); 8540 pci_save_state(pdev);
@@ -8242,8 +8542,8 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8242 err = i40e_init_pf_dcb(pf); 8542 err = i40e_init_pf_dcb(pf);
8243 if (err) { 8543 if (err) {
8244 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err); 8544 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8245 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 8545 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8246 goto err_init_dcb; 8546 /* Continue without DCB enabled */
8247 } 8547 }
8248#endif /* CONFIG_I40E_DCB */ 8548#endif /* CONFIG_I40E_DCB */
8249 8549
@@ -8264,10 +8564,18 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8264 i40e_determine_queue_usage(pf); 8564 i40e_determine_queue_usage(pf);
8265 i40e_init_interrupt_scheme(pf); 8565 i40e_init_interrupt_scheme(pf);
8266 8566
8267 /* Set up the *vsi struct based on the number of VSIs in the HW, 8567 /* The number of VSIs reported by the FW is the minimum guaranteed
8268 * and set up our local tracking of the MAIN PF vsi. 8568 * to us; HW supports far more and we share the remaining pool with
8569 * the other PFs. We allocate space for more than the guarantee with
8570 * the understanding that we might not get them all later.
8269 */ 8571 */
8270 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis; 8572 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
8573 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
8574 else
8575 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
8576
8577 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
8578 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
8271 pf->vsi = kzalloc(len, GFP_KERNEL); 8579 pf->vsi = kzalloc(len, GFP_KERNEL);
8272 if (!pf->vsi) { 8580 if (!pf->vsi) {
8273 err = -ENOMEM; 8581 err = -ENOMEM;
@@ -8279,6 +8587,13 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8279 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 8587 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8280 goto err_vsis; 8588 goto err_vsis;
8281 } 8589 }
8590 /* if FDIR VSI was set up, start it now */
8591 for (i = 0; i < pf->num_alloc_vsi; i++) {
8592 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
8593 i40e_vsi_open(pf->vsi[i]);
8594 break;
8595 }
8596 }
8282 8597
8283 /* The main driver is (mostly) up and happy. We need to set this state 8598 /* The main driver is (mostly) up and happy. We need to set this state
8284 * before setting up the misc vector or we get a race and the vector 8599 * before setting up the misc vector or we get a race and the vector
@@ -8300,6 +8615,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8300 } 8615 }
8301 } 8616 }
8302 8617
8618#ifdef CONFIG_PCI_IOV
8303 /* prep for VF support */ 8619 /* prep for VF support */
8304 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 8620 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8305 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 8621 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
@@ -8322,17 +8638,14 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8322 err); 8638 err);
8323 } 8639 }
8324 } 8640 }
8641#endif /* CONFIG_PCI_IOV */
8325 8642
8326 pfs_found++; 8643 pfs_found++;
8327 8644
8328 i40e_dbg_pf_init(pf); 8645 i40e_dbg_pf_init(pf);
8329 8646
8330 /* tell the firmware that we're starting */ 8647 /* tell the firmware that we're starting */
8331 dv.major_version = DRV_VERSION_MAJOR; 8648 i40e_send_version(pf);
8332 dv.minor_version = DRV_VERSION_MINOR;
8333 dv.build_version = DRV_VERSION_BUILD;
8334 dv.subbuild_version = 0;
8335 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
8336 8649
8337 /* since everything's happy, start the service_task timer */ 8650 /* since everything's happy, start the service_task timer */
8338 mod_timer(&pf->service_timer, 8651 mod_timer(&pf->service_timer,
@@ -8373,9 +8686,6 @@ err_vsis:
8373err_switch_setup: 8686err_switch_setup:
8374 i40e_reset_interrupt_capability(pf); 8687 i40e_reset_interrupt_capability(pf);
8375 del_timer_sync(&pf->service_timer); 8688 del_timer_sync(&pf->service_timer);
8376#ifdef CONFIG_I40E_DCB
8377err_init_dcb:
8378#endif /* CONFIG_I40E_DCB */
8379err_mac_addr: 8689err_mac_addr:
8380err_configure_lan_hmc: 8690err_configure_lan_hmc:
8381 (void)i40e_shutdown_lan_hmc(hw); 8691 (void)i40e_shutdown_lan_hmc(hw);
@@ -8456,10 +8766,13 @@ static void i40e_remove(struct pci_dev *pdev)
8456 } 8766 }
8457 8767
8458 /* shutdown and destroy the HMC */ 8768 /* shutdown and destroy the HMC */
8459 ret_code = i40e_shutdown_lan_hmc(&pf->hw); 8769 if (pf->hw.hmc.hmc_obj) {
8460 if (ret_code) 8770 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8461 dev_warn(&pdev->dev, 8771 if (ret_code)
8462 "Failed to destroy the HMC resources: %d\n", ret_code); 8772 dev_warn(&pdev->dev,
8773 "Failed to destroy the HMC resources: %d\n",
8774 ret_code);
8775 }
8463 8776
8464 /* shutdown the adminq */ 8777 /* shutdown the adminq */
8465 ret_code = i40e_shutdown_adminq(&pf->hw); 8778 ret_code = i40e_shutdown_adminq(&pf->hw);
@@ -8470,7 +8783,7 @@ static void i40e_remove(struct pci_dev *pdev)
8470 8783
8471 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 8784 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8472 i40e_clear_interrupt_scheme(pf); 8785 i40e_clear_interrupt_scheme(pf);
8473 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { 8786 for (i = 0; i < pf->num_alloc_vsi; i++) {
8474 if (pf->vsi[i]) { 8787 if (pf->vsi[i]) {
8475 i40e_vsi_clear_rings(pf->vsi[i]); 8788 i40e_vsi_clear_rings(pf->vsi[i]);
8476 i40e_vsi_clear(pf->vsi[i]); 8789 i40e_vsi_clear(pf->vsi[i]);
@@ -8485,7 +8798,6 @@ static void i40e_remove(struct pci_dev *pdev)
8485 8798
8486 kfree(pf->qp_pile); 8799 kfree(pf->qp_pile);
8487 kfree(pf->irq_pile); 8800 kfree(pf->irq_pile);
8488 kfree(pf->sw_config);
8489 kfree(pf->vsi); 8801 kfree(pf->vsi);
8490 8802
8491 /* force a PF reset to clean anything leftover */ 8803 /* force a PF reset to clean anything leftover */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
index 9cd57e617959..a430699c41d5 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h
@@ -70,10 +70,12 @@ i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
70 u16 *fw_major_version, u16 *fw_minor_version, 70 u16 *fw_major_version, u16 *fw_minor_version,
71 u16 *api_major_version, u16 *api_minor_version, 71 u16 *api_major_version, u16 *api_minor_version,
72 struct i40e_asq_cmd_details *cmd_details); 72 struct i40e_asq_cmd_details *cmd_details);
73i40e_status i40e_aq_set_phy_reset(struct i40e_hw *hw, 73i40e_status i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,
74 struct i40e_asq_cmd_details *cmd_details); 74 struct i40e_asq_cmd_details *cmd_details);
75i40e_status i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id, 75i40e_status i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id,
76 struct i40e_asq_cmd_details *cmd_details); 76 struct i40e_asq_cmd_details *cmd_details);
77i40e_status i40e_aq_clear_pxe_mode(struct i40e_hw *hw,
78 struct i40e_asq_cmd_details *cmd_details);
77i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw, 79i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
78 struct i40e_asq_cmd_details *cmd_details); 80 struct i40e_asq_cmd_details *cmd_details);
79i40e_status i40e_aq_get_link_info(struct i40e_hw *hw, 81i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
@@ -157,8 +159,8 @@ i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
157i40e_status i40e_aq_start_lldp(struct i40e_hw *hw, 159i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
158 struct i40e_asq_cmd_details *cmd_details); 160 struct i40e_asq_cmd_details *cmd_details);
159i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw, 161i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
160 u16 udp_port, u8 header_len, 162 u16 udp_port, u8 protocol_index,
161 u8 protocol_index, u8 *filter_index, 163 u8 *filter_index,
162 struct i40e_asq_cmd_details *cmd_details); 164 struct i40e_asq_cmd_details *cmd_details);
163i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index, 165i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,
164 struct i40e_asq_cmd_details *cmd_details); 166 struct i40e_asq_cmd_details *cmd_details);
@@ -167,6 +169,9 @@ i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
167i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw, 169i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
168 u16 flags, u8 *mac_addr, 170 u16 flags, u8 *mac_addr,
169 struct i40e_asq_cmd_details *cmd_details); 171 struct i40e_asq_cmd_details *cmd_details);
172i40e_status i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw,
173 u16 seid, u16 credit, u8 max_credit,
174 struct i40e_asq_cmd_details *cmd_details);
170i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw, 175i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw,
171 struct i40e_asq_cmd_details *cmd_details); 176 struct i40e_asq_cmd_details *cmd_details);
172i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw, 177i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
@@ -216,6 +221,7 @@ bool i40e_get_link_status(struct i40e_hw *hw);
216i40e_status i40e_get_mac_addr(struct i40e_hw *hw, 221i40e_status i40e_get_mac_addr(struct i40e_hw *hw,
217 u8 *mac_addr); 222 u8 *mac_addr);
218i40e_status i40e_validate_mac_addr(u8 *mac_addr); 223i40e_status i40e_validate_mac_addr(u8 *mac_addr);
224void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable);
219/* prototype for functions used for NVM access */ 225/* prototype for functions used for NVM access */
220i40e_status i40e_init_nvm(struct i40e_hw *hw); 226i40e_status i40e_init_nvm(struct i40e_hw *hw);
221i40e_status i40e_acquire_nvm(struct i40e_hw *hw, 227i40e_status i40e_acquire_nvm(struct i40e_hw *hw,
diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
index e61e63720800..101f439acda6 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
@@ -48,7 +48,6 @@
48 I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT) 48 I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)
49#define I40E_PRTTSYN_CTL1_TSYNTYPE_V2 (0x2 << \ 49#define I40E_PRTTSYN_CTL1_TSYNTYPE_V2 (0x2 << \
50 I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT) 50 I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)
51#define I40E_PTP_TX_TIMEOUT (HZ * 15)
52 51
53/** 52/**
54 * i40e_ptp_read - Read the PHC time from the device 53 * i40e_ptp_read - Read the PHC time from the device
@@ -217,40 +216,6 @@ static int i40e_ptp_settime(struct ptp_clock_info *ptp,
217} 216}
218 217
219/** 218/**
220 * i40e_ptp_tx_work
221 * @work: pointer to work struct
222 *
223 * This work function polls the PRTTSYN_STAT_0.TXTIME bit to determine when a
224 * Tx timestamp event has occurred, in order to pass the Tx timestamp value up
225 * the stack in the skb.
226 */
227static void i40e_ptp_tx_work(struct work_struct *work)
228{
229 struct i40e_pf *pf = container_of(work, struct i40e_pf,
230 ptp_tx_work);
231 struct i40e_hw *hw = &pf->hw;
232 u32 prttsyn_stat_0;
233
234 if (!pf->ptp_tx_skb)
235 return;
236
237 if (time_is_before_jiffies(pf->ptp_tx_start +
238 I40E_PTP_TX_TIMEOUT)) {
239 dev_kfree_skb_any(pf->ptp_tx_skb);
240 pf->ptp_tx_skb = NULL;
241 pf->tx_hwtstamp_timeouts++;
242 dev_warn(&pf->pdev->dev, "clearing Tx timestamp hang\n");
243 return;
244 }
245
246 prttsyn_stat_0 = rd32(hw, I40E_PRTTSYN_STAT_0);
247 if (prttsyn_stat_0 & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
248 i40e_ptp_tx_hwtstamp(pf);
249 else
250 schedule_work(&pf->ptp_tx_work);
251}
252
253/**
254 * i40e_ptp_enable - Enable/disable ancillary features of the PHC subsystem 219 * i40e_ptp_enable - Enable/disable ancillary features of the PHC subsystem
255 * @ptp: The PTP clock structure 220 * @ptp: The PTP clock structure
256 * @rq: The requested feature to change 221 * @rq: The requested feature to change
@@ -608,7 +573,6 @@ void i40e_ptp_init(struct i40e_pf *pf)
608 u32 regval; 573 u32 regval;
609 574
610 spin_lock_init(&pf->tmreg_lock); 575 spin_lock_init(&pf->tmreg_lock);
611 INIT_WORK(&pf->ptp_tx_work, i40e_ptp_tx_work);
612 576
613 dev_info(&pf->pdev->dev, "%s: added PHC on %s\n", __func__, 577 dev_info(&pf->pdev->dev, "%s: added PHC on %s\n", __func__,
614 netdev->name); 578 netdev->name);
@@ -647,7 +611,6 @@ void i40e_ptp_stop(struct i40e_pf *pf)
647 pf->ptp_tx = false; 611 pf->ptp_tx = false;
648 pf->ptp_rx = false; 612 pf->ptp_rx = false;
649 613
650 cancel_work_sync(&pf->ptp_tx_work);
651 if (pf->ptp_tx_skb) { 614 if (pf->ptp_tx_skb) {
652 dev_kfree_skb_any(pf->ptp_tx_skb); 615 dev_kfree_skb_any(pf->ptp_tx_skb);
653 pf->ptp_tx_skb = NULL; 616 pf->ptp_tx_skb = NULL;
diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h
index 1d40f425acf1..947de98500f3 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_register.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_register.h
@@ -1340,8 +1340,6 @@
1340#define I40E_PFINT_ICR0_GPIO_MASK (0x1 << I40E_PFINT_ICR0_GPIO_SHIFT) 1340#define I40E_PFINT_ICR0_GPIO_MASK (0x1 << I40E_PFINT_ICR0_GPIO_SHIFT)
1341#define I40E_PFINT_ICR0_TIMESYNC_SHIFT 23 1341#define I40E_PFINT_ICR0_TIMESYNC_SHIFT 23
1342#define I40E_PFINT_ICR0_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_TIMESYNC_SHIFT) 1342#define I40E_PFINT_ICR0_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_TIMESYNC_SHIFT)
1343#define I40E_PFINT_ICR0_STORM_DETECT_SHIFT 24
1344#define I40E_PFINT_ICR0_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_STORM_DETECT_SHIFT)
1345#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT 25 1343#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT 25
1346#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT) 1344#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT)
1347#define I40E_PFINT_ICR0_HMC_ERR_SHIFT 26 1345#define I40E_PFINT_ICR0_HMC_ERR_SHIFT 26
@@ -1367,8 +1365,6 @@
1367#define I40E_PFINT_ICR0_ENA_GPIO_MASK (0x1 << I40E_PFINT_ICR0_ENA_GPIO_SHIFT) 1365#define I40E_PFINT_ICR0_ENA_GPIO_MASK (0x1 << I40E_PFINT_ICR0_ENA_GPIO_SHIFT)
1368#define I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT 23 1366#define I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT 23
1369#define I40E_PFINT_ICR0_ENA_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT) 1367#define I40E_PFINT_ICR0_ENA_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT)
1370#define I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT 24
1371#define I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT)
1372#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT 25 1368#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT 25
1373#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT) 1369#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT)
1374#define I40E_PFINT_ICR0_ENA_HMC_ERR_SHIFT 26 1370#define I40E_PFINT_ICR0_ENA_HMC_ERR_SHIFT 26
@@ -1589,6 +1585,14 @@
1589#define I40E_GLLAN_TSOMSK_M 0x000442DC 1585#define I40E_GLLAN_TSOMSK_M 0x000442DC
1590#define I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT 0 1586#define I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT 0
1591#define I40E_GLLAN_TSOMSK_M_TCPMSKM_MASK (0xFFF << I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT) 1587#define I40E_GLLAN_TSOMSK_M_TCPMSKM_MASK (0xFFF << I40E_GLLAN_TSOMSK_M_TCPMSKM_SHIFT)
1588#define I40E_GLLAN_TXPRE_QDIS(_i) (0x000E6500 + ((_i) * 4)) /* i=0..11 */
1589#define I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT 0
1590#define I40E_GLLAN_TXPRE_QDIS_QINDX_MASK (0x7FF << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT)
1591#define I40E_GLLAN_TXPRE_QDIS_SET_QDIS_SHIFT 30
1592#define I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK (0x1 << I40E_GLLAN_TXPRE_QDIS_SET_QDIS_SHIFT)
1593#define I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_SHIFT 31
1594#define I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK (0x1 << I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_SHIFT)
1595
1592#define I40E_PFLAN_QALLOC 0x001C0400 1596#define I40E_PFLAN_QALLOC 0x001C0400
1593#define I40E_PFLAN_QALLOC_FIRSTQ_SHIFT 0 1597#define I40E_PFLAN_QALLOC_FIRSTQ_SHIFT 0
1594#define I40E_PFLAN_QALLOC_FIRSTQ_MASK (0x7FF << I40E_PFLAN_QALLOC_FIRSTQ_SHIFT) 1598#define I40E_PFLAN_QALLOC_FIRSTQ_MASK (0x7FF << I40E_PFLAN_QALLOC_FIRSTQ_SHIFT)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
index 9478ddc66caf..e49f31dbd5d8 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
@@ -24,6 +24,7 @@
24 * 24 *
25 ******************************************************************************/ 25 ******************************************************************************/
26 26
27#include <linux/prefetch.h>
27#include "i40e.h" 28#include "i40e.h"
28#include "i40e_prototype.h" 29#include "i40e_prototype.h"
29 30
@@ -61,7 +62,7 @@ int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
61 62
62 /* find existing FDIR VSI */ 63 /* find existing FDIR VSI */
63 vsi = NULL; 64 vsi = NULL;
64 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) 65 for (i = 0; i < pf->num_alloc_vsi; i++)
65 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) 66 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR)
66 vsi = pf->vsi[i]; 67 vsi = pf->vsi[i];
67 if (!vsi) 68 if (!vsi)
@@ -120,7 +121,7 @@ int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
120 dcc |= I40E_TXD_FLTR_QW1_CNT_ENA_MASK; 121 dcc |= I40E_TXD_FLTR_QW1_CNT_ENA_MASK;
121 dcc |= ((u32)fdir_data->cnt_index << 122 dcc |= ((u32)fdir_data->cnt_index <<
122 I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) & 123 I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) &
123 I40E_TXD_FLTR_QW1_CNTINDEX_MASK; 124 I40E_TXD_FLTR_QW1_CNTINDEX_MASK;
124 } 125 }
125 126
126 fdir_desc->dtype_cmd_cntindex = cpu_to_le32(dcc); 127 fdir_desc->dtype_cmd_cntindex = cpu_to_le32(dcc);
@@ -183,7 +184,6 @@ static int i40e_add_del_fdir_udpv4(struct i40e_vsi *vsi,
183 struct iphdr *ip; 184 struct iphdr *ip;
184 bool err = false; 185 bool err = false;
185 int ret; 186 int ret;
186 int i;
187 static char packet[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x08, 0, 187 static char packet[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x08, 0,
188 0x45, 0, 0, 0x1c, 0, 0, 0x40, 0, 0x40, 0x11, 0, 0, 0, 0, 0, 0, 188 0x45, 0, 0, 0x1c, 0, 0, 0x40, 0, 0x40, 0x11, 0, 0, 0, 0, 0, 0,
189 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 189 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
@@ -199,21 +199,17 @@ static int i40e_add_del_fdir_udpv4(struct i40e_vsi *vsi,
199 ip->saddr = fd_data->src_ip[0]; 199 ip->saddr = fd_data->src_ip[0];
200 udp->source = fd_data->src_port; 200 udp->source = fd_data->src_port;
201 201
202 for (i = I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP; 202 fd_data->pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
203 i <= I40E_FILTER_PCTYPE_NONF_IPV4_UDP; i++) { 203 ret = i40e_program_fdir_filter(fd_data, raw_packet, pf, add);
204 fd_data->pctype = i; 204 if (ret) {
205 ret = i40e_program_fdir_filter(fd_data, raw_packet, pf, add); 205 dev_info(&pf->pdev->dev,
206 206 "Filter command send failed for PCTYPE %d (ret = %d)\n",
207 if (ret) { 207 fd_data->pctype, ret);
208 dev_info(&pf->pdev->dev, 208 err = true;
209 "Filter command send failed for PCTYPE %d (ret = %d)\n", 209 } else {
210 fd_data->pctype, ret); 210 dev_info(&pf->pdev->dev,
211 err = true; 211 "Filter OK for PCTYPE %d (ret = %d)\n",
212 } else { 212 fd_data->pctype, ret);
213 dev_info(&pf->pdev->dev,
214 "Filter OK for PCTYPE %d (ret = %d)\n",
215 fd_data->pctype, ret);
216 }
217 } 213 }
218 214
219 return err ? -EOPNOTSUPP : 0; 215 return err ? -EOPNOTSUPP : 0;
@@ -262,7 +258,7 @@ static int i40e_add_del_fdir_tcpv4(struct i40e_vsi *vsi,
262 } 258 }
263 } 259 }
264 260
265 fd_data->pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN; 261 fd_data->pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
266 ret = i40e_program_fdir_filter(fd_data, raw_packet, pf, add); 262 ret = i40e_program_fdir_filter(fd_data, raw_packet, pf, add);
267 263
268 if (ret) { 264 if (ret) {
@@ -455,22 +451,20 @@ static void i40e_fd_handle_status(struct i40e_ring *rx_ring,
455 451
456 /* filter programming failed most likely due to table full */ 452 /* filter programming failed most likely due to table full */
457 fcnt_prog = i40e_get_current_fd_count(pf); 453 fcnt_prog = i40e_get_current_fd_count(pf);
458 fcnt_avail = pf->hw.fdir_shared_filter_count + 454 fcnt_avail = i40e_get_fd_cnt_all(pf);
459 pf->fdir_pf_filter_count;
460
461 /* If ATR is running fcnt_prog can quickly change, 455 /* If ATR is running fcnt_prog can quickly change,
462 * if we are very close to full, it makes sense to disable 456 * if we are very close to full, it makes sense to disable
463 * FD ATR/SB and then re-enable it when there is room. 457 * FD ATR/SB and then re-enable it when there is room.
464 */ 458 */
465 if (fcnt_prog >= (fcnt_avail - I40E_FDIR_BUFFER_FULL_MARGIN)) { 459 if (fcnt_prog >= (fcnt_avail - I40E_FDIR_BUFFER_FULL_MARGIN)) {
466 /* Turn off ATR first */ 460 /* Turn off ATR first */
467 if (pf->flags | I40E_FLAG_FD_ATR_ENABLED) { 461 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) {
468 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; 462 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
469 dev_warn(&pdev->dev, "FD filter space full, ATR for further flows will be turned off\n"); 463 dev_warn(&pdev->dev, "FD filter space full, ATR for further flows will be turned off\n");
470 pf->auto_disable_flags |= 464 pf->auto_disable_flags |=
471 I40E_FLAG_FD_ATR_ENABLED; 465 I40E_FLAG_FD_ATR_ENABLED;
472 pf->flags |= I40E_FLAG_FDIR_REQUIRES_REINIT; 466 pf->flags |= I40E_FLAG_FDIR_REQUIRES_REINIT;
473 } else if (pf->flags | I40E_FLAG_FD_SB_ENABLED) { 467 } else if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
474 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 468 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
475 dev_warn(&pdev->dev, "FD filter space full, new ntuple rules will not be added\n"); 469 dev_warn(&pdev->dev, "FD filter space full, new ntuple rules will not be added\n");
476 pf->auto_disable_flags |= 470 pf->auto_disable_flags |=
@@ -1199,10 +1193,12 @@ static inline void i40e_rx_checksum(struct i40e_vsi *vsi,
1199 u32 rx_error, 1193 u32 rx_error,
1200 u16 rx_ptype) 1194 u16 rx_ptype)
1201{ 1195{
1196 struct i40e_rx_ptype_decoded decoded = decode_rx_desc_ptype(rx_ptype);
1197 bool ipv4 = false, ipv6 = false;
1202 bool ipv4_tunnel, ipv6_tunnel; 1198 bool ipv4_tunnel, ipv6_tunnel;
1203 __wsum rx_udp_csum; 1199 __wsum rx_udp_csum;
1204 __sum16 csum;
1205 struct iphdr *iph; 1200 struct iphdr *iph;
1201 __sum16 csum;
1206 1202
1207 ipv4_tunnel = (rx_ptype > I40E_RX_PTYPE_GRENAT4_MAC_PAY3) && 1203 ipv4_tunnel = (rx_ptype > I40E_RX_PTYPE_GRENAT4_MAC_PAY3) &&
1208 (rx_ptype < I40E_RX_PTYPE_GRENAT4_MACVLAN_IPV6_ICMP_PAY4); 1204 (rx_ptype < I40E_RX_PTYPE_GRENAT4_MACVLAN_IPV6_ICMP_PAY4);
@@ -1213,29 +1209,57 @@ static inline void i40e_rx_checksum(struct i40e_vsi *vsi,
1213 skb->ip_summed = CHECKSUM_NONE; 1209 skb->ip_summed = CHECKSUM_NONE;
1214 1210
1215 /* Rx csum enabled and ip headers found? */ 1211 /* Rx csum enabled and ip headers found? */
1216 if (!(vsi->netdev->features & NETIF_F_RXCSUM && 1212 if (!(vsi->netdev->features & NETIF_F_RXCSUM))
1217 rx_status & (1 << I40E_RX_DESC_STATUS_L3L4P_SHIFT))) 1213 return;
1214
1215 /* did the hardware decode the packet and checksum? */
1216 if (!(rx_status & (1 << I40E_RX_DESC_STATUS_L3L4P_SHIFT)))
1217 return;
1218
1219 /* both known and outer_ip must be set for the below code to work */
1220 if (!(decoded.known && decoded.outer_ip))
1218 return; 1221 return;
1219 1222
1223 if (decoded.outer_ip == I40E_RX_PTYPE_OUTER_IP &&
1224 decoded.outer_ip_ver == I40E_RX_PTYPE_OUTER_IPV4)
1225 ipv4 = true;
1226 else if (decoded.outer_ip == I40E_RX_PTYPE_OUTER_IP &&
1227 decoded.outer_ip_ver == I40E_RX_PTYPE_OUTER_IPV6)
1228 ipv6 = true;
1229
1230 if (ipv4 &&
1231 (rx_error & ((1 << I40E_RX_DESC_ERROR_IPE_SHIFT) |
1232 (1 << I40E_RX_DESC_ERROR_EIPE_SHIFT))))
1233 goto checksum_fail;
1234
1220 /* likely incorrect csum if alternate IP extension headers found */ 1235 /* likely incorrect csum if alternate IP extension headers found */
1221 if (rx_status & (1 << I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT)) 1236 if (ipv6 &&
1237 decoded.inner_prot == I40E_RX_PTYPE_INNER_PROT_TCP &&
1238 rx_error & (1 << I40E_RX_DESC_ERROR_L4E_SHIFT) &&
1239 rx_status & (1 << I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT))
1240 /* don't increment checksum err here, non-fatal err */
1222 return; 1241 return;
1223 1242
1224 /* IP or L4 or outmost IP checksum error */ 1243 /* there was some L4 error, count error and punt packet to the stack */
1225 if (rx_error & ((1 << I40E_RX_DESC_ERROR_IPE_SHIFT) | 1244 if (rx_error & (1 << I40E_RX_DESC_ERROR_L4E_SHIFT))
1226 (1 << I40E_RX_DESC_ERROR_L4E_SHIFT) | 1245 goto checksum_fail;
1227 (1 << I40E_RX_DESC_ERROR_EIPE_SHIFT))) { 1246
1228 vsi->back->hw_csum_rx_error++; 1247 /* handle packets that were not able to be checksummed due
1248 * to arrival speed, in this case the stack can compute
1249 * the csum.
1250 */
1251 if (rx_error & (1 << I40E_RX_DESC_ERROR_PPRS_SHIFT))
1229 return; 1252 return;
1230 }
1231 1253
1254 /* If VXLAN traffic has an outer UDPv4 checksum we need to check
1255 * it in the driver, hardware does not do it for us.
1256 * Since L3L4P bit was set we assume a valid IHL value (>=5)
1257 * so the total length of IPv4 header is IHL*4 bytes
1258 * The UDP_0 bit *may* bet set if the *inner* header is UDP
1259 */
1232 if (ipv4_tunnel && 1260 if (ipv4_tunnel &&
1261 (decoded.inner_prot != I40E_RX_PTYPE_INNER_PROT_UDP) &&
1233 !(rx_status & (1 << I40E_RX_DESC_STATUS_UDP_0_SHIFT))) { 1262 !(rx_status & (1 << I40E_RX_DESC_STATUS_UDP_0_SHIFT))) {
1234 /* If VXLAN traffic has an outer UDPv4 checksum we need to check
1235 * it in the driver, hardware does not do it for us.
1236 * Since L3L4P bit was set we assume a valid IHL value (>=5)
1237 * so the total length of IPv4 header is IHL*4 bytes
1238 */
1239 skb->transport_header = skb->mac_header + 1263 skb->transport_header = skb->mac_header +
1240 sizeof(struct ethhdr) + 1264 sizeof(struct ethhdr) +
1241 (ip_hdr(skb)->ihl * 4); 1265 (ip_hdr(skb)->ihl * 4);
@@ -1252,13 +1276,16 @@ static inline void i40e_rx_checksum(struct i40e_vsi *vsi,
1252 (skb->len - skb_transport_offset(skb)), 1276 (skb->len - skb_transport_offset(skb)),
1253 IPPROTO_UDP, rx_udp_csum); 1277 IPPROTO_UDP, rx_udp_csum);
1254 1278
1255 if (udp_hdr(skb)->check != csum) { 1279 if (udp_hdr(skb)->check != csum)
1256 vsi->back->hw_csum_rx_error++; 1280 goto checksum_fail;
1257 return;
1258 }
1259 } 1281 }
1260 1282
1261 skb->ip_summed = CHECKSUM_UNNECESSARY; 1283 skb->ip_summed = CHECKSUM_UNNECESSARY;
1284
1285 return;
1286
1287checksum_fail:
1288 vsi->back->hw_csum_rx_error++;
1262} 1289}
1263 1290
1264/** 1291/**
@@ -1435,6 +1462,9 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
1435 /* ERR_MASK will only have valid bits if EOP set */ 1462 /* ERR_MASK will only have valid bits if EOP set */
1436 if (unlikely(rx_error & (1 << I40E_RX_DESC_ERROR_RXE_SHIFT))) { 1463 if (unlikely(rx_error & (1 << I40E_RX_DESC_ERROR_RXE_SHIFT))) {
1437 dev_kfree_skb_any(skb); 1464 dev_kfree_skb_any(skb);
1465 /* TODO: shouldn't we increment a counter indicating the
1466 * drop?
1467 */
1438 goto next_desc; 1468 goto next_desc;
1439 } 1469 }
1440 1470
@@ -1665,6 +1695,11 @@ static void i40e_atr(struct i40e_ring *tx_ring, struct sk_buff *skb,
1665 dtype_cmd |= I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID << 1695 dtype_cmd |= I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID <<
1666 I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT; 1696 I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT;
1667 1697
1698 dtype_cmd |= I40E_TXD_FLTR_QW1_CNT_ENA_MASK;
1699 dtype_cmd |=
1700 ((u32)pf->fd_atr_cnt_idx << I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) &
1701 I40E_TXD_FLTR_QW1_CNTINDEX_MASK;
1702
1668 fdir_desc->qindex_flex_ptype_vsi = cpu_to_le32(flex_ptype); 1703 fdir_desc->qindex_flex_ptype_vsi = cpu_to_le32(flex_ptype);
1669 fdir_desc->dtype_cmd_cntindex = cpu_to_le32(dtype_cmd); 1704 fdir_desc->dtype_cmd_cntindex = cpu_to_le32(dtype_cmd);
1670} 1705}
@@ -1825,9 +1860,6 @@ static int i40e_tsyn(struct i40e_ring *tx_ring, struct sk_buff *skb,
1825 *cd_type_cmd_tso_mss |= (u64)I40E_TX_CTX_DESC_TSYN << 1860 *cd_type_cmd_tso_mss |= (u64)I40E_TX_CTX_DESC_TSYN <<
1826 I40E_TXD_CTX_QW1_CMD_SHIFT; 1861 I40E_TXD_CTX_QW1_CMD_SHIFT;
1827 1862
1828 pf->ptp_tx_start = jiffies;
1829 schedule_work(&pf->ptp_tx_work);
1830
1831 return 1; 1863 return 1;
1832} 1864}
1833 1865
@@ -2179,9 +2211,7 @@ static int i40e_maybe_stop_tx(struct i40e_ring *tx_ring, int size)
2179static int i40e_xmit_descriptor_count(struct sk_buff *skb, 2211static int i40e_xmit_descriptor_count(struct sk_buff *skb,
2180 struct i40e_ring *tx_ring) 2212 struct i40e_ring *tx_ring)
2181{ 2213{
2182#if PAGE_SIZE > I40E_MAX_DATA_PER_TXD
2183 unsigned int f; 2214 unsigned int f;
2184#endif
2185 int count = 0; 2215 int count = 0;
2186 2216
2187 /* need: 1 descriptor per page * PAGE_SIZE/I40E_MAX_DATA_PER_TXD, 2217 /* need: 1 descriptor per page * PAGE_SIZE/I40E_MAX_DATA_PER_TXD,
@@ -2190,12 +2220,9 @@ static int i40e_xmit_descriptor_count(struct sk_buff *skb,
2190 * + 1 desc for context descriptor, 2220 * + 1 desc for context descriptor,
2191 * otherwise try next time 2221 * otherwise try next time
2192 */ 2222 */
2193#if PAGE_SIZE > I40E_MAX_DATA_PER_TXD
2194 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) 2223 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
2195 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size); 2224 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2196#else 2225
2197 count += skb_shinfo(skb)->nr_frags;
2198#endif
2199 count += TXD_USE_COUNT(skb_headlen(skb)); 2226 count += TXD_USE_COUNT(skb_headlen(skb));
2200 if (i40e_maybe_stop_tx(tx_ring, count + 4 + 1)) { 2227 if (i40e_maybe_stop_tx(tx_ring, count + 4 + 1)) {
2201 tx_ring->tx_stats.tx_busy++; 2228 tx_ring->tx_stats.tx_busy++;
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
index d5349698e513..0277894fe1c4 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
@@ -27,7 +27,7 @@
27#ifndef _I40E_TXRX_H_ 27#ifndef _I40E_TXRX_H_
28#define _I40E_TXRX_H_ 28#define _I40E_TXRX_H_
29 29
30/* Interrupt Throttling and Rate Limiting (storm control) Goodies */ 30/* Interrupt Throttling and Rate Limiting Goodies */
31 31
32#define I40E_MAX_ITR 0x0FF0 /* reg uses 2 usec resolution */ 32#define I40E_MAX_ITR 0x0FF0 /* reg uses 2 usec resolution */
33#define I40E_MIN_ITR 0x0004 /* reg uses 2 usec resolution */ 33#define I40E_MIN_ITR 0x0004 /* reg uses 2 usec resolution */
@@ -69,16 +69,11 @@ enum i40e_dyn_idx_t {
69 69
70/* Supported RSS offloads */ 70/* Supported RSS offloads */
71#define I40E_DEFAULT_RSS_HENA ( \ 71#define I40E_DEFAULT_RSS_HENA ( \
72 ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \
73 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \
74 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ 72 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \
75 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ 73 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \
76 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN) | \
77 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ 74 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \
78 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ 75 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \
79 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4) | \ 76 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4) | \
80 ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \
81 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | \
82 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ 77 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \
83 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN) | \ 78 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN) | \
84 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ 79 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \
@@ -122,11 +117,11 @@ enum i40e_dyn_idx_t {
122#define i40e_rx_desc i40e_32byte_rx_desc 117#define i40e_rx_desc i40e_32byte_rx_desc
123 118
124#define I40E_MIN_TX_LEN 17 119#define I40E_MIN_TX_LEN 17
125#define I40E_MAX_DATA_PER_TXD 16383 /* aka 16kB - 1 */ 120#define I40E_MAX_DATA_PER_TXD 8192
126 121
127/* Tx Descriptors needed, worst case */ 122/* Tx Descriptors needed, worst case */
128#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), I40E_MAX_DATA_PER_TXD) 123#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), I40E_MAX_DATA_PER_TXD)
129#define DESC_NEEDED ((MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE)) + 4) 124#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
130 125
131#define I40E_TX_FLAGS_CSUM (u32)(1) 126#define I40E_TX_FLAGS_CSUM (u32)(1)
132#define I40E_TX_FLAGS_HW_VLAN (u32)(1 << 1) 127#define I40E_TX_FLAGS_HW_VLAN (u32)(1 << 1)
@@ -184,7 +179,6 @@ enum i40e_ring_state_t {
184 __I40E_TX_DETECT_HANG, 179 __I40E_TX_DETECT_HANG,
185 __I40E_HANG_CHECK_ARMED, 180 __I40E_HANG_CHECK_ARMED,
186 __I40E_RX_PS_ENABLED, 181 __I40E_RX_PS_ENABLED,
187 __I40E_RX_LRO_ENABLED,
188 __I40E_RX_16BYTE_DESC_ENABLED, 182 __I40E_RX_16BYTE_DESC_ENABLED,
189}; 183};
190 184
@@ -200,12 +194,6 @@ enum i40e_ring_state_t {
200 set_bit(__I40E_TX_DETECT_HANG, &(ring)->state) 194 set_bit(__I40E_TX_DETECT_HANG, &(ring)->state)
201#define clear_check_for_tx_hang(ring) \ 195#define clear_check_for_tx_hang(ring) \
202 clear_bit(__I40E_TX_DETECT_HANG, &(ring)->state) 196 clear_bit(__I40E_TX_DETECT_HANG, &(ring)->state)
203#define ring_is_lro_enabled(ring) \
204 test_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
205#define set_ring_lro_enabled(ring) \
206 set_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
207#define clear_ring_lro_enabled(ring) \
208 clear_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
209#define ring_is_16byte_desc_enabled(ring) \ 197#define ring_is_16byte_desc_enabled(ring) \
210 test_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state) 198 test_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
211#define set_ring_16byte_desc_enabled(ring) \ 199#define set_ring_16byte_desc_enabled(ring) \
diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h
index 71a968fe557f..9d39ff23c5fb 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_type.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h
@@ -36,12 +36,10 @@
36 36
37/* Device IDs */ 37/* Device IDs */
38#define I40E_DEV_ID_SFP_XL710 0x1572 38#define I40E_DEV_ID_SFP_XL710 0x1572
39#define I40E_DEV_ID_SFP_X710 0x1573
40#define I40E_DEV_ID_QEMU 0x1574 39#define I40E_DEV_ID_QEMU 0x1574
41#define I40E_DEV_ID_KX_A 0x157F 40#define I40E_DEV_ID_KX_A 0x157F
42#define I40E_DEV_ID_KX_B 0x1580 41#define I40E_DEV_ID_KX_B 0x1580
43#define I40E_DEV_ID_KX_C 0x1581 42#define I40E_DEV_ID_KX_C 0x1581
44#define I40E_DEV_ID_KX_D 0x1582
45#define I40E_DEV_ID_QSFP_A 0x1583 43#define I40E_DEV_ID_QSFP_A 0x1583
46#define I40E_DEV_ID_QSFP_B 0x1584 44#define I40E_DEV_ID_QSFP_B 0x1584
47#define I40E_DEV_ID_QSFP_C 0x1585 45#define I40E_DEV_ID_QSFP_C 0x1585
@@ -60,8 +58,8 @@
60/* Max default timeout in ms, */ 58/* Max default timeout in ms, */
61#define I40E_MAX_NVM_TIMEOUT 18000 59#define I40E_MAX_NVM_TIMEOUT 18000
62 60
63/* Switch from mc to the 2usec global time (this is the GTIME resolution) */ 61/* Switch from ms to the 1usec global time (this is the GTIME resolution) */
64#define I40E_MS_TO_GTIME(time) (((time) * 1000) / 2) 62#define I40E_MS_TO_GTIME(time) ((time) * 1000)
65 63
66/* forward declaration */ 64/* forward declaration */
67struct i40e_hw; 65struct i40e_hw;
@@ -167,6 +165,9 @@ struct i40e_link_status {
167 u8 loopback; 165 u8 loopback;
168 /* is Link Status Event notification to SW enabled */ 166 /* is Link Status Event notification to SW enabled */
169 bool lse_enable; 167 bool lse_enable;
168 u16 max_frame_size;
169 bool crc_enable;
170 u8 pacing;
170}; 171};
171 172
172struct i40e_phy_info { 173struct i40e_phy_info {
@@ -409,6 +410,7 @@ struct i40e_driver_version {
409 u8 minor_version; 410 u8 minor_version;
410 u8 build_version; 411 u8 build_version;
411 u8 subbuild_version; 412 u8 subbuild_version;
413 u8 driver_string[32];
412}; 414};
413 415
414/* RX Descriptors */ 416/* RX Descriptors */
@@ -488,9 +490,6 @@ union i40e_32byte_rx_desc {
488 } wb; /* writeback */ 490 } wb; /* writeback */
489}; 491};
490 492
491#define I40E_RXD_QW1_STATUS_SHIFT 0
492#define I40E_RXD_QW1_STATUS_MASK (0x7FFFUL << I40E_RXD_QW1_STATUS_SHIFT)
493
494enum i40e_rx_desc_status_bits { 493enum i40e_rx_desc_status_bits {
495 /* Note: These are predefined bit offsets */ 494 /* Note: These are predefined bit offsets */
496 I40E_RX_DESC_STATUS_DD_SHIFT = 0, 495 I40E_RX_DESC_STATUS_DD_SHIFT = 0,
@@ -507,9 +506,14 @@ enum i40e_rx_desc_status_bits {
507 I40E_RX_DESC_STATUS_LPBK_SHIFT = 14, 506 I40E_RX_DESC_STATUS_LPBK_SHIFT = 14,
508 I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT = 15, 507 I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT = 15,
509 I40E_RX_DESC_STATUS_RESERVED_SHIFT = 16, /* 2 BITS */ 508 I40E_RX_DESC_STATUS_RESERVED_SHIFT = 16, /* 2 BITS */
510 I40E_RX_DESC_STATUS_UDP_0_SHIFT = 18 509 I40E_RX_DESC_STATUS_UDP_0_SHIFT = 18,
510 I40E_RX_DESC_STATUS_LAST /* this entry must be last!!! */
511}; 511};
512 512
513#define I40E_RXD_QW1_STATUS_SHIFT 0
514#define I40E_RXD_QW1_STATUS_MASK (((1 << I40E_RX_DESC_STATUS_LAST) - 1) \
515 << I40E_RXD_QW1_STATUS_SHIFT)
516
513#define I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT I40E_RX_DESC_STATUS_TSYNINDX_SHIFT 517#define I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT I40E_RX_DESC_STATUS_TSYNINDX_SHIFT
514#define I40E_RXD_QW1_STATUS_TSYNINDX_MASK (0x3UL << \ 518#define I40E_RXD_QW1_STATUS_TSYNINDX_MASK (0x3UL << \
515 I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT) 519 I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT)
@@ -537,7 +541,8 @@ enum i40e_rx_desc_error_bits {
537 I40E_RX_DESC_ERROR_IPE_SHIFT = 3, 541 I40E_RX_DESC_ERROR_IPE_SHIFT = 3,
538 I40E_RX_DESC_ERROR_L4E_SHIFT = 4, 542 I40E_RX_DESC_ERROR_L4E_SHIFT = 4,
539 I40E_RX_DESC_ERROR_EIPE_SHIFT = 5, 543 I40E_RX_DESC_ERROR_EIPE_SHIFT = 5,
540 I40E_RX_DESC_ERROR_OVERSIZE_SHIFT = 6 544 I40E_RX_DESC_ERROR_OVERSIZE_SHIFT = 6,
545 I40E_RX_DESC_ERROR_PPRS_SHIFT = 7
541}; 546};
542 547
543enum i40e_rx_desc_error_l3l4e_fcoe_masks { 548enum i40e_rx_desc_error_l3l4e_fcoe_masks {
@@ -658,7 +663,6 @@ enum i40e_rx_desc_ext_status_bits {
658 I40E_RX_DESC_EXT_STATUS_L2TAG3P_SHIFT = 1, 663 I40E_RX_DESC_EXT_STATUS_L2TAG3P_SHIFT = 1,
659 I40E_RX_DESC_EXT_STATUS_FLEXBL_SHIFT = 2, /* 2 BITS */ 664 I40E_RX_DESC_EXT_STATUS_FLEXBL_SHIFT = 2, /* 2 BITS */
660 I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT = 4, /* 2 BITS */ 665 I40E_RX_DESC_EXT_STATUS_FLEXBH_SHIFT = 4, /* 2 BITS */
661 I40E_RX_DESC_EXT_STATUS_FTYPE_SHIFT = 6, /* 3 BITS */
662 I40E_RX_DESC_EXT_STATUS_FDLONGB_SHIFT = 9, 666 I40E_RX_DESC_EXT_STATUS_FDLONGB_SHIFT = 9,
663 I40E_RX_DESC_EXT_STATUS_FCOELONGB_SHIFT = 10, 667 I40E_RX_DESC_EXT_STATUS_FCOELONGB_SHIFT = 10,
664 I40E_RX_DESC_EXT_STATUS_PELONGB_SHIFT = 11, 668 I40E_RX_DESC_EXT_STATUS_PELONGB_SHIFT = 11,
@@ -862,18 +866,14 @@ struct i40e_filter_program_desc {
862 866
863/* Packet Classifier Types for filters */ 867/* Packet Classifier Types for filters */
864enum i40e_filter_pctype { 868enum i40e_filter_pctype {
865 /* Note: Values 0-28 are reserved for future use */ 869 /* Note: Values 0-30 are reserved for future use */
866 I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP = 29,
867 I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP = 30,
868 I40E_FILTER_PCTYPE_NONF_IPV4_UDP = 31, 870 I40E_FILTER_PCTYPE_NONF_IPV4_UDP = 31,
869 I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN = 32, 871 /* Note: Value 32 is reserved for future use */
870 I40E_FILTER_PCTYPE_NONF_IPV4_TCP = 33, 872 I40E_FILTER_PCTYPE_NONF_IPV4_TCP = 33,
871 I40E_FILTER_PCTYPE_NONF_IPV4_SCTP = 34, 873 I40E_FILTER_PCTYPE_NONF_IPV4_SCTP = 34,
872 I40E_FILTER_PCTYPE_NONF_IPV4_OTHER = 35, 874 I40E_FILTER_PCTYPE_NONF_IPV4_OTHER = 35,
873 I40E_FILTER_PCTYPE_FRAG_IPV4 = 36, 875 I40E_FILTER_PCTYPE_FRAG_IPV4 = 36,
874 /* Note: Values 37-38 are reserved for future use */ 876 /* Note: Values 37-40 are reserved for future use */
875 I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP = 39,
876 I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP = 40,
877 I40E_FILTER_PCTYPE_NONF_IPV6_UDP = 41, 877 I40E_FILTER_PCTYPE_NONF_IPV6_UDP = 41,
878 I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN = 42, 878 I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN = 42,
879 I40E_FILTER_PCTYPE_NONF_IPV6_TCP = 43, 879 I40E_FILTER_PCTYPE_NONF_IPV6_TCP = 43,
@@ -955,6 +955,16 @@ struct i40e_vsi_context {
955 struct i40e_aqc_vsi_properties_data info; 955 struct i40e_aqc_vsi_properties_data info;
956}; 956};
957 957
958struct i40e_veb_context {
959 u16 seid;
960 u16 uplink_seid;
961 u16 veb_number;
962 u16 vebs_allocated;
963 u16 vebs_unallocated;
964 u16 flags;
965 struct i40e_aqc_get_veb_parameters_completion info;
966};
967
958/* Statistics collected by each port, VSI, VEB, and S-channel */ 968/* Statistics collected by each port, VSI, VEB, and S-channel */
959struct i40e_eth_stats { 969struct i40e_eth_stats {
960 u64 rx_bytes; /* gorc */ 970 u64 rx_bytes; /* gorc */
@@ -962,8 +972,6 @@ struct i40e_eth_stats {
962 u64 rx_multicast; /* mprc */ 972 u64 rx_multicast; /* mprc */
963 u64 rx_broadcast; /* bprc */ 973 u64 rx_broadcast; /* bprc */
964 u64 rx_discards; /* rdpc */ 974 u64 rx_discards; /* rdpc */
965 u64 rx_errors; /* repc */
966 u64 rx_missed; /* rmpc */
967 u64 rx_unknown_protocol; /* rupp */ 975 u64 rx_unknown_protocol; /* rupp */
968 u64 tx_bytes; /* gotc */ 976 u64 tx_bytes; /* gotc */
969 u64 tx_unicast; /* uptc */ 977 u64 tx_unicast; /* uptc */
@@ -1015,9 +1023,12 @@ struct i40e_hw_port_stats {
1015 u64 tx_size_big; /* ptc9522 */ 1023 u64 tx_size_big; /* ptc9522 */
1016 u64 mac_short_packet_dropped; /* mspdc */ 1024 u64 mac_short_packet_dropped; /* mspdc */
1017 u64 checksum_error; /* xec */ 1025 u64 checksum_error; /* xec */
1026 /* flow director stats */
1027 u64 fd_atr_match;
1028 u64 fd_sb_match;
1018 /* EEE LPI */ 1029 /* EEE LPI */
1019 bool tx_lpi_status; 1030 u32 tx_lpi_status;
1020 bool rx_lpi_status; 1031 u32 rx_lpi_status;
1021 u64 tx_lpi_count; /* etlpic */ 1032 u64 tx_lpi_count; /* etlpic */
1022 u64 rx_lpi_count; /* erlpic */ 1033 u64 rx_lpi_count; /* erlpic */
1023}; 1034};
diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h b/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h
index 22a1b69cd646..70951d2edcad 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h
@@ -341,10 +341,6 @@ struct i40e_virtchnl_pf_event {
341 int severity; 341 int severity;
342}; 342};
343 343
344/* The following are TBD, not necessary for LAN functionality.
345 * I40E_VIRTCHNL_OP_FCOE
346 */
347
348/* VF reset states - these are written into the RSTAT register: 344/* VF reset states - these are written into the RSTAT register:
349 * I40E_VFGEN_RSTAT1 on the PF 345 * I40E_VFGEN_RSTAT1 on the PF
350 * I40E_VFGEN_RSTAT on the VF 346 * I40E_VFGEN_RSTAT on the VF
diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
index 02c11a7f7d29..f5b9d2062573 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
@@ -29,6 +29,24 @@
29/***********************misc routines*****************************/ 29/***********************misc routines*****************************/
30 30
31/** 31/**
32 * i40e_vc_disable_vf
33 * @pf: pointer to the pf info
34 * @vf: pointer to the vf info
35 *
36 * Disable the VF through a SW reset
37 **/
38static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
39{
40 struct i40e_hw *hw = &pf->hw;
41 u32 reg;
42
43 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
44 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
45 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
46 i40e_flush(hw);
47}
48
49/**
32 * i40e_vc_isvalid_vsi_id 50 * i40e_vc_isvalid_vsi_id
33 * @vf: pointer to the vf info 51 * @vf: pointer to the vf info
34 * @vsi_id: vf relative vsi id 52 * @vsi_id: vf relative vsi id
@@ -230,9 +248,8 @@ static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx,
230 tx_ctx.qlen = info->ring_len; 248 tx_ctx.qlen = info->ring_len;
231 tx_ctx.rdylist = le16_to_cpu(pf->vsi[vsi_idx]->info.qs_handle[0]); 249 tx_ctx.rdylist = le16_to_cpu(pf->vsi[vsi_idx]->info.qs_handle[0]);
232 tx_ctx.rdylist_act = 0; 250 tx_ctx.rdylist_act = 0;
233 tx_ctx.head_wb_ena = 1; 251 tx_ctx.head_wb_ena = info->headwb_enabled;
234 tx_ctx.head_wb_addr = info->dma_ring_addr + 252 tx_ctx.head_wb_addr = info->dma_headwb_addr;
235 (info->ring_len * sizeof(struct i40e_tx_desc));
236 253
237 /* clear the context in the HMC */ 254 /* clear the context in the HMC */
238 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id); 255 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
@@ -336,6 +353,7 @@ static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx,
336 rx_ctx.tphhead_ena = 1; 353 rx_ctx.tphhead_ena = 1;
337 rx_ctx.lrxqthresh = 2; 354 rx_ctx.lrxqthresh = 2;
338 rx_ctx.crcstrip = 1; 355 rx_ctx.crcstrip = 1;
356 rx_ctx.prefena = 1;
339 357
340 /* clear the context in the HMC */ 358 /* clear the context in the HMC */
341 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id); 359 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
@@ -416,6 +434,15 @@ static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
416 if (ret) 434 if (ret)
417 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n"); 435 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
418 436
437 /* Set VF bandwidth if specified */
438 if (vf->tx_rate) {
439 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
440 vf->tx_rate / 50, 0, NULL);
441 if (ret)
442 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
443 vf->vf_id, ret);
444 }
445
419error_alloc_vsi_res: 446error_alloc_vsi_res:
420 return ret; 447 return ret;
421} 448}
@@ -815,6 +842,10 @@ void i40e_free_vfs(struct i40e_pf *pf)
815 kfree(pf->vf); 842 kfree(pf->vf);
816 pf->vf = NULL; 843 pf->vf = NULL;
817 844
845 /* This check is for when the driver is unloaded while VFs are
846 * assigned. Setting the number of VFs to 0 through sysfs is caught
847 * before this function ever gets called.
848 */
818 if (!i40e_vfs_are_assigned(pf)) { 849 if (!i40e_vfs_are_assigned(pf)) {
819 pci_disable_sriov(pf->pdev); 850 pci_disable_sriov(pf->pdev);
820 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to 851 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
@@ -867,6 +898,7 @@ int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
867 ret = -ENOMEM; 898 ret = -ENOMEM;
868 goto err_alloc; 899 goto err_alloc;
869 } 900 }
901 pf->vf = vfs;
870 902
871 /* apply default profile */ 903 /* apply default profile */
872 for (i = 0; i < num_alloc_vfs; i++) { 904 for (i = 0; i < num_alloc_vfs; i++) {
@@ -876,13 +908,13 @@ int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
876 908
877 /* assign default capabilities */ 909 /* assign default capabilities */
878 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps); 910 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
911 vfs[i].spoofchk = true;
879 /* vf resources get allocated during reset */ 912 /* vf resources get allocated during reset */
880 i40e_reset_vf(&vfs[i], false); 913 i40e_reset_vf(&vfs[i], false);
881 914
882 /* enable vf vplan_qtable mappings */ 915 /* enable vf vplan_qtable mappings */
883 i40e_enable_vf_mappings(&vfs[i]); 916 i40e_enable_vf_mappings(&vfs[i]);
884 } 917 }
885 pf->vf = vfs;
886 pf->num_alloc_vfs = num_alloc_vfs; 918 pf->num_alloc_vfs = num_alloc_vfs;
887 919
888 i40e_enable_pf_switch_lb(pf); 920 i40e_enable_pf_switch_lb(pf);
@@ -951,7 +983,12 @@ int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
951 if (num_vfs) 983 if (num_vfs)
952 return i40e_pci_sriov_enable(pdev, num_vfs); 984 return i40e_pci_sriov_enable(pdev, num_vfs);
953 985
954 i40e_free_vfs(pf); 986 if (!i40e_vfs_are_assigned(pf)) {
987 i40e_free_vfs(pf);
988 } else {
989 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
990 return -EINVAL;
991 }
955 return 0; 992 return 0;
956} 993}
957 994
@@ -2022,16 +2059,14 @@ int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2022 } 2059 }
2023 2060
2024 /* delete the temporary mac address */ 2061 /* delete the temporary mac address */
2025 i40e_del_filter(vsi, vf->default_lan_addr.addr, 0, true, false); 2062 i40e_del_filter(vsi, vf->default_lan_addr.addr, vf->port_vlan_id,
2063 true, false);
2026 2064
2027 /* add the new mac address */ 2065 /* Delete all the filters for this VSI - we're going to kill it
2028 f = i40e_add_filter(vsi, mac, 0, true, false); 2066 * anyway.
2029 if (!f) { 2067 */
2030 dev_err(&pf->pdev->dev, 2068 list_for_each_entry(f, &vsi->mac_filter_list, list)
2031 "Unable to add VF ucast filter\n"); 2069 i40e_del_filter(vsi, f->macaddr, f->vlan, true, false);
2032 ret = -ENOMEM;
2033 goto error_param;
2034 }
2035 2070
2036 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id); 2071 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
2037 /* program mac filter */ 2072 /* program mac filter */
@@ -2040,7 +2075,7 @@ int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2040 ret = -EIO; 2075 ret = -EIO;
2041 goto error_param; 2076 goto error_param;
2042 } 2077 }
2043 memcpy(vf->default_lan_addr.addr, mac, ETH_ALEN); 2078 ether_addr_copy(vf->default_lan_addr.addr, mac);
2044 vf->pf_set_mac = true; 2079 vf->pf_set_mac = true;
2045 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n"); 2080 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
2046 ret = 0; 2081 ret = 0;
@@ -2088,18 +2123,28 @@ int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
2088 goto error_pvid; 2123 goto error_pvid;
2089 } 2124 }
2090 2125
2091 if (vsi->info.pvid == 0 && i40e_is_vsi_in_vlan(vsi)) 2126 if (vsi->info.pvid == 0 && i40e_is_vsi_in_vlan(vsi)) {
2092 dev_err(&pf->pdev->dev, 2127 dev_err(&pf->pdev->dev,
2093 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n", 2128 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
2094 vf_id); 2129 vf_id);
2130 /* Administrator Error - knock the VF offline until he does
2131 * the right thing by reconfiguring his network correctly
2132 * and then reloading the VF driver.
2133 */
2134 i40e_vc_disable_vf(pf, vf);
2135 }
2095 2136
2096 /* Check for condition where there was already a port VLAN ID 2137 /* Check for condition where there was already a port VLAN ID
2097 * filter set and now it is being deleted by setting it to zero. 2138 * filter set and now it is being deleted by setting it to zero.
2139 * Additionally check for the condition where there was a port
2140 * VLAN but now there is a new and different port VLAN being set.
2098 * Before deleting all the old VLAN filters we must add new ones 2141 * Before deleting all the old VLAN filters we must add new ones
2099 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our 2142 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
2100 * MAC addresses deleted. 2143 * MAC addresses deleted.
2101 */ 2144 */
2102 if (!(vlan_id || qos) && vsi->info.pvid) 2145 if ((!(vlan_id || qos) ||
2146 (vlan_id | qos) != le16_to_cpu(vsi->info.pvid)) &&
2147 vsi->info.pvid)
2103 ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY); 2148 ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY);
2104 2149
2105 if (vsi->info.pvid) { 2150 if (vsi->info.pvid) {
@@ -2150,6 +2195,8 @@ error_pvid:
2150 return ret; 2195 return ret;
2151} 2196}
2152 2197
2198#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
2199#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
2153/** 2200/**
2154 * i40e_ndo_set_vf_bw 2201 * i40e_ndo_set_vf_bw
2155 * @netdev: network interface device structure 2202 * @netdev: network interface device structure
@@ -2158,9 +2205,76 @@ error_pvid:
2158 * 2205 *
2159 * configure vf tx rate 2206 * configure vf tx rate
2160 **/ 2207 **/
2161int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int tx_rate) 2208int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
2209 int max_tx_rate)
2162{ 2210{
2163 return -EOPNOTSUPP; 2211 struct i40e_netdev_priv *np = netdev_priv(netdev);
2212 struct i40e_pf *pf = np->vsi->back;
2213 struct i40e_vsi *vsi;
2214 struct i40e_vf *vf;
2215 int speed = 0;
2216 int ret = 0;
2217
2218 /* validate the request */
2219 if (vf_id >= pf->num_alloc_vfs) {
2220 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
2221 ret = -EINVAL;
2222 goto error;
2223 }
2224
2225 if (min_tx_rate) {
2226 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for vf %d.\n",
2227 min_tx_rate, vf_id);
2228 return -EINVAL;
2229 }
2230
2231 vf = &(pf->vf[vf_id]);
2232 vsi = pf->vsi[vf->lan_vsi_index];
2233 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2234 dev_err(&pf->pdev->dev, "Uninitialized VF %d.\n", vf_id);
2235 ret = -EINVAL;
2236 goto error;
2237 }
2238
2239 switch (pf->hw.phy.link_info.link_speed) {
2240 case I40E_LINK_SPEED_40GB:
2241 speed = 40000;
2242 break;
2243 case I40E_LINK_SPEED_10GB:
2244 speed = 10000;
2245 break;
2246 case I40E_LINK_SPEED_1GB:
2247 speed = 1000;
2248 break;
2249 default:
2250 break;
2251 }
2252
2253 if (max_tx_rate > speed) {
2254 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for vf %d.",
2255 max_tx_rate, vf->vf_id);
2256 ret = -EINVAL;
2257 goto error;
2258 }
2259
2260 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
2261 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
2262 max_tx_rate = 50;
2263 }
2264
2265 /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
2266 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
2267 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
2268 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
2269 if (ret) {
2270 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
2271 ret);
2272 ret = -EIO;
2273 goto error;
2274 }
2275 vf->tx_rate = max_tx_rate;
2276error:
2277 return ret;
2164} 2278}
2165 2279
2166/** 2280/**
@@ -2200,10 +2314,18 @@ int i40e_ndo_get_vf_config(struct net_device *netdev,
2200 2314
2201 memcpy(&ivi->mac, vf->default_lan_addr.addr, ETH_ALEN); 2315 memcpy(&ivi->mac, vf->default_lan_addr.addr, ETH_ALEN);
2202 2316
2203 ivi->tx_rate = 0; 2317 ivi->max_tx_rate = vf->tx_rate;
2318 ivi->min_tx_rate = 0;
2204 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK; 2319 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2205 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >> 2320 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2206 I40E_VLAN_PRIORITY_SHIFT; 2321 I40E_VLAN_PRIORITY_SHIFT;
2322 if (vf->link_forced == false)
2323 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
2324 else if (vf->link_up == true)
2325 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
2326 else
2327 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
2328 ivi->spoofchk = vf->spoofchk;
2207 ret = 0; 2329 ret = 0;
2208 2330
2209error_param: 2331error_param:
@@ -2270,3 +2392,50 @@ int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
2270error_out: 2392error_out:
2271 return ret; 2393 return ret;
2272} 2394}
2395
2396/**
2397 * i40e_ndo_set_vf_spoofchk
2398 * @netdev: network interface device structure
2399 * @vf_id: vf identifier
2400 * @enable: flag to enable or disable feature
2401 *
2402 * Enable or disable VF spoof checking
2403 **/
2404int i40e_ndo_set_vf_spoofck(struct net_device *netdev, int vf_id, bool enable)
2405{
2406 struct i40e_netdev_priv *np = netdev_priv(netdev);
2407 struct i40e_vsi *vsi = np->vsi;
2408 struct i40e_pf *pf = vsi->back;
2409 struct i40e_vsi_context ctxt;
2410 struct i40e_hw *hw = &pf->hw;
2411 struct i40e_vf *vf;
2412 int ret = 0;
2413
2414 /* validate the request */
2415 if (vf_id >= pf->num_alloc_vfs) {
2416 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2417 ret = -EINVAL;
2418 goto out;
2419 }
2420
2421 vf = &(pf->vf[vf_id]);
2422
2423 if (enable == vf->spoofchk)
2424 goto out;
2425
2426 vf->spoofchk = enable;
2427 memset(&ctxt, 0, sizeof(ctxt));
2428 ctxt.seid = pf->vsi[vf->lan_vsi_index]->seid;
2429 ctxt.pf_num = pf->hw.pf_id;
2430 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
2431 if (enable)
2432 ctxt.info.sec_flags |= I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK;
2433 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
2434 if (ret) {
2435 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
2436 ret);
2437 ret = -EIO;
2438 }
2439out:
2440 return ret;
2441}
diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
index 389c47f396d5..63e7e0d81ad2 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
@@ -98,8 +98,10 @@ struct i40e_vf {
98 98
99 unsigned long vf_caps; /* vf's adv. capabilities */ 99 unsigned long vf_caps; /* vf's adv. capabilities */
100 unsigned long vf_states; /* vf's runtime states */ 100 unsigned long vf_states; /* vf's runtime states */
101 unsigned int tx_rate; /* Tx bandwidth limit in Mbps */
101 bool link_forced; 102 bool link_forced;
102 bool link_up; /* only valid if vf link is forced */ 103 bool link_up; /* only valid if vf link is forced */
104 bool spoofchk;
103}; 105};
104 106
105void i40e_free_vfs(struct i40e_pf *pf); 107void i40e_free_vfs(struct i40e_pf *pf);
@@ -115,10 +117,12 @@ void i40e_vc_notify_vf_reset(struct i40e_vf *vf);
115int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac); 117int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac);
116int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, 118int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
117 int vf_id, u16 vlan_id, u8 qos); 119 int vf_id, u16 vlan_id, u8 qos);
118int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int tx_rate); 120int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
121 int max_tx_rate);
119int i40e_ndo_get_vf_config(struct net_device *netdev, 122int i40e_ndo_get_vf_config(struct net_device *netdev,
120 int vf_id, struct ifla_vf_info *ivi); 123 int vf_id, struct ifla_vf_info *ivi);
121int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link); 124int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link);
125int i40e_ndo_set_vf_spoofck(struct net_device *netdev, int vf_id, bool enable);
122 126
123void i40e_vc_notify_link_state(struct i40e_pf *pf); 127void i40e_vc_notify_link_state(struct i40e_pf *pf);
124void i40e_vc_notify_reset(struct i40e_pf *pf); 128void i40e_vc_notify_reset(struct i40e_pf *pf);
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 19:20:32 -0400