diff options
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e')
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/80003es2lan.c | 1 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/82571.c | 1 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/e1000.h | 41 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ethtool.c | 17 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/hw.h | 3 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ich8lan.c | 62 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/mac.c | 9 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/mac.h | 3 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/netdev.c | 88 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/nvm.c | 1 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/param.c | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/phy.c | 1 |
12 files changed, 171 insertions, 60 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/80003es2lan.c b/drivers/net/ethernet/intel/e1000e/80003es2lan.c index a5f6b11d6992..08f22f348800 100644 --- a/drivers/net/ethernet/intel/e1000e/80003es2lan.c +++ b/drivers/net/ethernet/intel/e1000e/80003es2lan.c | |||
@@ -1365,6 +1365,7 @@ static const struct e1000_mac_operations es2_mac_ops = { | |||
1365 | .setup_led = e1000e_setup_led_generic, | 1365 | .setup_led = e1000e_setup_led_generic, |
1366 | .config_collision_dist = e1000e_config_collision_dist_generic, | 1366 | .config_collision_dist = e1000e_config_collision_dist_generic, |
1367 | .rar_set = e1000e_rar_set_generic, | 1367 | .rar_set = e1000e_rar_set_generic, |
1368 | .rar_get_count = e1000e_rar_get_count_generic, | ||
1368 | }; | 1369 | }; |
1369 | 1370 | ||
1370 | static const struct e1000_phy_operations es2_phy_ops = { | 1371 | static const struct e1000_phy_operations es2_phy_ops = { |
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c index e0aa7f1efb08..218481e509f9 100644 --- a/drivers/net/ethernet/intel/e1000e/82571.c +++ b/drivers/net/ethernet/intel/e1000e/82571.c | |||
@@ -1896,6 +1896,7 @@ static const struct e1000_mac_operations e82571_mac_ops = { | |||
1896 | .config_collision_dist = e1000e_config_collision_dist_generic, | 1896 | .config_collision_dist = e1000e_config_collision_dist_generic, |
1897 | .read_mac_addr = e1000_read_mac_addr_82571, | 1897 | .read_mac_addr = e1000_read_mac_addr_82571, |
1898 | .rar_set = e1000e_rar_set_generic, | 1898 | .rar_set = e1000e_rar_set_generic, |
1899 | .rar_get_count = e1000e_rar_get_count_generic, | ||
1899 | }; | 1900 | }; |
1900 | 1901 | ||
1901 | static const struct e1000_phy_operations e82_phy_ops_igp = { | 1902 | static const struct e1000_phy_operations e82_phy_ops_igp = { |
diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h index 1471c5464a89..7785240a0da1 100644 --- a/drivers/net/ethernet/intel/e1000e/e1000.h +++ b/drivers/net/ethernet/intel/e1000e/e1000.h | |||
@@ -265,10 +265,10 @@ struct e1000_adapter { | |||
265 | u32 tx_hwtstamp_timeouts; | 265 | u32 tx_hwtstamp_timeouts; |
266 | 266 | ||
267 | /* Rx */ | 267 | /* Rx */ |
268 | bool (*clean_rx) (struct e1000_ring *ring, int *work_done, | 268 | bool (*clean_rx)(struct e1000_ring *ring, int *work_done, |
269 | int work_to_do) ____cacheline_aligned_in_smp; | 269 | int work_to_do) ____cacheline_aligned_in_smp; |
270 | void (*alloc_rx_buf) (struct e1000_ring *ring, int cleaned_count, | 270 | void (*alloc_rx_buf)(struct e1000_ring *ring, int cleaned_count, |
271 | gfp_t gfp); | 271 | gfp_t gfp); |
272 | struct e1000_ring *rx_ring; | 272 | struct e1000_ring *rx_ring; |
273 | 273 | ||
274 | u32 rx_int_delay; | 274 | u32 rx_int_delay; |
@@ -391,6 +391,8 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca); | |||
391 | * 25MHz 46-bit 2^46 / 10^9 / 3600 = 19.55 hours | 391 | * 25MHz 46-bit 2^46 / 10^9 / 3600 = 19.55 hours |
392 | */ | 392 | */ |
393 | #define E1000_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 60 * 4) | 393 | #define E1000_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 60 * 4) |
394 | #define E1000_MAX_82574_SYSTIM_REREADS 50 | ||
395 | #define E1000_82574_SYSTIM_EPSILON (1ULL << 35ULL) | ||
394 | 396 | ||
395 | /* hardware capability, feature, and workaround flags */ | 397 | /* hardware capability, feature, and workaround flags */ |
396 | #define FLAG_HAS_AMT (1 << 0) | 398 | #define FLAG_HAS_AMT (1 << 0) |
@@ -573,35 +575,8 @@ static inline u32 __er32(struct e1000_hw *hw, unsigned long reg) | |||
573 | 575 | ||
574 | #define er32(reg) __er32(hw, E1000_##reg) | 576 | #define er32(reg) __er32(hw, E1000_##reg) |
575 | 577 | ||
576 | /** | 578 | s32 __ew32_prepare(struct e1000_hw *hw); |
577 | * __ew32_prepare - prepare to write to MAC CSR register on certain parts | 579 | void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val); |
578 | * @hw: pointer to the HW structure | ||
579 | * | ||
580 | * When updating the MAC CSR registers, the Manageability Engine (ME) could | ||
581 | * be accessing the registers at the same time. Normally, this is handled in | ||
582 | * h/w by an arbiter but on some parts there is a bug that acknowledges Host | ||
583 | * accesses later than it should which could result in the register to have | ||
584 | * an incorrect value. Workaround this by checking the FWSM register which | ||
585 | * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set | ||
586 | * and try again a number of times. | ||
587 | **/ | ||
588 | static inline s32 __ew32_prepare(struct e1000_hw *hw) | ||
589 | { | ||
590 | s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT; | ||
591 | |||
592 | while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i) | ||
593 | udelay(50); | ||
594 | |||
595 | return i; | ||
596 | } | ||
597 | |||
598 | static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val) | ||
599 | { | ||
600 | if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) | ||
601 | __ew32_prepare(hw); | ||
602 | |||
603 | writel(val, hw->hw_addr + reg); | ||
604 | } | ||
605 | 580 | ||
606 | #define ew32(reg, val) __ew32(hw, E1000_##reg, (val)) | 581 | #define ew32(reg, val) __ew32(hw, E1000_##reg, (val)) |
607 | 582 | ||
diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c index cad250bc1b99..815e26c6d34b 100644 --- a/drivers/net/ethernet/intel/e1000e/ethtool.c +++ b/drivers/net/ethernet/intel/e1000e/ethtool.c | |||
@@ -159,8 +159,8 @@ static int e1000_get_settings(struct net_device *netdev, | |||
159 | ecmd->transceiver = XCVR_EXTERNAL; | 159 | ecmd->transceiver = XCVR_EXTERNAL; |
160 | } | 160 | } |
161 | 161 | ||
162 | speed = -1; | 162 | speed = SPEED_UNKNOWN; |
163 | ecmd->duplex = -1; | 163 | ecmd->duplex = DUPLEX_UNKNOWN; |
164 | 164 | ||
165 | if (netif_running(netdev)) { | 165 | if (netif_running(netdev)) { |
166 | if (netif_carrier_ok(netdev)) { | 166 | if (netif_carrier_ok(netdev)) { |
@@ -169,6 +169,7 @@ static int e1000_get_settings(struct net_device *netdev, | |||
169 | } | 169 | } |
170 | } else if (!pm_runtime_suspended(netdev->dev.parent)) { | 170 | } else if (!pm_runtime_suspended(netdev->dev.parent)) { |
171 | u32 status = er32(STATUS); | 171 | u32 status = er32(STATUS); |
172 | |||
172 | if (status & E1000_STATUS_LU) { | 173 | if (status & E1000_STATUS_LU) { |
173 | if (status & E1000_STATUS_SPEED_1000) | 174 | if (status & E1000_STATUS_SPEED_1000) |
174 | speed = SPEED_1000; | 175 | speed = SPEED_1000; |
@@ -783,25 +784,26 @@ static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, | |||
783 | reg + (offset << 2), val, | 784 | reg + (offset << 2), val, |
784 | (test[pat] & write & mask)); | 785 | (test[pat] & write & mask)); |
785 | *data = reg; | 786 | *data = reg; |
786 | return 1; | 787 | return true; |
787 | } | 788 | } |
788 | } | 789 | } |
789 | return 0; | 790 | return false; |
790 | } | 791 | } |
791 | 792 | ||
792 | static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, | 793 | static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, |
793 | int reg, u32 mask, u32 write) | 794 | int reg, u32 mask, u32 write) |
794 | { | 795 | { |
795 | u32 val; | 796 | u32 val; |
797 | |||
796 | __ew32(&adapter->hw, reg, write & mask); | 798 | __ew32(&adapter->hw, reg, write & mask); |
797 | val = __er32(&adapter->hw, reg); | 799 | val = __er32(&adapter->hw, reg); |
798 | if ((write & mask) != (val & mask)) { | 800 | if ((write & mask) != (val & mask)) { |
799 | e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n", | 801 | e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n", |
800 | reg, (val & mask), (write & mask)); | 802 | reg, (val & mask), (write & mask)); |
801 | *data = reg; | 803 | *data = reg; |
802 | return 1; | 804 | return true; |
803 | } | 805 | } |
804 | return 0; | 806 | return false; |
805 | } | 807 | } |
806 | 808 | ||
807 | #define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \ | 809 | #define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \ |
@@ -1717,6 +1719,7 @@ static int e1000_link_test(struct e1000_adapter *adapter, u64 *data) | |||
1717 | *data = 0; | 1719 | *data = 0; |
1718 | if (hw->phy.media_type == e1000_media_type_internal_serdes) { | 1720 | if (hw->phy.media_type == e1000_media_type_internal_serdes) { |
1719 | int i = 0; | 1721 | int i = 0; |
1722 | |||
1720 | hw->mac.serdes_has_link = false; | 1723 | hw->mac.serdes_has_link = false; |
1721 | 1724 | ||
1722 | /* On some blade server designs, link establishment | 1725 | /* On some blade server designs, link establishment |
@@ -2315,5 +2318,5 @@ static const struct ethtool_ops e1000_ethtool_ops = { | |||
2315 | 2318 | ||
2316 | void e1000e_set_ethtool_ops(struct net_device *netdev) | 2319 | void e1000e_set_ethtool_ops(struct net_device *netdev) |
2317 | { | 2320 | { |
2318 | SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops); | 2321 | netdev->ethtool_ops = &e1000_ethtool_ops; |
2319 | } | 2322 | } |
diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h index 6b3de5f39a97..72f5475c4b90 100644 --- a/drivers/net/ethernet/intel/e1000e/hw.h +++ b/drivers/net/ethernet/intel/e1000e/hw.h | |||
@@ -469,8 +469,9 @@ struct e1000_mac_operations { | |||
469 | s32 (*setup_led)(struct e1000_hw *); | 469 | s32 (*setup_led)(struct e1000_hw *); |
470 | void (*write_vfta)(struct e1000_hw *, u32, u32); | 470 | void (*write_vfta)(struct e1000_hw *, u32, u32); |
471 | void (*config_collision_dist)(struct e1000_hw *); | 471 | void (*config_collision_dist)(struct e1000_hw *); |
472 | void (*rar_set)(struct e1000_hw *, u8 *, u32); | 472 | int (*rar_set)(struct e1000_hw *, u8 *, u32); |
473 | s32 (*read_mac_addr)(struct e1000_hw *); | 473 | s32 (*read_mac_addr)(struct e1000_hw *); |
474 | u32 (*rar_get_count)(struct e1000_hw *); | ||
474 | }; | 475 | }; |
475 | 476 | ||
476 | /* When to use various PHY register access functions: | 477 | /* When to use various PHY register access functions: |
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index f0bbd4246d71..8894ab8ed6bd 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c | |||
@@ -139,8 +139,9 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link); | |||
139 | static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw); | 139 | static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw); |
140 | static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw); | 140 | static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw); |
141 | static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw); | 141 | static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw); |
142 | static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index); | 142 | static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index); |
143 | static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index); | 143 | static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index); |
144 | static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw); | ||
144 | static s32 e1000_k1_workaround_lv(struct e1000_hw *hw); | 145 | static s32 e1000_k1_workaround_lv(struct e1000_hw *hw); |
145 | static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate); | 146 | static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate); |
146 | static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force); | 147 | static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force); |
@@ -704,6 +705,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) | |||
704 | mac->ops.rar_set = e1000_rar_set_pch_lpt; | 705 | mac->ops.rar_set = e1000_rar_set_pch_lpt; |
705 | mac->ops.setup_physical_interface = | 706 | mac->ops.setup_physical_interface = |
706 | e1000_setup_copper_link_pch_lpt; | 707 | e1000_setup_copper_link_pch_lpt; |
708 | mac->ops.rar_get_count = e1000_rar_get_count_pch_lpt; | ||
707 | } | 709 | } |
708 | 710 | ||
709 | /* Enable PCS Lock-loss workaround for ICH8 */ | 711 | /* Enable PCS Lock-loss workaround for ICH8 */ |
@@ -1334,6 +1336,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) | |||
1334 | if (((hw->mac.type == e1000_pch2lan) || | 1336 | if (((hw->mac.type == e1000_pch2lan) || |
1335 | (hw->mac.type == e1000_pch_lpt)) && link) { | 1337 | (hw->mac.type == e1000_pch_lpt)) && link) { |
1336 | u32 reg; | 1338 | u32 reg; |
1339 | |||
1337 | reg = er32(STATUS); | 1340 | reg = er32(STATUS); |
1338 | if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) { | 1341 | if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) { |
1339 | u16 emi_addr; | 1342 | u16 emi_addr; |
@@ -1634,9 +1637,9 @@ static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw) | |||
1634 | u32 fwsm; | 1637 | u32 fwsm; |
1635 | 1638 | ||
1636 | fwsm = er32(FWSM); | 1639 | fwsm = er32(FWSM); |
1637 | return ((fwsm & E1000_ICH_FWSM_FW_VALID) && | 1640 | return (fwsm & E1000_ICH_FWSM_FW_VALID) && |
1638 | ((fwsm & E1000_FWSM_MODE_MASK) == | 1641 | ((fwsm & E1000_FWSM_MODE_MASK) == |
1639 | (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT))); | 1642 | (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT)); |
1640 | } | 1643 | } |
1641 | 1644 | ||
1642 | /** | 1645 | /** |
@@ -1667,7 +1670,7 @@ static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw) | |||
1667 | * contain the MAC address but RAR[1-6] are reserved for manageability (ME). | 1670 | * contain the MAC address but RAR[1-6] are reserved for manageability (ME). |
1668 | * Use SHRA[0-3] in place of those reserved for ME. | 1671 | * Use SHRA[0-3] in place of those reserved for ME. |
1669 | **/ | 1672 | **/ |
1670 | static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index) | 1673 | static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index) |
1671 | { | 1674 | { |
1672 | u32 rar_low, rar_high; | 1675 | u32 rar_low, rar_high; |
1673 | 1676 | ||
@@ -1689,7 +1692,7 @@ static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index) | |||
1689 | e1e_flush(); | 1692 | e1e_flush(); |
1690 | ew32(RAH(index), rar_high); | 1693 | ew32(RAH(index), rar_high); |
1691 | e1e_flush(); | 1694 | e1e_flush(); |
1692 | return; | 1695 | return 0; |
1693 | } | 1696 | } |
1694 | 1697 | ||
1695 | /* RAR[1-6] are owned by manageability. Skip those and program the | 1698 | /* RAR[1-6] are owned by manageability. Skip those and program the |
@@ -1712,7 +1715,7 @@ static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index) | |||
1712 | /* verify the register updates */ | 1715 | /* verify the register updates */ |
1713 | if ((er32(SHRAL(index - 1)) == rar_low) && | 1716 | if ((er32(SHRAL(index - 1)) == rar_low) && |
1714 | (er32(SHRAH(index - 1)) == rar_high)) | 1717 | (er32(SHRAH(index - 1)) == rar_high)) |
1715 | return; | 1718 | return 0; |
1716 | 1719 | ||
1717 | e_dbg("SHRA[%d] might be locked by ME - FWSM=0x%8.8x\n", | 1720 | e_dbg("SHRA[%d] might be locked by ME - FWSM=0x%8.8x\n", |
1718 | (index - 1), er32(FWSM)); | 1721 | (index - 1), er32(FWSM)); |
@@ -1720,6 +1723,43 @@ static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index) | |||
1720 | 1723 | ||
1721 | out: | 1724 | out: |
1722 | e_dbg("Failed to write receive address at index %d\n", index); | 1725 | e_dbg("Failed to write receive address at index %d\n", index); |
1726 | return -E1000_ERR_CONFIG; | ||
1727 | } | ||
1728 | |||
1729 | /** | ||
1730 | * e1000_rar_get_count_pch_lpt - Get the number of available SHRA | ||
1731 | * @hw: pointer to the HW structure | ||
1732 | * | ||
1733 | * Get the number of available receive registers that the Host can | ||
1734 | * program. SHRA[0-10] are the shared receive address registers | ||
1735 | * that are shared between the Host and manageability engine (ME). | ||
1736 | * ME can reserve any number of addresses and the host needs to be | ||
1737 | * able to tell how many available registers it has access to. | ||
1738 | **/ | ||
1739 | static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw) | ||
1740 | { | ||
1741 | u32 wlock_mac; | ||
1742 | u32 num_entries; | ||
1743 | |||
1744 | wlock_mac = er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK; | ||
1745 | wlock_mac >>= E1000_FWSM_WLOCK_MAC_SHIFT; | ||
1746 | |||
1747 | switch (wlock_mac) { | ||
1748 | case 0: | ||
1749 | /* All SHRA[0..10] and RAR[0] available */ | ||
1750 | num_entries = hw->mac.rar_entry_count; | ||
1751 | break; | ||
1752 | case 1: | ||
1753 | /* Only RAR[0] available */ | ||
1754 | num_entries = 1; | ||
1755 | break; | ||
1756 | default: | ||
1757 | /* SHRA[0..(wlock_mac - 1)] available + RAR[0] */ | ||
1758 | num_entries = wlock_mac + 1; | ||
1759 | break; | ||
1760 | } | ||
1761 | |||
1762 | return num_entries; | ||
1723 | } | 1763 | } |
1724 | 1764 | ||
1725 | /** | 1765 | /** |
@@ -1733,7 +1773,7 @@ out: | |||
1733 | * contain the MAC address. SHRA[0-10] are the shared receive address | 1773 | * contain the MAC address. SHRA[0-10] are the shared receive address |
1734 | * registers that are shared between the Host and manageability engine (ME). | 1774 | * registers that are shared between the Host and manageability engine (ME). |
1735 | **/ | 1775 | **/ |
1736 | static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index) | 1776 | static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index) |
1737 | { | 1777 | { |
1738 | u32 rar_low, rar_high; | 1778 | u32 rar_low, rar_high; |
1739 | u32 wlock_mac; | 1779 | u32 wlock_mac; |
@@ -1755,7 +1795,7 @@ static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index) | |||
1755 | e1e_flush(); | 1795 | e1e_flush(); |
1756 | ew32(RAH(index), rar_high); | 1796 | ew32(RAH(index), rar_high); |
1757 | e1e_flush(); | 1797 | e1e_flush(); |
1758 | return; | 1798 | return 0; |
1759 | } | 1799 | } |
1760 | 1800 | ||
1761 | /* The manageability engine (ME) can lock certain SHRAR registers that | 1801 | /* The manageability engine (ME) can lock certain SHRAR registers that |
@@ -1787,12 +1827,13 @@ static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index) | |||
1787 | /* verify the register updates */ | 1827 | /* verify the register updates */ |
1788 | if ((er32(SHRAL_PCH_LPT(index - 1)) == rar_low) && | 1828 | if ((er32(SHRAL_PCH_LPT(index - 1)) == rar_low) && |
1789 | (er32(SHRAH_PCH_LPT(index - 1)) == rar_high)) | 1829 | (er32(SHRAH_PCH_LPT(index - 1)) == rar_high)) |
1790 | return; | 1830 | return 0; |
1791 | } | 1831 | } |
1792 | } | 1832 | } |
1793 | 1833 | ||
1794 | out: | 1834 | out: |
1795 | e_dbg("Failed to write receive address at index %d\n", index); | 1835 | e_dbg("Failed to write receive address at index %d\n", index); |
1836 | return -E1000_ERR_CONFIG; | ||
1796 | } | 1837 | } |
1797 | 1838 | ||
1798 | /** | 1839 | /** |
@@ -4976,6 +5017,7 @@ static const struct e1000_mac_operations ich8_mac_ops = { | |||
4976 | /* id_led_init dependent on mac type */ | 5017 | /* id_led_init dependent on mac type */ |
4977 | .config_collision_dist = e1000e_config_collision_dist_generic, | 5018 | .config_collision_dist = e1000e_config_collision_dist_generic, |
4978 | .rar_set = e1000e_rar_set_generic, | 5019 | .rar_set = e1000e_rar_set_generic, |
5020 | .rar_get_count = e1000e_rar_get_count_generic, | ||
4979 | }; | 5021 | }; |
4980 | 5022 | ||
4981 | static const struct e1000_phy_operations ich8_phy_ops = { | 5023 | static const struct e1000_phy_operations ich8_phy_ops = { |
diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c index baa0a466d1d0..8c386f3a15eb 100644 --- a/drivers/net/ethernet/intel/e1000e/mac.c +++ b/drivers/net/ethernet/intel/e1000e/mac.c | |||
@@ -211,6 +211,11 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) | |||
211 | return 0; | 211 | return 0; |
212 | } | 212 | } |
213 | 213 | ||
214 | u32 e1000e_rar_get_count_generic(struct e1000_hw *hw) | ||
215 | { | ||
216 | return hw->mac.rar_entry_count; | ||
217 | } | ||
218 | |||
214 | /** | 219 | /** |
215 | * e1000e_rar_set_generic - Set receive address register | 220 | * e1000e_rar_set_generic - Set receive address register |
216 | * @hw: pointer to the HW structure | 221 | * @hw: pointer to the HW structure |
@@ -220,7 +225,7 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) | |||
220 | * Sets the receive address array register at index to the address passed | 225 | * Sets the receive address array register at index to the address passed |
221 | * in by addr. | 226 | * in by addr. |
222 | **/ | 227 | **/ |
223 | void e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) | 228 | int e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) |
224 | { | 229 | { |
225 | u32 rar_low, rar_high; | 230 | u32 rar_low, rar_high; |
226 | 231 | ||
@@ -244,6 +249,8 @@ void e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) | |||
244 | e1e_flush(); | 249 | e1e_flush(); |
245 | ew32(RAH(index), rar_high); | 250 | ew32(RAH(index), rar_high); |
246 | e1e_flush(); | 251 | e1e_flush(); |
252 | |||
253 | return 0; | ||
247 | } | 254 | } |
248 | 255 | ||
249 | /** | 256 | /** |
diff --git a/drivers/net/ethernet/intel/e1000e/mac.h b/drivers/net/ethernet/intel/e1000e/mac.h index 4e81c2825b7a..0513d90cdeea 100644 --- a/drivers/net/ethernet/intel/e1000e/mac.h +++ b/drivers/net/ethernet/intel/e1000e/mac.h | |||
@@ -61,7 +61,8 @@ void e1000e_update_adaptive(struct e1000_hw *hw); | |||
61 | void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value); | 61 | void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value); |
62 | 62 | ||
63 | void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw); | 63 | void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw); |
64 | void e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index); | 64 | u32 e1000e_rar_get_count_generic(struct e1000_hw *hw); |
65 | int e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index); | ||
65 | void e1000e_config_collision_dist_generic(struct e1000_hw *hw); | 66 | void e1000e_config_collision_dist_generic(struct e1000_hw *hw); |
66 | 67 | ||
67 | #endif | 68 | #endif |
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index 3e69386add04..201cc93f3625 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c | |||
@@ -124,6 +124,36 @@ static const struct e1000_reg_info e1000_reg_info_tbl[] = { | |||
124 | }; | 124 | }; |
125 | 125 | ||
126 | /** | 126 | /** |
127 | * __ew32_prepare - prepare to write to MAC CSR register on certain parts | ||
128 | * @hw: pointer to the HW structure | ||
129 | * | ||
130 | * When updating the MAC CSR registers, the Manageability Engine (ME) could | ||
131 | * be accessing the registers at the same time. Normally, this is handled in | ||
132 | * h/w by an arbiter but on some parts there is a bug that acknowledges Host | ||
133 | * accesses later than it should which could result in the register to have | ||
134 | * an incorrect value. Workaround this by checking the FWSM register which | ||
135 | * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set | ||
136 | * and try again a number of times. | ||
137 | **/ | ||
138 | s32 __ew32_prepare(struct e1000_hw *hw) | ||
139 | { | ||
140 | s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT; | ||
141 | |||
142 | while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i) | ||
143 | udelay(50); | ||
144 | |||
145 | return i; | ||
146 | } | ||
147 | |||
148 | void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val) | ||
149 | { | ||
150 | if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) | ||
151 | __ew32_prepare(hw); | ||
152 | |||
153 | writel(val, hw->hw_addr + reg); | ||
154 | } | ||
155 | |||
156 | /** | ||
127 | * e1000_regdump - register printout routine | 157 | * e1000_regdump - register printout routine |
128 | * @hw: pointer to the HW structure | 158 | * @hw: pointer to the HW structure |
129 | * @reginfo: pointer to the register info table | 159 | * @reginfo: pointer to the register info table |
@@ -599,6 +629,7 @@ static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) | |||
599 | 629 | ||
600 | if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) { | 630 | if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) { |
601 | u32 rctl = er32(RCTL); | 631 | u32 rctl = er32(RCTL); |
632 | |||
602 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | 633 | ew32(RCTL, rctl & ~E1000_RCTL_EN); |
603 | e_err("ME firmware caused invalid RDT - resetting\n"); | 634 | e_err("ME firmware caused invalid RDT - resetting\n"); |
604 | schedule_work(&adapter->reset_task); | 635 | schedule_work(&adapter->reset_task); |
@@ -615,6 +646,7 @@ static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) | |||
615 | 646 | ||
616 | if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) { | 647 | if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) { |
617 | u32 tctl = er32(TCTL); | 648 | u32 tctl = er32(TCTL); |
649 | |||
618 | ew32(TCTL, tctl & ~E1000_TCTL_EN); | 650 | ew32(TCTL, tctl & ~E1000_TCTL_EN); |
619 | e_err("ME firmware caused invalid TDT - resetting\n"); | 651 | e_err("ME firmware caused invalid TDT - resetting\n"); |
620 | schedule_work(&adapter->reset_task); | 652 | schedule_work(&adapter->reset_task); |
@@ -1198,6 +1230,7 @@ static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) | |||
1198 | while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && | 1230 | while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && |
1199 | (count < tx_ring->count)) { | 1231 | (count < tx_ring->count)) { |
1200 | bool cleaned = false; | 1232 | bool cleaned = false; |
1233 | |||
1201 | rmb(); /* read buffer_info after eop_desc */ | 1234 | rmb(); /* read buffer_info after eop_desc */ |
1202 | for (; !cleaned; count++) { | 1235 | for (; !cleaned; count++) { |
1203 | tx_desc = E1000_TX_DESC(*tx_ring, i); | 1236 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
@@ -1753,6 +1786,7 @@ static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data) | |||
1753 | adapter->flags & FLAG_RX_NEEDS_RESTART) { | 1786 | adapter->flags & FLAG_RX_NEEDS_RESTART) { |
1754 | /* disable receives */ | 1787 | /* disable receives */ |
1755 | u32 rctl = er32(RCTL); | 1788 | u32 rctl = er32(RCTL); |
1789 | |||
1756 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | 1790 | ew32(RCTL, rctl & ~E1000_RCTL_EN); |
1757 | adapter->flags |= FLAG_RESTART_NOW; | 1791 | adapter->flags |= FLAG_RESTART_NOW; |
1758 | } | 1792 | } |
@@ -1960,6 +1994,7 @@ static void e1000_configure_msix(struct e1000_adapter *adapter) | |||
1960 | /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ | 1994 | /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ |
1961 | if (hw->mac.type == e1000_82574) { | 1995 | if (hw->mac.type == e1000_82574) { |
1962 | u32 rfctl = er32(RFCTL); | 1996 | u32 rfctl = er32(RFCTL); |
1997 | |||
1963 | rfctl |= E1000_RFCTL_ACK_DIS; | 1998 | rfctl |= E1000_RFCTL_ACK_DIS; |
1964 | ew32(RFCTL, rfctl); | 1999 | ew32(RFCTL, rfctl); |
1965 | } | 2000 | } |
@@ -2204,6 +2239,7 @@ static void e1000_irq_disable(struct e1000_adapter *adapter) | |||
2204 | 2239 | ||
2205 | if (adapter->msix_entries) { | 2240 | if (adapter->msix_entries) { |
2206 | int i; | 2241 | int i; |
2242 | |||
2207 | for (i = 0; i < adapter->num_vectors; i++) | 2243 | for (i = 0; i < adapter->num_vectors; i++) |
2208 | synchronize_irq(adapter->msix_entries[i].vector); | 2244 | synchronize_irq(adapter->msix_entries[i].vector); |
2209 | } else { | 2245 | } else { |
@@ -2921,6 +2957,7 @@ static void e1000_configure_tx(struct e1000_adapter *adapter) | |||
2921 | 2957 | ||
2922 | if (adapter->flags2 & FLAG2_DMA_BURST) { | 2958 | if (adapter->flags2 & FLAG2_DMA_BURST) { |
2923 | u32 txdctl = er32(TXDCTL(0)); | 2959 | u32 txdctl = er32(TXDCTL(0)); |
2960 | |||
2924 | txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | | 2961 | txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | |
2925 | E1000_TXDCTL_WTHRESH); | 2962 | E1000_TXDCTL_WTHRESH); |
2926 | /* set up some performance related parameters to encourage the | 2963 | /* set up some performance related parameters to encourage the |
@@ -3239,6 +3276,7 @@ static void e1000_configure_rx(struct e1000_adapter *adapter) | |||
3239 | 3276 | ||
3240 | if (adapter->flags & FLAG_IS_ICH) { | 3277 | if (adapter->flags & FLAG_IS_ICH) { |
3241 | u32 rxdctl = er32(RXDCTL(0)); | 3278 | u32 rxdctl = er32(RXDCTL(0)); |
3279 | |||
3242 | ew32(RXDCTL(0), rxdctl | 0x3); | 3280 | ew32(RXDCTL(0), rxdctl | 0x3); |
3243 | } | 3281 | } |
3244 | 3282 | ||
@@ -3303,9 +3341,11 @@ static int e1000e_write_uc_addr_list(struct net_device *netdev) | |||
3303 | { | 3341 | { |
3304 | struct e1000_adapter *adapter = netdev_priv(netdev); | 3342 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3305 | struct e1000_hw *hw = &adapter->hw; | 3343 | struct e1000_hw *hw = &adapter->hw; |
3306 | unsigned int rar_entries = hw->mac.rar_entry_count; | 3344 | unsigned int rar_entries; |
3307 | int count = 0; | 3345 | int count = 0; |
3308 | 3346 | ||
3347 | rar_entries = hw->mac.ops.rar_get_count(hw); | ||
3348 | |||
3309 | /* save a rar entry for our hardware address */ | 3349 | /* save a rar entry for our hardware address */ |
3310 | rar_entries--; | 3350 | rar_entries--; |
3311 | 3351 | ||
@@ -3324,9 +3364,13 @@ static int e1000e_write_uc_addr_list(struct net_device *netdev) | |||
3324 | * combining | 3364 | * combining |
3325 | */ | 3365 | */ |
3326 | netdev_for_each_uc_addr(ha, netdev) { | 3366 | netdev_for_each_uc_addr(ha, netdev) { |
3367 | int rval; | ||
3368 | |||
3327 | if (!rar_entries) | 3369 | if (!rar_entries) |
3328 | break; | 3370 | break; |
3329 | hw->mac.ops.rar_set(hw, ha->addr, rar_entries--); | 3371 | rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--); |
3372 | if (rval < 0) | ||
3373 | return -ENOMEM; | ||
3330 | count++; | 3374 | count++; |
3331 | } | 3375 | } |
3332 | } | 3376 | } |
@@ -4085,12 +4129,37 @@ static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc) | |||
4085 | struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter, | 4129 | struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter, |
4086 | cc); | 4130 | cc); |
4087 | struct e1000_hw *hw = &adapter->hw; | 4131 | struct e1000_hw *hw = &adapter->hw; |
4088 | cycle_t systim; | 4132 | cycle_t systim, systim_next; |
4089 | 4133 | ||
4090 | /* latch SYSTIMH on read of SYSTIML */ | 4134 | /* latch SYSTIMH on read of SYSTIML */ |
4091 | systim = (cycle_t)er32(SYSTIML); | 4135 | systim = (cycle_t)er32(SYSTIML); |
4092 | systim |= (cycle_t)er32(SYSTIMH) << 32; | 4136 | systim |= (cycle_t)er32(SYSTIMH) << 32; |
4093 | 4137 | ||
4138 | if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) { | ||
4139 | u64 incvalue, time_delta, rem, temp; | ||
4140 | int i; | ||
4141 | |||
4142 | /* errata for 82574/82583 possible bad bits read from SYSTIMH/L | ||
4143 | * check to see that the time is incrementing at a reasonable | ||
4144 | * rate and is a multiple of incvalue | ||
4145 | */ | ||
4146 | incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK; | ||
4147 | for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) { | ||
4148 | /* latch SYSTIMH on read of SYSTIML */ | ||
4149 | systim_next = (cycle_t)er32(SYSTIML); | ||
4150 | systim_next |= (cycle_t)er32(SYSTIMH) << 32; | ||
4151 | |||
4152 | time_delta = systim_next - systim; | ||
4153 | temp = time_delta; | ||
4154 | rem = do_div(temp, incvalue); | ||
4155 | |||
4156 | systim = systim_next; | ||
4157 | |||
4158 | if ((time_delta < E1000_82574_SYSTIM_EPSILON) && | ||
4159 | (rem == 0)) | ||
4160 | break; | ||
4161 | } | ||
4162 | } | ||
4094 | return systim; | 4163 | return systim; |
4095 | } | 4164 | } |
4096 | 4165 | ||
@@ -4491,7 +4560,7 @@ static void e1000e_update_phy_task(struct work_struct *work) | |||
4491 | e1000_get_phy_info(hw); | 4560 | e1000_get_phy_info(hw); |
4492 | 4561 | ||
4493 | /* Enable EEE on 82579 after link up */ | 4562 | /* Enable EEE on 82579 after link up */ |
4494 | if (hw->phy.type == e1000_phy_82579) | 4563 | if (hw->phy.type >= e1000_phy_82579) |
4495 | e1000_set_eee_pchlan(hw); | 4564 | e1000_set_eee_pchlan(hw); |
4496 | } | 4565 | } |
4497 | 4566 | ||
@@ -4695,6 +4764,7 @@ static void e1000e_update_stats(struct e1000_adapter *adapter) | |||
4695 | /* Correctable ECC Errors */ | 4764 | /* Correctable ECC Errors */ |
4696 | if (hw->mac.type == e1000_pch_lpt) { | 4765 | if (hw->mac.type == e1000_pch_lpt) { |
4697 | u32 pbeccsts = er32(PBECCSTS); | 4766 | u32 pbeccsts = er32(PBECCSTS); |
4767 | |||
4698 | adapter->corr_errors += | 4768 | adapter->corr_errors += |
4699 | pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; | 4769 | pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; |
4700 | adapter->uncorr_errors += | 4770 | adapter->uncorr_errors += |
@@ -4808,6 +4878,7 @@ static void e1000e_enable_receives(struct e1000_adapter *adapter) | |||
4808 | (adapter->flags & FLAG_RESTART_NOW)) { | 4878 | (adapter->flags & FLAG_RESTART_NOW)) { |
4809 | struct e1000_hw *hw = &adapter->hw; | 4879 | struct e1000_hw *hw = &adapter->hw; |
4810 | u32 rctl = er32(RCTL); | 4880 | u32 rctl = er32(RCTL); |
4881 | |||
4811 | ew32(RCTL, rctl | E1000_RCTL_EN); | 4882 | ew32(RCTL, rctl | E1000_RCTL_EN); |
4812 | adapter->flags &= ~FLAG_RESTART_NOW; | 4883 | adapter->flags &= ~FLAG_RESTART_NOW; |
4813 | } | 4884 | } |
@@ -4930,6 +5001,7 @@ static void e1000_watchdog_task(struct work_struct *work) | |||
4930 | if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && | 5001 | if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && |
4931 | !txb2b) { | 5002 | !txb2b) { |
4932 | u32 tarc0; | 5003 | u32 tarc0; |
5004 | |||
4933 | tarc0 = er32(TARC(0)); | 5005 | tarc0 = er32(TARC(0)); |
4934 | tarc0 &= ~SPEED_MODE_BIT; | 5006 | tarc0 &= ~SPEED_MODE_BIT; |
4935 | ew32(TARC(0), tarc0); | 5007 | ew32(TARC(0), tarc0); |
@@ -5170,7 +5242,7 @@ static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) | |||
5170 | __be16 protocol; | 5242 | __be16 protocol; |
5171 | 5243 | ||
5172 | if (skb->ip_summed != CHECKSUM_PARTIAL) | 5244 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
5173 | return 0; | 5245 | return false; |
5174 | 5246 | ||
5175 | if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) | 5247 | if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) |
5176 | protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; | 5248 | protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; |
@@ -5215,7 +5287,7 @@ static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) | |||
5215 | i = 0; | 5287 | i = 0; |
5216 | tx_ring->next_to_use = i; | 5288 | tx_ring->next_to_use = i; |
5217 | 5289 | ||
5218 | return 1; | 5290 | return true; |
5219 | } | 5291 | } |
5220 | 5292 | ||
5221 | static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, | 5293 | static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, |
@@ -6209,6 +6281,7 @@ static int __e1000_resume(struct pci_dev *pdev) | |||
6209 | e1e_wphy(&adapter->hw, BM_WUS, ~0); | 6281 | e1e_wphy(&adapter->hw, BM_WUS, ~0); |
6210 | } else { | 6282 | } else { |
6211 | u32 wus = er32(WUS); | 6283 | u32 wus = er32(WUS); |
6284 | |||
6212 | if (wus) { | 6285 | if (wus) { |
6213 | e_info("MAC Wakeup cause - %s\n", | 6286 | e_info("MAC Wakeup cause - %s\n", |
6214 | wus & E1000_WUS_EX ? "Unicast Packet" : | 6287 | wus & E1000_WUS_EX ? "Unicast Packet" : |
@@ -7027,7 +7100,7 @@ static const struct pci_error_handlers e1000_err_handler = { | |||
7027 | .resume = e1000_io_resume, | 7100 | .resume = e1000_io_resume, |
7028 | }; | 7101 | }; |
7029 | 7102 | ||
7030 | static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { | 7103 | static const struct pci_device_id e1000_pci_tbl[] = { |
7031 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, | 7104 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, |
7032 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, | 7105 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, |
7033 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, | 7106 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, |
@@ -7144,6 +7217,7 @@ static struct pci_driver e1000_driver = { | |||
7144 | static int __init e1000_init_module(void) | 7217 | static int __init e1000_init_module(void) |
7145 | { | 7218 | { |
7146 | int ret; | 7219 | int ret; |
7220 | |||
7147 | pr_info("Intel(R) PRO/1000 Network Driver - %s\n", | 7221 | pr_info("Intel(R) PRO/1000 Network Driver - %s\n", |
7148 | e1000e_driver_version); | 7222 | e1000e_driver_version); |
7149 | pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n"); | 7223 | pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n"); |
diff --git a/drivers/net/ethernet/intel/e1000e/nvm.c b/drivers/net/ethernet/intel/e1000e/nvm.c index a9a976f04bff..b1f212b7baf7 100644 --- a/drivers/net/ethernet/intel/e1000e/nvm.c +++ b/drivers/net/ethernet/intel/e1000e/nvm.c | |||
@@ -398,6 +398,7 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
398 | /* Loop to allow for up to whole page write of eeprom */ | 398 | /* Loop to allow for up to whole page write of eeprom */ |
399 | while (widx < words) { | 399 | while (widx < words) { |
400 | u16 word_out = data[widx]; | 400 | u16 word_out = data[widx]; |
401 | |||
401 | word_out = (word_out >> 8) | (word_out << 8); | 402 | word_out = (word_out >> 8) | (word_out << 8); |
402 | e1000_shift_out_eec_bits(hw, word_out, 16); | 403 | e1000_shift_out_eec_bits(hw, word_out, 16); |
403 | widx++; | 404 | widx++; |
diff --git a/drivers/net/ethernet/intel/e1000e/param.c b/drivers/net/ethernet/intel/e1000e/param.c index d0ac0f3249c8..aa1923f7ebdd 100644 --- a/drivers/net/ethernet/intel/e1000e/param.c +++ b/drivers/net/ethernet/intel/e1000e/param.c | |||
@@ -436,6 +436,7 @@ void e1000e_check_options(struct e1000_adapter *adapter) | |||
436 | 436 | ||
437 | if (num_IntMode > bd) { | 437 | if (num_IntMode > bd) { |
438 | unsigned int int_mode = IntMode[bd]; | 438 | unsigned int int_mode = IntMode[bd]; |
439 | |||
439 | e1000_validate_option(&int_mode, &opt, adapter); | 440 | e1000_validate_option(&int_mode, &opt, adapter); |
440 | adapter->int_mode = int_mode; | 441 | adapter->int_mode = int_mode; |
441 | } else { | 442 | } else { |
@@ -457,6 +458,7 @@ void e1000e_check_options(struct e1000_adapter *adapter) | |||
457 | 458 | ||
458 | if (num_SmartPowerDownEnable > bd) { | 459 | if (num_SmartPowerDownEnable > bd) { |
459 | unsigned int spd = SmartPowerDownEnable[bd]; | 460 | unsigned int spd = SmartPowerDownEnable[bd]; |
461 | |||
460 | e1000_validate_option(&spd, &opt, adapter); | 462 | e1000_validate_option(&spd, &opt, adapter); |
461 | if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && spd) | 463 | if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && spd) |
462 | adapter->flags |= FLAG_SMART_POWER_DOWN; | 464 | adapter->flags |= FLAG_SMART_POWER_DOWN; |
@@ -473,6 +475,7 @@ void e1000e_check_options(struct e1000_adapter *adapter) | |||
473 | 475 | ||
474 | if (num_CrcStripping > bd) { | 476 | if (num_CrcStripping > bd) { |
475 | unsigned int crc_stripping = CrcStripping[bd]; | 477 | unsigned int crc_stripping = CrcStripping[bd]; |
478 | |||
476 | e1000_validate_option(&crc_stripping, &opt, adapter); | 479 | e1000_validate_option(&crc_stripping, &opt, adapter); |
477 | if (crc_stripping == OPTION_ENABLED) { | 480 | if (crc_stripping == OPTION_ENABLED) { |
478 | adapter->flags2 |= FLAG2_CRC_STRIPPING; | 481 | adapter->flags2 |= FLAG2_CRC_STRIPPING; |
@@ -495,6 +498,7 @@ void e1000e_check_options(struct e1000_adapter *adapter) | |||
495 | 498 | ||
496 | if (num_KumeranLockLoss > bd) { | 499 | if (num_KumeranLockLoss > bd) { |
497 | unsigned int kmrn_lock_loss = KumeranLockLoss[bd]; | 500 | unsigned int kmrn_lock_loss = KumeranLockLoss[bd]; |
501 | |||
498 | e1000_validate_option(&kmrn_lock_loss, &opt, adapter); | 502 | e1000_validate_option(&kmrn_lock_loss, &opt, adapter); |
499 | enabled = kmrn_lock_loss; | 503 | enabled = kmrn_lock_loss; |
500 | } | 504 | } |
diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c index 00b3fc98bf30..b2005e13fb01 100644 --- a/drivers/net/ethernet/intel/e1000e/phy.c +++ b/drivers/net/ethernet/intel/e1000e/phy.c | |||
@@ -2896,6 +2896,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, | |||
2896 | (hw->phy.addr == 2) && | 2896 | (hw->phy.addr == 2) && |
2897 | !(MAX_PHY_REG_ADDRESS & reg) && (data & (1 << 11))) { | 2897 | !(MAX_PHY_REG_ADDRESS & reg) && (data & (1 << 11))) { |
2898 | u16 data2 = 0x7EFF; | 2898 | u16 data2 = 0x7EFF; |
2899 | |||
2899 | ret_val = e1000_access_phy_debug_regs_hv(hw, | 2900 | ret_val = e1000_access_phy_debug_regs_hv(hw, |
2900 | (1 << 6) | 0x3, | 2901 | (1 << 6) | 0x3, |
2901 | &data2, false); | 2902 | &data2, false); |