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path: root/drivers/net/ethernet/emulex/benet/be_cmds.c
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Diffstat (limited to 'drivers/net/ethernet/emulex/benet/be_cmds.c')
-rw-r--r--drivers/net/ethernet/emulex/benet/be_cmds.c396
1 files changed, 114 insertions, 282 deletions
diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.c b/drivers/net/ethernet/emulex/benet/be_cmds.c
index e0ff96193c49..83b8a46cdf41 100644
--- a/drivers/net/ethernet/emulex/benet/be_cmds.c
+++ b/drivers/net/ethernet/emulex/benet/be_cmds.c
@@ -428,28 +428,33 @@ static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
428 return &wrb->payload.sgl[0]; 428 return &wrb->payload.sgl[0];
429} 429}
430 430
431/* Don't touch the hdr after it's prepared */
432static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
433 bool embedded, u8 sge_cnt, u32 opcode)
434{
435 if (embedded)
436 wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
437 else
438 wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) <<
439 MCC_WRB_SGE_CNT_SHIFT;
440 wrb->payload_length = payload_len;
441 wrb->tag0 = opcode;
442 be_dws_cpu_to_le(wrb, 8);
443}
444 431
445/* Don't touch the hdr after it's prepared */ 432/* Don't touch the hdr after it's prepared */
446static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 433/* mem will be NULL for embedded commands */
447 u8 subsystem, u8 opcode, int cmd_len) 434static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
435 u8 subsystem, u8 opcode, int cmd_len,
436 struct be_mcc_wrb *wrb, struct be_dma_mem *mem)
448{ 437{
438 struct be_sge *sge;
439
449 req_hdr->opcode = opcode; 440 req_hdr->opcode = opcode;
450 req_hdr->subsystem = subsystem; 441 req_hdr->subsystem = subsystem;
451 req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 442 req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
452 req_hdr->version = 0; 443 req_hdr->version = 0;
444
445 wrb->tag0 = opcode;
446 wrb->tag1 = subsystem;
447 wrb->payload_length = cmd_len;
448 if (mem) {
449 wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) <<
450 MCC_WRB_SGE_CNT_SHIFT;
451 sge = nonembedded_sgl(wrb);
452 sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma));
453 sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF);
454 sge->len = cpu_to_le32(mem->size);
455 } else
456 wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
457 be_dws_cpu_to_le(wrb, 8);
453} 458}
454 459
455static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 460static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
@@ -586,10 +591,8 @@ int be_cmd_eq_create(struct be_adapter *adapter,
586 wrb = wrb_from_mbox(adapter); 591 wrb = wrb_from_mbox(adapter);
587 req = embedded_payload(wrb); 592 req = embedded_payload(wrb);
588 593
589 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, OPCODE_COMMON_EQ_CREATE); 594 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
590 595 OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL);
591 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
592 OPCODE_COMMON_EQ_CREATE, sizeof(*req));
593 596
594 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 597 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
595 598
@@ -632,12 +635,8 @@ int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
632 } 635 }
633 req = embedded_payload(wrb); 636 req = embedded_payload(wrb);
634 637
635 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 638 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
636 OPCODE_COMMON_NTWK_MAC_QUERY); 639 OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL);
637
638 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
639 OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req));
640
641 req->type = type; 640 req->type = type;
642 if (permanent) { 641 if (permanent) {
643 req->permanent = 1; 642 req->permanent = 1;
@@ -674,11 +673,8 @@ int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
674 } 673 }
675 req = embedded_payload(wrb); 674 req = embedded_payload(wrb);
676 675
677 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 676 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
678 OPCODE_COMMON_NTWK_PMAC_ADD); 677 OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL);
679
680 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
681 OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req));
682 678
683 req->hdr.domain = domain; 679 req->hdr.domain = domain;
684 req->if_id = cpu_to_le32(if_id); 680 req->if_id = cpu_to_le32(if_id);
@@ -711,11 +707,8 @@ int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id, u32 dom)
711 } 707 }
712 req = embedded_payload(wrb); 708 req = embedded_payload(wrb);
713 709
714 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 710 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
715 OPCODE_COMMON_NTWK_PMAC_DEL); 711 OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL);
716
717 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
718 OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req));
719 712
720 req->hdr.domain = dom; 713 req->hdr.domain = dom;
721 req->if_id = cpu_to_le32(if_id); 714 req->if_id = cpu_to_le32(if_id);
@@ -746,11 +739,8 @@ int be_cmd_cq_create(struct be_adapter *adapter,
746 req = embedded_payload(wrb); 739 req = embedded_payload(wrb);
747 ctxt = &req->context; 740 ctxt = &req->context;
748 741
749 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 742 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
750 OPCODE_COMMON_CQ_CREATE); 743 OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL);
751
752 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
753 OPCODE_COMMON_CQ_CREATE, sizeof(*req));
754 744
755 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 745 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
756 if (lancer_chip(adapter)) { 746 if (lancer_chip(adapter)) {
@@ -822,11 +812,8 @@ int be_cmd_mccq_ext_create(struct be_adapter *adapter,
822 req = embedded_payload(wrb); 812 req = embedded_payload(wrb);
823 ctxt = &req->context; 813 ctxt = &req->context;
824 814
825 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 815 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
826 OPCODE_COMMON_MCC_CREATE_EXT); 816 OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL);
827
828 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
829 OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req));
830 817
831 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 818 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
832 if (lancer_chip(adapter)) { 819 if (lancer_chip(adapter)) {
@@ -882,11 +869,8 @@ int be_cmd_mccq_org_create(struct be_adapter *adapter,
882 req = embedded_payload(wrb); 869 req = embedded_payload(wrb);
883 ctxt = &req->context; 870 ctxt = &req->context;
884 871
885 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 872 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
886 OPCODE_COMMON_MCC_CREATE); 873 OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL);
887
888 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
889 OPCODE_COMMON_MCC_CREATE, sizeof(*req));
890 874
891 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 875 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
892 876
@@ -943,11 +927,8 @@ int be_cmd_txq_create(struct be_adapter *adapter,
943 req = embedded_payload(wrb); 927 req = embedded_payload(wrb);
944 ctxt = &req->context; 928 ctxt = &req->context;
945 929
946 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 930 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
947 OPCODE_ETH_TX_CREATE); 931 OPCODE_ETH_TX_CREATE, sizeof(*req), wrb, NULL);
948
949 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_TX_CREATE,
950 sizeof(*req));
951 932
952 if (lancer_chip(adapter)) { 933 if (lancer_chip(adapter)) {
953 req->hdr.version = 1; 934 req->hdr.version = 1;
@@ -999,11 +980,8 @@ int be_cmd_rxq_create(struct be_adapter *adapter,
999 } 980 }
1000 req = embedded_payload(wrb); 981 req = embedded_payload(wrb);
1001 982
1002 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 983 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1003 OPCODE_ETH_RX_CREATE); 984 OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL);
1004
1005 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_CREATE,
1006 sizeof(*req));
1007 985
1008 req->cq_id = cpu_to_le16(cq_id); 986 req->cq_id = cpu_to_le16(cq_id);
1009 req->frag_size = fls(frag_size) - 1; 987 req->frag_size = fls(frag_size) - 1;
@@ -1071,9 +1049,8 @@ int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1071 BUG(); 1049 BUG();
1072 } 1050 }
1073 1051
1074 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, opcode); 1052 be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb,
1075 1053 NULL);
1076 be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req));
1077 req->id = cpu_to_le16(q->id); 1054 req->id = cpu_to_le16(q->id);
1078 1055
1079 status = be_mbox_notify_wait(adapter); 1056 status = be_mbox_notify_wait(adapter);
@@ -1100,9 +1077,8 @@ int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q)
1100 } 1077 }
1101 req = embedded_payload(wrb); 1078 req = embedded_payload(wrb);
1102 1079
1103 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, OPCODE_ETH_RX_DESTROY); 1080 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1104 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_DESTROY, 1081 OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL);
1105 sizeof(*req));
1106 req->id = cpu_to_le16(q->id); 1082 req->id = cpu_to_le16(q->id);
1107 1083
1108 status = be_mcc_notify_wait(adapter); 1084 status = be_mcc_notify_wait(adapter);
@@ -1133,12 +1109,8 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
1133 } 1109 }
1134 req = embedded_payload(wrb); 1110 req = embedded_payload(wrb);
1135 1111
1136 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1112 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1137 OPCODE_COMMON_NTWK_INTERFACE_CREATE); 1113 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), wrb, NULL);
1138
1139 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1140 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req));
1141
1142 req->hdr.domain = domain; 1114 req->hdr.domain = domain;
1143 req->capability_flags = cpu_to_le32(cap_flags); 1115 req->capability_flags = cpu_to_le32(cap_flags);
1144 req->enable_flags = cpu_to_le32(en_flags); 1116 req->enable_flags = cpu_to_le32(en_flags);
@@ -1182,12 +1154,8 @@ int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id, u32 domain)
1182 } 1154 }
1183 req = embedded_payload(wrb); 1155 req = embedded_payload(wrb);
1184 1156
1185 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1157 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1186 OPCODE_COMMON_NTWK_INTERFACE_DESTROY); 1158 OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL);
1187
1188 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1189 OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req));
1190
1191 req->hdr.domain = domain; 1159 req->hdr.domain = domain;
1192 req->interface_id = cpu_to_le32(interface_id); 1160 req->interface_id = cpu_to_le32(interface_id);
1193 1161
@@ -1205,7 +1173,6 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)
1205{ 1173{
1206 struct be_mcc_wrb *wrb; 1174 struct be_mcc_wrb *wrb;
1207 struct be_cmd_req_hdr *hdr; 1175 struct be_cmd_req_hdr *hdr;
1208 struct be_sge *sge;
1209 int status = 0; 1176 int status = 0;
1210 1177
1211 if (MODULO(adapter->work_counter, be_get_temp_freq) == 0) 1178 if (MODULO(adapter->work_counter, be_get_temp_freq) == 0)
@@ -1219,22 +1186,13 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)
1219 goto err; 1186 goto err;
1220 } 1187 }
1221 hdr = nonemb_cmd->va; 1188 hdr = nonemb_cmd->va;
1222 sge = nonembedded_sgl(wrb);
1223 1189
1224 be_wrb_hdr_prepare(wrb, nonemb_cmd->size, false, 1, 1190 be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH,
1225 OPCODE_ETH_GET_STATISTICS); 1191 OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd);
1226
1227 be_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH,
1228 OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size);
1229 1192
1230 if (adapter->generation == BE_GEN3) 1193 if (adapter->generation == BE_GEN3)
1231 hdr->version = 1; 1194 hdr->version = 1;
1232 1195
1233 wrb->tag1 = CMD_SUBSYSTEM_ETH;
1234 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
1235 sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
1236 sge->len = cpu_to_le32(nonemb_cmd->size);
1237
1238 be_mcc_notify(adapter); 1196 be_mcc_notify(adapter);
1239 adapter->stats_cmd_sent = true; 1197 adapter->stats_cmd_sent = true;
1240 1198
@@ -1250,7 +1208,6 @@ int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1250 1208
1251 struct be_mcc_wrb *wrb; 1209 struct be_mcc_wrb *wrb;
1252 struct lancer_cmd_req_pport_stats *req; 1210 struct lancer_cmd_req_pport_stats *req;
1253 struct be_sge *sge;
1254 int status = 0; 1211 int status = 0;
1255 1212
1256 spin_lock_bh(&adapter->mcc_lock); 1213 spin_lock_bh(&adapter->mcc_lock);
@@ -1261,23 +1218,14 @@ int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1261 goto err; 1218 goto err;
1262 } 1219 }
1263 req = nonemb_cmd->va; 1220 req = nonemb_cmd->va;
1264 sge = nonembedded_sgl(wrb);
1265
1266 be_wrb_hdr_prepare(wrb, nonemb_cmd->size, false, 1,
1267 OPCODE_ETH_GET_PPORT_STATS);
1268
1269 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1270 OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size);
1271 1221
1222 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1223 OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb,
1224 nonemb_cmd);
1272 1225
1273 req->cmd_params.params.pport_num = cpu_to_le16(adapter->port_num); 1226 req->cmd_params.params.pport_num = cpu_to_le16(adapter->port_num);
1274 req->cmd_params.params.reset_stats = 0; 1227 req->cmd_params.params.reset_stats = 0;
1275 1228
1276 wrb->tag1 = CMD_SUBSYSTEM_ETH;
1277 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
1278 sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
1279 sge->len = cpu_to_le32(nonemb_cmd->size);
1280
1281 be_mcc_notify(adapter); 1229 be_mcc_notify(adapter);
1282 adapter->stats_cmd_sent = true; 1230 adapter->stats_cmd_sent = true;
1283 1231
@@ -1303,11 +1251,8 @@ int be_cmd_link_status_query(struct be_adapter *adapter, u8 *mac_speed,
1303 } 1251 }
1304 req = embedded_payload(wrb); 1252 req = embedded_payload(wrb);
1305 1253
1306 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1254 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1307 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY); 1255 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL);
1308
1309 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1310 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req));
1311 1256
1312 status = be_mcc_notify_wait(adapter); 1257 status = be_mcc_notify_wait(adapter);
1313 if (!status) { 1258 if (!status) {
@@ -1343,11 +1288,9 @@ int be_cmd_get_die_temperature(struct be_adapter *adapter)
1343 } 1288 }
1344 req = embedded_payload(wrb); 1289 req = embedded_payload(wrb);
1345 1290
1346 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1291 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1347 OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES); 1292 OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req),
1348 1293 wrb, NULL);
1349 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1350 OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req));
1351 1294
1352 wrb->tag1 = mccq_index; 1295 wrb->tag1 = mccq_index;
1353 1296
@@ -1374,11 +1317,8 @@ int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size)
1374 } 1317 }
1375 req = embedded_payload(wrb); 1318 req = embedded_payload(wrb);
1376 1319
1377 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1320 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1378 OPCODE_COMMON_MANAGE_FAT); 1321 OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL);
1379
1380 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1381 OPCODE_COMMON_MANAGE_FAT, sizeof(*req));
1382 req->fat_operation = cpu_to_le32(QUERY_FAT); 1322 req->fat_operation = cpu_to_le32(QUERY_FAT);
1383 status = be_mcc_notify_wait(adapter); 1323 status = be_mcc_notify_wait(adapter);
1384 if (!status) { 1324 if (!status) {
@@ -1397,7 +1337,6 @@ void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1397 struct be_dma_mem get_fat_cmd; 1337 struct be_dma_mem get_fat_cmd;
1398 struct be_mcc_wrb *wrb; 1338 struct be_mcc_wrb *wrb;
1399 struct be_cmd_req_get_fat *req; 1339 struct be_cmd_req_get_fat *req;
1400 struct be_sge *sge;
1401 u32 offset = 0, total_size, buf_size, 1340 u32 offset = 0, total_size, buf_size,
1402 log_offset = sizeof(u32), payload_len; 1341 log_offset = sizeof(u32), payload_len;
1403 int status; 1342 int status;
@@ -1430,18 +1369,11 @@ void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1430 goto err; 1369 goto err;
1431 } 1370 }
1432 req = get_fat_cmd.va; 1371 req = get_fat_cmd.va;
1433 sge = nonembedded_sgl(wrb);
1434 1372
1435 payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1373 payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size;
1436 be_wrb_hdr_prepare(wrb, payload_len, false, 1, 1374 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1437 OPCODE_COMMON_MANAGE_FAT); 1375 OPCODE_COMMON_MANAGE_FAT, payload_len, wrb,
1438 1376 &get_fat_cmd);
1439 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1440 OPCODE_COMMON_MANAGE_FAT, payload_len);
1441
1442 sge->pa_hi = cpu_to_le32(upper_32_bits(get_fat_cmd.dma));
1443 sge->pa_lo = cpu_to_le32(get_fat_cmd.dma & 0xFFFFFFFF);
1444 sge->len = cpu_to_le32(get_fat_cmd.size);
1445 1377
1446 req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 1378 req->fat_operation = cpu_to_le32(RETRIEVE_FAT);
1447 req->read_log_offset = cpu_to_le32(log_offset); 1379 req->read_log_offset = cpu_to_le32(log_offset);
@@ -1485,11 +1417,9 @@ int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1485 } 1417 }
1486 1418
1487 req = embedded_payload(wrb); 1419 req = embedded_payload(wrb);
1488 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
1489 OPCODE_COMMON_GET_FW_VERSION);
1490 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1491 OPCODE_COMMON_GET_FW_VERSION, sizeof(*req));
1492 1420
1421 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1422 OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL);
1493 status = be_mcc_notify_wait(adapter); 1423 status = be_mcc_notify_wait(adapter);
1494 if (!status) { 1424 if (!status) {
1495 struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1425 struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
@@ -1520,11 +1450,8 @@ int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd)
1520 } 1450 }
1521 req = embedded_payload(wrb); 1451 req = embedded_payload(wrb);
1522 1452
1523 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1453 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1524 OPCODE_COMMON_MODIFY_EQ_DELAY); 1454 OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL);
1525
1526 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1527 OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req));
1528 1455
1529 req->num_eq = cpu_to_le32(1); 1456 req->num_eq = cpu_to_le32(1);
1530 req->delay[0].eq_id = cpu_to_le32(eq_id); 1457 req->delay[0].eq_id = cpu_to_le32(eq_id);
@@ -1555,11 +1482,8 @@ int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
1555 } 1482 }
1556 req = embedded_payload(wrb); 1483 req = embedded_payload(wrb);
1557 1484
1558 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1485 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1559 OPCODE_COMMON_NTWK_VLAN_CONFIG); 1486 OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL);
1560
1561 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1562 OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req));
1563 1487
1564 req->interface_id = if_id; 1488 req->interface_id = if_id;
1565 req->promiscuous = promiscuous; 1489 req->promiscuous = promiscuous;
@@ -1582,7 +1506,6 @@ int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)
1582 struct be_mcc_wrb *wrb; 1506 struct be_mcc_wrb *wrb;
1583 struct be_dma_mem *mem = &adapter->rx_filter; 1507 struct be_dma_mem *mem = &adapter->rx_filter;
1584 struct be_cmd_req_rx_filter *req = mem->va; 1508 struct be_cmd_req_rx_filter *req = mem->va;
1585 struct be_sge *sge;
1586 int status; 1509 int status;
1587 1510
1588 spin_lock_bh(&adapter->mcc_lock); 1511 spin_lock_bh(&adapter->mcc_lock);
@@ -1592,16 +1515,10 @@ int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)
1592 status = -EBUSY; 1515 status = -EBUSY;
1593 goto err; 1516 goto err;
1594 } 1517 }
1595 sge = nonembedded_sgl(wrb);
1596 sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma));
1597 sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF);
1598 sge->len = cpu_to_le32(mem->size);
1599 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1,
1600 OPCODE_COMMON_NTWK_RX_FILTER);
1601
1602 memset(req, 0, sizeof(*req)); 1518 memset(req, 0, sizeof(*req));
1603 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1519 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1604 OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req)); 1520 OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req),
1521 wrb, mem);
1605 1522
1606 req->if_id = cpu_to_le32(adapter->if_handle); 1523 req->if_id = cpu_to_le32(adapter->if_handle);
1607 if (flags & IFF_PROMISC) { 1524 if (flags & IFF_PROMISC) {
@@ -1646,11 +1563,8 @@ int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc)
1646 } 1563 }
1647 req = embedded_payload(wrb); 1564 req = embedded_payload(wrb);
1648 1565
1649 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1566 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1650 OPCODE_COMMON_SET_FLOW_CONTROL); 1567 OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL);
1651
1652 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1653 OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req));
1654 1568
1655 req->tx_flow_control = cpu_to_le16((u16)tx_fc); 1569 req->tx_flow_control = cpu_to_le16((u16)tx_fc);
1656 req->rx_flow_control = cpu_to_le16((u16)rx_fc); 1570 req->rx_flow_control = cpu_to_le16((u16)rx_fc);
@@ -1678,11 +1592,8 @@ int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc)
1678 } 1592 }
1679 req = embedded_payload(wrb); 1593 req = embedded_payload(wrb);
1680 1594
1681 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1595 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1682 OPCODE_COMMON_GET_FLOW_CONTROL); 1596 OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL);
1683
1684 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1685 OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req));
1686 1597
1687 status = be_mcc_notify_wait(adapter); 1598 status = be_mcc_notify_wait(adapter);
1688 if (!status) { 1599 if (!status) {
@@ -1711,11 +1622,8 @@ int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num,
1711 wrb = wrb_from_mbox(adapter); 1622 wrb = wrb_from_mbox(adapter);
1712 req = embedded_payload(wrb); 1623 req = embedded_payload(wrb);
1713 1624
1714 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1625 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1715 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG); 1626 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL);
1716
1717 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1718 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req));
1719 1627
1720 status = be_mbox_notify_wait(adapter); 1628 status = be_mbox_notify_wait(adapter);
1721 if (!status) { 1629 if (!status) {
@@ -1742,11 +1650,8 @@ int be_cmd_reset_function(struct be_adapter *adapter)
1742 wrb = wrb_from_mbox(adapter); 1650 wrb = wrb_from_mbox(adapter);
1743 req = embedded_payload(wrb); 1651 req = embedded_payload(wrb);
1744 1652
1745 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1653 be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON,
1746 OPCODE_COMMON_FUNCTION_RESET); 1654 OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL);
1747
1748 be_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON,
1749 OPCODE_COMMON_FUNCTION_RESET, sizeof(*req));
1750 1655
1751 status = be_mbox_notify_wait(adapter); 1656 status = be_mbox_notify_wait(adapter);
1752 1657
@@ -1768,11 +1673,8 @@ int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, u16 table_size)
1768 wrb = wrb_from_mbox(adapter); 1673 wrb = wrb_from_mbox(adapter);
1769 req = embedded_payload(wrb); 1674 req = embedded_payload(wrb);
1770 1675
1771 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1676 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1772 OPCODE_ETH_RSS_CONFIG); 1677 OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL);
1773
1774 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1775 OPCODE_ETH_RSS_CONFIG, sizeof(*req));
1776 1678
1777 req->if_id = cpu_to_le32(adapter->if_handle); 1679 req->if_id = cpu_to_le32(adapter->if_handle);
1778 req->enable_rss = cpu_to_le16(RSS_ENABLE_TCP_IPV4 | RSS_ENABLE_IPV4); 1680 req->enable_rss = cpu_to_le16(RSS_ENABLE_TCP_IPV4 | RSS_ENABLE_IPV4);
@@ -1804,11 +1706,8 @@ int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,
1804 } 1706 }
1805 req = embedded_payload(wrb); 1707 req = embedded_payload(wrb);
1806 1708
1807 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1709 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1808 OPCODE_COMMON_ENABLE_DISABLE_BEACON); 1710 OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL);
1809
1810 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1811 OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req));
1812 1711
1813 req->port_num = port_num; 1712 req->port_num = port_num;
1814 req->beacon_state = state; 1713 req->beacon_state = state;
@@ -1838,11 +1737,8 @@ int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state)
1838 } 1737 }
1839 req = embedded_payload(wrb); 1738 req = embedded_payload(wrb);
1840 1739
1841 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1740 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1842 OPCODE_COMMON_GET_BEACON_STATE); 1741 OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL);
1843
1844 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1845 OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req));
1846 1742
1847 req->port_num = port_num; 1743 req->port_num = port_num;
1848 1744
@@ -1879,13 +1775,10 @@ int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
1879 1775
1880 req = embedded_payload(wrb); 1776 req = embedded_payload(wrb);
1881 1777
1882 be_wrb_hdr_prepare(wrb, sizeof(struct lancer_cmd_req_write_object), 1778 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1883 true, 1, OPCODE_COMMON_WRITE_OBJECT);
1884 wrb->tag1 = CMD_SUBSYSTEM_COMMON;
1885
1886 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1887 OPCODE_COMMON_WRITE_OBJECT, 1779 OPCODE_COMMON_WRITE_OBJECT,
1888 sizeof(struct lancer_cmd_req_write_object)); 1780 sizeof(struct lancer_cmd_req_write_object), wrb,
1781 NULL);
1889 1782
1890 ctxt = &req->context; 1783 ctxt = &req->context;
1891 AMAP_SET_BITS(struct amap_lancer_write_obj_context, 1784 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
@@ -1938,7 +1831,6 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
1938{ 1831{
1939 struct be_mcc_wrb *wrb; 1832 struct be_mcc_wrb *wrb;
1940 struct be_cmd_write_flashrom *req; 1833 struct be_cmd_write_flashrom *req;
1941 struct be_sge *sge;
1942 int status; 1834 int status;
1943 1835
1944 spin_lock_bh(&adapter->mcc_lock); 1836 spin_lock_bh(&adapter->mcc_lock);
@@ -1950,17 +1842,9 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
1950 goto err_unlock; 1842 goto err_unlock;
1951 } 1843 }
1952 req = cmd->va; 1844 req = cmd->va;
1953 sge = nonembedded_sgl(wrb);
1954
1955 be_wrb_hdr_prepare(wrb, cmd->size, false, 1,
1956 OPCODE_COMMON_WRITE_FLASHROM);
1957 wrb->tag1 = CMD_SUBSYSTEM_COMMON;
1958 1845
1959 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1846 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1960 OPCODE_COMMON_WRITE_FLASHROM, cmd->size); 1847 OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd);
1961 sge->pa_hi = cpu_to_le32(upper_32_bits(cmd->dma));
1962 sge->pa_lo = cpu_to_le32(cmd->dma & 0xFFFFFFFF);
1963 sge->len = cpu_to_le32(cmd->size);
1964 1848
1965 req->params.op_type = cpu_to_le32(flash_type); 1849 req->params.op_type = cpu_to_le32(flash_type);
1966 req->params.op_code = cpu_to_le32(flash_opcode); 1850 req->params.op_code = cpu_to_le32(flash_opcode);
@@ -1998,11 +1882,8 @@ int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
1998 } 1882 }
1999 req = embedded_payload(wrb); 1883 req = embedded_payload(wrb);
2000 1884
2001 be_wrb_hdr_prepare(wrb, sizeof(*req)+4, true, 0, 1885 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2002 OPCODE_COMMON_READ_FLASHROM); 1886 OPCODE_COMMON_READ_FLASHROM, sizeof(*req)+4, wrb, NULL);
2003
2004 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2005 OPCODE_COMMON_READ_FLASHROM, sizeof(*req)+4);
2006 1887
2007 req->params.op_type = cpu_to_le32(IMG_TYPE_REDBOOT); 1888 req->params.op_type = cpu_to_le32(IMG_TYPE_REDBOOT);
2008 req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); 1889 req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT);
@@ -2023,7 +1904,6 @@ int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2023{ 1904{
2024 struct be_mcc_wrb *wrb; 1905 struct be_mcc_wrb *wrb;
2025 struct be_cmd_req_acpi_wol_magic_config *req; 1906 struct be_cmd_req_acpi_wol_magic_config *req;
2026 struct be_sge *sge;
2027 int status; 1907 int status;
2028 1908
2029 spin_lock_bh(&adapter->mcc_lock); 1909 spin_lock_bh(&adapter->mcc_lock);
@@ -2034,19 +1914,12 @@ int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2034 goto err; 1914 goto err;
2035 } 1915 }
2036 req = nonemb_cmd->va; 1916 req = nonemb_cmd->va;
2037 sge = nonembedded_sgl(wrb);
2038 1917
2039 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1, 1918 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2040 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG); 1919 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb,
2041 1920 nonemb_cmd);
2042 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2043 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req));
2044 memcpy(req->magic_mac, mac, ETH_ALEN); 1921 memcpy(req->magic_mac, mac, ETH_ALEN);
2045 1922
2046 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
2047 sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
2048 sge->len = cpu_to_le32(nonemb_cmd->size);
2049
2050 status = be_mcc_notify_wait(adapter); 1923 status = be_mcc_notify_wait(adapter);
2051 1924
2052err: 1925err:
@@ -2071,12 +1944,9 @@ int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2071 1944
2072 req = embedded_payload(wrb); 1945 req = embedded_payload(wrb);
2073 1946
2074 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1947 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2075 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE); 1948 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb,
2076 1949 NULL);
2077 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2078 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE,
2079 sizeof(*req));
2080 1950
2081 req->src_port = port_num; 1951 req->src_port = port_num;
2082 req->dest_port = port_num; 1952 req->dest_port = port_num;
@@ -2106,11 +1976,8 @@ int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2106 1976
2107 req = embedded_payload(wrb); 1977 req = embedded_payload(wrb);
2108 1978
2109 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 1979 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2110 OPCODE_LOWLEVEL_LOOPBACK_TEST); 1980 OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL);
2111
2112 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2113 OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req));
2114 req->hdr.timeout = cpu_to_le32(4); 1981 req->hdr.timeout = cpu_to_le32(4);
2115 1982
2116 req->pattern = cpu_to_le64(pattern); 1983 req->pattern = cpu_to_le64(pattern);
@@ -2136,7 +2003,6 @@ int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
2136{ 2003{
2137 struct be_mcc_wrb *wrb; 2004 struct be_mcc_wrb *wrb;
2138 struct be_cmd_req_ddrdma_test *req; 2005 struct be_cmd_req_ddrdma_test *req;
2139 struct be_sge *sge;
2140 int status; 2006 int status;
2141 int i, j = 0; 2007 int i, j = 0;
2142 2008
@@ -2148,15 +2014,8 @@ int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
2148 goto err; 2014 goto err;
2149 } 2015 }
2150 req = cmd->va; 2016 req = cmd->va;
2151 sge = nonembedded_sgl(wrb); 2017 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2152 be_wrb_hdr_prepare(wrb, cmd->size, false, 1, 2018 OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd);
2153 OPCODE_LOWLEVEL_HOST_DDR_DMA);
2154 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2155 OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size);
2156
2157 sge->pa_hi = cpu_to_le32(upper_32_bits(cmd->dma));
2158 sge->pa_lo = cpu_to_le32(cmd->dma & 0xFFFFFFFF);
2159 sge->len = cpu_to_le32(cmd->size);
2160 2019
2161 req->pattern = cpu_to_le64(pattern); 2020 req->pattern = cpu_to_le64(pattern);
2162 req->byte_count = cpu_to_le32(byte_cnt); 2021 req->byte_count = cpu_to_le32(byte_cnt);
@@ -2201,15 +2060,9 @@ int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2201 req = nonemb_cmd->va; 2060 req = nonemb_cmd->va;
2202 sge = nonembedded_sgl(wrb); 2061 sge = nonembedded_sgl(wrb);
2203 2062
2204 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1, 2063 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2205 OPCODE_COMMON_SEEPROM_READ); 2064 OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb,
2206 2065 nonemb_cmd);
2207 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2208 OPCODE_COMMON_SEEPROM_READ, sizeof(*req));
2209
2210 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
2211 sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
2212 sge->len = cpu_to_le32(nonemb_cmd->size);
2213 2066
2214 status = be_mcc_notify_wait(adapter); 2067 status = be_mcc_notify_wait(adapter);
2215 2068
@@ -2223,7 +2076,6 @@ int be_cmd_get_phy_info(struct be_adapter *adapter,
2223{ 2076{
2224 struct be_mcc_wrb *wrb; 2077 struct be_mcc_wrb *wrb;
2225 struct be_cmd_req_get_phy_info *req; 2078 struct be_cmd_req_get_phy_info *req;
2226 struct be_sge *sge;
2227 struct be_dma_mem cmd; 2079 struct be_dma_mem cmd;
2228 int status; 2080 int status;
2229 2081
@@ -2244,18 +2096,10 @@ int be_cmd_get_phy_info(struct be_adapter *adapter,
2244 } 2096 }
2245 2097
2246 req = cmd.va; 2098 req = cmd.va;
2247 sge = nonembedded_sgl(wrb);
2248
2249 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1,
2250 OPCODE_COMMON_GET_PHY_DETAILS);
2251 2099
2252 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2100 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2253 OPCODE_COMMON_GET_PHY_DETAILS, 2101 OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req),
2254 sizeof(*req)); 2102 wrb, &cmd);
2255
2256 sge->pa_hi = cpu_to_le32(upper_32_bits(cmd.dma));
2257 sge->pa_lo = cpu_to_le32(cmd.dma & 0xFFFFFFFF);
2258 sge->len = cpu_to_le32(cmd.size);
2259 2103
2260 status = be_mcc_notify_wait(adapter); 2104 status = be_mcc_notify_wait(adapter);
2261 if (!status) { 2105 if (!status) {
@@ -2288,11 +2132,8 @@ int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain)
2288 2132
2289 req = embedded_payload(wrb); 2133 req = embedded_payload(wrb);
2290 2134
2291 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 2135 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2292 OPCODE_COMMON_SET_QOS); 2136 OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL);
2293
2294 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2295 OPCODE_COMMON_SET_QOS, sizeof(*req));
2296 2137
2297 req->hdr.domain = domain; 2138 req->hdr.domain = domain;
2298 req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 2139 req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC);
@@ -2310,7 +2151,6 @@ int be_cmd_get_cntl_attributes(struct be_adapter *adapter)
2310 struct be_mcc_wrb *wrb; 2151 struct be_mcc_wrb *wrb;
2311 struct be_cmd_req_cntl_attribs *req; 2152 struct be_cmd_req_cntl_attribs *req;
2312 struct be_cmd_resp_cntl_attribs *resp; 2153 struct be_cmd_resp_cntl_attribs *resp;
2313 struct be_sge *sge;
2314 int status; 2154 int status;
2315 int payload_len = max(sizeof(*req), sizeof(*resp)); 2155 int payload_len = max(sizeof(*req), sizeof(*resp));
2316 struct mgmt_controller_attrib *attribs; 2156 struct mgmt_controller_attrib *attribs;
@@ -2335,15 +2175,10 @@ int be_cmd_get_cntl_attributes(struct be_adapter *adapter)
2335 goto err; 2175 goto err;
2336 } 2176 }
2337 req = attribs_cmd.va; 2177 req = attribs_cmd.va;
2338 sge = nonembedded_sgl(wrb);
2339 2178
2340 be_wrb_hdr_prepare(wrb, payload_len, false, 1, 2179 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2341 OPCODE_COMMON_GET_CNTL_ATTRIBUTES); 2180 OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb,
2342 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2181 &attribs_cmd);
2343 OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len);
2344 sge->pa_hi = cpu_to_le32(upper_32_bits(attribs_cmd.dma));
2345 sge->pa_lo = cpu_to_le32(attribs_cmd.dma & 0xFFFFFFFF);
2346 sge->len = cpu_to_le32(attribs_cmd.size);
2347 2182
2348 status = be_mbox_notify_wait(adapter); 2183 status = be_mbox_notify_wait(adapter);
2349 if (!status) { 2184 if (!status) {
@@ -2376,11 +2211,8 @@ int be_cmd_req_native_mode(struct be_adapter *adapter)
2376 2211
2377 req = embedded_payload(wrb); 2212 req = embedded_payload(wrb);
2378 2213
2379 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, 2214 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2380 OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP); 2215 OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL);
2381
2382 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2383 OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req));
2384 2216
2385 req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 2217 req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS |
2386 CAPABILITY_BE3_NATIVE_ERX_API); 2218 CAPABILITY_BE3_NATIVE_ERX_API);