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path: root/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
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Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h')
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h39
1 files changed, 37 insertions, 2 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
index 9b353a88cbda..a4a19e0ec7f5 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
@@ -101,7 +101,7 @@ enum fw_wr_opcodes {
101 FW_RI_BIND_MW_WR = 0x18, 101 FW_RI_BIND_MW_WR = 0x18,
102 FW_RI_FR_NSMR_WR = 0x19, 102 FW_RI_FR_NSMR_WR = 0x19,
103 FW_RI_INV_LSTAG_WR = 0x1a, 103 FW_RI_INV_LSTAG_WR = 0x1a,
104 FW_LASTC2E_WR = 0x40 104 FW_LASTC2E_WR = 0x70
105}; 105};
106 106
107struct fw_wr_hdr { 107struct fw_wr_hdr {
@@ -993,6 +993,7 @@ enum fw_memtype_cf {
993 FW_MEMTYPE_CF_EXTMEM = 0x2, 993 FW_MEMTYPE_CF_EXTMEM = 0x2,
994 FW_MEMTYPE_CF_FLASH = 0x4, 994 FW_MEMTYPE_CF_FLASH = 0x4,
995 FW_MEMTYPE_CF_INTERNAL = 0x5, 995 FW_MEMTYPE_CF_INTERNAL = 0x5,
996 FW_MEMTYPE_CF_EXTMEM1 = 0x6,
996}; 997};
997 998
998struct fw_caps_config_cmd { 999struct fw_caps_config_cmd {
@@ -1035,6 +1036,7 @@ enum fw_params_mnem {
1035 FW_PARAMS_MNEM_PFVF = 2, /* function params */ 1036 FW_PARAMS_MNEM_PFVF = 2, /* function params */
1036 FW_PARAMS_MNEM_REG = 3, /* limited register access */ 1037 FW_PARAMS_MNEM_REG = 3, /* limited register access */
1037 FW_PARAMS_MNEM_DMAQ = 4, /* dma queue params */ 1038 FW_PARAMS_MNEM_DMAQ = 4, /* dma queue params */
1039 FW_PARAMS_MNEM_CHNET = 5, /* chnet params */
1038 FW_PARAMS_MNEM_LAST 1040 FW_PARAMS_MNEM_LAST
1039}; 1041};
1040 1042
@@ -3102,7 +3104,8 @@ enum fw_devlog_facility {
3102 FW_DEVLOG_FACILITY_FCOE = 0x2E, 3104 FW_DEVLOG_FACILITY_FCOE = 0x2E,
3103 FW_DEVLOG_FACILITY_FOISCSI = 0x30, 3105 FW_DEVLOG_FACILITY_FOISCSI = 0x30,
3104 FW_DEVLOG_FACILITY_FOFCOE = 0x32, 3106 FW_DEVLOG_FACILITY_FOFCOE = 0x32,
3105 FW_DEVLOG_FACILITY_MAX = 0x32, 3107 FW_DEVLOG_FACILITY_CHNET = 0x34,
3108 FW_DEVLOG_FACILITY_MAX = 0x34,
3106}; 3109};
3107 3110
3108/* log message format */ 3111/* log message format */
@@ -3139,4 +3142,36 @@ struct fw_devlog_cmd {
3139 (((x) >> FW_DEVLOG_CMD_MEMADDR16_DEVLOG_S) & \ 3142 (((x) >> FW_DEVLOG_CMD_MEMADDR16_DEVLOG_S) & \
3140 FW_DEVLOG_CMD_MEMADDR16_DEVLOG_M) 3143 FW_DEVLOG_CMD_MEMADDR16_DEVLOG_M)
3141 3144
3145/* P C I E F W P F 7 R E G I S T E R */
3146
3147/* PF7 stores the Firmware Device Log parameters which allows Host Drivers to
3148 * access the "devlog" which needing to contact firmware. The encoding is
3149 * mostly the same as that returned by the DEVLOG command except for the size
3150 * which is encoded as the number of entries in multiples-1 of 128 here rather
3151 * than the memory size as is done in the DEVLOG command. Thus, 0 means 128
3152 * and 15 means 2048. This of course in turn constrains the allowed values
3153 * for the devlog size ...
3154 */
3155#define PCIE_FW_PF_DEVLOG 7
3156
3157#define PCIE_FW_PF_DEVLOG_NENTRIES128_S 28
3158#define PCIE_FW_PF_DEVLOG_NENTRIES128_M 0xf
3159#define PCIE_FW_PF_DEVLOG_NENTRIES128_V(x) \
3160 ((x) << PCIE_FW_PF_DEVLOG_NENTRIES128_S)
3161#define PCIE_FW_PF_DEVLOG_NENTRIES128_G(x) \
3162 (((x) >> PCIE_FW_PF_DEVLOG_NENTRIES128_S) & \
3163 PCIE_FW_PF_DEVLOG_NENTRIES128_M)
3164
3165#define PCIE_FW_PF_DEVLOG_ADDR16_S 4
3166#define PCIE_FW_PF_DEVLOG_ADDR16_M 0xffffff
3167#define PCIE_FW_PF_DEVLOG_ADDR16_V(x) ((x) << PCIE_FW_PF_DEVLOG_ADDR16_S)
3168#define PCIE_FW_PF_DEVLOG_ADDR16_G(x) \
3169 (((x) >> PCIE_FW_PF_DEVLOG_ADDR16_S) & PCIE_FW_PF_DEVLOG_ADDR16_M)
3170
3171#define PCIE_FW_PF_DEVLOG_MEMTYPE_S 0
3172#define PCIE_FW_PF_DEVLOG_MEMTYPE_M 0xf
3173#define PCIE_FW_PF_DEVLOG_MEMTYPE_V(x) ((x) << PCIE_FW_PF_DEVLOG_MEMTYPE_S)
3174#define PCIE_FW_PF_DEVLOG_MEMTYPE_G(x) \
3175 (((x) >> PCIE_FW_PF_DEVLOG_MEMTYPE_S) & PCIE_FW_PF_DEVLOG_MEMTYPE_M)
3176
3142#endif /* _T4FW_INTERFACE_H_ */ 3177#endif /* _T4FW_INTERFACE_H_ */