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path: root/drivers/net/ethernet/broadcom/tg3.c
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Diffstat (limited to 'drivers/net/ethernet/broadcom/tg3.c')
-rw-r--r--drivers/net/ethernet/broadcom/tg3.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 5701f3d1a169..12d961c4ebca 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -3034,6 +3034,7 @@ static bool tg3_phy_led_bug(struct tg3 *tp)
3034{ 3034{
3035 switch (tg3_asic_rev(tp)) { 3035 switch (tg3_asic_rev(tp)) {
3036 case ASIC_REV_5719: 3036 case ASIC_REV_5719:
3037 case ASIC_REV_5720:
3037 if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && 3038 if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) &&
3038 !tp->pci_fn) 3039 !tp->pci_fn)
3039 return true; 3040 return true;
@@ -16192,12 +16193,12 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
16192 * So explicitly force the chip into D0 here. 16193 * So explicitly force the chip into D0 here.
16193 */ 16194 */
16194 pci_read_config_dword(tp->pdev, 16195 pci_read_config_dword(tp->pdev,
16195 tp->pm_cap + PCI_PM_CTRL, 16196 tp->pdev->pm_cap + PCI_PM_CTRL,
16196 &pm_reg); 16197 &pm_reg);
16197 pm_reg &= ~PCI_PM_CTRL_STATE_MASK; 16198 pm_reg &= ~PCI_PM_CTRL_STATE_MASK;
16198 pm_reg |= PCI_PM_CTRL_PME_ENABLE | 0 /* D0 */; 16199 pm_reg |= PCI_PM_CTRL_PME_ENABLE | 0 /* D0 */;
16199 pci_write_config_dword(tp->pdev, 16200 pci_write_config_dword(tp->pdev,
16200 tp->pm_cap + PCI_PM_CTRL, 16201 tp->pdev->pm_cap + PCI_PM_CTRL,
16201 pm_reg); 16202 pm_reg);
16202 16203
16203 /* Also, force SERR#/PERR# in PCI command. */ 16204 /* Also, force SERR#/PERR# in PCI command. */
@@ -17346,7 +17347,6 @@ static int tg3_init_one(struct pci_dev *pdev,
17346 tp = netdev_priv(dev); 17347 tp = netdev_priv(dev);
17347 tp->pdev = pdev; 17348 tp->pdev = pdev;
17348 tp->dev = dev; 17349 tp->dev = dev;
17349 tp->pm_cap = pdev->pm_cap;
17350 tp->rx_mode = TG3_DEF_RX_MODE; 17350 tp->rx_mode = TG3_DEF_RX_MODE;
17351 tp->tx_mode = TG3_DEF_TX_MODE; 17351 tp->tx_mode = TG3_DEF_TX_MODE;
17352 tp->irq_sync = 1; 17352 tp->irq_sync = 1;