diff options
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h')
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h | 38 |
1 files changed, 25 insertions, 13 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h index 76df015f486a..c2dfea7968f4 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h | |||
@@ -640,23 +640,35 @@ static const struct { | |||
640 | * [30] MCP Latched ump_tx_parity | 640 | * [30] MCP Latched ump_tx_parity |
641 | * [31] MCP Latched scpad_parity | 641 | * [31] MCP Latched scpad_parity |
642 | */ | 642 | */ |
643 | #define MISC_AEU_ENABLE_MCP_PRTY_BITS \ | 643 | #define MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS \ |
644 | (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ | 644 | (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ |
645 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ | 645 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ |
646 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ | 646 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY) |
647 | |||
648 | #define MISC_AEU_ENABLE_MCP_PRTY_BITS \ | ||
649 | (MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS | \ | ||
647 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) | 650 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) |
648 | 651 | ||
649 | /* Below registers control the MCP parity attention output. When | 652 | /* Below registers control the MCP parity attention output. When |
650 | * MISC_AEU_ENABLE_MCP_PRTY_BITS are set - attentions are | 653 | * MISC_AEU_ENABLE_MCP_PRTY_BITS are set - attentions are |
651 | * enabled, when cleared - disabled. | 654 | * enabled, when cleared - disabled. |
652 | */ | 655 | */ |
653 | static const u32 mcp_attn_ctl_regs[] = { | 656 | static const struct { |
654 | MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, | 657 | u32 addr; |
655 | MISC_REG_AEU_ENABLE4_NIG_0, | 658 | u32 bits; |
656 | MISC_REG_AEU_ENABLE4_PXP_0, | 659 | } mcp_attn_ctl_regs[] = { |
657 | MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, | 660 | { MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, |
658 | MISC_REG_AEU_ENABLE4_NIG_1, | 661 | MISC_AEU_ENABLE_MCP_PRTY_BITS }, |
659 | MISC_REG_AEU_ENABLE4_PXP_1 | 662 | { MISC_REG_AEU_ENABLE4_NIG_0, |
663 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, | ||
664 | { MISC_REG_AEU_ENABLE4_PXP_0, | ||
665 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, | ||
666 | { MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, | ||
667 | MISC_AEU_ENABLE_MCP_PRTY_BITS }, | ||
668 | { MISC_REG_AEU_ENABLE4_NIG_1, | ||
669 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, | ||
670 | { MISC_REG_AEU_ENABLE4_PXP_1, | ||
671 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS } | ||
660 | }; | 672 | }; |
661 | 673 | ||
662 | static inline void bnx2x_set_mcp_parity(struct bnx2x *bp, u8 enable) | 674 | static inline void bnx2x_set_mcp_parity(struct bnx2x *bp, u8 enable) |
@@ -665,14 +677,14 @@ static inline void bnx2x_set_mcp_parity(struct bnx2x *bp, u8 enable) | |||
665 | u32 reg_val; | 677 | u32 reg_val; |
666 | 678 | ||
667 | for (i = 0; i < ARRAY_SIZE(mcp_attn_ctl_regs); i++) { | 679 | for (i = 0; i < ARRAY_SIZE(mcp_attn_ctl_regs); i++) { |
668 | reg_val = REG_RD(bp, mcp_attn_ctl_regs[i]); | 680 | reg_val = REG_RD(bp, mcp_attn_ctl_regs[i].addr); |
669 | 681 | ||
670 | if (enable) | 682 | if (enable) |
671 | reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; | 683 | reg_val |= mcp_attn_ctl_regs[i].bits; |
672 | else | 684 | else |
673 | reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; | 685 | reg_val &= ~mcp_attn_ctl_regs[i].bits; |
674 | 686 | ||
675 | REG_WR(bp, mcp_attn_ctl_regs[i], reg_val); | 687 | REG_WR(bp, mcp_attn_ctl_regs[i].addr, reg_val); |
676 | } | 688 | } |
677 | } | 689 | } |
678 | 690 | ||