diff options
Diffstat (limited to 'drivers/net/ethernet/altera/altera_tse_main.c')
-rw-r--r-- | drivers/net/ethernet/altera/altera_tse_main.c | 128 |
1 files changed, 71 insertions, 57 deletions
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c index e44a4aeb9701..ecc3b4e4588b 100644 --- a/drivers/net/ethernet/altera/altera_tse_main.c +++ b/drivers/net/ethernet/altera/altera_tse_main.c | |||
@@ -100,29 +100,30 @@ static inline u32 tse_tx_avail(struct altera_tse_private *priv) | |||
100 | */ | 100 | */ |
101 | static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum) | 101 | static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
102 | { | 102 | { |
103 | struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv; | 103 | struct net_device *ndev = bus->priv; |
104 | unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0; | 104 | struct altera_tse_private *priv = netdev_priv(ndev); |
105 | u32 data; | ||
106 | 105 | ||
107 | /* set MDIO address */ | 106 | /* set MDIO address */ |
108 | iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr); | 107 | csrwr32((mii_id & 0x1f), priv->mac_dev, |
108 | tse_csroffs(mdio_phy0_addr)); | ||
109 | 109 | ||
110 | /* get the data */ | 110 | /* get the data */ |
111 | data = ioread32(&mdio_regs[regnum]) & 0xffff; | 111 | return csrrd32(priv->mac_dev, |
112 | return data; | 112 | tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff; |
113 | } | 113 | } |
114 | 114 | ||
115 | static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum, | 115 | static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum, |
116 | u16 value) | 116 | u16 value) |
117 | { | 117 | { |
118 | struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv; | 118 | struct net_device *ndev = bus->priv; |
119 | unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0; | 119 | struct altera_tse_private *priv = netdev_priv(ndev); |
120 | 120 | ||
121 | /* set MDIO address */ | 121 | /* set MDIO address */ |
122 | iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr); | 122 | csrwr32((mii_id & 0x1f), priv->mac_dev, |
123 | tse_csroffs(mdio_phy0_addr)); | ||
123 | 124 | ||
124 | /* write the data */ | 125 | /* write the data */ |
125 | iowrite32((u32) value, &mdio_regs[regnum]); | 126 | csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4); |
126 | return 0; | 127 | return 0; |
127 | } | 128 | } |
128 | 129 | ||
@@ -168,7 +169,7 @@ static int altera_tse_mdio_create(struct net_device *dev, unsigned int id) | |||
168 | for (i = 0; i < PHY_MAX_ADDR; i++) | 169 | for (i = 0; i < PHY_MAX_ADDR; i++) |
169 | mdio->irq[i] = PHY_POLL; | 170 | mdio->irq[i] = PHY_POLL; |
170 | 171 | ||
171 | mdio->priv = priv->mac_dev; | 172 | mdio->priv = dev; |
172 | mdio->parent = priv->device; | 173 | mdio->parent = priv->device; |
173 | 174 | ||
174 | ret = of_mdiobus_register(mdio, mdio_node); | 175 | ret = of_mdiobus_register(mdio, mdio_node); |
@@ -563,7 +564,6 @@ static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
563 | unsigned int nopaged_len = skb_headlen(skb); | 564 | unsigned int nopaged_len = skb_headlen(skb); |
564 | enum netdev_tx ret = NETDEV_TX_OK; | 565 | enum netdev_tx ret = NETDEV_TX_OK; |
565 | dma_addr_t dma_addr; | 566 | dma_addr_t dma_addr; |
566 | int txcomplete = 0; | ||
567 | 567 | ||
568 | spin_lock_bh(&priv->tx_lock); | 568 | spin_lock_bh(&priv->tx_lock); |
569 | 569 | ||
@@ -599,7 +599,7 @@ static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
599 | dma_sync_single_for_device(priv->device, buffer->dma_addr, | 599 | dma_sync_single_for_device(priv->device, buffer->dma_addr, |
600 | buffer->len, DMA_TO_DEVICE); | 600 | buffer->len, DMA_TO_DEVICE); |
601 | 601 | ||
602 | txcomplete = priv->dmaops->tx_buffer(priv, buffer); | 602 | priv->dmaops->tx_buffer(priv, buffer); |
603 | 603 | ||
604 | skb_tx_timestamp(skb); | 604 | skb_tx_timestamp(skb); |
605 | 605 | ||
@@ -698,7 +698,6 @@ static struct phy_device *connect_local_phy(struct net_device *dev) | |||
698 | struct altera_tse_private *priv = netdev_priv(dev); | 698 | struct altera_tse_private *priv = netdev_priv(dev); |
699 | struct phy_device *phydev = NULL; | 699 | struct phy_device *phydev = NULL; |
700 | char phy_id_fmt[MII_BUS_ID_SIZE + 3]; | 700 | char phy_id_fmt[MII_BUS_ID_SIZE + 3]; |
701 | int ret; | ||
702 | 701 | ||
703 | if (priv->phy_addr != POLL_PHY) { | 702 | if (priv->phy_addr != POLL_PHY) { |
704 | snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, | 703 | snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, |
@@ -712,6 +711,7 @@ static struct phy_device *connect_local_phy(struct net_device *dev) | |||
712 | netdev_err(dev, "Could not attach to PHY\n"); | 711 | netdev_err(dev, "Could not attach to PHY\n"); |
713 | 712 | ||
714 | } else { | 713 | } else { |
714 | int ret; | ||
715 | phydev = phy_find_first(priv->mdio); | 715 | phydev = phy_find_first(priv->mdio); |
716 | if (phydev == NULL) { | 716 | if (phydev == NULL) { |
717 | netdev_err(dev, "No PHY found\n"); | 717 | netdev_err(dev, "No PHY found\n"); |
@@ -791,7 +791,6 @@ static int init_phy(struct net_device *dev) | |||
791 | 791 | ||
792 | static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) | 792 | static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) |
793 | { | 793 | { |
794 | struct altera_tse_mac *mac = priv->mac_dev; | ||
795 | u32 msb; | 794 | u32 msb; |
796 | u32 lsb; | 795 | u32 lsb; |
797 | 796 | ||
@@ -799,8 +798,8 @@ static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) | |||
799 | lsb = ((addr[5] << 8) | addr[4]) & 0xffff; | 798 | lsb = ((addr[5] << 8) | addr[4]) & 0xffff; |
800 | 799 | ||
801 | /* Set primary MAC address */ | 800 | /* Set primary MAC address */ |
802 | iowrite32(msb, &mac->mac_addr_0); | 801 | csrwr32(msb, priv->mac_dev, tse_csroffs(mac_addr_0)); |
803 | iowrite32(lsb, &mac->mac_addr_1); | 802 | csrwr32(lsb, priv->mac_dev, tse_csroffs(mac_addr_1)); |
804 | } | 803 | } |
805 | 804 | ||
806 | /* MAC software reset. | 805 | /* MAC software reset. |
@@ -811,26 +810,26 @@ static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) | |||
811 | */ | 810 | */ |
812 | static int reset_mac(struct altera_tse_private *priv) | 811 | static int reset_mac(struct altera_tse_private *priv) |
813 | { | 812 | { |
814 | void __iomem *cmd_cfg_reg = &priv->mac_dev->command_config; | ||
815 | int counter; | 813 | int counter; |
816 | u32 dat; | 814 | u32 dat; |
817 | 815 | ||
818 | dat = ioread32(cmd_cfg_reg); | 816 | dat = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
819 | dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); | 817 | dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); |
820 | dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET; | 818 | dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET; |
821 | iowrite32(dat, cmd_cfg_reg); | 819 | csrwr32(dat, priv->mac_dev, tse_csroffs(command_config)); |
822 | 820 | ||
823 | counter = 0; | 821 | counter = 0; |
824 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { | 822 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
825 | if (tse_bit_is_clear(cmd_cfg_reg, MAC_CMDCFG_SW_RESET)) | 823 | if (tse_bit_is_clear(priv->mac_dev, tse_csroffs(command_config), |
824 | MAC_CMDCFG_SW_RESET)) | ||
826 | break; | 825 | break; |
827 | udelay(1); | 826 | udelay(1); |
828 | } | 827 | } |
829 | 828 | ||
830 | if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { | 829 | if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
831 | dat = ioread32(cmd_cfg_reg); | 830 | dat = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
832 | dat &= ~MAC_CMDCFG_SW_RESET; | 831 | dat &= ~MAC_CMDCFG_SW_RESET; |
833 | iowrite32(dat, cmd_cfg_reg); | 832 | csrwr32(dat, priv->mac_dev, tse_csroffs(command_config)); |
834 | return -1; | 833 | return -1; |
835 | } | 834 | } |
836 | return 0; | 835 | return 0; |
@@ -840,41 +839,57 @@ static int reset_mac(struct altera_tse_private *priv) | |||
840 | */ | 839 | */ |
841 | static int init_mac(struct altera_tse_private *priv) | 840 | static int init_mac(struct altera_tse_private *priv) |
842 | { | 841 | { |
843 | struct altera_tse_mac *mac = priv->mac_dev; | ||
844 | unsigned int cmd = 0; | 842 | unsigned int cmd = 0; |
845 | u32 frm_length; | 843 | u32 frm_length; |
846 | 844 | ||
847 | /* Setup Rx FIFO */ | 845 | /* Setup Rx FIFO */ |
848 | iowrite32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY, | 846 | csrwr32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY, |
849 | &mac->rx_section_empty); | 847 | priv->mac_dev, tse_csroffs(rx_section_empty)); |
850 | iowrite32(ALTERA_TSE_RX_SECTION_FULL, &mac->rx_section_full); | 848 | |
851 | iowrite32(ALTERA_TSE_RX_ALMOST_EMPTY, &mac->rx_almost_empty); | 849 | csrwr32(ALTERA_TSE_RX_SECTION_FULL, priv->mac_dev, |
852 | iowrite32(ALTERA_TSE_RX_ALMOST_FULL, &mac->rx_almost_full); | 850 | tse_csroffs(rx_section_full)); |
851 | |||
852 | csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY, priv->mac_dev, | ||
853 | tse_csroffs(rx_almost_empty)); | ||
854 | |||
855 | csrwr32(ALTERA_TSE_RX_ALMOST_FULL, priv->mac_dev, | ||
856 | tse_csroffs(rx_almost_full)); | ||
853 | 857 | ||
854 | /* Setup Tx FIFO */ | 858 | /* Setup Tx FIFO */ |
855 | iowrite32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY, | 859 | csrwr32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY, |
856 | &mac->tx_section_empty); | 860 | priv->mac_dev, tse_csroffs(tx_section_empty)); |
857 | iowrite32(ALTERA_TSE_TX_SECTION_FULL, &mac->tx_section_full); | 861 | |
858 | iowrite32(ALTERA_TSE_TX_ALMOST_EMPTY, &mac->tx_almost_empty); | 862 | csrwr32(ALTERA_TSE_TX_SECTION_FULL, priv->mac_dev, |
859 | iowrite32(ALTERA_TSE_TX_ALMOST_FULL, &mac->tx_almost_full); | 863 | tse_csroffs(tx_section_full)); |
864 | |||
865 | csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY, priv->mac_dev, | ||
866 | tse_csroffs(tx_almost_empty)); | ||
867 | |||
868 | csrwr32(ALTERA_TSE_TX_ALMOST_FULL, priv->mac_dev, | ||
869 | tse_csroffs(tx_almost_full)); | ||
860 | 870 | ||
861 | /* MAC Address Configuration */ | 871 | /* MAC Address Configuration */ |
862 | tse_update_mac_addr(priv, priv->dev->dev_addr); | 872 | tse_update_mac_addr(priv, priv->dev->dev_addr); |
863 | 873 | ||
864 | /* MAC Function Configuration */ | 874 | /* MAC Function Configuration */ |
865 | frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN; | 875 | frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN; |
866 | iowrite32(frm_length, &mac->frm_length); | 876 | csrwr32(frm_length, priv->mac_dev, tse_csroffs(frm_length)); |
867 | iowrite32(ALTERA_TSE_TX_IPG_LENGTH, &mac->tx_ipg_length); | 877 | |
878 | csrwr32(ALTERA_TSE_TX_IPG_LENGTH, priv->mac_dev, | ||
879 | tse_csroffs(tx_ipg_length)); | ||
868 | 880 | ||
869 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit | 881 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit |
870 | * start address | 882 | * start address |
871 | */ | 883 | */ |
872 | tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); | 884 | tse_set_bit(priv->mac_dev, tse_csroffs(rx_cmd_stat), |
873 | tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | 885 | ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); |
874 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | 886 | |
887 | tse_clear_bit(priv->mac_dev, tse_csroffs(tx_cmd_stat), | ||
888 | ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | ||
889 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | ||
875 | 890 | ||
876 | /* Set the MAC options */ | 891 | /* Set the MAC options */ |
877 | cmd = ioread32(&mac->command_config); | 892 | cmd = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
878 | cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */ | 893 | cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */ |
879 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ | 894 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ |
880 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames | 895 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames |
@@ -889,9 +904,10 @@ static int init_mac(struct altera_tse_private *priv) | |||
889 | cmd &= ~MAC_CMDCFG_ETH_SPEED; | 904 | cmd &= ~MAC_CMDCFG_ETH_SPEED; |
890 | cmd &= ~MAC_CMDCFG_ENA_10; | 905 | cmd &= ~MAC_CMDCFG_ENA_10; |
891 | 906 | ||
892 | iowrite32(cmd, &mac->command_config); | 907 | csrwr32(cmd, priv->mac_dev, tse_csroffs(command_config)); |
893 | 908 | ||
894 | iowrite32(ALTERA_TSE_PAUSE_QUANTA, &mac->pause_quanta); | 909 | csrwr32(ALTERA_TSE_PAUSE_QUANTA, priv->mac_dev, |
910 | tse_csroffs(pause_quanta)); | ||
895 | 911 | ||
896 | if (netif_msg_hw(priv)) | 912 | if (netif_msg_hw(priv)) |
897 | dev_dbg(priv->device, | 913 | dev_dbg(priv->device, |
@@ -904,15 +920,14 @@ static int init_mac(struct altera_tse_private *priv) | |||
904 | */ | 920 | */ |
905 | static void tse_set_mac(struct altera_tse_private *priv, bool enable) | 921 | static void tse_set_mac(struct altera_tse_private *priv, bool enable) |
906 | { | 922 | { |
907 | struct altera_tse_mac *mac = priv->mac_dev; | 923 | u32 value = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
908 | u32 value = ioread32(&mac->command_config); | ||
909 | 924 | ||
910 | if (enable) | 925 | if (enable) |
911 | value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA; | 926 | value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA; |
912 | else | 927 | else |
913 | value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); | 928 | value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); |
914 | 929 | ||
915 | iowrite32(value, &mac->command_config); | 930 | csrwr32(value, priv->mac_dev, tse_csroffs(command_config)); |
916 | } | 931 | } |
917 | 932 | ||
918 | /* Change the MTU | 933 | /* Change the MTU |
@@ -942,13 +957,12 @@ static int tse_change_mtu(struct net_device *dev, int new_mtu) | |||
942 | static void altera_tse_set_mcfilter(struct net_device *dev) | 957 | static void altera_tse_set_mcfilter(struct net_device *dev) |
943 | { | 958 | { |
944 | struct altera_tse_private *priv = netdev_priv(dev); | 959 | struct altera_tse_private *priv = netdev_priv(dev); |
945 | struct altera_tse_mac *mac = priv->mac_dev; | ||
946 | int i; | 960 | int i; |
947 | struct netdev_hw_addr *ha; | 961 | struct netdev_hw_addr *ha; |
948 | 962 | ||
949 | /* clear the hash filter */ | 963 | /* clear the hash filter */ |
950 | for (i = 0; i < 64; i++) | 964 | for (i = 0; i < 64; i++) |
951 | iowrite32(0, &(mac->hash_table[i])); | 965 | csrwr32(0, priv->mac_dev, tse_csroffs(hash_table) + i * 4); |
952 | 966 | ||
953 | netdev_for_each_mc_addr(ha, dev) { | 967 | netdev_for_each_mc_addr(ha, dev) { |
954 | unsigned int hash = 0; | 968 | unsigned int hash = 0; |
@@ -964,7 +978,7 @@ static void altera_tse_set_mcfilter(struct net_device *dev) | |||
964 | 978 | ||
965 | hash = (hash << 1) | xor_bit; | 979 | hash = (hash << 1) | xor_bit; |
966 | } | 980 | } |
967 | iowrite32(1, &(mac->hash_table[hash])); | 981 | csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + hash * 4); |
968 | } | 982 | } |
969 | } | 983 | } |
970 | 984 | ||
@@ -972,12 +986,11 @@ static void altera_tse_set_mcfilter(struct net_device *dev) | |||
972 | static void altera_tse_set_mcfilterall(struct net_device *dev) | 986 | static void altera_tse_set_mcfilterall(struct net_device *dev) |
973 | { | 987 | { |
974 | struct altera_tse_private *priv = netdev_priv(dev); | 988 | struct altera_tse_private *priv = netdev_priv(dev); |
975 | struct altera_tse_mac *mac = priv->mac_dev; | ||
976 | int i; | 989 | int i; |
977 | 990 | ||
978 | /* set the hash filter */ | 991 | /* set the hash filter */ |
979 | for (i = 0; i < 64; i++) | 992 | for (i = 0; i < 64; i++) |
980 | iowrite32(1, &(mac->hash_table[i])); | 993 | csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + i * 4); |
981 | } | 994 | } |
982 | 995 | ||
983 | /* Set or clear the multicast filter for this adaptor | 996 | /* Set or clear the multicast filter for this adaptor |
@@ -985,12 +998,12 @@ static void altera_tse_set_mcfilterall(struct net_device *dev) | |||
985 | static void tse_set_rx_mode_hashfilter(struct net_device *dev) | 998 | static void tse_set_rx_mode_hashfilter(struct net_device *dev) |
986 | { | 999 | { |
987 | struct altera_tse_private *priv = netdev_priv(dev); | 1000 | struct altera_tse_private *priv = netdev_priv(dev); |
988 | struct altera_tse_mac *mac = priv->mac_dev; | ||
989 | 1001 | ||
990 | spin_lock(&priv->mac_cfg_lock); | 1002 | spin_lock(&priv->mac_cfg_lock); |
991 | 1003 | ||
992 | if (dev->flags & IFF_PROMISC) | 1004 | if (dev->flags & IFF_PROMISC) |
993 | tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | 1005 | tse_set_bit(priv->mac_dev, tse_csroffs(command_config), |
1006 | MAC_CMDCFG_PROMIS_EN); | ||
994 | 1007 | ||
995 | if (dev->flags & IFF_ALLMULTI) | 1008 | if (dev->flags & IFF_ALLMULTI) |
996 | altera_tse_set_mcfilterall(dev); | 1009 | altera_tse_set_mcfilterall(dev); |
@@ -1005,15 +1018,16 @@ static void tse_set_rx_mode_hashfilter(struct net_device *dev) | |||
1005 | static void tse_set_rx_mode(struct net_device *dev) | 1018 | static void tse_set_rx_mode(struct net_device *dev) |
1006 | { | 1019 | { |
1007 | struct altera_tse_private *priv = netdev_priv(dev); | 1020 | struct altera_tse_private *priv = netdev_priv(dev); |
1008 | struct altera_tse_mac *mac = priv->mac_dev; | ||
1009 | 1021 | ||
1010 | spin_lock(&priv->mac_cfg_lock); | 1022 | spin_lock(&priv->mac_cfg_lock); |
1011 | 1023 | ||
1012 | if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) || | 1024 | if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) || |
1013 | !netdev_mc_empty(dev) || !netdev_uc_empty(dev)) | 1025 | !netdev_mc_empty(dev) || !netdev_uc_empty(dev)) |
1014 | tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | 1026 | tse_set_bit(priv->mac_dev, tse_csroffs(command_config), |
1027 | MAC_CMDCFG_PROMIS_EN); | ||
1015 | else | 1028 | else |
1016 | tse_clear_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | 1029 | tse_clear_bit(priv->mac_dev, tse_csroffs(command_config), |
1030 | MAC_CMDCFG_PROMIS_EN); | ||
1017 | 1031 | ||
1018 | spin_unlock(&priv->mac_cfg_lock); | 1032 | spin_unlock(&priv->mac_cfg_lock); |
1019 | } | 1033 | } |
@@ -1493,7 +1507,7 @@ static int altera_tse_remove(struct platform_device *pdev) | |||
1493 | return 0; | 1507 | return 0; |
1494 | } | 1508 | } |
1495 | 1509 | ||
1496 | struct altera_dmaops altera_dtype_sgdma = { | 1510 | static const struct altera_dmaops altera_dtype_sgdma = { |
1497 | .altera_dtype = ALTERA_DTYPE_SGDMA, | 1511 | .altera_dtype = ALTERA_DTYPE_SGDMA, |
1498 | .dmamask = 32, | 1512 | .dmamask = 32, |
1499 | .reset_dma = sgdma_reset, | 1513 | .reset_dma = sgdma_reset, |
@@ -1512,7 +1526,7 @@ struct altera_dmaops altera_dtype_sgdma = { | |||
1512 | .start_rxdma = sgdma_start_rxdma, | 1526 | .start_rxdma = sgdma_start_rxdma, |
1513 | }; | 1527 | }; |
1514 | 1528 | ||
1515 | struct altera_dmaops altera_dtype_msgdma = { | 1529 | static const struct altera_dmaops altera_dtype_msgdma = { |
1516 | .altera_dtype = ALTERA_DTYPE_MSGDMA, | 1530 | .altera_dtype = ALTERA_DTYPE_MSGDMA, |
1517 | .dmamask = 64, | 1531 | .dmamask = 64, |
1518 | .reset_dma = msgdma_reset, | 1532 | .reset_dma = msgdma_reset, |