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path: root/drivers/net/e1000
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-rw-r--r--drivers/net/e1000/e1000_hw.c174
-rw-r--r--drivers/net/e1000/e1000_hw.h2
2 files changed, 2 insertions, 174 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index 74aa59973316..765fd71ad5f2 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -33,9 +33,6 @@
33 33
34#include "e1000_hw.h" 34#include "e1000_hw.h"
35 35
36static s32 e1000_swfw_sync_acquire(struct e1000_hw *hw, u16 mask);
37static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask);
38
39static s32 e1000_check_downshift(struct e1000_hw *hw); 36static s32 e1000_check_downshift(struct e1000_hw *hw);
40static s32 e1000_check_polarity(struct e1000_hw *hw, 37static s32 e1000_check_polarity(struct e1000_hw *hw,
41 e1000_rev_polarity *polarity); 38 e1000_rev_polarity *polarity);
@@ -48,7 +45,6 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw);
48static s32 e1000_get_auto_rd_done(struct e1000_hw *hw); 45static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);
49static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length, 46static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
50 u16 *max_length); 47 u16 *max_length);
51static s32 e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);
52static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw); 48static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);
53static s32 e1000_id_led_init(struct e1000_hw *hw); 49static s32 e1000_id_led_init(struct e1000_hw *hw);
54static void e1000_init_rx_addrs(struct e1000_hw *hw); 50static void e1000_init_rx_addrs(struct e1000_hw *hw);
@@ -61,7 +57,6 @@ static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words,
61static s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd); 57static s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);
62static s32 e1000_phy_m88_get_info(struct e1000_hw *hw, 58static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
63 struct e1000_phy_info *phy_info); 59 struct e1000_phy_info *phy_info);
64static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
65static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active); 60static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
66static s32 e1000_wait_autoneg(struct e1000_hw *hw); 61static s32 e1000_wait_autoneg(struct e1000_hw *hw);
67static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value); 62static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value);
@@ -2607,70 +2602,6 @@ static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw)
2607 return data; 2602 return data;
2608} 2603}
2609 2604
2610static s32 e1000_swfw_sync_acquire(struct e1000_hw *hw, u16 mask)
2611{
2612 u32 swfw_sync = 0;
2613 u32 swmask = mask;
2614 u32 fwmask = mask << 16;
2615 s32 timeout = 200;
2616
2617 DEBUGFUNC("e1000_swfw_sync_acquire");
2618
2619 if (!hw->swfw_sync_present)
2620 return e1000_get_hw_eeprom_semaphore(hw);
2621
2622 while (timeout) {
2623 if (e1000_get_hw_eeprom_semaphore(hw))
2624 return -E1000_ERR_SWFW_SYNC;
2625
2626 swfw_sync = er32(SW_FW_SYNC);
2627 if (!(swfw_sync & (fwmask | swmask))) {
2628 break;
2629 }
2630
2631 /* firmware currently using resource (fwmask) */
2632 /* or other software thread currently using resource (swmask) */
2633 e1000_put_hw_eeprom_semaphore(hw);
2634 mdelay(5);
2635 timeout--;
2636 }
2637
2638 if (!timeout) {
2639 DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
2640 return -E1000_ERR_SWFW_SYNC;
2641 }
2642
2643 swfw_sync |= swmask;
2644 ew32(SW_FW_SYNC, swfw_sync);
2645
2646 e1000_put_hw_eeprom_semaphore(hw);
2647 return E1000_SUCCESS;
2648}
2649
2650static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask)
2651{
2652 u32 swfw_sync;
2653 u32 swmask = mask;
2654
2655 DEBUGFUNC("e1000_swfw_sync_release");
2656
2657 if (!hw->swfw_sync_present) {
2658 e1000_put_hw_eeprom_semaphore(hw);
2659 return;
2660 }
2661
2662 /* if (e1000_get_hw_eeprom_semaphore(hw))
2663 * return -E1000_ERR_SWFW_SYNC; */
2664 while (e1000_get_hw_eeprom_semaphore(hw) != E1000_SUCCESS);
2665 /* empty */
2666
2667 swfw_sync = er32(SW_FW_SYNC);
2668 swfw_sync &= ~swmask;
2669 ew32(SW_FW_SYNC, swfw_sync);
2670
2671 e1000_put_hw_eeprom_semaphore(hw);
2672}
2673
2674/***************************************************************************** 2605/*****************************************************************************
2675* Reads the value from a PHY register, if the value is on a specific non zero 2606* Reads the value from a PHY register, if the value is on a specific non zero
2676* page, sets the page first. 2607* page, sets the page first.
@@ -2680,28 +2611,19 @@ static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask)
2680s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data) 2611s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data)
2681{ 2612{
2682 u32 ret_val; 2613 u32 ret_val;
2683 u16 swfw;
2684 2614
2685 DEBUGFUNC("e1000_read_phy_reg"); 2615 DEBUGFUNC("e1000_read_phy_reg");
2686 2616
2687 swfw = E1000_SWFW_PHY0_SM;
2688 if (e1000_swfw_sync_acquire(hw, swfw))
2689 return -E1000_ERR_SWFW_SYNC;
2690
2691 if ((hw->phy_type == e1000_phy_igp) && 2617 if ((hw->phy_type == e1000_phy_igp) &&
2692 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { 2618 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
2693 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, 2619 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2694 (u16)reg_addr); 2620 (u16)reg_addr);
2695 if (ret_val) { 2621 if (ret_val)
2696 e1000_swfw_sync_release(hw, swfw);
2697 return ret_val; 2622 return ret_val;
2698 }
2699 } 2623 }
2700 2624
2701 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr, 2625 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2702 phy_data); 2626 phy_data);
2703
2704 e1000_swfw_sync_release(hw, swfw);
2705 return ret_val; 2627 return ret_val;
2706} 2628}
2707 2629
@@ -2787,28 +2709,20 @@ static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2787s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data) 2709s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data)
2788{ 2710{
2789 u32 ret_val; 2711 u32 ret_val;
2790 u16 swfw;
2791 2712
2792 DEBUGFUNC("e1000_write_phy_reg"); 2713 DEBUGFUNC("e1000_write_phy_reg");
2793 2714
2794 swfw = E1000_SWFW_PHY0_SM;
2795 if (e1000_swfw_sync_acquire(hw, swfw))
2796 return -E1000_ERR_SWFW_SYNC;
2797
2798 if ((hw->phy_type == e1000_phy_igp) && 2715 if ((hw->phy_type == e1000_phy_igp) &&
2799 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { 2716 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
2800 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, 2717 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2801 (u16)reg_addr); 2718 (u16)reg_addr);
2802 if (ret_val) { 2719 if (ret_val)
2803 e1000_swfw_sync_release(hw, swfw);
2804 return ret_val; 2720 return ret_val;
2805 }
2806 } 2721 }
2807 2722
2808 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr, 2723 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2809 phy_data); 2724 phy_data);
2810 2725
2811 e1000_swfw_sync_release(hw, swfw);
2812 return ret_val; 2726 return ret_val;
2813} 2727}
2814 2728
@@ -2883,18 +2797,12 @@ s32 e1000_phy_hw_reset(struct e1000_hw *hw)
2883 u32 ctrl, ctrl_ext; 2797 u32 ctrl, ctrl_ext;
2884 u32 led_ctrl; 2798 u32 led_ctrl;
2885 s32 ret_val; 2799 s32 ret_val;
2886 u16 swfw;
2887 2800
2888 DEBUGFUNC("e1000_phy_hw_reset"); 2801 DEBUGFUNC("e1000_phy_hw_reset");
2889 2802
2890 DEBUGOUT("Resetting Phy...\n"); 2803 DEBUGOUT("Resetting Phy...\n");
2891 2804
2892 if (hw->mac_type > e1000_82543) { 2805 if (hw->mac_type > e1000_82543) {
2893 swfw = E1000_SWFW_PHY0_SM;
2894 if (e1000_swfw_sync_acquire(hw, swfw)) {
2895 DEBUGOUT("Unable to acquire swfw sync\n");
2896 return -E1000_ERR_SWFW_SYNC;
2897 }
2898 /* Read the device control register and assert the E1000_CTRL_PHY_RST 2806 /* Read the device control register and assert the E1000_CTRL_PHY_RST
2899 * bit. Then, take it out of reset. 2807 * bit. Then, take it out of reset.
2900 * For e1000 hardware, we delay for 10ms between the assert 2808 * For e1000 hardware, we delay for 10ms between the assert
@@ -2908,8 +2816,6 @@ s32 e1000_phy_hw_reset(struct e1000_hw *hw)
2908 2816
2909 ew32(CTRL, ctrl); 2817 ew32(CTRL, ctrl);
2910 E1000_WRITE_FLUSH(); 2818 E1000_WRITE_FLUSH();
2911
2912 e1000_swfw_sync_release(hw, swfw);
2913 } else { 2819 } else {
2914 /* Read the Extended Device Control Register, assert the PHY_RESET_DIR 2820 /* Read the Extended Device Control Register, assert the PHY_RESET_DIR
2915 * bit to put the PHY into reset. Then, take it out of reset. 2821 * bit to put the PHY into reset. Then, take it out of reset.
@@ -3515,8 +3421,6 @@ static s32 e1000_acquire_eeprom(struct e1000_hw *hw)
3515 3421
3516 DEBUGFUNC("e1000_acquire_eeprom"); 3422 DEBUGFUNC("e1000_acquire_eeprom");
3517 3423
3518 if (e1000_swfw_sync_acquire(hw, E1000_SWFW_EEP_SM))
3519 return -E1000_ERR_SWFW_SYNC;
3520 eecd = er32(EECD); 3424 eecd = er32(EECD);
3521 3425
3522 /* Request EEPROM Access */ 3426 /* Request EEPROM Access */
@@ -3534,7 +3438,6 @@ static s32 e1000_acquire_eeprom(struct e1000_hw *hw)
3534 eecd &= ~E1000_EECD_REQ; 3438 eecd &= ~E1000_EECD_REQ;
3535 ew32(EECD, eecd); 3439 ew32(EECD, eecd);
3536 DEBUGOUT("Could not acquire EEPROM grant\n"); 3440 DEBUGOUT("Could not acquire EEPROM grant\n");
3537 e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
3538 return -E1000_ERR_EEPROM; 3441 return -E1000_ERR_EEPROM;
3539 } 3442 }
3540 } 3443 }
@@ -3653,8 +3556,6 @@ static void e1000_release_eeprom(struct e1000_hw *hw)
3653 eecd &= ~E1000_EECD_REQ; 3556 eecd &= ~E1000_EECD_REQ;
3654 ew32(EECD, eecd); 3557 ew32(EECD, eecd);
3655 } 3558 }
3656
3657 e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
3658} 3559}
3659 3560
3660/****************************************************************************** 3561/******************************************************************************
@@ -3847,8 +3748,6 @@ static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words,
3847 u32 i = 0; 3748 u32 i = 0;
3848 s32 error = 0; 3749 s32 error = 0;
3849 3750
3850 if (e1000_swfw_sync_acquire(hw, E1000_SWFW_EEP_SM))
3851 return -E1000_ERR_SWFW_SYNC;
3852 3751
3853 for (i = 0; i < words; i++) { 3752 for (i = 0; i < words; i++) {
3854 register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) | 3753 register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) |
@@ -3869,7 +3768,6 @@ static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words,
3869 } 3768 }
3870 } 3769 }
3871 3770
3872 e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
3873 return error; 3771 return error;
3874} 3772}
3875 3773
@@ -5681,71 +5579,3 @@ static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw)
5681 mdelay(10); 5579 mdelay(10);
5682 return E1000_SUCCESS; 5580 return E1000_SUCCESS;
5683} 5581}
5684
5685/***************************************************************************
5686 *
5687 * Using the combination of SMBI and SWESMBI semaphore bits when resetting
5688 * adapter or Eeprom access.
5689 *
5690 * hw: Struct containing variables accessed by shared code
5691 *
5692 * returns: - E1000_ERR_EEPROM if fail to access EEPROM.
5693 * E1000_SUCCESS at any other case.
5694 *
5695 ***************************************************************************/
5696static s32 e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)
5697{
5698 s32 timeout;
5699 u32 swsm;
5700
5701 DEBUGFUNC("e1000_get_hw_eeprom_semaphore");
5702
5703 if (!hw->eeprom_semaphore_present)
5704 return E1000_SUCCESS;
5705
5706 /* Get the FW semaphore. */
5707 timeout = hw->eeprom.word_size + 1;
5708 while (timeout) {
5709 swsm = er32(SWSM);
5710 swsm |= E1000_SWSM_SWESMBI;
5711 ew32(SWSM, swsm);
5712 /* if we managed to set the bit we got the semaphore. */
5713 swsm = er32(SWSM);
5714 if (swsm & E1000_SWSM_SWESMBI)
5715 break;
5716
5717 udelay(50);
5718 timeout--;
5719 }
5720
5721 if (!timeout) {
5722 /* Release semaphores */
5723 e1000_put_hw_eeprom_semaphore(hw);
5724 DEBUGOUT("Driver can't access the Eeprom - SWESMBI bit is set.\n");
5725 return -E1000_ERR_EEPROM;
5726 }
5727
5728 return E1000_SUCCESS;
5729}
5730
5731/***************************************************************************
5732 * This function clears HW semaphore bits.
5733 *
5734 * hw: Struct containing variables accessed by shared code
5735 *
5736 * returns: - None.
5737 *
5738 ***************************************************************************/
5739static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)
5740{
5741 u32 swsm;
5742
5743 DEBUGFUNC("e1000_put_hw_eeprom_semaphore");
5744
5745 if (!hw->eeprom_semaphore_present)
5746 return;
5747
5748 swsm = er32(SWSM);
5749 swsm &= ~(E1000_SWSM_SWESMBI);
5750 ew32(SWSM, swsm);
5751}
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 243dad25bccc..1a8a0006f3e3 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -284,7 +284,6 @@ typedef enum {
284#define E1000_ERR_MASTER_REQUESTS_PENDING 10 284#define E1000_ERR_MASTER_REQUESTS_PENDING 10
285#define E1000_ERR_HOST_INTERFACE_COMMAND 11 285#define E1000_ERR_HOST_INTERFACE_COMMAND 11
286#define E1000_BLK_PHY_RESET 12 286#define E1000_BLK_PHY_RESET 12
287#define E1000_ERR_SWFW_SYNC 13
288 287
289#define E1000_BYTE_SWAP_WORD(_value) ((((_value) & 0x00ff) << 8) | \ 288#define E1000_BYTE_SWAP_WORD(_value) ((((_value) & 0x00ff) << 8) | \
290 (((_value) & 0xff00) >> 8)) 289 (((_value) & 0xff00) >> 8))
@@ -1327,7 +1326,6 @@ struct e1000_hw {
1327 e1000_ffe_config ffe_config_state; 1326 e1000_ffe_config ffe_config_state;
1328 u32 asf_firmware_present; 1327 u32 asf_firmware_present;
1329 u32 eeprom_semaphore_present; 1328 u32 eeprom_semaphore_present;
1330 u32 swfw_sync_present;
1331 unsigned long io_base; 1329 unsigned long io_base;
1332 u32 phy_id; 1330 u32 phy_id;
1333 u32 phy_revision; 1331 u32 phy_revision;