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-rw-r--r--drivers/net/e1000/e1000.h8
-rw-r--r--drivers/net/e1000/e1000_ethtool.c62
-rw-r--r--drivers/net/e1000/e1000_hw.c350
-rw-r--r--drivers/net/e1000/e1000_hw.h64
-rw-r--r--drivers/net/e1000/e1000_main.c359
-rw-r--r--drivers/net/e1000/e1000_osdep.h20
-rw-r--r--drivers/net/e1000/e1000_param.c13
7 files changed, 618 insertions, 258 deletions
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h
index 99288b95aead..8676899120c3 100644
--- a/drivers/net/e1000/e1000.h
+++ b/drivers/net/e1000/e1000.h
@@ -238,9 +238,6 @@ struct e1000_adapter {
238 struct work_struct reset_task; 238 struct work_struct reset_task;
239 u8 fc_autoneg; 239 u8 fc_autoneg;
240 240
241 struct timer_list blink_timer;
242 unsigned long led_status;
243
244 /* TX */ 241 /* TX */
245 struct e1000_tx_ring *tx_ring; /* One per active queue */ 242 struct e1000_tx_ring *tx_ring; /* One per active queue */
246 unsigned int restart_queue; 243 unsigned int restart_queue;
@@ -310,6 +307,9 @@ struct e1000_adapter {
310 int need_ioport; 307 int need_ioport;
311 308
312 bool discarding; 309 bool discarding;
310
311 struct work_struct fifo_stall_task;
312 struct work_struct phy_info_task;
313}; 313};
314 314
315enum e1000_state_t { 315enum e1000_state_t {
@@ -346,7 +346,7 @@ extern int e1000_up(struct e1000_adapter *adapter);
346extern void e1000_down(struct e1000_adapter *adapter); 346extern void e1000_down(struct e1000_adapter *adapter);
347extern void e1000_reinit_locked(struct e1000_adapter *adapter); 347extern void e1000_reinit_locked(struct e1000_adapter *adapter);
348extern void e1000_reset(struct e1000_adapter *adapter); 348extern void e1000_reset(struct e1000_adapter *adapter);
349extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx); 349extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx);
350extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); 350extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
351extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); 351extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
352extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter); 352extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c
index f4d0922ec65b..ec0fa426cce2 100644
--- a/drivers/net/e1000/e1000_ethtool.c
+++ b/drivers/net/e1000/e1000_ethtool.c
@@ -158,9 +158,9 @@ static int e1000_get_settings(struct net_device *netdev,
158 158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed, 159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex); 160 &adapter->link_duplex);
161 ecmd->speed = adapter->link_speed; 161 ethtool_cmd_speed_set(ecmd, adapter->link_speed);
162 162
163 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL 163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
164 * and HALF_DUPLEX != DUPLEX_HALF */ 164 * and HALF_DUPLEX != DUPLEX_HALF */
165 165
166 if (adapter->link_duplex == FULL_DUPLEX) 166 if (adapter->link_duplex == FULL_DUPLEX)
@@ -168,7 +168,7 @@ static int e1000_get_settings(struct net_device *netdev,
168 else 168 else
169 ecmd->duplex = DUPLEX_HALF; 169 ecmd->duplex = DUPLEX_HALF;
170 } else { 170 } else {
171 ecmd->speed = -1; 171 ethtool_cmd_speed_set(ecmd, -1);
172 ecmd->duplex = -1; 172 ecmd->duplex = -1;
173 } 173 }
174 174
@@ -197,11 +197,13 @@ static int e1000_set_settings(struct net_device *netdev,
197 ADVERTISED_TP | 197 ADVERTISED_TP |
198 ADVERTISED_Autoneg; 198 ADVERTISED_Autoneg;
199 ecmd->advertising = hw->autoneg_advertised; 199 ecmd->advertising = hw->autoneg_advertised;
200 } else 200 } else {
201 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) { 201 u32 speed = ethtool_cmd_speed(ecmd);
202 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
202 clear_bit(__E1000_RESETTING, &adapter->flags); 203 clear_bit(__E1000_RESETTING, &adapter->flags);
203 return -EINVAL; 204 return -EINVAL;
204 } 205 }
206 }
205 207
206 /* reset the link */ 208 /* reset the link */
207 209
@@ -1753,46 +1755,28 @@ static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1753 return 0; 1755 return 0;
1754} 1756}
1755 1757
1756/* toggle LED 4 times per second = 2 "blinks" per second */ 1758static int e1000_set_phys_id(struct net_device *netdev,
1757#define E1000_ID_INTERVAL (HZ/4) 1759 enum ethtool_phys_id_state state)
1758
1759/* bit defines for adapter->led_status */
1760#define E1000_LED_ON 0
1761
1762static void e1000_led_blink_callback(unsigned long data)
1763{ 1760{
1764 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 1761 struct e1000_adapter *adapter = netdev_priv(netdev);
1765 struct e1000_hw *hw = &adapter->hw; 1762 struct e1000_hw *hw = &adapter->hw;
1766 1763
1767 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status)) 1764 switch (state) {
1768 e1000_led_off(hw); 1765 case ETHTOOL_ID_ACTIVE:
1769 else 1766 e1000_setup_led(hw);
1770 e1000_led_on(hw); 1767 return 2;
1771 1768
1772 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL); 1769 case ETHTOOL_ID_ON:
1773} 1770 e1000_led_on(hw);
1774 1771 break;
1775static int e1000_phys_id(struct net_device *netdev, u32 data)
1776{
1777 struct e1000_adapter *adapter = netdev_priv(netdev);
1778 struct e1000_hw *hw = &adapter->hw;
1779 1772
1780 if (!data) 1773 case ETHTOOL_ID_OFF:
1781 data = INT_MAX; 1774 e1000_led_off(hw);
1775 break;
1782 1776
1783 if (!adapter->blink_timer.function) { 1777 case ETHTOOL_ID_INACTIVE:
1784 init_timer(&adapter->blink_timer); 1778 e1000_cleanup_led(hw);
1785 adapter->blink_timer.function = e1000_led_blink_callback;
1786 adapter->blink_timer.data = (unsigned long)adapter;
1787 } 1779 }
1788 e1000_setup_led(hw);
1789 mod_timer(&adapter->blink_timer, jiffies);
1790 msleep_interruptible(data * 1000);
1791 del_timer_sync(&adapter->blink_timer);
1792
1793 e1000_led_off(hw);
1794 clear_bit(E1000_LED_ON, &adapter->led_status);
1795 e1000_cleanup_led(hw);
1796 1780
1797 return 0; 1781 return 0;
1798} 1782}
@@ -1929,7 +1913,7 @@ static const struct ethtool_ops e1000_ethtool_ops = {
1929 .set_tso = e1000_set_tso, 1913 .set_tso = e1000_set_tso,
1930 .self_test = e1000_diag_test, 1914 .self_test = e1000_diag_test,
1931 .get_strings = e1000_get_strings, 1915 .get_strings = e1000_get_strings,
1932 .phys_id = e1000_phys_id, 1916 .set_phys_id = e1000_set_phys_id,
1933 .get_ethtool_stats = e1000_get_ethtool_stats, 1917 .get_ethtool_stats = e1000_get_ethtool_stats,
1934 .get_sset_count = e1000_get_sset_count, 1918 .get_sset_count = e1000_get_sset_count,
1935 .get_coalesce = e1000_get_coalesce, 1919 .get_coalesce = e1000_get_coalesce,
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index c7e242b69a18..7501d977d992 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -124,16 +124,22 @@ static s32 e1000_set_phy_type(struct e1000_hw *hw)
124 case M88E1000_I_PHY_ID: 124 case M88E1000_I_PHY_ID:
125 case M88E1011_I_PHY_ID: 125 case M88E1011_I_PHY_ID:
126 case M88E1111_I_PHY_ID: 126 case M88E1111_I_PHY_ID:
127 case M88E1118_E_PHY_ID:
127 hw->phy_type = e1000_phy_m88; 128 hw->phy_type = e1000_phy_m88;
128 break; 129 break;
129 case IGP01E1000_I_PHY_ID: 130 case IGP01E1000_I_PHY_ID:
130 if (hw->mac_type == e1000_82541 || 131 if (hw->mac_type == e1000_82541 ||
131 hw->mac_type == e1000_82541_rev_2 || 132 hw->mac_type == e1000_82541_rev_2 ||
132 hw->mac_type == e1000_82547 || 133 hw->mac_type == e1000_82547 ||
133 hw->mac_type == e1000_82547_rev_2) { 134 hw->mac_type == e1000_82547_rev_2)
134 hw->phy_type = e1000_phy_igp; 135 hw->phy_type = e1000_phy_igp;
135 break; 136 break;
136 } 137 case RTL8211B_PHY_ID:
138 hw->phy_type = e1000_phy_8211;
139 break;
140 case RTL8201N_PHY_ID:
141 hw->phy_type = e1000_phy_8201;
142 break;
137 default: 143 default:
138 /* Should never have loaded on this device */ 144 /* Should never have loaded on this device */
139 hw->phy_type = e1000_phy_undefined; 145 hw->phy_type = e1000_phy_undefined;
@@ -318,6 +324,9 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
318 case E1000_DEV_ID_82547GI: 324 case E1000_DEV_ID_82547GI:
319 hw->mac_type = e1000_82547_rev_2; 325 hw->mac_type = e1000_82547_rev_2;
320 break; 326 break;
327 case E1000_DEV_ID_INTEL_CE4100_GBE:
328 hw->mac_type = e1000_ce4100;
329 break;
321 default: 330 default:
322 /* Should never have loaded on this device */ 331 /* Should never have loaded on this device */
323 return -E1000_ERR_MAC_TYPE; 332 return -E1000_ERR_MAC_TYPE;
@@ -372,6 +381,9 @@ void e1000_set_media_type(struct e1000_hw *hw)
372 case e1000_82542_rev2_1: 381 case e1000_82542_rev2_1:
373 hw->media_type = e1000_media_type_fiber; 382 hw->media_type = e1000_media_type_fiber;
374 break; 383 break;
384 case e1000_ce4100:
385 hw->media_type = e1000_media_type_copper;
386 break;
375 default: 387 default:
376 status = er32(STATUS); 388 status = er32(STATUS);
377 if (status & E1000_STATUS_TBIMODE) { 389 if (status & E1000_STATUS_TBIMODE) {
@@ -460,6 +472,7 @@ s32 e1000_reset_hw(struct e1000_hw *hw)
460 /* Reset is performed on a shadow of the control register */ 472 /* Reset is performed on a shadow of the control register */
461 ew32(CTRL_DUP, (ctrl | E1000_CTRL_RST)); 473 ew32(CTRL_DUP, (ctrl | E1000_CTRL_RST));
462 break; 474 break;
475 case e1000_ce4100:
463 default: 476 default:
464 ew32(CTRL, (ctrl | E1000_CTRL_RST)); 477 ew32(CTRL, (ctrl | E1000_CTRL_RST));
465 break; 478 break;
@@ -952,6 +965,67 @@ static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw)
952} 965}
953 966
954/** 967/**
968 * e1000_copper_link_rtl_setup - Copper link setup for e1000_phy_rtl series.
969 * @hw: Struct containing variables accessed by shared code
970 *
971 * Commits changes to PHY configuration by calling e1000_phy_reset().
972 */
973static s32 e1000_copper_link_rtl_setup(struct e1000_hw *hw)
974{
975 s32 ret_val;
976
977 /* SW reset the PHY so all changes take effect */
978 ret_val = e1000_phy_reset(hw);
979 if (ret_val) {
980 e_dbg("Error Resetting the PHY\n");
981 return ret_val;
982 }
983
984 return E1000_SUCCESS;
985}
986
987static s32 gbe_dhg_phy_setup(struct e1000_hw *hw)
988{
989 s32 ret_val;
990 u32 ctrl_aux;
991
992 switch (hw->phy_type) {
993 case e1000_phy_8211:
994 ret_val = e1000_copper_link_rtl_setup(hw);
995 if (ret_val) {
996 e_dbg("e1000_copper_link_rtl_setup failed!\n");
997 return ret_val;
998 }
999 break;
1000 case e1000_phy_8201:
1001 /* Set RMII mode */
1002 ctrl_aux = er32(CTL_AUX);
1003 ctrl_aux |= E1000_CTL_AUX_RMII;
1004 ew32(CTL_AUX, ctrl_aux);
1005 E1000_WRITE_FLUSH();
1006
1007 /* Disable the J/K bits required for receive */
1008 ctrl_aux = er32(CTL_AUX);
1009 ctrl_aux |= 0x4;
1010 ctrl_aux &= ~0x2;
1011 ew32(CTL_AUX, ctrl_aux);
1012 E1000_WRITE_FLUSH();
1013 ret_val = e1000_copper_link_rtl_setup(hw);
1014
1015 if (ret_val) {
1016 e_dbg("e1000_copper_link_rtl_setup failed!\n");
1017 return ret_val;
1018 }
1019 break;
1020 default:
1021 e_dbg("Error Resetting the PHY\n");
1022 return E1000_ERR_PHY_TYPE;
1023 }
1024
1025 return E1000_SUCCESS;
1026}
1027
1028/**
955 * e1000_copper_link_preconfig - early configuration for copper 1029 * e1000_copper_link_preconfig - early configuration for copper
956 * @hw: Struct containing variables accessed by shared code 1030 * @hw: Struct containing variables accessed by shared code
957 * 1031 *
@@ -1286,6 +1360,10 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
1286 if (hw->autoneg_advertised == 0) 1360 if (hw->autoneg_advertised == 0)
1287 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT; 1361 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT;
1288 1362
1363 /* IFE/RTL8201N PHY only supports 10/100 */
1364 if (hw->phy_type == e1000_phy_8201)
1365 hw->autoneg_advertised &= AUTONEG_ADVERTISE_10_100_ALL;
1366
1289 e_dbg("Reconfiguring auto-neg advertisement params\n"); 1367 e_dbg("Reconfiguring auto-neg advertisement params\n");
1290 ret_val = e1000_phy_setup_autoneg(hw); 1368 ret_val = e1000_phy_setup_autoneg(hw);
1291 if (ret_val) { 1369 if (ret_val) {
@@ -1341,7 +1419,7 @@ static s32 e1000_copper_link_postconfig(struct e1000_hw *hw)
1341 s32 ret_val; 1419 s32 ret_val;
1342 e_dbg("e1000_copper_link_postconfig"); 1420 e_dbg("e1000_copper_link_postconfig");
1343 1421
1344 if (hw->mac_type >= e1000_82544) { 1422 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) {
1345 e1000_config_collision_dist(hw); 1423 e1000_config_collision_dist(hw);
1346 } else { 1424 } else {
1347 ret_val = e1000_config_mac_to_phy(hw); 1425 ret_val = e1000_config_mac_to_phy(hw);
@@ -1395,6 +1473,12 @@ static s32 e1000_setup_copper_link(struct e1000_hw *hw)
1395 ret_val = e1000_copper_link_mgp_setup(hw); 1473 ret_val = e1000_copper_link_mgp_setup(hw);
1396 if (ret_val) 1474 if (ret_val)
1397 return ret_val; 1475 return ret_val;
1476 } else {
1477 ret_val = gbe_dhg_phy_setup(hw);
1478 if (ret_val) {
1479 e_dbg("gbe_dhg_phy_setup failed!\n");
1480 return ret_val;
1481 }
1398 } 1482 }
1399 1483
1400 if (hw->autoneg) { 1484 if (hw->autoneg) {
@@ -1461,10 +1545,11 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
1461 return ret_val; 1545 return ret_val;
1462 1546
1463 /* Read the MII 1000Base-T Control Register (Address 9). */ 1547 /* Read the MII 1000Base-T Control Register (Address 9). */
1464 ret_val = 1548 ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
1465 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
1466 if (ret_val) 1549 if (ret_val)
1467 return ret_val; 1550 return ret_val;
1551 else if (hw->phy_type == e1000_phy_8201)
1552 mii_1000t_ctrl_reg &= ~REG9_SPEED_MASK;
1468 1553
1469 /* Need to parse both autoneg_advertised and fc and set up 1554 /* Need to parse both autoneg_advertised and fc and set up
1470 * the appropriate PHY registers. First we will parse for 1555 * the appropriate PHY registers. First we will parse for
@@ -1577,9 +1662,14 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
1577 1662
1578 e_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); 1663 e_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
1579 1664
1580 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg); 1665 if (hw->phy_type == e1000_phy_8201) {
1581 if (ret_val) 1666 mii_1000t_ctrl_reg = 0;
1582 return ret_val; 1667 } else {
1668 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1669 mii_1000t_ctrl_reg);
1670 if (ret_val)
1671 return ret_val;
1672 }
1583 1673
1584 return E1000_SUCCESS; 1674 return E1000_SUCCESS;
1585} 1675}
@@ -1860,7 +1950,7 @@ static s32 e1000_config_mac_to_phy(struct e1000_hw *hw)
1860 1950
1861 /* 82544 or newer MAC, Auto Speed Detection takes care of 1951 /* 82544 or newer MAC, Auto Speed Detection takes care of
1862 * MAC speed/duplex configuration.*/ 1952 * MAC speed/duplex configuration.*/
1863 if (hw->mac_type >= e1000_82544) 1953 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100))
1864 return E1000_SUCCESS; 1954 return E1000_SUCCESS;
1865 1955
1866 /* Read the Device Control Register and set the bits to Force Speed 1956 /* Read the Device Control Register and set the bits to Force Speed
@@ -1870,27 +1960,49 @@ static s32 e1000_config_mac_to_phy(struct e1000_hw *hw)
1870 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); 1960 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1871 ctrl &= ~(E1000_CTRL_SPD_SEL | E1000_CTRL_ILOS); 1961 ctrl &= ~(E1000_CTRL_SPD_SEL | E1000_CTRL_ILOS);
1872 1962
1873 /* Set up duplex in the Device Control and Transmit Control 1963 switch (hw->phy_type) {
1874 * registers depending on negotiated values. 1964 case e1000_phy_8201:
1875 */ 1965 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
1876 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); 1966 if (ret_val)
1877 if (ret_val) 1967 return ret_val;
1878 return ret_val;
1879 1968
1880 if (phy_data & M88E1000_PSSR_DPLX) 1969 if (phy_data & RTL_PHY_CTRL_FD)
1881 ctrl |= E1000_CTRL_FD; 1970 ctrl |= E1000_CTRL_FD;
1882 else 1971 else
1883 ctrl &= ~E1000_CTRL_FD; 1972 ctrl &= ~E1000_CTRL_FD;
1884 1973
1885 e1000_config_collision_dist(hw); 1974 if (phy_data & RTL_PHY_CTRL_SPD_100)
1975 ctrl |= E1000_CTRL_SPD_100;
1976 else
1977 ctrl |= E1000_CTRL_SPD_10;
1886 1978
1887 /* Set up speed in the Device Control register depending on 1979 e1000_config_collision_dist(hw);
1888 * negotiated values. 1980 break;
1889 */ 1981 default:
1890 if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) 1982 /* Set up duplex in the Device Control and Transmit Control
1891 ctrl |= E1000_CTRL_SPD_1000; 1983 * registers depending on negotiated values.
1892 else if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS) 1984 */
1893 ctrl |= E1000_CTRL_SPD_100; 1985 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
1986 &phy_data);
1987 if (ret_val)
1988 return ret_val;
1989
1990 if (phy_data & M88E1000_PSSR_DPLX)
1991 ctrl |= E1000_CTRL_FD;
1992 else
1993 ctrl &= ~E1000_CTRL_FD;
1994
1995 e1000_config_collision_dist(hw);
1996
1997 /* Set up speed in the Device Control register depending on
1998 * negotiated values.
1999 */
2000 if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS)
2001 ctrl |= E1000_CTRL_SPD_1000;
2002 else if ((phy_data & M88E1000_PSSR_SPEED) ==
2003 M88E1000_PSSR_100MBS)
2004 ctrl |= E1000_CTRL_SPD_100;
2005 }
1894 2006
1895 /* Write the configured values back to the Device Control Reg. */ 2007 /* Write the configured values back to the Device Control Reg. */
1896 ew32(CTRL, ctrl); 2008 ew32(CTRL, ctrl);
@@ -2401,7 +2513,8 @@ s32 e1000_check_for_link(struct e1000_hw *hw)
2401 * speed/duplex on the MAC to the current PHY speed/duplex 2513 * speed/duplex on the MAC to the current PHY speed/duplex
2402 * settings. 2514 * settings.
2403 */ 2515 */
2404 if (hw->mac_type >= e1000_82544) 2516 if ((hw->mac_type >= e1000_82544) &&
2517 (hw->mac_type != e1000_ce4100))
2405 e1000_config_collision_dist(hw); 2518 e1000_config_collision_dist(hw);
2406 else { 2519 else {
2407 ret_val = e1000_config_mac_to_phy(hw); 2520 ret_val = e1000_config_mac_to_phy(hw);
@@ -2738,7 +2851,7 @@ static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2738{ 2851{
2739 u32 i; 2852 u32 i;
2740 u32 mdic = 0; 2853 u32 mdic = 0;
2741 const u32 phy_addr = 1; 2854 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1;
2742 2855
2743 e_dbg("e1000_read_phy_reg_ex"); 2856 e_dbg("e1000_read_phy_reg_ex");
2744 2857
@@ -2752,28 +2865,61 @@ static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2752 * Control register. The MAC will take care of interfacing with the 2865 * Control register. The MAC will take care of interfacing with the
2753 * PHY to retrieve the desired data. 2866 * PHY to retrieve the desired data.
2754 */ 2867 */
2755 mdic = ((reg_addr << E1000_MDIC_REG_SHIFT) | 2868 if (hw->mac_type == e1000_ce4100) {
2756 (phy_addr << E1000_MDIC_PHY_SHIFT) | 2869 mdic = ((reg_addr << E1000_MDIC_REG_SHIFT) |
2757 (E1000_MDIC_OP_READ)); 2870 (phy_addr << E1000_MDIC_PHY_SHIFT) |
2871 (INTEL_CE_GBE_MDIC_OP_READ) |
2872 (INTEL_CE_GBE_MDIC_GO));
2758 2873
2759 ew32(MDIC, mdic); 2874 writel(mdic, E1000_MDIO_CMD);
2760 2875
2761 /* Poll the ready bit to see if the MDI read completed */ 2876 /* Poll the ready bit to see if the MDI read
2762 for (i = 0; i < 64; i++) { 2877 * completed
2763 udelay(50); 2878 */
2764 mdic = er32(MDIC); 2879 for (i = 0; i < 64; i++) {
2765 if (mdic & E1000_MDIC_READY) 2880 udelay(50);
2766 break; 2881 mdic = readl(E1000_MDIO_CMD);
2767 } 2882 if (!(mdic & INTEL_CE_GBE_MDIC_GO))
2768 if (!(mdic & E1000_MDIC_READY)) { 2883 break;
2769 e_dbg("MDI Read did not complete\n"); 2884 }
2770 return -E1000_ERR_PHY; 2885
2771 } 2886 if (mdic & INTEL_CE_GBE_MDIC_GO) {
2772 if (mdic & E1000_MDIC_ERROR) { 2887 e_dbg("MDI Read did not complete\n");
2773 e_dbg("MDI Error\n"); 2888 return -E1000_ERR_PHY;
2774 return -E1000_ERR_PHY; 2889 }
2890
2891 mdic = readl(E1000_MDIO_STS);
2892 if (mdic & INTEL_CE_GBE_MDIC_READ_ERROR) {
2893 e_dbg("MDI Read Error\n");
2894 return -E1000_ERR_PHY;
2895 }
2896 *phy_data = (u16) mdic;
2897 } else {
2898 mdic = ((reg_addr << E1000_MDIC_REG_SHIFT) |
2899 (phy_addr << E1000_MDIC_PHY_SHIFT) |
2900 (E1000_MDIC_OP_READ));
2901
2902 ew32(MDIC, mdic);
2903
2904 /* Poll the ready bit to see if the MDI read
2905 * completed
2906 */
2907 for (i = 0; i < 64; i++) {
2908 udelay(50);
2909 mdic = er32(MDIC);
2910 if (mdic & E1000_MDIC_READY)
2911 break;
2912 }
2913 if (!(mdic & E1000_MDIC_READY)) {
2914 e_dbg("MDI Read did not complete\n");
2915 return -E1000_ERR_PHY;
2916 }
2917 if (mdic & E1000_MDIC_ERROR) {
2918 e_dbg("MDI Error\n");
2919 return -E1000_ERR_PHY;
2920 }
2921 *phy_data = (u16) mdic;
2775 } 2922 }
2776 *phy_data = (u16) mdic;
2777 } else { 2923 } else {
2778 /* We must first send a preamble through the MDIO pin to signal the 2924 /* We must first send a preamble through the MDIO pin to signal the
2779 * beginning of an MII instruction. This is done by sending 32 2925 * beginning of an MII instruction. This is done by sending 32
@@ -2840,7 +2986,7 @@ static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2840{ 2986{
2841 u32 i; 2987 u32 i;
2842 u32 mdic = 0; 2988 u32 mdic = 0;
2843 const u32 phy_addr = 1; 2989 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1;
2844 2990
2845 e_dbg("e1000_write_phy_reg_ex"); 2991 e_dbg("e1000_write_phy_reg_ex");
2846 2992
@@ -2850,27 +2996,54 @@ static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2850 } 2996 }
2851 2997
2852 if (hw->mac_type > e1000_82543) { 2998 if (hw->mac_type > e1000_82543) {
2853 /* Set up Op-code, Phy Address, register address, and data intended 2999 /* Set up Op-code, Phy Address, register address, and data
2854 * for the PHY register in the MDI Control register. The MAC will take 3000 * intended for the PHY register in the MDI Control register.
2855 * care of interfacing with the PHY to send the desired data. 3001 * The MAC will take care of interfacing with the PHY to send
3002 * the desired data.
2856 */ 3003 */
2857 mdic = (((u32) phy_data) | 3004 if (hw->mac_type == e1000_ce4100) {
2858 (reg_addr << E1000_MDIC_REG_SHIFT) | 3005 mdic = (((u32) phy_data) |
2859 (phy_addr << E1000_MDIC_PHY_SHIFT) | 3006 (reg_addr << E1000_MDIC_REG_SHIFT) |
2860 (E1000_MDIC_OP_WRITE)); 3007 (phy_addr << E1000_MDIC_PHY_SHIFT) |
3008 (INTEL_CE_GBE_MDIC_OP_WRITE) |
3009 (INTEL_CE_GBE_MDIC_GO));
2861 3010
2862 ew32(MDIC, mdic); 3011 writel(mdic, E1000_MDIO_CMD);
2863 3012
2864 /* Poll the ready bit to see if the MDI read completed */ 3013 /* Poll the ready bit to see if the MDI read
2865 for (i = 0; i < 641; i++) { 3014 * completed
2866 udelay(5); 3015 */
2867 mdic = er32(MDIC); 3016 for (i = 0; i < 640; i++) {
2868 if (mdic & E1000_MDIC_READY) 3017 udelay(5);
2869 break; 3018 mdic = readl(E1000_MDIO_CMD);
2870 } 3019 if (!(mdic & INTEL_CE_GBE_MDIC_GO))
2871 if (!(mdic & E1000_MDIC_READY)) { 3020 break;
2872 e_dbg("MDI Write did not complete\n"); 3021 }
2873 return -E1000_ERR_PHY; 3022 if (mdic & INTEL_CE_GBE_MDIC_GO) {
3023 e_dbg("MDI Write did not complete\n");
3024 return -E1000_ERR_PHY;
3025 }
3026 } else {
3027 mdic = (((u32) phy_data) |
3028 (reg_addr << E1000_MDIC_REG_SHIFT) |
3029 (phy_addr << E1000_MDIC_PHY_SHIFT) |
3030 (E1000_MDIC_OP_WRITE));
3031
3032 ew32(MDIC, mdic);
3033
3034 /* Poll the ready bit to see if the MDI read
3035 * completed
3036 */
3037 for (i = 0; i < 641; i++) {
3038 udelay(5);
3039 mdic = er32(MDIC);
3040 if (mdic & E1000_MDIC_READY)
3041 break;
3042 }
3043 if (!(mdic & E1000_MDIC_READY)) {
3044 e_dbg("MDI Write did not complete\n");
3045 return -E1000_ERR_PHY;
3046 }
2874 } 3047 }
2875 } else { 3048 } else {
2876 /* We'll need to use the SW defined pins to shift the write command 3049 /* We'll need to use the SW defined pins to shift the write command
@@ -3048,6 +3221,12 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw)
3048 if (hw->phy_id == M88E1011_I_PHY_ID) 3221 if (hw->phy_id == M88E1011_I_PHY_ID)
3049 match = true; 3222 match = true;
3050 break; 3223 break;
3224 case e1000_ce4100:
3225 if ((hw->phy_id == RTL8211B_PHY_ID) ||
3226 (hw->phy_id == RTL8201N_PHY_ID) ||
3227 (hw->phy_id == M88E1118_E_PHY_ID))
3228 match = true;
3229 break;
3051 case e1000_82541: 3230 case e1000_82541:
3052 case e1000_82541_rev_2: 3231 case e1000_82541_rev_2:
3053 case e1000_82547: 3232 case e1000_82547:
@@ -3291,6 +3470,9 @@ s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info)
3291 3470
3292 if (hw->phy_type == e1000_phy_igp) 3471 if (hw->phy_type == e1000_phy_igp)
3293 return e1000_phy_igp_get_info(hw, phy_info); 3472 return e1000_phy_igp_get_info(hw, phy_info);
3473 else if ((hw->phy_type == e1000_phy_8211) ||
3474 (hw->phy_type == e1000_phy_8201))
3475 return E1000_SUCCESS;
3294 else 3476 else
3295 return e1000_phy_m88_get_info(hw, phy_info); 3477 return e1000_phy_m88_get_info(hw, phy_info);
3296} 3478}
@@ -3742,6 +3924,12 @@ static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
3742 3924
3743 e_dbg("e1000_read_eeprom"); 3925 e_dbg("e1000_read_eeprom");
3744 3926
3927 if (hw->mac_type == e1000_ce4100) {
3928 GBE_CONFIG_FLASH_READ(GBE_CONFIG_BASE_VIRT, offset, words,
3929 data);
3930 return E1000_SUCCESS;
3931 }
3932
3745 /* If eeprom is not yet detected, do so now */ 3933 /* If eeprom is not yet detected, do so now */
3746 if (eeprom->word_size == 0) 3934 if (eeprom->word_size == 0)
3747 e1000_init_eeprom_params(hw); 3935 e1000_init_eeprom_params(hw);
@@ -3904,6 +4092,12 @@ static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
3904 4092
3905 e_dbg("e1000_write_eeprom"); 4093 e_dbg("e1000_write_eeprom");
3906 4094
4095 if (hw->mac_type == e1000_ce4100) {
4096 GBE_CONFIG_FLASH_WRITE(GBE_CONFIG_BASE_VIRT, offset, words,
4097 data);
4098 return E1000_SUCCESS;
4099 }
4100
3907 /* If eeprom is not yet detected, do so now */ 4101 /* If eeprom is not yet detected, do so now */
3908 if (eeprom->word_size == 0) 4102 if (eeprom->word_size == 0)
3909 e1000_init_eeprom_params(hw); 4103 e1000_init_eeprom_params(hw);
@@ -4892,11 +5086,11 @@ static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
4892 } else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */ 5086 } else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */
4893 u16 cur_agc_value; 5087 u16 cur_agc_value;
4894 u16 min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE; 5088 u16 min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE;
4895 u16 agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = 5089 static const u16 agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {
4896 { IGP01E1000_PHY_AGC_A, 5090 IGP01E1000_PHY_AGC_A,
4897 IGP01E1000_PHY_AGC_B, 5091 IGP01E1000_PHY_AGC_B,
4898 IGP01E1000_PHY_AGC_C, 5092 IGP01E1000_PHY_AGC_C,
4899 IGP01E1000_PHY_AGC_D 5093 IGP01E1000_PHY_AGC_D
4900 }; 5094 };
4901 /* Read the AGC registers for all channels */ 5095 /* Read the AGC registers for all channels */
4902 for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) { 5096 for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {
@@ -5071,11 +5265,11 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
5071{ 5265{
5072 s32 ret_val; 5266 s32 ret_val;
5073 u16 phy_data, phy_saved_data, speed, duplex, i; 5267 u16 phy_data, phy_saved_data, speed, duplex, i;
5074 u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = 5268 static const u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {
5075 { IGP01E1000_PHY_AGC_PARAM_A, 5269 IGP01E1000_PHY_AGC_PARAM_A,
5076 IGP01E1000_PHY_AGC_PARAM_B, 5270 IGP01E1000_PHY_AGC_PARAM_B,
5077 IGP01E1000_PHY_AGC_PARAM_C, 5271 IGP01E1000_PHY_AGC_PARAM_C,
5078 IGP01E1000_PHY_AGC_PARAM_D 5272 IGP01E1000_PHY_AGC_PARAM_D
5079 }; 5273 };
5080 u16 min_length, max_length; 5274 u16 min_length, max_length;
5081 5275
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index ecd9f6c6bcd5..5c9a8403668b 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -41,7 +41,7 @@ struct e1000_hw;
41struct e1000_hw_stats; 41struct e1000_hw_stats;
42 42
43/* Enumerated types specific to the e1000 hardware */ 43/* Enumerated types specific to the e1000 hardware */
44/* Media Access Controlers */ 44/* Media Access Controllers */
45typedef enum { 45typedef enum {
46 e1000_undefined = 0, 46 e1000_undefined = 0,
47 e1000_82542_rev2_0, 47 e1000_82542_rev2_0,
@@ -52,6 +52,7 @@ typedef enum {
52 e1000_82545, 52 e1000_82545,
53 e1000_82545_rev_3, 53 e1000_82545_rev_3,
54 e1000_82546, 54 e1000_82546,
55 e1000_ce4100,
55 e1000_82546_rev_3, 56 e1000_82546_rev_3,
56 e1000_82541, 57 e1000_82541,
57 e1000_82541_rev_2, 58 e1000_82541_rev_2,
@@ -209,9 +210,11 @@ typedef enum {
209} e1000_1000t_rx_status; 210} e1000_1000t_rx_status;
210 211
211typedef enum { 212typedef enum {
212 e1000_phy_m88 = 0, 213 e1000_phy_m88 = 0,
213 e1000_phy_igp, 214 e1000_phy_igp,
214 e1000_phy_undefined = 0xFF 215 e1000_phy_8211,
216 e1000_phy_8201,
217 e1000_phy_undefined = 0xFF
215} e1000_phy_type; 218} e1000_phy_type;
216 219
217typedef enum { 220typedef enum {
@@ -442,6 +445,7 @@ void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value);
442#define E1000_DEV_ID_82547EI 0x1019 445#define E1000_DEV_ID_82547EI 0x1019
443#define E1000_DEV_ID_82547EI_MOBILE 0x101A 446#define E1000_DEV_ID_82547EI_MOBILE 0x101A
444#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5 447#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
448#define E1000_DEV_ID_INTEL_CE4100_GBE 0x2E6E
445 449
446#define NODE_ADDRESS_SIZE 6 450#define NODE_ADDRESS_SIZE 6
447#define ETH_LENGTH_OF_ADDRESS 6 451#define ETH_LENGTH_OF_ADDRESS 6
@@ -808,6 +812,16 @@ struct e1000_ffvt_entry {
808#define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */ 812#define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
809#define E1000_FLA 0x0001C /* Flash Access - RW */ 813#define E1000_FLA 0x0001C /* Flash Access - RW */
810#define E1000_MDIC 0x00020 /* MDI Control - RW */ 814#define E1000_MDIC 0x00020 /* MDI Control - RW */
815
816extern void __iomem *ce4100_gbe_mdio_base_virt;
817#define INTEL_CE_GBE_MDIO_RCOMP_BASE (ce4100_gbe_mdio_base_virt)
818#define E1000_MDIO_STS (INTEL_CE_GBE_MDIO_RCOMP_BASE + 0)
819#define E1000_MDIO_CMD (INTEL_CE_GBE_MDIO_RCOMP_BASE + 4)
820#define E1000_MDIO_DRV (INTEL_CE_GBE_MDIO_RCOMP_BASE + 8)
821#define E1000_MDC_CMD (INTEL_CE_GBE_MDIO_RCOMP_BASE + 0xC)
822#define E1000_RCOMP_CTL (INTEL_CE_GBE_MDIO_RCOMP_BASE + 0x20)
823#define E1000_RCOMP_STS (INTEL_CE_GBE_MDIO_RCOMP_BASE + 0x24)
824
811#define E1000_SCTL 0x00024 /* SerDes Control - RW */ 825#define E1000_SCTL 0x00024 /* SerDes Control - RW */
812#define E1000_FEXTNVM 0x00028 /* Future Extended NVM register */ 826#define E1000_FEXTNVM 0x00028 /* Future Extended NVM register */
813#define E1000_FCAL 0x00028 /* Flow Control Address Low - RW */ 827#define E1000_FCAL 0x00028 /* Flow Control Address Low - RW */
@@ -820,6 +834,34 @@ struct e1000_ffvt_entry {
820#define E1000_IMS 0x000D0 /* Interrupt Mask Set - RW */ 834#define E1000_IMS 0x000D0 /* Interrupt Mask Set - RW */
821#define E1000_IMC 0x000D8 /* Interrupt Mask Clear - WO */ 835#define E1000_IMC 0x000D8 /* Interrupt Mask Clear - WO */
822#define E1000_IAM 0x000E0 /* Interrupt Acknowledge Auto Mask */ 836#define E1000_IAM 0x000E0 /* Interrupt Acknowledge Auto Mask */
837
838/* Auxiliary Control Register. This register is CE4100 specific,
839 * RMII/RGMII function is switched by this register - RW
840 * Following are bits definitions of the Auxiliary Control Register
841 */
842#define E1000_CTL_AUX 0x000E0
843#define E1000_CTL_AUX_END_SEL_SHIFT 10
844#define E1000_CTL_AUX_ENDIANESS_SHIFT 8
845#define E1000_CTL_AUX_RGMII_RMII_SHIFT 0
846
847/* descriptor and packet transfer use CTL_AUX.ENDIANESS */
848#define E1000_CTL_AUX_DES_PKT (0x0 << E1000_CTL_AUX_END_SEL_SHIFT)
849/* descriptor use CTL_AUX.ENDIANESS, packet use default */
850#define E1000_CTL_AUX_DES (0x1 << E1000_CTL_AUX_END_SEL_SHIFT)
851/* descriptor use default, packet use CTL_AUX.ENDIANESS */
852#define E1000_CTL_AUX_PKT (0x2 << E1000_CTL_AUX_END_SEL_SHIFT)
853/* all use CTL_AUX.ENDIANESS */
854#define E1000_CTL_AUX_ALL (0x3 << E1000_CTL_AUX_END_SEL_SHIFT)
855
856#define E1000_CTL_AUX_RGMII (0x0 << E1000_CTL_AUX_RGMII_RMII_SHIFT)
857#define E1000_CTL_AUX_RMII (0x1 << E1000_CTL_AUX_RGMII_RMII_SHIFT)
858
859/* LW little endian, Byte big endian */
860#define E1000_CTL_AUX_LWLE_BBE (0x0 << E1000_CTL_AUX_ENDIANESS_SHIFT)
861#define E1000_CTL_AUX_LWLE_BLE (0x1 << E1000_CTL_AUX_ENDIANESS_SHIFT)
862#define E1000_CTL_AUX_LWBE_BBE (0x2 << E1000_CTL_AUX_ENDIANESS_SHIFT)
863#define E1000_CTL_AUX_LWBE_BLE (0x3 << E1000_CTL_AUX_ENDIANESS_SHIFT)
864
823#define E1000_RCTL 0x00100 /* RX Control - RW */ 865#define E1000_RCTL 0x00100 /* RX Control - RW */
824#define E1000_RDTR1 0x02820 /* RX Delay Timer (1) - RW */ 866#define E1000_RDTR1 0x02820 /* RX Delay Timer (1) - RW */
825#define E1000_RDBAL1 0x02900 /* RX Descriptor Base Address Low (1) - RW */ 867#define E1000_RDBAL1 0x02900 /* RX Descriptor Base Address Low (1) - RW */
@@ -984,7 +1026,7 @@ struct e1000_ffvt_entry {
984 1026
985#define E1000_KUMCTRLSTA 0x00034 /* MAC-PHY interface - RW */ 1027#define E1000_KUMCTRLSTA 0x00034 /* MAC-PHY interface - RW */
986#define E1000_MDPHYA 0x0003C /* PHY address - RW */ 1028#define E1000_MDPHYA 0x0003C /* PHY address - RW */
987#define E1000_MANC2H 0x05860 /* Managment Control To Host - RW */ 1029#define E1000_MANC2H 0x05860 /* Management Control To Host - RW */
988#define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */ 1030#define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */
989 1031
990#define E1000_GCR 0x05B00 /* PCI-Ex Control */ 1032#define E1000_GCR 0x05B00 /* PCI-Ex Control */
@@ -1011,6 +1053,7 @@ struct e1000_ffvt_entry {
1011 * in more current versions of the 8254x. Despite the difference in location, 1053 * in more current versions of the 8254x. Despite the difference in location,
1012 * the registers function in the same manner. 1054 * the registers function in the same manner.
1013 */ 1055 */
1056#define E1000_82542_CTL_AUX E1000_CTL_AUX
1014#define E1000_82542_CTRL E1000_CTRL 1057#define E1000_82542_CTRL E1000_CTRL
1015#define E1000_82542_CTRL_DUP E1000_CTRL_DUP 1058#define E1000_82542_CTRL_DUP E1000_CTRL_DUP
1016#define E1000_82542_STATUS E1000_STATUS 1059#define E1000_82542_STATUS E1000_STATUS
@@ -1571,6 +1614,11 @@ struct e1000_hw {
1571#define E1000_MDIC_INT_EN 0x20000000 1614#define E1000_MDIC_INT_EN 0x20000000
1572#define E1000_MDIC_ERROR 0x40000000 1615#define E1000_MDIC_ERROR 0x40000000
1573 1616
1617#define INTEL_CE_GBE_MDIC_OP_WRITE 0x04000000
1618#define INTEL_CE_GBE_MDIC_OP_READ 0x00000000
1619#define INTEL_CE_GBE_MDIC_GO 0x80000000
1620#define INTEL_CE_GBE_MDIC_READ_ERROR 0x80000000
1621
1574#define E1000_KUMCTRLSTA_MASK 0x0000FFFF 1622#define E1000_KUMCTRLSTA_MASK 0x0000FFFF
1575#define E1000_KUMCTRLSTA_OFFSET 0x001F0000 1623#define E1000_KUMCTRLSTA_OFFSET 0x001F0000
1576#define E1000_KUMCTRLSTA_OFFSET_SHIFT 16 1624#define E1000_KUMCTRLSTA_OFFSET_SHIFT 16
@@ -2869,8 +2917,14 @@ struct e1000_host_command_info {
2869#define M88E1000_14_PHY_ID M88E1000_E_PHY_ID 2917#define M88E1000_14_PHY_ID M88E1000_E_PHY_ID
2870#define M88E1011_I_REV_4 0x04 2918#define M88E1011_I_REV_4 0x04
2871#define M88E1111_I_PHY_ID 0x01410CC0 2919#define M88E1111_I_PHY_ID 0x01410CC0
2920#define M88E1118_E_PHY_ID 0x01410E40
2872#define L1LXT971A_PHY_ID 0x001378E0 2921#define L1LXT971A_PHY_ID 0x001378E0
2873 2922
2923#define RTL8211B_PHY_ID 0x001CC910
2924#define RTL8201N_PHY_ID 0x8200
2925#define RTL_PHY_CTRL_FD 0x0100 /* Full duplex.0=half; 1=full */
2926#define RTL_PHY_CTRL_SPD_100 0x200000 /* Force 100Mb */
2927
2874/* Bits... 2928/* Bits...
2875 * 15-5: page 2929 * 15-5: page
2876 * 4-0: register offset 2930 * 4-0: register offset
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index 5cc39ed289c6..76e8af00d86d 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -28,10 +28,17 @@
28 28
29#include "e1000.h" 29#include "e1000.h"
30#include <net/ip6_checksum.h> 30#include <net/ip6_checksum.h>
31#include <linux/io.h>
32#include <linux/prefetch.h>
33
34/* Intel Media SOC GbE MDIO physical base address */
35static unsigned long ce4100_gbe_mdio_base_phy;
36/* Intel Media SOC GbE MDIO virtual base address */
37void __iomem *ce4100_gbe_mdio_base_virt;
31 38
32char e1000_driver_name[] = "e1000"; 39char e1000_driver_name[] = "e1000";
33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; 40static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34#define DRV_VERSION "7.3.21-k6-NAPI" 41#define DRV_VERSION "7.3.21-k8-NAPI"
35const char e1000_driver_version[] = DRV_VERSION; 42const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; 43static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
37 44
@@ -79,6 +86,7 @@ static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
79 INTEL_E1000_ETHERNET_DEVICE(0x108A), 86 INTEL_E1000_ETHERNET_DEVICE(0x108A),
80 INTEL_E1000_ETHERNET_DEVICE(0x1099), 87 INTEL_E1000_ETHERNET_DEVICE(0x1099),
81 INTEL_E1000_ETHERNET_DEVICE(0x10B5), 88 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
89 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
82 /* required last entry */ 90 /* required last entry */
83 {0,} 91 {0,}
84}; 92};
@@ -89,7 +97,6 @@ int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter); 97void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter); 98void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter); 99void e1000_reset(struct e1000_adapter *adapter);
92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); 100int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); 101int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter); 102void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
@@ -123,8 +130,10 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring); 130 struct e1000_rx_ring *rx_ring);
124static void e1000_set_rx_mode(struct net_device *netdev); 131static void e1000_set_rx_mode(struct net_device *netdev);
125static void e1000_update_phy_info(unsigned long data); 132static void e1000_update_phy_info(unsigned long data);
133static void e1000_update_phy_info_task(struct work_struct *work);
126static void e1000_watchdog(unsigned long data); 134static void e1000_watchdog(unsigned long data);
127static void e1000_82547_tx_fifo_stall(unsigned long data); 135static void e1000_82547_tx_fifo_stall(unsigned long data);
136static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 137static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev); 138 struct net_device *netdev);
130static struct net_device_stats * e1000_get_stats(struct net_device *netdev); 139static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
@@ -196,7 +205,7 @@ static struct pci_driver e1000_driver = {
196 .probe = e1000_probe, 205 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove), 206 .remove = __devexit_p(e1000_remove),
198#ifdef CONFIG_PM 207#ifdef CONFIG_PM
199 /* Power Managment Hooks */ 208 /* Power Management Hooks */
200 .suspend = e1000_suspend, 209 .suspend = e1000_suspend,
201 .resume = e1000_resume, 210 .resume = e1000_resume,
202#endif 211#endif
@@ -457,6 +466,7 @@ static void e1000_power_down_phy(struct e1000_adapter *adapter)
457 case e1000_82545: 466 case e1000_82545:
458 case e1000_82545_rev_3: 467 case e1000_82545_rev_3:
459 case e1000_82546: 468 case e1000_82546:
469 case e1000_ce4100:
460 case e1000_82546_rev_3: 470 case e1000_82546_rev_3:
461 case e1000_82541: 471 case e1000_82541:
462 case e1000_82541_rev_2: 472 case e1000_82541_rev_2:
@@ -483,9 +493,6 @@ void e1000_down(struct e1000_adapter *adapter)
483 struct net_device *netdev = adapter->netdev; 493 struct net_device *netdev = adapter->netdev;
484 u32 rctl, tctl; 494 u32 rctl, tctl;
485 495
486 /* signal that we're down so the interrupt handler does not
487 * reschedule our watchdog timer */
488 set_bit(__E1000_DOWN, &adapter->flags);
489 496
490 /* disable receives in the hardware */ 497 /* disable receives in the hardware */
491 rctl = er32(RCTL); 498 rctl = er32(RCTL);
@@ -506,6 +513,13 @@ void e1000_down(struct e1000_adapter *adapter)
506 513
507 e1000_irq_disable(adapter); 514 e1000_irq_disable(adapter);
508 515
516 /*
517 * Setting DOWN must be after irq_disable to prevent
518 * a screaming interrupt. Setting DOWN also prevents
519 * timers and tasks from rescheduling.
520 */
521 set_bit(__E1000_DOWN, &adapter->flags);
522
509 del_timer_sync(&adapter->tx_fifo_stall_timer); 523 del_timer_sync(&adapter->tx_fifo_stall_timer);
510 del_timer_sync(&adapter->watchdog_timer); 524 del_timer_sync(&adapter->watchdog_timer);
511 del_timer_sync(&adapter->phy_info_timer); 525 del_timer_sync(&adapter->phy_info_timer);
@@ -519,8 +533,21 @@ void e1000_down(struct e1000_adapter *adapter)
519 e1000_clean_all_rx_rings(adapter); 533 e1000_clean_all_rx_rings(adapter);
520} 534}
521 535
536static void e1000_reinit_safe(struct e1000_adapter *adapter)
537{
538 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
539 msleep(1);
540 rtnl_lock();
541 e1000_down(adapter);
542 e1000_up(adapter);
543 rtnl_unlock();
544 clear_bit(__E1000_RESETTING, &adapter->flags);
545}
546
522void e1000_reinit_locked(struct e1000_adapter *adapter) 547void e1000_reinit_locked(struct e1000_adapter *adapter)
523{ 548{
549 /* if rtnl_lock is not held the call path is bogus */
550 ASSERT_RTNL();
524 WARN_ON(in_interrupt()); 551 WARN_ON(in_interrupt());
525 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) 552 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
526 msleep(1); 553 msleep(1);
@@ -554,6 +581,7 @@ void e1000_reset(struct e1000_adapter *adapter)
554 case e1000_82545: 581 case e1000_82545:
555 case e1000_82545_rev_3: 582 case e1000_82545_rev_3:
556 case e1000_82546: 583 case e1000_82546:
584 case e1000_ce4100:
557 case e1000_82546_rev_3: 585 case e1000_82546_rev_3:
558 pba = E1000_PBA_48K; 586 pba = E1000_PBA_48K;
559 break; 587 break;
@@ -790,6 +818,70 @@ static const struct net_device_ops e1000_netdev_ops = {
790}; 818};
791 819
792/** 820/**
821 * e1000_init_hw_struct - initialize members of hw struct
822 * @adapter: board private struct
823 * @hw: structure used by e1000_hw.c
824 *
825 * Factors out initialization of the e1000_hw struct to its own function
826 * that can be called very early at init (just after struct allocation).
827 * Fields are initialized based on PCI device information and
828 * OS network device settings (MTU size).
829 * Returns negative error codes if MAC type setup fails.
830 */
831static int e1000_init_hw_struct(struct e1000_adapter *adapter,
832 struct e1000_hw *hw)
833{
834 struct pci_dev *pdev = adapter->pdev;
835
836 /* PCI config space info */
837 hw->vendor_id = pdev->vendor;
838 hw->device_id = pdev->device;
839 hw->subsystem_vendor_id = pdev->subsystem_vendor;
840 hw->subsystem_id = pdev->subsystem_device;
841 hw->revision_id = pdev->revision;
842
843 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
844
845 hw->max_frame_size = adapter->netdev->mtu +
846 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
847 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
848
849 /* identify the MAC */
850 if (e1000_set_mac_type(hw)) {
851 e_err(probe, "Unknown MAC Type\n");
852 return -EIO;
853 }
854
855 switch (hw->mac_type) {
856 default:
857 break;
858 case e1000_82541:
859 case e1000_82547:
860 case e1000_82541_rev_2:
861 case e1000_82547_rev_2:
862 hw->phy_init_script = 1;
863 break;
864 }
865
866 e1000_set_media_type(hw);
867 e1000_get_bus_info(hw);
868
869 hw->wait_autoneg_complete = false;
870 hw->tbi_compatibility_en = true;
871 hw->adaptive_ifs = true;
872
873 /* Copper options */
874
875 if (hw->media_type == e1000_media_type_copper) {
876 hw->mdix = AUTO_ALL_MODES;
877 hw->disable_polarity_correction = false;
878 hw->master_slave = E1000_MASTER_SLAVE;
879 }
880
881 return 0;
882}
883
884/**
793 * e1000_probe - Device Initialization Routine 885 * e1000_probe - Device Initialization Routine
794 * @pdev: PCI device information struct 886 * @pdev: PCI device information struct
795 * @ent: entry in e1000_pci_tbl 887 * @ent: entry in e1000_pci_tbl
@@ -811,6 +903,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
811 static int global_quad_port_a = 0; /* global ksp3 port a indication */ 903 static int global_quad_port_a = 0; /* global ksp3 port a indication */
812 int i, err, pci_using_dac; 904 int i, err, pci_using_dac;
813 u16 eeprom_data = 0; 905 u16 eeprom_data = 0;
906 u16 tmp = 0;
814 u16 eeprom_apme_mask = E1000_EEPROM_APME; 907 u16 eeprom_apme_mask = E1000_EEPROM_APME;
815 int bars, need_ioport; 908 int bars, need_ioport;
816 909
@@ -826,22 +919,6 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
826 if (err) 919 if (err)
827 return err; 920 return err;
828 921
829 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
830 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
831 pci_using_dac = 1;
832 } else {
833 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
834 if (err) {
835 err = dma_set_coherent_mask(&pdev->dev,
836 DMA_BIT_MASK(32));
837 if (err) {
838 pr_err("No usable DMA config, aborting\n");
839 goto err_dma;
840 }
841 }
842 pci_using_dac = 0;
843 }
844
845 err = pci_request_selected_regions(pdev, bars, e1000_driver_name); 922 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
846 if (err) 923 if (err)
847 goto err_pci_reg; 924 goto err_pci_reg;
@@ -885,6 +962,34 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
885 } 962 }
886 } 963 }
887 964
965 /* make ready for any if (hw->...) below */
966 err = e1000_init_hw_struct(adapter, hw);
967 if (err)
968 goto err_sw_init;
969
970 /*
971 * there is a workaround being applied below that limits
972 * 64-bit DMA addresses to 64-bit hardware. There are some
973 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
974 */
975 pci_using_dac = 0;
976 if ((hw->bus_type == e1000_bus_type_pcix) &&
977 !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
978 /*
979 * according to DMA-API-HOWTO, coherent calls will always
980 * succeed if the set call did
981 */
982 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
983 pci_using_dac = 1;
984 } else {
985 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
986 if (err) {
987 pr_err("No usable DMA config, aborting\n");
988 goto err_dma;
989 }
990 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
991 }
992
888 netdev->netdev_ops = &e1000_netdev_ops; 993 netdev->netdev_ops = &e1000_netdev_ops;
889 e1000_set_ethtool_ops(netdev); 994 e1000_set_ethtool_ops(netdev);
890 netdev->watchdog_timeo = 5 * HZ; 995 netdev->watchdog_timeo = 5 * HZ;
@@ -901,6 +1006,14 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
901 goto err_sw_init; 1006 goto err_sw_init;
902 1007
903 err = -EIO; 1008 err = -EIO;
1009 if (hw->mac_type == e1000_ce4100) {
1010 ce4100_gbe_mdio_base_phy = pci_resource_start(pdev, BAR_1);
1011 ce4100_gbe_mdio_base_virt = ioremap(ce4100_gbe_mdio_base_phy,
1012 pci_resource_len(pdev, BAR_1));
1013
1014 if (!ce4100_gbe_mdio_base_virt)
1015 goto err_mdio_ioremap;
1016 }
904 1017
905 if (hw->mac_type >= e1000_82543) { 1018 if (hw->mac_type >= e1000_82543) {
906 netdev->features = NETIF_F_SG | 1019 netdev->features = NETIF_F_SG |
@@ -914,8 +1027,10 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
914 (hw->mac_type != e1000_82547)) 1027 (hw->mac_type != e1000_82547))
915 netdev->features |= NETIF_F_TSO; 1028 netdev->features |= NETIF_F_TSO;
916 1029
917 if (pci_using_dac) 1030 if (pci_using_dac) {
918 netdev->features |= NETIF_F_HIGHDMA; 1031 netdev->features |= NETIF_F_HIGHDMA;
1032 netdev->vlan_features |= NETIF_F_HIGHDMA;
1033 }
919 1034
920 netdev->vlan_features |= NETIF_F_TSO; 1035 netdev->vlan_features |= NETIF_F_TSO;
921 netdev->vlan_features |= NETIF_F_HW_CSUM; 1036 netdev->vlan_features |= NETIF_F_HW_CSUM;
@@ -959,21 +1074,21 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
959 if (!is_valid_ether_addr(netdev->perm_addr)) 1074 if (!is_valid_ether_addr(netdev->perm_addr))
960 e_err(probe, "Invalid MAC Address\n"); 1075 e_err(probe, "Invalid MAC Address\n");
961 1076
962 e1000_get_bus_info(hw);
963
964 init_timer(&adapter->tx_fifo_stall_timer); 1077 init_timer(&adapter->tx_fifo_stall_timer);
965 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; 1078 adapter->tx_fifo_stall_timer.function = e1000_82547_tx_fifo_stall;
966 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter; 1079 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
967 1080
968 init_timer(&adapter->watchdog_timer); 1081 init_timer(&adapter->watchdog_timer);
969 adapter->watchdog_timer.function = &e1000_watchdog; 1082 adapter->watchdog_timer.function = e1000_watchdog;
970 adapter->watchdog_timer.data = (unsigned long) adapter; 1083 adapter->watchdog_timer.data = (unsigned long) adapter;
971 1084
972 init_timer(&adapter->phy_info_timer); 1085 init_timer(&adapter->phy_info_timer);
973 adapter->phy_info_timer.function = &e1000_update_phy_info; 1086 adapter->phy_info_timer.function = e1000_update_phy_info;
974 adapter->phy_info_timer.data = (unsigned long)adapter; 1087 adapter->phy_info_timer.data = (unsigned long)adapter;
975 1088
1089 INIT_WORK(&adapter->fifo_stall_task, e1000_82547_tx_fifo_stall_task);
976 INIT_WORK(&adapter->reset_task, e1000_reset_task); 1090 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1091 INIT_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
977 1092
978 e1000_check_options(adapter); 1093 e1000_check_options(adapter);
979 1094
@@ -1038,6 +1153,20 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
1038 adapter->wol = adapter->eeprom_wol; 1153 adapter->wol = adapter->eeprom_wol;
1039 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 1154 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1040 1155
1156 /* Auto detect PHY address */
1157 if (hw->mac_type == e1000_ce4100) {
1158 for (i = 0; i < 32; i++) {
1159 hw->phy_addr = i;
1160 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1161 if (tmp == 0 || tmp == 0xFF) {
1162 if (i == 31)
1163 goto err_eeprom;
1164 continue;
1165 } else
1166 break;
1167 }
1168 }
1169
1041 /* reset the hardware with the new settings */ 1170 /* reset the hardware with the new settings */
1042 e1000_reset(adapter); 1171 e1000_reset(adapter);
1043 1172
@@ -1072,14 +1201,16 @@ err_eeprom:
1072 iounmap(hw->flash_address); 1201 iounmap(hw->flash_address);
1073 kfree(adapter->tx_ring); 1202 kfree(adapter->tx_ring);
1074 kfree(adapter->rx_ring); 1203 kfree(adapter->rx_ring);
1204err_dma:
1075err_sw_init: 1205err_sw_init:
1206err_mdio_ioremap:
1207 iounmap(ce4100_gbe_mdio_base_virt);
1076 iounmap(hw->hw_addr); 1208 iounmap(hw->hw_addr);
1077err_ioremap: 1209err_ioremap:
1078 free_netdev(netdev); 1210 free_netdev(netdev);
1079err_alloc_etherdev: 1211err_alloc_etherdev:
1080 pci_release_selected_regions(pdev, bars); 1212 pci_release_selected_regions(pdev, bars);
1081err_pci_reg: 1213err_pci_reg:
1082err_dma:
1083 pci_disable_device(pdev); 1214 pci_disable_device(pdev);
1084 return err; 1215 return err;
1085} 1216}
@@ -1131,62 +1262,12 @@ static void __devexit e1000_remove(struct pci_dev *pdev)
1131 * @adapter: board private structure to initialize 1262 * @adapter: board private structure to initialize
1132 * 1263 *
1133 * e1000_sw_init initializes the Adapter private data structure. 1264 * e1000_sw_init initializes the Adapter private data structure.
1134 * Fields are initialized based on PCI device information and 1265 * e1000_init_hw_struct MUST be called before this function
1135 * OS network device settings (MTU size).
1136 **/ 1266 **/
1137 1267
1138static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 1268static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1139{ 1269{
1140 struct e1000_hw *hw = &adapter->hw;
1141 struct net_device *netdev = adapter->netdev;
1142 struct pci_dev *pdev = adapter->pdev;
1143
1144 /* PCI config space info */
1145
1146 hw->vendor_id = pdev->vendor;
1147 hw->device_id = pdev->device;
1148 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1149 hw->subsystem_id = pdev->subsystem_device;
1150 hw->revision_id = pdev->revision;
1151
1152 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1153
1154 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; 1270 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1155 hw->max_frame_size = netdev->mtu +
1156 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1157 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1158
1159 /* identify the MAC */
1160
1161 if (e1000_set_mac_type(hw)) {
1162 e_err(probe, "Unknown MAC Type\n");
1163 return -EIO;
1164 }
1165
1166 switch (hw->mac_type) {
1167 default:
1168 break;
1169 case e1000_82541:
1170 case e1000_82547:
1171 case e1000_82541_rev_2:
1172 case e1000_82547_rev_2:
1173 hw->phy_init_script = 1;
1174 break;
1175 }
1176
1177 e1000_set_media_type(hw);
1178
1179 hw->wait_autoneg_complete = false;
1180 hw->tbi_compatibility_en = true;
1181 hw->adaptive_ifs = true;
1182
1183 /* Copper options */
1184
1185 if (hw->media_type == e1000_media_type_copper) {
1186 hw->mdix = AUTO_ALL_MODES;
1187 hw->disable_polarity_correction = false;
1188 hw->master_slave = E1000_MASTER_SLAVE;
1189 }
1190 1271
1191 adapter->num_tx_queues = 1; 1272 adapter->num_tx_queues = 1;
1192 adapter->num_rx_queues = 1; 1273 adapter->num_rx_queues = 1;
@@ -1362,6 +1443,7 @@ static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1362 /* First rev 82545 and 82546 need to not allow any memory 1443 /* First rev 82545 and 82546 need to not allow any memory
1363 * write location to cross 64k boundary due to errata 23 */ 1444 * write location to cross 64k boundary due to errata 23 */
1364 if (hw->mac_type == e1000_82545 || 1445 if (hw->mac_type == e1000_82545 ||
1446 hw->mac_type == e1000_ce4100 ||
1365 hw->mac_type == e1000_82546) { 1447 hw->mac_type == e1000_82546) {
1366 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true; 1448 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1367 } 1449 }
@@ -1384,13 +1466,12 @@ static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1384 int size; 1466 int size;
1385 1467
1386 size = sizeof(struct e1000_buffer) * txdr->count; 1468 size = sizeof(struct e1000_buffer) * txdr->count;
1387 txdr->buffer_info = vmalloc(size); 1469 txdr->buffer_info = vzalloc(size);
1388 if (!txdr->buffer_info) { 1470 if (!txdr->buffer_info) {
1389 e_err(probe, "Unable to allocate memory for the Tx descriptor " 1471 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1390 "ring\n"); 1472 "ring\n");
1391 return -ENOMEM; 1473 return -ENOMEM;
1392 } 1474 }
1393 memset(txdr->buffer_info, 0, size);
1394 1475
1395 /* round up to nearest 4K */ 1476 /* round up to nearest 4K */
1396 1477
@@ -1580,13 +1661,12 @@ static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1580 int size, desc_len; 1661 int size, desc_len;
1581 1662
1582 size = sizeof(struct e1000_buffer) * rxdr->count; 1663 size = sizeof(struct e1000_buffer) * rxdr->count;
1583 rxdr->buffer_info = vmalloc(size); 1664 rxdr->buffer_info = vzalloc(size);
1584 if (!rxdr->buffer_info) { 1665 if (!rxdr->buffer_info) {
1585 e_err(probe, "Unable to allocate memory for the Rx descriptor " 1666 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1586 "ring\n"); 1667 "ring\n");
1587 return -ENOMEM; 1668 return -ENOMEM;
1588 } 1669 }
1589 memset(rxdr->buffer_info, 0, size);
1590 1670
1591 desc_len = sizeof(struct e1000_rx_desc); 1671 desc_len = sizeof(struct e1000_rx_desc);
1592 1672
@@ -2153,7 +2233,7 @@ static void e1000_set_rx_mode(struct net_device *netdev)
2153 * addresses take precedence to avoid disabling unicast filtering 2233 * addresses take precedence to avoid disabling unicast filtering
2154 * when possible. 2234 * when possible.
2155 * 2235 *
2156 * RAR 0 is used for the station MAC adddress 2236 * RAR 0 is used for the station MAC address
2157 * if there are not 14 addresses, go ahead and clear the filters 2237 * if there are not 14 addresses, go ahead and clear the filters
2158 */ 2238 */
2159 i = 1; 2239 i = 1;
@@ -2210,22 +2290,45 @@ static void e1000_set_rx_mode(struct net_device *netdev)
2210static void e1000_update_phy_info(unsigned long data) 2290static void e1000_update_phy_info(unsigned long data)
2211{ 2291{
2212 struct e1000_adapter *adapter = (struct e1000_adapter *)data; 2292 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2293 schedule_work(&adapter->phy_info_task);
2294}
2295
2296static void e1000_update_phy_info_task(struct work_struct *work)
2297{
2298 struct e1000_adapter *adapter = container_of(work,
2299 struct e1000_adapter,
2300 phy_info_task);
2213 struct e1000_hw *hw = &adapter->hw; 2301 struct e1000_hw *hw = &adapter->hw;
2302
2303 rtnl_lock();
2214 e1000_phy_get_info(hw, &adapter->phy_info); 2304 e1000_phy_get_info(hw, &adapter->phy_info);
2305 rtnl_unlock();
2215} 2306}
2216 2307
2217/** 2308/**
2218 * e1000_82547_tx_fifo_stall - Timer Call-back 2309 * e1000_82547_tx_fifo_stall - Timer Call-back
2219 * @data: pointer to adapter cast into an unsigned long 2310 * @data: pointer to adapter cast into an unsigned long
2220 **/ 2311 **/
2221
2222static void e1000_82547_tx_fifo_stall(unsigned long data) 2312static void e1000_82547_tx_fifo_stall(unsigned long data)
2223{ 2313{
2224 struct e1000_adapter *adapter = (struct e1000_adapter *)data; 2314 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2315 schedule_work(&adapter->fifo_stall_task);
2316}
2317
2318/**
2319 * e1000_82547_tx_fifo_stall_task - task to complete work
2320 * @work: work struct contained inside adapter struct
2321 **/
2322static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2323{
2324 struct e1000_adapter *adapter = container_of(work,
2325 struct e1000_adapter,
2326 fifo_stall_task);
2225 struct e1000_hw *hw = &adapter->hw; 2327 struct e1000_hw *hw = &adapter->hw;
2226 struct net_device *netdev = adapter->netdev; 2328 struct net_device *netdev = adapter->netdev;
2227 u32 tctl; 2329 u32 tctl;
2228 2330
2331 rtnl_lock();
2229 if (atomic_read(&adapter->tx_fifo_stall)) { 2332 if (atomic_read(&adapter->tx_fifo_stall)) {
2230 if ((er32(TDT) == er32(TDH)) && 2333 if ((er32(TDT) == er32(TDH)) &&
2231 (er32(TDFT) == er32(TDFH)) && 2334 (er32(TDFT) == er32(TDFH)) &&
@@ -2246,6 +2349,7 @@ static void e1000_82547_tx_fifo_stall(unsigned long data)
2246 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); 2349 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2247 } 2350 }
2248 } 2351 }
2352 rtnl_unlock();
2249} 2353}
2250 2354
2251bool e1000_has_link(struct e1000_adapter *adapter) 2355bool e1000_has_link(struct e1000_adapter *adapter)
@@ -2657,7 +2761,7 @@ static bool e1000_tx_csum(struct e1000_adapter *adapter,
2657 break; 2761 break;
2658 } 2762 }
2659 2763
2660 css = skb_transport_offset(skb); 2764 css = skb_checksum_start_offset(skb);
2661 2765
2662 i = tx_ring->next_to_use; 2766 i = tx_ring->next_to_use;
2663 buffer_info = &tx_ring->buffer_info[i]; 2767 buffer_info = &tx_ring->buffer_info[i];
@@ -3054,7 +3158,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3054 } 3158 }
3055 } 3159 }
3056 3160
3057 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { 3161 if (unlikely(vlan_tx_tag_present(skb))) {
3058 tx_flags |= E1000_TX_FLAGS_VLAN; 3162 tx_flags |= E1000_TX_FLAGS_VLAN;
3059 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 3163 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3060 } 3164 }
@@ -3113,7 +3217,7 @@ static void e1000_reset_task(struct work_struct *work)
3113 struct e1000_adapter *adapter = 3217 struct e1000_adapter *adapter =
3114 container_of(work, struct e1000_adapter, reset_task); 3218 container_of(work, struct e1000_adapter, reset_task);
3115 3219
3116 e1000_reinit_locked(adapter); 3220 e1000_reinit_safe(adapter);
3117} 3221}
3118 3222
3119/** 3223/**
@@ -3374,9 +3478,17 @@ static irqreturn_t e1000_intr(int irq, void *data)
3374 struct e1000_hw *hw = &adapter->hw; 3478 struct e1000_hw *hw = &adapter->hw;
3375 u32 icr = er32(ICR); 3479 u32 icr = er32(ICR);
3376 3480
3377 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags))) 3481 if (unlikely((!icr)))
3378 return IRQ_NONE; /* Not our interrupt */ 3482 return IRQ_NONE; /* Not our interrupt */
3379 3483
3484 /*
3485 * we might have caused the interrupt, but the above
3486 * read cleared it, and just in case the driver is
3487 * down there is nothing to do so return handled
3488 */
3489 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3490 return IRQ_HANDLED;
3491
3380 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { 3492 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3381 hw->get_link_status = 1; 3493 hw->get_link_status = 1;
3382 /* guard against interrupt when we're going down */ 3494 /* guard against interrupt when we're going down */
@@ -3535,7 +3647,7 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3535 adapter->total_tx_packets += total_tx_packets; 3647 adapter->total_tx_packets += total_tx_packets;
3536 netdev->stats.tx_bytes += total_tx_bytes; 3648 netdev->stats.tx_bytes += total_tx_bytes;
3537 netdev->stats.tx_packets += total_tx_packets; 3649 netdev->stats.tx_packets += total_tx_packets;
3538 return (count < tx_ring->count); 3650 return count < tx_ring->count;
3539} 3651}
3540 3652
3541/** 3653/**
@@ -3552,7 +3664,8 @@ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3552 struct e1000_hw *hw = &adapter->hw; 3664 struct e1000_hw *hw = &adapter->hw;
3553 u16 status = (u16)status_err; 3665 u16 status = (u16)status_err;
3554 u8 errors = (u8)(status_err >> 24); 3666 u8 errors = (u8)(status_err >> 24);
3555 skb->ip_summed = CHECKSUM_NONE; 3667
3668 skb_checksum_none_assert(skb);
3556 3669
3557 /* 82543 or newer only */ 3670 /* 82543 or newer only */
3558 if (unlikely(hw->mac_type < e1000_82543)) return; 3671 if (unlikely(hw->mac_type < e1000_82543)) return;
@@ -3598,13 +3711,14 @@ static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3598static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status, 3711static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3599 __le16 vlan, struct sk_buff *skb) 3712 __le16 vlan, struct sk_buff *skb)
3600{ 3713{
3601 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) { 3714 skb->protocol = eth_type_trans(skb, adapter->netdev);
3602 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, 3715
3603 le16_to_cpu(vlan) & 3716 if ((unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))))
3604 E1000_RXD_SPC_VLAN_MASK); 3717 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
3605 } else { 3718 le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK,
3606 netif_receive_skb(skb); 3719 skb);
3607 } 3720 else
3721 napi_gro_receive(&adapter->napi, skb);
3608} 3722}
3609 3723
3610/** 3724/**
@@ -3762,8 +3876,6 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3762 goto next_desc; 3876 goto next_desc;
3763 } 3877 }
3764 3878
3765 skb->protocol = eth_type_trans(skb, netdev);
3766
3767 e1000_receive_skb(adapter, status, rx_desc->special, skb); 3879 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3768 3880
3769next_desc: 3881next_desc:
@@ -3926,8 +4038,6 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3926 ((u32)(rx_desc->errors) << 24), 4038 ((u32)(rx_desc->errors) << 24),
3927 le16_to_cpu(rx_desc->csum), skb); 4039 le16_to_cpu(rx_desc->csum), skb);
3928 4040
3929 skb->protocol = eth_type_trans(skb, netdev);
3930
3931 e1000_receive_skb(adapter, status, rx_desc->special, skb); 4041 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3932 4042
3933next_desc: 4043next_desc:
@@ -4275,7 +4385,6 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4275 struct mii_ioctl_data *data = if_mii(ifr); 4385 struct mii_ioctl_data *data = if_mii(ifr);
4276 int retval; 4386 int retval;
4277 u16 mii_reg; 4387 u16 mii_reg;
4278 u16 spddplx;
4279 unsigned long flags; 4388 unsigned long flags;
4280 4389
4281 if (hw->media_type != e1000_media_type_copper) 4390 if (hw->media_type != e1000_media_type_copper)
@@ -4314,17 +4423,18 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4314 hw->autoneg = 1; 4423 hw->autoneg = 1;
4315 hw->autoneg_advertised = 0x2F; 4424 hw->autoneg_advertised = 0x2F;
4316 } else { 4425 } else {
4426 u32 speed;
4317 if (mii_reg & 0x40) 4427 if (mii_reg & 0x40)
4318 spddplx = SPEED_1000; 4428 speed = SPEED_1000;
4319 else if (mii_reg & 0x2000) 4429 else if (mii_reg & 0x2000)
4320 spddplx = SPEED_100; 4430 speed = SPEED_100;
4321 else 4431 else
4322 spddplx = SPEED_10; 4432 speed = SPEED_10;
4323 spddplx += (mii_reg & 0x100) 4433 retval = e1000_set_spd_dplx(
4324 ? DUPLEX_FULL : 4434 adapter, speed,
4325 DUPLEX_HALF; 4435 ((mii_reg & 0x100)
4326 retval = e1000_set_spd_dplx(adapter, 4436 ? DUPLEX_FULL :
4327 spddplx); 4437 DUPLEX_HALF));
4328 if (retval) 4438 if (retval)
4329 return retval; 4439 return retval;
4330 } 4440 }
@@ -4478,7 +4588,7 @@ static void e1000_restore_vlan(struct e1000_adapter *adapter)
4478 4588
4479 if (adapter->vlgrp) { 4589 if (adapter->vlgrp) {
4480 u16 vid; 4590 u16 vid;
4481 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 4591 for (vid = 0; vid < VLAN_N_VID; vid++) {
4482 if (!vlan_group_get_device(adapter->vlgrp, vid)) 4592 if (!vlan_group_get_device(adapter->vlgrp, vid))
4483 continue; 4593 continue;
4484 e1000_vlan_rx_add_vid(adapter->netdev, vid); 4594 e1000_vlan_rx_add_vid(adapter->netdev, vid);
@@ -4486,20 +4596,24 @@ static void e1000_restore_vlan(struct e1000_adapter *adapter)
4486 } 4596 }
4487} 4597}
4488 4598
4489int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx) 4599int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
4490{ 4600{
4491 struct e1000_hw *hw = &adapter->hw; 4601 struct e1000_hw *hw = &adapter->hw;
4492 4602
4493 hw->autoneg = 0; 4603 hw->autoneg = 0;
4494 4604
4605 /* Make sure dplx is at most 1 bit and lsb of speed is not set
4606 * for the switch() below to work */
4607 if ((spd & 1) || (dplx & ~1))
4608 goto err_inval;
4609
4495 /* Fiber NICs only allow 1000 gbps Full duplex */ 4610 /* Fiber NICs only allow 1000 gbps Full duplex */
4496 if ((hw->media_type == e1000_media_type_fiber) && 4611 if ((hw->media_type == e1000_media_type_fiber) &&
4497 spddplx != (SPEED_1000 + DUPLEX_FULL)) { 4612 spd != SPEED_1000 &&
4498 e_err(probe, "Unsupported Speed/Duplex configuration\n"); 4613 dplx != DUPLEX_FULL)
4499 return -EINVAL; 4614 goto err_inval;
4500 }
4501 4615
4502 switch (spddplx) { 4616 switch (spd + dplx) {
4503 case SPEED_10 + DUPLEX_HALF: 4617 case SPEED_10 + DUPLEX_HALF:
4504 hw->forced_speed_duplex = e1000_10_half; 4618 hw->forced_speed_duplex = e1000_10_half;
4505 break; 4619 break;
@@ -4518,10 +4632,13 @@ int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
4518 break; 4632 break;
4519 case SPEED_1000 + DUPLEX_HALF: /* not supported */ 4633 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4520 default: 4634 default:
4521 e_err(probe, "Unsupported Speed/Duplex configuration\n"); 4635 goto err_inval;
4522 return -EINVAL;
4523 } 4636 }
4524 return 0; 4637 return 0;
4638
4639err_inval:
4640 e_err(probe, "Unsupported Speed/Duplex configuration\n");
4641 return -EINVAL;
4525} 4642}
4526 4643
4527static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) 4644static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
diff --git a/drivers/net/e1000/e1000_osdep.h b/drivers/net/e1000/e1000_osdep.h
index edd1c75aa895..33e7c45a4fe4 100644
--- a/drivers/net/e1000/e1000_osdep.h
+++ b/drivers/net/e1000/e1000_osdep.h
@@ -34,12 +34,22 @@
34#ifndef _E1000_OSDEP_H_ 34#ifndef _E1000_OSDEP_H_
35#define _E1000_OSDEP_H_ 35#define _E1000_OSDEP_H_
36 36
37#include <linux/types.h>
38#include <linux/pci.h>
39#include <linux/delay.h>
40#include <asm/io.h> 37#include <asm/io.h>
41#include <linux/interrupt.h> 38
42#include <linux/sched.h> 39#define CONFIG_RAM_BASE 0x60000
40#define GBE_CONFIG_OFFSET 0x0
41
42#define GBE_CONFIG_RAM_BASE \
43 ((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET))
44
45#define GBE_CONFIG_BASE_VIRT \
46 ((void __iomem *)phys_to_virt(GBE_CONFIG_RAM_BASE))
47
48#define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \
49 (iowrite16_rep(base + offset, data, count))
50
51#define GBE_CONFIG_FLASH_READ(base, offset, count, data) \
52 (ioread16_rep(base + (offset << 1), data, count))
43 53
44#define er32(reg) \ 54#define er32(reg) \
45 (readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \ 55 (readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \
diff --git a/drivers/net/e1000/e1000_param.c b/drivers/net/e1000/e1000_param.c
index 10d8d98bb797..1301eba8b57a 100644
--- a/drivers/net/e1000/e1000_param.c
+++ b/drivers/net/e1000/e1000_param.c
@@ -352,12 +352,13 @@ void __devinit e1000_check_options(struct e1000_adapter *adapter)
352 } 352 }
353 { /* Flow Control */ 353 { /* Flow Control */
354 354
355 struct e1000_opt_list fc_list[] = 355 static const struct e1000_opt_list fc_list[] = {
356 {{ E1000_FC_NONE, "Flow Control Disabled" }, 356 { E1000_FC_NONE, "Flow Control Disabled" },
357 { E1000_FC_RX_PAUSE,"Flow Control Receive Only" }, 357 { E1000_FC_RX_PAUSE, "Flow Control Receive Only" },
358 { E1000_FC_TX_PAUSE,"Flow Control Transmit Only" }, 358 { E1000_FC_TX_PAUSE, "Flow Control Transmit Only" },
359 { E1000_FC_FULL, "Flow Control Enabled" }, 359 { E1000_FC_FULL, "Flow Control Enabled" },
360 { E1000_FC_DEFAULT, "Flow Control Hardware Default" }}; 360 { E1000_FC_DEFAULT, "Flow Control Hardware Default" }
361 };
361 362
362 opt = (struct e1000_option) { 363 opt = (struct e1000_option) {
363 .type = list_option, 364 .type = list_option,
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-02 20:29:56 -0400