5 files changed, 84 insertions, 33 deletions

diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index feb29c4526f7..4daffb284931 100644
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -233,6 +233,35 @@ static void bcm_sf2_eee_enable_set(struct dsa_switch *ds, int port, bool enable)
         core_writel(priv, reg, CORE_EEE_EN_CTRL);
 }
 
+static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, bool enable)
+{
+        struct bcm_sf2_priv *priv = ds_to_priv(ds);
+        u32 reg;
+
+        reg = reg_readl(priv, REG_SPHY_CNTRL);
+        if (enable) {
+                reg |= PHY_RESET;
+                reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS | CK25_DIS);
+                reg_writel(priv, reg, REG_SPHY_CNTRL);
+                udelay(21);
+                reg = reg_readl(priv, REG_SPHY_CNTRL);
+                reg &= ~PHY_RESET;
+        } else {
+                reg |= EXT_PWR_DOWN | IDDQ_BIAS | PHY_RESET;
+                reg_writel(priv, reg, REG_SPHY_CNTRL);
+                mdelay(1);
+                reg |= CK25_DIS;
+        }
+        reg_writel(priv, reg, REG_SPHY_CNTRL);
+
+        /* Use PHY-driven LED signaling */
+        if (!enable) {
+                reg = reg_readl(priv, REG_LED_CNTRL(0));
+                reg |= SPDLNK_SRC_SEL;
+                reg_writel(priv, reg, REG_LED_CNTRL(0));
+        }
+}
+
 static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,
                               struct phy_device *phy)
 {
@@ -248,6 +277,24 @@ static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,
         /* Clear the Rx and Tx disable bits and set to no spanning tree */
         core_writel(priv, 0, CORE_G_PCTL_PORT(port));
 
+        /* Re-enable the GPHY and re-apply workarounds */
+        if (port == 0 && priv->hw_params.num_gphy == 1) {
+                bcm_sf2_gphy_enable_set(ds, true);
+                if (phy) {
+                        /* if phy_stop() has been called before, phy
+                         * will be in halted state, and phy_start()
+                         * will call resume.
+                         *
+                         * the resume path does not configure back
+                         * autoneg settings, and since we hard reset
+                         * the phy manually here, we need to reset the
+                         * state machine also.
+                         */
+                        phy->state = PHY_READY;
+                        phy_init_hw(phy);
+                }
+        }
+
         /* Enable port 7 interrupts to get notified */
         if (port == 7)
                 intrl2_1_mask_clear(priv, P_IRQ_MASK(P7_IRQ_OFF));
@@ -281,6 +328,9 @@ static void bcm_sf2_port_disable(struct dsa_switch *ds, int port,
                 intrl2_1_writel(priv, P_IRQ_MASK(P7_IRQ_OFF), INTRL2_CPU_CLEAR);
         }
 
+        if (port == 0 && priv->hw_params.num_gphy == 1)
+                bcm_sf2_gphy_enable_set(ds, false);
+
         if (dsa_is_cpu_port(ds, port))
                 off = CORE_IMP_CTL;
         else
@@ -400,6 +450,16 @@ static int bcm_sf2_sw_rst(struct bcm_sf2_priv *priv)
         return 0;
 }
 
+static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv)
+{
+        intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
+        intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
+        intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
+        intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
+        intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
+        intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
+}
+
 static int bcm_sf2_sw_setup(struct dsa_switch *ds)
 {
         const char *reg_names[BCM_SF2_REGS_NUM] = BCM_SF2_REGS_NAME;
@@ -440,12 +500,7 @@ static int bcm_sf2_sw_setup(struct dsa_switch *ds)
         }
 
         /* Disable all interrupts and request them */
-        intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
-        intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
-        intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
-        intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
-        intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
-        intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
+        bcm_sf2_intr_disable(priv);
 
         ret = request_irq(priv->irq0, bcm_sf2_switch_0_isr, 0,
                           "switch_0", priv);
@@ -747,12 +802,7 @@ static int bcm_sf2_sw_suspend(struct dsa_switch *ds)
         struct bcm_sf2_priv *priv = ds_to_priv(ds);
         unsigned int port;
 
-        intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
-        intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
-        intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
-        intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
-        intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
-        intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
+        bcm_sf2_intr_disable(priv);
 
         /* Disable all ports physically present including the IMP
          * port, the other ones have already been disabled during
@@ -771,7 +821,6 @@ static int bcm_sf2_sw_resume(struct dsa_switch *ds)
 {
         struct bcm_sf2_priv *priv = ds_to_priv(ds);
         unsigned int port;
-        u32 reg;
         int ret;
 
         ret = bcm_sf2_sw_rst(priv);
@@ -780,17 +829,8 @@ static int bcm_sf2_sw_resume(struct dsa_switch *ds)
                 return ret;
         }
 
-        /* Reinitialize the single GPHY */
-        if (priv->hw_params.num_gphy == 1) {
-                reg = reg_readl(priv, REG_SPHY_CNTRL);
-                reg |= PHY_RESET;
-                reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS);
-                reg_writel(priv, reg, REG_SPHY_CNTRL);
-                udelay(21);
-                reg = reg_readl(priv, REG_SPHY_CNTRL);
-                reg &= ~PHY_RESET;
-                reg_writel(priv, reg, REG_SPHY_CNTRL);
-        }
+        if (priv->hw_params.num_gphy == 1)
+                bcm_sf2_gphy_enable_set(ds, true);
 
         for (port = 0; port < DSA_MAX_PORTS; port++) {
                 if ((1 << port) & ds->phys_port_mask)
diff --git a/drivers/net/dsa/bcm_sf2_regs.h b/drivers/net/dsa/bcm_sf2_regs.h
index 1bb49cb699ab..cabdfa5e217a 100644
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -61,6 +61,10 @@
 #define  LPI_COUNT_SHIFT                9
 #define  LPI_COUNT_MASK                 0x3F
 
+#define REG_LED_CNTRL_BASE              0x90
+#define REG_LED_CNTRL(x)                (REG_LED_CNTRL_BASE + (x) * 4)
+#define  SPDLNK_SRC_SEL                 (1 << 24)
+
 /* Register set relative to 'INTRL2_0' and 'INTRL2_1' */
 #define INTRL2_CPU_STATUS               0x00
 #define INTRL2_CPU_SET                  0x04
diff --git a/drivers/net/dsa/mv88e6131.c b/drivers/net/dsa/mv88e6131.c
index 1230f52aa70e..2540ef0142af 100644
--- a/drivers/net/dsa/mv88e6131.c
+++ b/drivers/net/dsa/mv88e6131.c
@@ -139,7 +139,8 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
                 int nexthop;
 
                 nexthop = 0x1f;
-                if (i != ds->index && i < ds->dst->pd->nr_chips)
+                if (ds->pd->rtable &&
+                    i != ds->index && i < ds->dst->pd->nr_chips)
                         nexthop = ds->pd->rtable[i] & 0x1f;
 
                 REG_WRITE(REG_GLOBAL2, 0x06, 0x8000 | (i << 8) | nexthop);
diff --git a/drivers/net/dsa/mv88e6352.c b/drivers/net/dsa/mv88e6352.c
index 258d9ef5ef25..e13adc7b3dda 100644
--- a/drivers/net/dsa/mv88e6352.c
+++ b/drivers/net/dsa/mv88e6352.c
@@ -22,17 +22,14 @@
 #include <net/dsa.h>
 #include "mv88e6xxx.h"
 
-static int mv88e6352_wait(struct dsa_switch *ds, int reg, u16 mask)
+static int mv88e6352_wait(struct dsa_switch *ds, int reg, int offset, u16 mask)
 {
         unsigned long timeout = jiffies + HZ / 10;
 
         while (time_before(jiffies, timeout)) {
                 int ret;
 
-                ret = REG_READ(REG_GLOBAL2, reg);
-                if (ret < 0)
-                        return ret;
-
+                ret = REG_READ(reg, offset);
                 if (!(ret & mask))
                         return 0;
 
@@ -43,17 +40,17 @@ static int mv88e6352_wait(struct dsa_switch *ds, int reg, u16 mask)
 
 static inline int mv88e6352_phy_wait(struct dsa_switch *ds)
 {
-        return mv88e6352_wait(ds, 0x18, 0x8000);
+        return mv88e6352_wait(ds, REG_GLOBAL2, 0x18, 0x8000);
 }
 
 static inline int mv88e6352_eeprom_load_wait(struct dsa_switch *ds)
 {
-        return mv88e6352_wait(ds, 0x14, 0x0800);
+        return mv88e6352_wait(ds, REG_GLOBAL2, 0x14, 0x0800);
 }
 
 static inline int mv88e6352_eeprom_busy_wait(struct dsa_switch *ds)
 {
-        return mv88e6352_wait(ds, 0x14, 0x8000);
+        return mv88e6352_wait(ds, REG_GLOBAL2, 0x14, 0x8000);
 }
 
 static int __mv88e6352_phy_read(struct dsa_switch *ds, int addr, int regnum)
diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c
index cd6807c6b4ed..3e7e31a6abb7 100644
--- a/drivers/net/dsa/mv88e6xxx.c
+++ b/drivers/net/dsa/mv88e6xxx.c
@@ -85,6 +85,12 @@ int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg)
         ret = __mv88e6xxx_reg_read(bus, ds->pd->sw_addr, addr, reg);
         mutex_unlock(&ps->smi_mutex);
 
+        if (ret < 0)
+                return ret;
+
+        dev_dbg(ds->master_dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
+                addr, reg, ret);
+
         return ret;
 }
 
@@ -128,6 +134,9 @@ int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
         if (bus == NULL)
                 return -EINVAL;
 
+        dev_dbg(ds->master_dev, "-> addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
+                addr, reg, val);
+
         mutex_lock(&ps->smi_mutex);
         ret = __mv88e6xxx_reg_write(bus, ds->pd->sw_addr, addr, reg, val);
         mutex_unlock(&ps->smi_mutex);