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path: root/drivers/net/chelsio/pm3393.c
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Diffstat (limited to 'drivers/net/chelsio/pm3393.c')
-rw-r--r--drivers/net/chelsio/pm3393.c31
1 files changed, 3 insertions, 28 deletions
diff --git a/drivers/net/chelsio/pm3393.c b/drivers/net/chelsio/pm3393.c
index a1d15eebe12c..63cabeb98afe 100644
--- a/drivers/net/chelsio/pm3393.c
+++ b/drivers/net/chelsio/pm3393.c
@@ -43,6 +43,8 @@
43#include "elmer0.h" 43#include "elmer0.h"
44#include "suni1x10gexp_regs.h" 44#include "suni1x10gexp_regs.h"
45 45
46#include <linux/crc32.h>
47
46#define OFFSET(REG_ADDR) (REG_ADDR << 2) 48#define OFFSET(REG_ADDR) (REG_ADDR << 2)
47 49
48/* Max frame size PM3393 can handle. Includes Ethernet header and CRC. */ 50/* Max frame size PM3393 can handle. Includes Ethernet header and CRC. */
@@ -345,33 +347,6 @@ static int pm3393_set_mtu(struct cmac *cmac, int mtu)
345 return 0; 347 return 0;
346} 348}
347 349
348static u32 calc_crc(u8 *b, int len)
349{
350 int i;
351 u32 crc = (u32)~0;
352
353 /* calculate crc one bit at a time */
354 while (len--) {
355 crc ^= *b++;
356 for (i = 0; i < 8; i++) {
357 if (crc & 0x1)
358 crc = (crc >> 1) ^ 0xedb88320;
359 else
360 crc = (crc >> 1);
361 }
362 }
363
364 /* reverse bits */
365 crc = ((crc >> 4) & 0x0f0f0f0f) | ((crc << 4) & 0xf0f0f0f0);
366 crc = ((crc >> 2) & 0x33333333) | ((crc << 2) & 0xcccccccc);
367 crc = ((crc >> 1) & 0x55555555) | ((crc << 1) & 0xaaaaaaaa);
368 /* swap bytes */
369 crc = (crc >> 16) | (crc << 16);
370 crc = (crc >> 8 & 0x00ff00ff) | (crc << 8 & 0xff00ff00);
371
372 return crc;
373}
374
375static int pm3393_set_rx_mode(struct cmac *cmac, struct t1_rx_mode *rm) 350static int pm3393_set_rx_mode(struct cmac *cmac, struct t1_rx_mode *rm)
376{ 351{
377 int enabled = cmac->instance->enabled & MAC_DIRECTION_RX; 352 int enabled = cmac->instance->enabled & MAC_DIRECTION_RX;
@@ -405,7 +380,7 @@ static int pm3393_set_rx_mode(struct cmac *cmac, struct t1_rx_mode *rm)
405 u16 mc_filter[4] = { 0, }; 380 u16 mc_filter[4] = { 0, };
406 381
407 while ((addr = t1_get_next_mcaddr(rm))) { 382 while ((addr = t1_get_next_mcaddr(rm))) {
408 bit = (calc_crc(addr, ETH_ALEN) >> 23) & 0x3f; /* bit[23:28] */ 383 bit = (ether_crc(ETH_ALEN, addr) >> 23) & 0x3f; /* bit[23:28] */
409 mc_filter[bit >> 4] |= 1 << (bit & 0xf); 384 mc_filter[bit >> 4] |= 1 << (bit & 0xf);
410 } 385 }
411 pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW, mc_filter[0]); 386 pmwrite(cmac, SUNI1x10GEXP_REG_RXXG_MULTICAST_HASH_LOW, mc_filter[0]);