diff options
Diffstat (limited to 'drivers/net/chelsio/cpl5_cmd.h')
| -rw-r--r-- | drivers/net/chelsio/cpl5_cmd.h | 145 |
1 files changed, 145 insertions, 0 deletions
diff --git a/drivers/net/chelsio/cpl5_cmd.h b/drivers/net/chelsio/cpl5_cmd.h new file mode 100644 index 000000000000..45e9248979f1 --- /dev/null +++ b/drivers/net/chelsio/cpl5_cmd.h | |||
| @@ -0,0 +1,145 @@ | |||
| 1 | /***************************************************************************** | ||
| 2 | * * | ||
| 3 | * File: cpl5_cmd.h * | ||
| 4 | * $Revision: 1.4 $ * | ||
| 5 | * $Date: 2005/03/23 07:15:58 $ * | ||
| 6 | * Description: * | ||
| 7 | * part of the Chelsio 10Gb Ethernet Driver. * | ||
| 8 | * * | ||
| 9 | * This program is free software; you can redistribute it and/or modify * | ||
| 10 | * it under the terms of the GNU General Public License, version 2, as * | ||
| 11 | * published by the Free Software Foundation. * | ||
| 12 | * * | ||
| 13 | * You should have received a copy of the GNU General Public License along * | ||
| 14 | * with this program; if not, write to the Free Software Foundation, Inc., * | ||
| 15 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * | ||
| 16 | * * | ||
| 17 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED * | ||
| 18 | * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF * | ||
| 19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * | ||
| 20 | * * | ||
| 21 | * http://www.chelsio.com * | ||
| 22 | * * | ||
| 23 | * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. * | ||
| 24 | * All rights reserved. * | ||
| 25 | * * | ||
| 26 | * Maintainers: maintainers@chelsio.com * | ||
| 27 | * * | ||
| 28 | * Authors: Dimitrios Michailidis <dm@chelsio.com> * | ||
| 29 | * Tina Yang <tainay@chelsio.com> * | ||
| 30 | * Felix Marti <felix@chelsio.com> * | ||
| 31 | * Scott Bardone <sbardone@chelsio.com> * | ||
| 32 | * Kurt Ottaway <kottaway@chelsio.com> * | ||
| 33 | * Frank DiMambro <frank@chelsio.com> * | ||
| 34 | * * | ||
| 35 | * History: * | ||
| 36 | * * | ||
| 37 | ****************************************************************************/ | ||
| 38 | |||
| 39 | #ifndef _CPL5_CMD_H | ||
| 40 | #define _CPL5_CMD_H | ||
| 41 | |||
| 42 | #include <asm/byteorder.h> | ||
| 43 | |||
| 44 | #if !defined(__LITTLE_ENDIAN_BITFIELD) && !defined(__BIG_ENDIAN_BITFIELD) | ||
| 45 | #error "Adjust your <asm/byteorder.h> defines" | ||
| 46 | #endif | ||
| 47 | |||
| 48 | enum CPL_opcode { | ||
| 49 | CPL_RX_PKT = 0xAD, | ||
| 50 | CPL_TX_PKT = 0xB2, | ||
| 51 | CPL_TX_PKT_LSO = 0xB6, | ||
| 52 | }; | ||
| 53 | |||
| 54 | enum { /* TX_PKT_LSO ethernet types */ | ||
| 55 | CPL_ETH_II, | ||
| 56 | CPL_ETH_II_VLAN, | ||
| 57 | CPL_ETH_802_3, | ||
| 58 | CPL_ETH_802_3_VLAN | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct cpl_rx_data { | ||
| 62 | __u32 rsvd0; | ||
| 63 | __u32 len; | ||
| 64 | __u32 seq; | ||
| 65 | __u16 urg; | ||
| 66 | __u8 rsvd1; | ||
| 67 | __u8 status; | ||
| 68 | }; | ||
| 69 | |||
| 70 | /* | ||
| 71 | * We want this header's alignment to be no more stringent than 2-byte aligned. | ||
| 72 | * All fields are u8 or u16 except for the length. However that field is not | ||
| 73 | * used so we break it into 2 16-bit parts to easily meet our alignment needs. | ||
| 74 | */ | ||
| 75 | struct cpl_tx_pkt { | ||
| 76 | __u8 opcode; | ||
| 77 | #if defined(__LITTLE_ENDIAN_BITFIELD) | ||
| 78 | __u8 iff:4; | ||
| 79 | __u8 ip_csum_dis:1; | ||
| 80 | __u8 l4_csum_dis:1; | ||
| 81 | __u8 vlan_valid:1; | ||
| 82 | __u8 rsvd:1; | ||
| 83 | #else | ||
| 84 | __u8 rsvd:1; | ||
| 85 | __u8 vlan_valid:1; | ||
| 86 | __u8 l4_csum_dis:1; | ||
| 87 | __u8 ip_csum_dis:1; | ||
| 88 | __u8 iff:4; | ||
| 89 | #endif | ||
| 90 | __u16 vlan; | ||
| 91 | __u16 len_hi; | ||
| 92 | __u16 len_lo; | ||
| 93 | }; | ||
| 94 | |||
| 95 | struct cpl_tx_pkt_lso { | ||
| 96 | __u8 opcode; | ||
| 97 | #if defined(__LITTLE_ENDIAN_BITFIELD) | ||
| 98 | __u8 iff:4; | ||
| 99 | __u8 ip_csum_dis:1; | ||
| 100 | __u8 l4_csum_dis:1; | ||
| 101 | __u8 vlan_valid:1; | ||
| 102 | __u8 rsvd:1; | ||
| 103 | #else | ||
| 104 | __u8 rsvd:1; | ||
| 105 | __u8 vlan_valid:1; | ||
| 106 | __u8 l4_csum_dis:1; | ||
| 107 | __u8 ip_csum_dis:1; | ||
| 108 | __u8 iff:4; | ||
| 109 | #endif | ||
| 110 | __u16 vlan; | ||
| 111 | __u32 len; | ||
| 112 | |||
| 113 | __u32 rsvd2; | ||
| 114 | __u8 rsvd3; | ||
| 115 | #if defined(__LITTLE_ENDIAN_BITFIELD) | ||
| 116 | __u8 tcp_hdr_words:4; | ||
| 117 | __u8 ip_hdr_words:4; | ||
| 118 | #else | ||
| 119 | __u8 ip_hdr_words:4; | ||
| 120 | __u8 tcp_hdr_words:4; | ||
| 121 | #endif | ||
| 122 | __u16 eth_type_mss; | ||
| 123 | }; | ||
| 124 | |||
| 125 | struct cpl_rx_pkt { | ||
| 126 | __u8 opcode; | ||
| 127 | #if defined(__LITTLE_ENDIAN_BITFIELD) | ||
| 128 | __u8 iff:4; | ||
| 129 | __u8 csum_valid:1; | ||
| 130 | __u8 bad_pkt:1; | ||
| 131 | __u8 vlan_valid:1; | ||
| 132 | __u8 rsvd:1; | ||
| 133 | #else | ||
| 134 | __u8 rsvd:1; | ||
| 135 | __u8 vlan_valid:1; | ||
| 136 | __u8 bad_pkt:1; | ||
| 137 | __u8 csum_valid:1; | ||
| 138 | __u8 iff:4; | ||
| 139 | #endif | ||
| 140 | __u16 csum; | ||
| 141 | __u16 vlan; | ||
| 142 | __u16 len; | ||
| 143 | }; | ||
| 144 | |||
| 145 | #endif | ||