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-rw-r--r--drivers/net/can/Kconfig37
-rw-r--r--drivers/net/can/Makefile4
-rw-r--r--drivers/net/can/at91_can.c237
-rw-r--r--drivers/net/can/c_can/Kconfig15
-rw-r--r--drivers/net/can/c_can/Makefile8
-rw-r--r--drivers/net/can/c_can/c_can.c1152
-rw-r--r--drivers/net/can/c_can/c_can.h86
-rw-r--r--drivers/net/can/c_can/c_can_platform.c216
-rw-r--r--drivers/net/can/flexcan.c8
-rw-r--r--drivers/net/can/janz-ican3.c19
-rw-r--r--drivers/net/can/mcp251x.c111
-rw-r--r--drivers/net/can/mscan/Kconfig2
-rw-r--r--drivers/net/can/mscan/mpc5xxx_can.c26
-rw-r--r--drivers/net/can/mscan/mscan.c4
-rw-r--r--drivers/net/can/pch_can.c1290
-rw-r--r--drivers/net/can/sja1000/Kconfig12
-rw-r--r--drivers/net/can/sja1000/Makefile1
-rw-r--r--drivers/net/can/sja1000/plx_pci.c2
-rw-r--r--drivers/net/can/sja1000/sja1000.c4
-rw-r--r--drivers/net/can/sja1000/sja1000_of_platform.c17
-rw-r--r--drivers/net/can/sja1000/tscan1.c216
-rw-r--r--drivers/net/can/slcan.c758
-rw-r--r--drivers/net/can/softing/Kconfig30
-rw-r--r--drivers/net/can/softing/Makefile6
-rw-r--r--drivers/net/can/softing/softing.h167
-rw-r--r--drivers/net/can/softing/softing_cs.c360
-rw-r--r--drivers/net/can/softing/softing_fw.c691
-rw-r--r--drivers/net/can/softing/softing_main.c894
-rw-r--r--drivers/net/can/softing/softing_platform.h40
-rw-r--r--drivers/net/can/ti_hecc.c2
-rw-r--r--drivers/net/can/usb/ems_usb.c2
-rw-r--r--drivers/net/can/usb/esd_usb2.c8
32 files changed, 6276 insertions, 149 deletions
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 9d9e45394433..754df5ef1729 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -12,10 +12,31 @@ config CAN_VCAN
12 This driver can also be built as a module. If so, the module 12 This driver can also be built as a module. If so, the module
13 will be called vcan. 13 will be called vcan.
14 14
15config CAN_SLCAN
16 tristate "Serial / USB serial CAN Adaptors (slcan)"
17 depends on CAN
18 default N
19 ---help---
20 CAN driver for several 'low cost' CAN interfaces that are attached
21 via serial lines or via USB-to-serial adapters using the LAWICEL
22 ASCII protocol. The driver implements the tty linediscipline N_SLCAN.
23
24 As only the sending and receiving of CAN frames is implemented, this
25 driver should work with the (serial/USB) CAN hardware from:
26 www.canusb.com / www.can232.com / www.mictronics.de / www.canhack.de
27
28 Userspace tools to attach the SLCAN line discipline (slcan_attach,
29 slcand) can be found in the can-utils at the SocketCAN SVN, see
30 http://developer.berlios.de/projects/socketcan for details.
31
32 The slcan driver supports up to 10 CAN netdevices by default which
33 can be changed by the 'maxdev=xx' module option. This driver can
34 also be built as a module. If so, the module will be called slcan.
35
15config CAN_DEV 36config CAN_DEV
16 tristate "Platform CAN drivers with Netlink support" 37 tristate "Platform CAN drivers with Netlink support"
17 depends on CAN 38 depends on CAN
18 default Y 39 default y
19 ---help--- 40 ---help---
20 Enables the common framework for platform CAN drivers with Netlink 41 Enables the common framework for platform CAN drivers with Netlink
21 support. This is the standard library for CAN drivers. 42 support. This is the standard library for CAN drivers.
@@ -24,7 +45,7 @@ config CAN_DEV
24config CAN_CALC_BITTIMING 45config CAN_CALC_BITTIMING
25 bool "CAN bit-timing calculation" 46 bool "CAN bit-timing calculation"
26 depends on CAN_DEV 47 depends on CAN_DEV
27 default Y 48 default y
28 ---help--- 49 ---help---
29 If enabled, CAN bit-timing parameters will be calculated for the 50 If enabled, CAN bit-timing parameters will be calculated for the
30 bit-rate specified via Netlink argument "bitrate" when the device 51 bit-rate specified via Netlink argument "bitrate" when the device
@@ -82,12 +103,24 @@ config CAN_FLEXCAN
82 ---help--- 103 ---help---
83 Say Y here if you want to support for Freescale FlexCAN. 104 Say Y here if you want to support for Freescale FlexCAN.
84 105
106config PCH_CAN
107 tristate "PCH CAN"
108 depends on CAN_DEV && PCI
109 ---help---
110 This driver is for PCH CAN of Topcliff which is an IOH for x86
111 embedded processor.
112 This driver can access CAN bus.
113
85source "drivers/net/can/mscan/Kconfig" 114source "drivers/net/can/mscan/Kconfig"
86 115
87source "drivers/net/can/sja1000/Kconfig" 116source "drivers/net/can/sja1000/Kconfig"
88 117
118source "drivers/net/can/c_can/Kconfig"
119
89source "drivers/net/can/usb/Kconfig" 120source "drivers/net/can/usb/Kconfig"
90 121
122source "drivers/net/can/softing/Kconfig"
123
91config CAN_DEBUG_DEVICES 124config CAN_DEBUG_DEVICES
92 bool "CAN devices debugging messages" 125 bool "CAN devices debugging messages"
93 depends on CAN 126 depends on CAN
diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
index 00575373bbd0..24ebfe8d758a 100644
--- a/drivers/net/can/Makefile
+++ b/drivers/net/can/Makefile
@@ -3,19 +3,23 @@
3# 3#
4 4
5obj-$(CONFIG_CAN_VCAN) += vcan.o 5obj-$(CONFIG_CAN_VCAN) += vcan.o
6obj-$(CONFIG_CAN_SLCAN) += slcan.o
6 7
7obj-$(CONFIG_CAN_DEV) += can-dev.o 8obj-$(CONFIG_CAN_DEV) += can-dev.o
8can-dev-y := dev.o 9can-dev-y := dev.o
9 10
10obj-y += usb/ 11obj-y += usb/
12obj-y += softing/
11 13
12obj-$(CONFIG_CAN_SJA1000) += sja1000/ 14obj-$(CONFIG_CAN_SJA1000) += sja1000/
13obj-$(CONFIG_CAN_MSCAN) += mscan/ 15obj-$(CONFIG_CAN_MSCAN) += mscan/
16obj-$(CONFIG_CAN_C_CAN) += c_can/
14obj-$(CONFIG_CAN_AT91) += at91_can.o 17obj-$(CONFIG_CAN_AT91) += at91_can.o
15obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o 18obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o
16obj-$(CONFIG_CAN_MCP251X) += mcp251x.o 19obj-$(CONFIG_CAN_MCP251X) += mcp251x.o
17obj-$(CONFIG_CAN_BFIN) += bfin_can.o 20obj-$(CONFIG_CAN_BFIN) += bfin_can.o
18obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-ican3.o 21obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-ican3.o
19obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o 22obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o
23obj-$(CONFIG_PCH_CAN) += pch_can.o
20 24
21ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG 25ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c
index 2d8bd86bc5e2..74efb5a2ad41 100644
--- a/drivers/net/can/at91_can.c
+++ b/drivers/net/can/at91_can.c
@@ -1,8 +1,8 @@
1/* 1/*
2 * at91_can.c - CAN network driver for AT91 SoC CAN controller 2 * at91_can.c - CAN network driver for AT91 SoC CAN controller
3 * 3 *
4 * (C) 2007 by Hans J. Koch <hjk@linutronix.de> 4 * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de>
5 * (C) 2008, 2009 by Marc Kleine-Budde <kernel@pengutronix.de> 5 * (C) 2008, 2009, 2010, 2011 by Marc Kleine-Budde <kernel@pengutronix.de>
6 * 6 *
7 * This software may be distributed under the terms of the GNU General 7 * This software may be distributed under the terms of the GNU General
8 * Public License ("GPL") version 2 as distributed in the 'COPYING' 8 * Public License ("GPL") version 2 as distributed in the 'COPYING'
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/netdevice.h> 31#include <linux/netdevice.h>
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/rtnetlink.h>
33#include <linux/skbuff.h> 34#include <linux/skbuff.h>
34#include <linux/spinlock.h> 35#include <linux/spinlock.h>
35#include <linux/string.h> 36#include <linux/string.h>
@@ -40,23 +41,23 @@
40 41
41#include <mach/board.h> 42#include <mach/board.h>
42 43
43#define DRV_NAME "at91_can" 44#define AT91_NAPI_WEIGHT 11
44#define AT91_NAPI_WEIGHT 12
45 45
46/* 46/*
47 * RX/TX Mailbox split 47 * RX/TX Mailbox split
48 * don't dare to touch 48 * don't dare to touch
49 */ 49 */
50#define AT91_MB_RX_NUM 12 50#define AT91_MB_RX_NUM 11
51#define AT91_MB_TX_SHIFT 2 51#define AT91_MB_TX_SHIFT 2
52 52
53#define AT91_MB_RX_FIRST 0 53#define AT91_MB_RX_FIRST 1
54#define AT91_MB_RX_LAST (AT91_MB_RX_FIRST + AT91_MB_RX_NUM - 1) 54#define AT91_MB_RX_LAST (AT91_MB_RX_FIRST + AT91_MB_RX_NUM - 1)
55 55
56#define AT91_MB_RX_MASK(i) ((1 << (i)) - 1) 56#define AT91_MB_RX_MASK(i) ((1 << (i)) - 1)
57#define AT91_MB_RX_SPLIT 8 57#define AT91_MB_RX_SPLIT 8
58#define AT91_MB_RX_LOW_LAST (AT91_MB_RX_SPLIT - 1) 58#define AT91_MB_RX_LOW_LAST (AT91_MB_RX_SPLIT - 1)
59#define AT91_MB_RX_LOW_MASK (AT91_MB_RX_MASK(AT91_MB_RX_SPLIT)) 59#define AT91_MB_RX_LOW_MASK (AT91_MB_RX_MASK(AT91_MB_RX_SPLIT) & \
60 ~AT91_MB_RX_MASK(AT91_MB_RX_FIRST))
60 61
61#define AT91_MB_TX_NUM (1 << AT91_MB_TX_SHIFT) 62#define AT91_MB_TX_NUM (1 << AT91_MB_TX_SHIFT)
62#define AT91_MB_TX_FIRST (AT91_MB_RX_LAST + 1) 63#define AT91_MB_TX_FIRST (AT91_MB_RX_LAST + 1)
@@ -169,9 +170,12 @@ struct at91_priv {
169 170
170 struct clk *clk; 171 struct clk *clk;
171 struct at91_can_data *pdata; 172 struct at91_can_data *pdata;
173
174 canid_t mb0_id;
172}; 175};
173 176
174static struct can_bittiming_const at91_bittiming_const = { 177static struct can_bittiming_const at91_bittiming_const = {
178 .name = KBUILD_MODNAME,
175 .tseg1_min = 4, 179 .tseg1_min = 4,
176 .tseg1_max = 16, 180 .tseg1_max = 16,
177 .tseg2_min = 2, 181 .tseg2_min = 2,
@@ -199,13 +203,13 @@ static inline int get_tx_echo_mb(const struct at91_priv *priv)
199 203
200static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg) 204static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg)
201{ 205{
202 return readl(priv->reg_base + reg); 206 return __raw_readl(priv->reg_base + reg);
203} 207}
204 208
205static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg, 209static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg,
206 u32 value) 210 u32 value)
207{ 211{
208 writel(value, priv->reg_base + reg); 212 __raw_writel(value, priv->reg_base + reg);
209} 213}
210 214
211static inline void set_mb_mode_prio(const struct at91_priv *priv, 215static inline void set_mb_mode_prio(const struct at91_priv *priv,
@@ -220,6 +224,18 @@ static inline void set_mb_mode(const struct at91_priv *priv, unsigned int mb,
220 set_mb_mode_prio(priv, mb, mode, 0); 224 set_mb_mode_prio(priv, mb, mode, 0);
221} 225}
222 226
227static inline u32 at91_can_id_to_reg_mid(canid_t can_id)
228{
229 u32 reg_mid;
230
231 if (can_id & CAN_EFF_FLAG)
232 reg_mid = (can_id & CAN_EFF_MASK) | AT91_MID_MIDE;
233 else
234 reg_mid = (can_id & CAN_SFF_MASK) << 18;
235
236 return reg_mid;
237}
238
223/* 239/*
224 * Swtich transceiver on or off 240 * Swtich transceiver on or off
225 */ 241 */
@@ -233,22 +249,39 @@ static void at91_setup_mailboxes(struct net_device *dev)
233{ 249{
234 struct at91_priv *priv = netdev_priv(dev); 250 struct at91_priv *priv = netdev_priv(dev);
235 unsigned int i; 251 unsigned int i;
252 u32 reg_mid;
236 253
237 /* 254 /*
238 * The first 12 mailboxes are used as a reception FIFO. The 255 * Due to a chip bug (errata 50.2.6.3 & 50.3.5.3) the first
239 * last mailbox is configured with overwrite option. The 256 * mailbox is disabled. The next 11 mailboxes are used as a
240 * overwrite flag indicates a FIFO overflow. 257 * reception FIFO. The last mailbox is configured with
258 * overwrite option. The overwrite flag indicates a FIFO
259 * overflow.
241 */ 260 */
261 reg_mid = at91_can_id_to_reg_mid(priv->mb0_id);
262 for (i = 0; i < AT91_MB_RX_FIRST; i++) {
263 set_mb_mode(priv, i, AT91_MB_MODE_DISABLED);
264 at91_write(priv, AT91_MID(i), reg_mid);
265 at91_write(priv, AT91_MCR(i), 0x0); /* clear dlc */
266 }
267
242 for (i = AT91_MB_RX_FIRST; i < AT91_MB_RX_LAST; i++) 268 for (i = AT91_MB_RX_FIRST; i < AT91_MB_RX_LAST; i++)
243 set_mb_mode(priv, i, AT91_MB_MODE_RX); 269 set_mb_mode(priv, i, AT91_MB_MODE_RX);
244 set_mb_mode(priv, AT91_MB_RX_LAST, AT91_MB_MODE_RX_OVRWR); 270 set_mb_mode(priv, AT91_MB_RX_LAST, AT91_MB_MODE_RX_OVRWR);
245 271
272 /* reset acceptance mask and id register */
273 for (i = AT91_MB_RX_FIRST; i <= AT91_MB_RX_LAST; i++) {
274 at91_write(priv, AT91_MAM(i), 0x0 );
275 at91_write(priv, AT91_MID(i), AT91_MID_MIDE);
276 }
277
246 /* The last 4 mailboxes are used for transmitting. */ 278 /* The last 4 mailboxes are used for transmitting. */
247 for (i = AT91_MB_TX_FIRST; i <= AT91_MB_TX_LAST; i++) 279 for (i = AT91_MB_TX_FIRST; i <= AT91_MB_TX_LAST; i++)
248 set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0); 280 set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0);
249 281
250 /* Reset tx and rx helper pointers */ 282 /* Reset tx and rx helper pointers */
251 priv->tx_next = priv->tx_echo = priv->rx_next = 0; 283 priv->tx_next = priv->tx_echo = 0;
284 priv->rx_next = AT91_MB_RX_FIRST;
252} 285}
253 286
254static int at91_set_bittiming(struct net_device *dev) 287static int at91_set_bittiming(struct net_device *dev)
@@ -257,18 +290,30 @@ static int at91_set_bittiming(struct net_device *dev)
257 const struct can_bittiming *bt = &priv->can.bittiming; 290 const struct can_bittiming *bt = &priv->can.bittiming;
258 u32 reg_br; 291 u32 reg_br;
259 292
260 reg_br = ((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) << 24) | 293 reg_br = ((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 << 24 : 0) |
261 ((bt->brp - 1) << 16) | ((bt->sjw - 1) << 12) | 294 ((bt->brp - 1) << 16) | ((bt->sjw - 1) << 12) |
262 ((bt->prop_seg - 1) << 8) | ((bt->phase_seg1 - 1) << 4) | 295 ((bt->prop_seg - 1) << 8) | ((bt->phase_seg1 - 1) << 4) |
263 ((bt->phase_seg2 - 1) << 0); 296 ((bt->phase_seg2 - 1) << 0);
264 297
265 dev_info(dev->dev.parent, "writing AT91_BR: 0x%08x\n", reg_br); 298 netdev_info(dev, "writing AT91_BR: 0x%08x\n", reg_br);
266 299
267 at91_write(priv, AT91_BR, reg_br); 300 at91_write(priv, AT91_BR, reg_br);
268 301
269 return 0; 302 return 0;
270} 303}
271 304
305static int at91_get_berr_counter(const struct net_device *dev,
306 struct can_berr_counter *bec)
307{
308 const struct at91_priv *priv = netdev_priv(dev);
309 u32 reg_ecr = at91_read(priv, AT91_ECR);
310
311 bec->rxerr = reg_ecr & 0xff;
312 bec->txerr = reg_ecr >> 16;
313
314 return 0;
315}
316
272static void at91_chip_start(struct net_device *dev) 317static void at91_chip_start(struct net_device *dev)
273{ 318{
274 struct at91_priv *priv = netdev_priv(dev); 319 struct at91_priv *priv = netdev_priv(dev);
@@ -281,6 +326,7 @@ static void at91_chip_start(struct net_device *dev)
281 reg_mr = at91_read(priv, AT91_MR); 326 reg_mr = at91_read(priv, AT91_MR);
282 at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN); 327 at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN);
283 328
329 at91_set_bittiming(dev);
284 at91_setup_mailboxes(dev); 330 at91_setup_mailboxes(dev);
285 at91_transceiver_switch(priv, 1); 331 at91_transceiver_switch(priv, 1);
286 332
@@ -350,16 +396,10 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
350 if (unlikely(!(at91_read(priv, AT91_MSR(mb)) & AT91_MSR_MRDY))) { 396 if (unlikely(!(at91_read(priv, AT91_MSR(mb)) & AT91_MSR_MRDY))) {
351 netif_stop_queue(dev); 397 netif_stop_queue(dev);
352 398
353 dev_err(dev->dev.parent, 399 netdev_err(dev, "BUG! TX buffer full when queue awake!\n");
354 "BUG! TX buffer full when queue awake!\n");
355 return NETDEV_TX_BUSY; 400 return NETDEV_TX_BUSY;
356 } 401 }
357 402 reg_mid = at91_can_id_to_reg_mid(cf->can_id);
358 if (cf->can_id & CAN_EFF_FLAG)
359 reg_mid = (cf->can_id & CAN_EFF_MASK) | AT91_MID_MIDE;
360 else
361 reg_mid = (cf->can_id & CAN_SFF_MASK) << 18;
362
363 reg_mcr = ((cf->can_id & CAN_RTR_FLAG) ? AT91_MCR_MRTR : 0) | 403 reg_mcr = ((cf->can_id & CAN_RTR_FLAG) ? AT91_MCR_MRTR : 0) |
364 (cf->can_dlc << 16) | AT91_MCR_MTCR; 404 (cf->can_dlc << 16) | AT91_MCR_MTCR;
365 405
@@ -376,7 +416,7 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
376 416
377 stats->tx_bytes += cf->can_dlc; 417 stats->tx_bytes += cf->can_dlc;
378 418
379 /* _NOTE_: substract AT91_MB_TX_FIRST offset from mb! */ 419 /* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */
380 can_put_echo_skb(skb, dev, mb - AT91_MB_TX_FIRST); 420 can_put_echo_skb(skb, dev, mb - AT91_MB_TX_FIRST);
381 421
382 /* 422 /*
@@ -435,7 +475,7 @@ static void at91_rx_overflow_err(struct net_device *dev)
435 struct sk_buff *skb; 475 struct sk_buff *skb;
436 struct can_frame *cf; 476 struct can_frame *cf;
437 477
438 dev_dbg(dev->dev.parent, "RX buffer overflow\n"); 478 netdev_dbg(dev, "RX buffer overflow\n");
439 stats->rx_over_errors++; 479 stats->rx_over_errors++;
440 stats->rx_errors++; 480 stats->rx_errors++;
441 481
@@ -480,6 +520,9 @@ static void at91_read_mb(struct net_device *dev, unsigned int mb,
480 *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb)); 520 *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb));
481 *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb)); 521 *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb));
482 522
523 /* allow RX of extended frames */
524 at91_write(priv, AT91_MID(mb), AT91_MID_MIDE);
525
483 if (unlikely(mb == AT91_MB_RX_LAST && reg_msr & AT91_MSR_MMI)) 526 if (unlikely(mb == AT91_MB_RX_LAST && reg_msr & AT91_MSR_MMI))
484 at91_rx_overflow_err(dev); 527 at91_rx_overflow_err(dev);
485} 528}
@@ -518,27 +561,31 @@ static void at91_read_msg(struct net_device *dev, unsigned int mb)
518 * 561 *
519 * Theory of Operation: 562 * Theory of Operation:
520 * 563 *
521 * 12 of the 16 mailboxes on the chip are reserved for RX. we split 564 * 11 of the 16 mailboxes on the chip are reserved for RX. we split
522 * them into 2 groups. The lower group holds 8 and upper 4 mailboxes. 565 * them into 2 groups. The lower group holds 7 and upper 4 mailboxes.
523 * 566 *
524 * Like it or not, but the chip always saves a received CAN message 567 * Like it or not, but the chip always saves a received CAN message
525 * into the first free mailbox it finds (starting with the 568 * into the first free mailbox it finds (starting with the
526 * lowest). This makes it very difficult to read the messages in the 569 * lowest). This makes it very difficult to read the messages in the
527 * right order from the chip. This is how we work around that problem: 570 * right order from the chip. This is how we work around that problem:
528 * 571 *
529 * The first message goes into mb nr. 0 and issues an interrupt. All 572 * The first message goes into mb nr. 1 and issues an interrupt. All
530 * rx ints are disabled in the interrupt handler and a napi poll is 573 * rx ints are disabled in the interrupt handler and a napi poll is
531 * scheduled. We read the mailbox, but do _not_ reenable the mb (to 574 * scheduled. We read the mailbox, but do _not_ reenable the mb (to
532 * receive another message). 575 * receive another message).
533 * 576 *
534 * lower mbxs upper 577 * lower mbxs upper
535 * ______^______ __^__ 578 * ____^______ __^__
536 * / \ / \ 579 * / \ / \
537 * +-+-+-+-+-+-+-+-++-+-+-+-+ 580 * +-+-+-+-+-+-+-+-++-+-+-+-+
538 * |x|x|x|x|x|x|x|x|| | | | | 581 * | |x|x|x|x|x|x|x|| | | | |
539 * +-+-+-+-+-+-+-+-++-+-+-+-+ 582 * +-+-+-+-+-+-+-+-++-+-+-+-+
540 * 0 0 0 0 0 0 0 0 0 0 1 1 \ mail 583 * 0 0 0 0 0 0 0 0 0 0 1 1 \ mail
541 * 0 1 2 3 4 5 6 7 8 9 0 1 / box 584 * 0 1 2 3 4 5 6 7 8 9 0 1 / box
585 * ^
586 * |
587 * \
588 * unused, due to chip bug
542 * 589 *
543 * The variable priv->rx_next points to the next mailbox to read a 590 * The variable priv->rx_next points to the next mailbox to read a
544 * message from. As long we're in the lower mailboxes we just read the 591 * message from. As long we're in the lower mailboxes we just read the
@@ -565,14 +612,14 @@ static int at91_poll_rx(struct net_device *dev, int quota)
565 612
566 if (priv->rx_next > AT91_MB_RX_LOW_LAST && 613 if (priv->rx_next > AT91_MB_RX_LOW_LAST &&
567 reg_sr & AT91_MB_RX_LOW_MASK) 614 reg_sr & AT91_MB_RX_LOW_MASK)
568 dev_info(dev->dev.parent, 615 netdev_info(dev,
569 "order of incoming frames cannot be guaranteed\n"); 616 "order of incoming frames cannot be guaranteed\n");
570 617
571 again: 618 again:
572 for (mb = find_next_bit(addr, AT91_MB_RX_NUM, priv->rx_next); 619 for (mb = find_next_bit(addr, AT91_MB_RX_LAST + 1, priv->rx_next);
573 mb < AT91_MB_RX_NUM && quota > 0; 620 mb < AT91_MB_RX_LAST + 1 && quota > 0;
574 reg_sr = at91_read(priv, AT91_SR), 621 reg_sr = at91_read(priv, AT91_SR),
575 mb = find_next_bit(addr, AT91_MB_RX_NUM, ++priv->rx_next)) { 622 mb = find_next_bit(addr, AT91_MB_RX_LAST + 1, ++priv->rx_next)) {
576 at91_read_msg(dev, mb); 623 at91_read_msg(dev, mb);
577 624
578 /* reactivate mailboxes */ 625 /* reactivate mailboxes */
@@ -589,8 +636,8 @@ static int at91_poll_rx(struct net_device *dev, int quota)
589 636
590 /* upper group completed, look again in lower */ 637 /* upper group completed, look again in lower */
591 if (priv->rx_next > AT91_MB_RX_LOW_LAST && 638 if (priv->rx_next > AT91_MB_RX_LOW_LAST &&
592 quota > 0 && mb >= AT91_MB_RX_NUM) { 639 quota > 0 && mb > AT91_MB_RX_LAST) {
593 priv->rx_next = 0; 640 priv->rx_next = AT91_MB_RX_FIRST;
594 goto again; 641 goto again;
595 } 642 }
596 643
@@ -604,7 +651,7 @@ static void at91_poll_err_frame(struct net_device *dev,
604 651
605 /* CRC error */ 652 /* CRC error */
606 if (reg_sr & AT91_IRQ_CERR) { 653 if (reg_sr & AT91_IRQ_CERR) {
607 dev_dbg(dev->dev.parent, "CERR irq\n"); 654 netdev_dbg(dev, "CERR irq\n");
608 dev->stats.rx_errors++; 655 dev->stats.rx_errors++;
609 priv->can.can_stats.bus_error++; 656 priv->can.can_stats.bus_error++;
610 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 657 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
@@ -612,7 +659,7 @@ static void at91_poll_err_frame(struct net_device *dev,
612 659
613 /* Stuffing Error */ 660 /* Stuffing Error */
614 if (reg_sr & AT91_IRQ_SERR) { 661 if (reg_sr & AT91_IRQ_SERR) {
615 dev_dbg(dev->dev.parent, "SERR irq\n"); 662 netdev_dbg(dev, "SERR irq\n");
616 dev->stats.rx_errors++; 663 dev->stats.rx_errors++;
617 priv->can.can_stats.bus_error++; 664 priv->can.can_stats.bus_error++;
618 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 665 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
@@ -621,14 +668,14 @@ static void at91_poll_err_frame(struct net_device *dev,
621 668
622 /* Acknowledgement Error */ 669 /* Acknowledgement Error */
623 if (reg_sr & AT91_IRQ_AERR) { 670 if (reg_sr & AT91_IRQ_AERR) {
624 dev_dbg(dev->dev.parent, "AERR irq\n"); 671 netdev_dbg(dev, "AERR irq\n");
625 dev->stats.tx_errors++; 672 dev->stats.tx_errors++;
626 cf->can_id |= CAN_ERR_ACK; 673 cf->can_id |= CAN_ERR_ACK;
627 } 674 }
628 675
629 /* Form error */ 676 /* Form error */
630 if (reg_sr & AT91_IRQ_FERR) { 677 if (reg_sr & AT91_IRQ_FERR) {
631 dev_dbg(dev->dev.parent, "FERR irq\n"); 678 netdev_dbg(dev, "FERR irq\n");
632 dev->stats.rx_errors++; 679 dev->stats.rx_errors++;
633 priv->can.can_stats.bus_error++; 680 priv->can.can_stats.bus_error++;
634 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 681 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
@@ -637,7 +684,7 @@ static void at91_poll_err_frame(struct net_device *dev,
637 684
638 /* Bit Error */ 685 /* Bit Error */
639 if (reg_sr & AT91_IRQ_BERR) { 686 if (reg_sr & AT91_IRQ_BERR) {
640 dev_dbg(dev->dev.parent, "BERR irq\n"); 687 netdev_dbg(dev, "BERR irq\n");
641 dev->stats.tx_errors++; 688 dev->stats.tx_errors++;
642 priv->can.can_stats.bus_error++; 689 priv->can.can_stats.bus_error++;
643 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 690 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
@@ -735,7 +782,7 @@ static void at91_irq_tx(struct net_device *dev, u32 reg_sr)
735 reg_msr = at91_read(priv, AT91_MSR(mb)); 782 reg_msr = at91_read(priv, AT91_MSR(mb));
736 if (likely(reg_msr & AT91_MSR_MRDY && 783 if (likely(reg_msr & AT91_MSR_MRDY &&
737 ~reg_msr & AT91_MSR_MABT)) { 784 ~reg_msr & AT91_MSR_MABT)) {
738 /* _NOTE_: substract AT91_MB_TX_FIRST offset from mb! */ 785 /* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */
739 can_get_echo_skb(dev, mb - AT91_MB_TX_FIRST); 786 can_get_echo_skb(dev, mb - AT91_MB_TX_FIRST);
740 dev->stats.tx_packets++; 787 dev->stats.tx_packets++;
741 } 788 }
@@ -755,12 +802,10 @@ static void at91_irq_err_state(struct net_device *dev,
755 struct can_frame *cf, enum can_state new_state) 802 struct can_frame *cf, enum can_state new_state)
756{ 803{
757 struct at91_priv *priv = netdev_priv(dev); 804 struct at91_priv *priv = netdev_priv(dev);
758 u32 reg_idr, reg_ier, reg_ecr; 805 u32 reg_idr = 0, reg_ier = 0;
759 u8 tec, rec; 806 struct can_berr_counter bec;
760 807
761 reg_ecr = at91_read(priv, AT91_ECR); 808 at91_get_berr_counter(dev, &bec);
762 rec = reg_ecr & 0xff;
763 tec = reg_ecr >> 16;
764 809
765 switch (priv->can.state) { 810 switch (priv->can.state) {
766 case CAN_STATE_ERROR_ACTIVE: 811 case CAN_STATE_ERROR_ACTIVE:
@@ -771,11 +816,11 @@ static void at91_irq_err_state(struct net_device *dev,
771 */ 816 */
772 if (new_state >= CAN_STATE_ERROR_WARNING && 817 if (new_state >= CAN_STATE_ERROR_WARNING &&
773 new_state <= CAN_STATE_BUS_OFF) { 818 new_state <= CAN_STATE_BUS_OFF) {
774 dev_dbg(dev->dev.parent, "Error Warning IRQ\n"); 819 netdev_dbg(dev, "Error Warning IRQ\n");
775 priv->can.can_stats.error_warning++; 820 priv->can.can_stats.error_warning++;
776 821
777 cf->can_id |= CAN_ERR_CRTL; 822 cf->can_id |= CAN_ERR_CRTL;
778 cf->data[1] = (tec > rec) ? 823 cf->data[1] = (bec.txerr > bec.rxerr) ?
779 CAN_ERR_CRTL_TX_WARNING : 824 CAN_ERR_CRTL_TX_WARNING :
780 CAN_ERR_CRTL_RX_WARNING; 825 CAN_ERR_CRTL_RX_WARNING;
781 } 826 }
@@ -787,11 +832,11 @@ static void at91_irq_err_state(struct net_device *dev,
787 */ 832 */
788 if (new_state >= CAN_STATE_ERROR_PASSIVE && 833 if (new_state >= CAN_STATE_ERROR_PASSIVE &&
789 new_state <= CAN_STATE_BUS_OFF) { 834 new_state <= CAN_STATE_BUS_OFF) {
790 dev_dbg(dev->dev.parent, "Error Passive IRQ\n"); 835 netdev_dbg(dev, "Error Passive IRQ\n");
791 priv->can.can_stats.error_passive++; 836 priv->can.can_stats.error_passive++;
792 837
793 cf->can_id |= CAN_ERR_CRTL; 838 cf->can_id |= CAN_ERR_CRTL;
794 cf->data[1] = (tec > rec) ? 839 cf->data[1] = (bec.txerr > bec.rxerr) ?
795 CAN_ERR_CRTL_TX_PASSIVE : 840 CAN_ERR_CRTL_TX_PASSIVE :
796 CAN_ERR_CRTL_RX_PASSIVE; 841 CAN_ERR_CRTL_RX_PASSIVE;
797 } 842 }
@@ -804,7 +849,7 @@ static void at91_irq_err_state(struct net_device *dev,
804 if (new_state <= CAN_STATE_ERROR_PASSIVE) { 849 if (new_state <= CAN_STATE_ERROR_PASSIVE) {
805 cf->can_id |= CAN_ERR_RESTARTED; 850 cf->can_id |= CAN_ERR_RESTARTED;
806 851
807 dev_dbg(dev->dev.parent, "restarted\n"); 852 netdev_dbg(dev, "restarted\n");
808 priv->can.can_stats.restarts++; 853 priv->can.can_stats.restarts++;
809 854
810 netif_carrier_on(dev); 855 netif_carrier_on(dev);
@@ -825,7 +870,7 @@ static void at91_irq_err_state(struct net_device *dev,
825 * circumstances. so just enable AT91_IRQ_ERRP, thus 870 * circumstances. so just enable AT91_IRQ_ERRP, thus
826 * the "fallthrough" 871 * the "fallthrough"
827 */ 872 */
828 dev_dbg(dev->dev.parent, "Error Active\n"); 873 netdev_dbg(dev, "Error Active\n");
829 cf->can_id |= CAN_ERR_PROT; 874 cf->can_id |= CAN_ERR_PROT;
830 cf->data[2] = CAN_ERR_PROT_ACTIVE; 875 cf->data[2] = CAN_ERR_PROT_ACTIVE;
831 case CAN_STATE_ERROR_WARNING: /* fallthrough */ 876 case CAN_STATE_ERROR_WARNING: /* fallthrough */
@@ -843,7 +888,7 @@ static void at91_irq_err_state(struct net_device *dev,
843 888
844 cf->can_id |= CAN_ERR_BUSOFF; 889 cf->can_id |= CAN_ERR_BUSOFF;
845 890
846 dev_dbg(dev->dev.parent, "bus-off\n"); 891 netdev_dbg(dev, "bus-off\n");
847 netif_carrier_off(dev); 892 netif_carrier_off(dev);
848 priv->can.can_stats.bus_off++; 893 priv->can.can_stats.bus_off++;
849 894
@@ -881,7 +926,7 @@ static void at91_irq_err(struct net_device *dev)
881 else if (likely(reg_sr & AT91_IRQ_ERRA)) 926 else if (likely(reg_sr & AT91_IRQ_ERRA))
882 new_state = CAN_STATE_ERROR_ACTIVE; 927 new_state = CAN_STATE_ERROR_ACTIVE;
883 else { 928 else {
884 dev_err(dev->dev.parent, "BUG! hardware in undefined state\n"); 929 netdev_err(dev, "BUG! hardware in undefined state\n");
885 return; 930 return;
886 } 931 }
887 932
@@ -1018,7 +1063,65 @@ static const struct net_device_ops at91_netdev_ops = {
1018 .ndo_start_xmit = at91_start_xmit, 1063 .ndo_start_xmit = at91_start_xmit,
1019}; 1064};
1020 1065
1021static int __init at91_can_probe(struct platform_device *pdev) 1066static ssize_t at91_sysfs_show_mb0_id(struct device *dev,
1067 struct device_attribute *attr, char *buf)
1068{
1069 struct at91_priv *priv = netdev_priv(to_net_dev(dev));
1070
1071 if (priv->mb0_id & CAN_EFF_FLAG)
1072 return snprintf(buf, PAGE_SIZE, "0x%08x\n", priv->mb0_id);
1073 else
1074 return snprintf(buf, PAGE_SIZE, "0x%03x\n", priv->mb0_id);
1075}
1076
1077static ssize_t at91_sysfs_set_mb0_id(struct device *dev,
1078 struct device_attribute *attr, const char *buf, size_t count)
1079{
1080 struct net_device *ndev = to_net_dev(dev);
1081 struct at91_priv *priv = netdev_priv(ndev);
1082 unsigned long can_id;
1083 ssize_t ret;
1084 int err;
1085
1086 rtnl_lock();
1087
1088 if (ndev->flags & IFF_UP) {
1089 ret = -EBUSY;
1090 goto out;
1091 }
1092
1093 err = strict_strtoul(buf, 0, &can_id);
1094 if (err) {
1095 ret = err;
1096 goto out;
1097 }
1098
1099 if (can_id & CAN_EFF_FLAG)
1100 can_id &= CAN_EFF_MASK | CAN_EFF_FLAG;
1101 else
1102 can_id &= CAN_SFF_MASK;
1103
1104 priv->mb0_id = can_id;
1105 ret = count;
1106
1107 out:
1108 rtnl_unlock();
1109 return ret;
1110}
1111
1112static DEVICE_ATTR(mb0_id, S_IWUSR | S_IRUGO,
1113 at91_sysfs_show_mb0_id, at91_sysfs_set_mb0_id);
1114
1115static struct attribute *at91_sysfs_attrs[] = {
1116 &dev_attr_mb0_id.attr,
1117 NULL,
1118};
1119
1120static struct attribute_group at91_sysfs_attr_group = {
1121 .attrs = at91_sysfs_attrs,
1122};
1123
1124static int __devinit at91_can_probe(struct platform_device *pdev)
1022{ 1125{
1023 struct net_device *dev; 1126 struct net_device *dev;
1024 struct at91_priv *priv; 1127 struct at91_priv *priv;
@@ -1063,17 +1166,19 @@ static int __init at91_can_probe(struct platform_device *pdev)
1063 dev->netdev_ops = &at91_netdev_ops; 1166 dev->netdev_ops = &at91_netdev_ops;
1064 dev->irq = irq; 1167 dev->irq = irq;
1065 dev->flags |= IFF_ECHO; 1168 dev->flags |= IFF_ECHO;
1169 dev->sysfs_groups[0] = &at91_sysfs_attr_group;
1066 1170
1067 priv = netdev_priv(dev); 1171 priv = netdev_priv(dev);
1068 priv->can.clock.freq = clk_get_rate(clk); 1172 priv->can.clock.freq = clk_get_rate(clk);
1069 priv->can.bittiming_const = &at91_bittiming_const; 1173 priv->can.bittiming_const = &at91_bittiming_const;
1070 priv->can.do_set_bittiming = at91_set_bittiming;
1071 priv->can.do_set_mode = at91_set_mode; 1174 priv->can.do_set_mode = at91_set_mode;
1175 priv->can.do_get_berr_counter = at91_get_berr_counter;
1072 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES; 1176 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
1073 priv->reg_base = addr; 1177 priv->reg_base = addr;
1074 priv->dev = dev; 1178 priv->dev = dev;
1075 priv->clk = clk; 1179 priv->clk = clk;
1076 priv->pdata = pdev->dev.platform_data; 1180 priv->pdata = pdev->dev.platform_data;
1181 priv->mb0_id = 0x7ff;
1077 1182
1078 netif_napi_add(dev, &priv->napi, at91_poll, AT91_NAPI_WEIGHT); 1183 netif_napi_add(dev, &priv->napi, at91_poll, AT91_NAPI_WEIGHT);
1079 1184
@@ -1092,7 +1197,7 @@ static int __init at91_can_probe(struct platform_device *pdev)
1092 return 0; 1197 return 0;
1093 1198
1094 exit_free: 1199 exit_free:
1095 free_netdev(dev); 1200 free_candev(dev);
1096 exit_iounmap: 1201 exit_iounmap:
1097 iounmap(addr); 1202 iounmap(addr);
1098 exit_release: 1203 exit_release:
@@ -1113,8 +1218,6 @@ static int __devexit at91_can_remove(struct platform_device *pdev)
1113 1218
1114 platform_set_drvdata(pdev, NULL); 1219 platform_set_drvdata(pdev, NULL);
1115 1220
1116 free_netdev(dev);
1117
1118 iounmap(priv->reg_base); 1221 iounmap(priv->reg_base);
1119 1222
1120 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1223 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1122,6 +1225,8 @@ static int __devexit at91_can_remove(struct platform_device *pdev)
1122 1225
1123 clk_put(priv->clk); 1226 clk_put(priv->clk);
1124 1227
1228 free_candev(dev);
1229
1125 return 0; 1230 return 0;
1126} 1231}
1127 1232
@@ -1129,21 +1234,19 @@ static struct platform_driver at91_can_driver = {
1129 .probe = at91_can_probe, 1234 .probe = at91_can_probe,
1130 .remove = __devexit_p(at91_can_remove), 1235 .remove = __devexit_p(at91_can_remove),
1131 .driver = { 1236 .driver = {
1132 .name = DRV_NAME, 1237 .name = KBUILD_MODNAME,
1133 .owner = THIS_MODULE, 1238 .owner = THIS_MODULE,
1134 }, 1239 },
1135}; 1240};
1136 1241
1137static int __init at91_can_module_init(void) 1242static int __init at91_can_module_init(void)
1138{ 1243{
1139 printk(KERN_INFO "%s netdevice driver\n", DRV_NAME);
1140 return platform_driver_register(&at91_can_driver); 1244 return platform_driver_register(&at91_can_driver);
1141} 1245}
1142 1246
1143static void __exit at91_can_module_exit(void) 1247static void __exit at91_can_module_exit(void)
1144{ 1248{
1145 platform_driver_unregister(&at91_can_driver); 1249 platform_driver_unregister(&at91_can_driver);
1146 printk(KERN_INFO "%s: driver removed\n", DRV_NAME);
1147} 1250}
1148 1251
1149module_init(at91_can_module_init); 1252module_init(at91_can_module_init);
@@ -1151,4 +1254,4 @@ module_exit(at91_can_module_exit);
1151 1254
1152MODULE_AUTHOR("Marc Kleine-Budde <mkl@pengutronix.de>"); 1255MODULE_AUTHOR("Marc Kleine-Budde <mkl@pengutronix.de>");
1153MODULE_LICENSE("GPL v2"); 1256MODULE_LICENSE("GPL v2");
1154MODULE_DESCRIPTION(DRV_NAME " CAN netdevice driver"); 1257MODULE_DESCRIPTION(KBUILD_MODNAME " CAN netdevice driver");
diff --git a/drivers/net/can/c_can/Kconfig b/drivers/net/can/c_can/Kconfig
new file mode 100644
index 000000000000..ffb9773d102d
--- /dev/null
+++ b/drivers/net/can/c_can/Kconfig
@@ -0,0 +1,15 @@
1menuconfig CAN_C_CAN
2 tristate "Bosch C_CAN devices"
3 depends on CAN_DEV && HAS_IOMEM
4
5if CAN_C_CAN
6
7config CAN_C_CAN_PLATFORM
8 tristate "Generic Platform Bus based C_CAN driver"
9 ---help---
10 This driver adds support for the C_CAN chips connected to
11 the "platform bus" (Linux abstraction for directly to the
12 processor attached devices) which can be found on various
13 boards from ST Microelectronics (http://www.st.com)
14 like the SPEAr1310 and SPEAr320 evaluation boards.
15endif
diff --git a/drivers/net/can/c_can/Makefile b/drivers/net/can/c_can/Makefile
new file mode 100644
index 000000000000..9273f6d5c4b7
--- /dev/null
+++ b/drivers/net/can/c_can/Makefile
@@ -0,0 +1,8 @@
1#
2# Makefile for the Bosch C_CAN controller drivers.
3#
4
5obj-$(CONFIG_CAN_C_CAN) += c_can.o
6obj-$(CONFIG_CAN_C_CAN_PLATFORM) += c_can_platform.o
7
8ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c
new file mode 100644
index 000000000000..7e5cc0bd913d
--- /dev/null
+++ b/drivers/net/can/c_can/c_can.c
@@ -0,0 +1,1152 @@
1/*
2 * CAN bus driver for Bosch C_CAN controller
3 *
4 * Copyright (C) 2010 ST Microelectronics
5 * Bhupesh Sharma <bhupesh.sharma@st.com>
6 *
7 * Borrowed heavily from the C_CAN driver originally written by:
8 * Copyright (C) 2007
9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
11 *
12 * TX and RX NAPI implementation has been borrowed from at91 CAN driver
13 * written by:
14 * Copyright
15 * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de>
16 * (C) 2008, 2009 by Marc Kleine-Budde <kernel@pengutronix.de>
17 *
18 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
19 * Bosch C_CAN user manual can be obtained from:
20 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
21 * users_manual_c_can.pdf
22 *
23 * This file is licensed under the terms of the GNU General Public
24 * License version 2. This program is licensed "as is" without any
25 * warranty of any kind, whether express or implied.
26 */
27
28#include <linux/kernel.h>
29#include <linux/version.h>
30#include <linux/module.h>
31#include <linux/interrupt.h>
32#include <linux/delay.h>
33#include <linux/netdevice.h>
34#include <linux/if_arp.h>
35#include <linux/if_ether.h>
36#include <linux/list.h>
37#include <linux/delay.h>
38#include <linux/io.h>
39
40#include <linux/can.h>
41#include <linux/can/dev.h>
42#include <linux/can/error.h>
43
44#include "c_can.h"
45
46/* control register */
47#define CONTROL_TEST BIT(7)
48#define CONTROL_CCE BIT(6)
49#define CONTROL_DISABLE_AR BIT(5)
50#define CONTROL_ENABLE_AR (0 << 5)
51#define CONTROL_EIE BIT(3)
52#define CONTROL_SIE BIT(2)
53#define CONTROL_IE BIT(1)
54#define CONTROL_INIT BIT(0)
55
56/* test register */
57#define TEST_RX BIT(7)
58#define TEST_TX1 BIT(6)
59#define TEST_TX2 BIT(5)
60#define TEST_LBACK BIT(4)
61#define TEST_SILENT BIT(3)
62#define TEST_BASIC BIT(2)
63
64/* status register */
65#define STATUS_BOFF BIT(7)
66#define STATUS_EWARN BIT(6)
67#define STATUS_EPASS BIT(5)
68#define STATUS_RXOK BIT(4)
69#define STATUS_TXOK BIT(3)
70
71/* error counter register */
72#define ERR_CNT_TEC_MASK 0xff
73#define ERR_CNT_TEC_SHIFT 0
74#define ERR_CNT_REC_SHIFT 8
75#define ERR_CNT_REC_MASK (0x7f << ERR_CNT_REC_SHIFT)
76#define ERR_CNT_RP_SHIFT 15
77#define ERR_CNT_RP_MASK (0x1 << ERR_CNT_RP_SHIFT)
78
79/* bit-timing register */
80#define BTR_BRP_MASK 0x3f
81#define BTR_BRP_SHIFT 0
82#define BTR_SJW_SHIFT 6
83#define BTR_SJW_MASK (0x3 << BTR_SJW_SHIFT)
84#define BTR_TSEG1_SHIFT 8
85#define BTR_TSEG1_MASK (0xf << BTR_TSEG1_SHIFT)
86#define BTR_TSEG2_SHIFT 12
87#define BTR_TSEG2_MASK (0x7 << BTR_TSEG2_SHIFT)
88
89/* brp extension register */
90#define BRP_EXT_BRPE_MASK 0x0f
91#define BRP_EXT_BRPE_SHIFT 0
92
93/* IFx command request */
94#define IF_COMR_BUSY BIT(15)
95
96/* IFx command mask */
97#define IF_COMM_WR BIT(7)
98#define IF_COMM_MASK BIT(6)
99#define IF_COMM_ARB BIT(5)
100#define IF_COMM_CONTROL BIT(4)
101#define IF_COMM_CLR_INT_PND BIT(3)
102#define IF_COMM_TXRQST BIT(2)
103#define IF_COMM_DATAA BIT(1)
104#define IF_COMM_DATAB BIT(0)
105#define IF_COMM_ALL (IF_COMM_MASK | IF_COMM_ARB | \
106 IF_COMM_CONTROL | IF_COMM_TXRQST | \
107 IF_COMM_DATAA | IF_COMM_DATAB)
108
109/* IFx arbitration */
110#define IF_ARB_MSGVAL BIT(15)
111#define IF_ARB_MSGXTD BIT(14)
112#define IF_ARB_TRANSMIT BIT(13)
113
114/* IFx message control */
115#define IF_MCONT_NEWDAT BIT(15)
116#define IF_MCONT_MSGLST BIT(14)
117#define IF_MCONT_CLR_MSGLST (0 << 14)
118#define IF_MCONT_INTPND BIT(13)
119#define IF_MCONT_UMASK BIT(12)
120#define IF_MCONT_TXIE BIT(11)
121#define IF_MCONT_RXIE BIT(10)
122#define IF_MCONT_RMTEN BIT(9)
123#define IF_MCONT_TXRQST BIT(8)
124#define IF_MCONT_EOB BIT(7)
125#define IF_MCONT_DLC_MASK 0xf
126
127/*
128 * IFx register masks:
129 * allow easy operation on 16-bit registers when the
130 * argument is 32-bit instead
131 */
132#define IFX_WRITE_LOW_16BIT(x) ((x) & 0xFFFF)
133#define IFX_WRITE_HIGH_16BIT(x) (((x) & 0xFFFF0000) >> 16)
134
135/* message object split */
136#define C_CAN_NO_OF_OBJECTS 32
137#define C_CAN_MSG_OBJ_RX_NUM 16
138#define C_CAN_MSG_OBJ_TX_NUM 16
139
140#define C_CAN_MSG_OBJ_RX_FIRST 1
141#define C_CAN_MSG_OBJ_RX_LAST (C_CAN_MSG_OBJ_RX_FIRST + \
142 C_CAN_MSG_OBJ_RX_NUM - 1)
143
144#define C_CAN_MSG_OBJ_TX_FIRST (C_CAN_MSG_OBJ_RX_LAST + 1)
145#define C_CAN_MSG_OBJ_TX_LAST (C_CAN_MSG_OBJ_TX_FIRST + \
146 C_CAN_MSG_OBJ_TX_NUM - 1)
147
148#define C_CAN_MSG_OBJ_RX_SPLIT 9
149#define C_CAN_MSG_RX_LOW_LAST (C_CAN_MSG_OBJ_RX_SPLIT - 1)
150
151#define C_CAN_NEXT_MSG_OBJ_MASK (C_CAN_MSG_OBJ_TX_NUM - 1)
152#define RECEIVE_OBJECT_BITS 0x0000ffff
153
154/* status interrupt */
155#define STATUS_INTERRUPT 0x8000
156
157/* global interrupt masks */
158#define ENABLE_ALL_INTERRUPTS 1
159#define DISABLE_ALL_INTERRUPTS 0
160
161/* minimum timeout for checking BUSY status */
162#define MIN_TIMEOUT_VALUE 6
163
164/* napi related */
165#define C_CAN_NAPI_WEIGHT C_CAN_MSG_OBJ_RX_NUM
166
167/* c_can lec values */
168enum c_can_lec_type {
169 LEC_NO_ERROR = 0,
170 LEC_STUFF_ERROR,
171 LEC_FORM_ERROR,
172 LEC_ACK_ERROR,
173 LEC_BIT1_ERROR,
174 LEC_BIT0_ERROR,
175 LEC_CRC_ERROR,
176 LEC_UNUSED,
177};
178
179/*
180 * c_can error types:
181 * Bus errors (BUS_OFF, ERROR_WARNING, ERROR_PASSIVE) are supported
182 */
183enum c_can_bus_error_types {
184 C_CAN_NO_ERROR = 0,
185 C_CAN_BUS_OFF,
186 C_CAN_ERROR_WARNING,
187 C_CAN_ERROR_PASSIVE,
188};
189
190static struct can_bittiming_const c_can_bittiming_const = {
191 .name = KBUILD_MODNAME,
192 .tseg1_min = 2, /* Time segment 1 = prop_seg + phase_seg1 */
193 .tseg1_max = 16,
194 .tseg2_min = 1, /* Time segment 2 = phase_seg2 */
195 .tseg2_max = 8,
196 .sjw_max = 4,
197 .brp_min = 1,
198 .brp_max = 1024, /* 6-bit BRP field + 4-bit BRPE field*/
199 .brp_inc = 1,
200};
201
202static inline int get_tx_next_msg_obj(const struct c_can_priv *priv)
203{
204 return (priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) +
205 C_CAN_MSG_OBJ_TX_FIRST;
206}
207
208static inline int get_tx_echo_msg_obj(const struct c_can_priv *priv)
209{
210 return (priv->tx_echo & C_CAN_NEXT_MSG_OBJ_MASK) +
211 C_CAN_MSG_OBJ_TX_FIRST;
212}
213
214static u32 c_can_read_reg32(struct c_can_priv *priv, void *reg)
215{
216 u32 val = priv->read_reg(priv, reg);
217 val |= ((u32) priv->read_reg(priv, reg + 2)) << 16;
218 return val;
219}
220
221static void c_can_enable_all_interrupts(struct c_can_priv *priv,
222 int enable)
223{
224 unsigned int cntrl_save = priv->read_reg(priv,
225 &priv->regs->control);
226
227 if (enable)
228 cntrl_save |= (CONTROL_SIE | CONTROL_EIE | CONTROL_IE);
229 else
230 cntrl_save &= ~(CONTROL_EIE | CONTROL_IE | CONTROL_SIE);
231
232 priv->write_reg(priv, &priv->regs->control, cntrl_save);
233}
234
235static inline int c_can_msg_obj_is_busy(struct c_can_priv *priv, int iface)
236{
237 int count = MIN_TIMEOUT_VALUE;
238
239 while (count && priv->read_reg(priv,
240 &priv->regs->ifregs[iface].com_req) &
241 IF_COMR_BUSY) {
242 count--;
243 udelay(1);
244 }
245
246 if (!count)
247 return 1;
248
249 return 0;
250}
251
252static inline void c_can_object_get(struct net_device *dev,
253 int iface, int objno, int mask)
254{
255 struct c_can_priv *priv = netdev_priv(dev);
256
257 /*
258 * As per specs, after writting the message object number in the
259 * IF command request register the transfer b/w interface
260 * register and message RAM must be complete in 6 CAN-CLK
261 * period.
262 */
263 priv->write_reg(priv, &priv->regs->ifregs[iface].com_mask,
264 IFX_WRITE_LOW_16BIT(mask));
265 priv->write_reg(priv, &priv->regs->ifregs[iface].com_req,
266 IFX_WRITE_LOW_16BIT(objno));
267
268 if (c_can_msg_obj_is_busy(priv, iface))
269 netdev_err(dev, "timed out in object get\n");
270}
271
272static inline void c_can_object_put(struct net_device *dev,
273 int iface, int objno, int mask)
274{
275 struct c_can_priv *priv = netdev_priv(dev);
276
277 /*
278 * As per specs, after writting the message object number in the
279 * IF command request register the transfer b/w interface
280 * register and message RAM must be complete in 6 CAN-CLK
281 * period.
282 */
283 priv->write_reg(priv, &priv->regs->ifregs[iface].com_mask,
284 (IF_COMM_WR | IFX_WRITE_LOW_16BIT(mask)));
285 priv->write_reg(priv, &priv->regs->ifregs[iface].com_req,
286 IFX_WRITE_LOW_16BIT(objno));
287
288 if (c_can_msg_obj_is_busy(priv, iface))
289 netdev_err(dev, "timed out in object put\n");
290}
291
292static void c_can_write_msg_object(struct net_device *dev,
293 int iface, struct can_frame *frame, int objno)
294{
295 int i;
296 u16 flags = 0;
297 unsigned int id;
298 struct c_can_priv *priv = netdev_priv(dev);
299
300 if (!(frame->can_id & CAN_RTR_FLAG))
301 flags |= IF_ARB_TRANSMIT;
302
303 if (frame->can_id & CAN_EFF_FLAG) {
304 id = frame->can_id & CAN_EFF_MASK;
305 flags |= IF_ARB_MSGXTD;
306 } else
307 id = ((frame->can_id & CAN_SFF_MASK) << 18);
308
309 flags |= IF_ARB_MSGVAL;
310
311 priv->write_reg(priv, &priv->regs->ifregs[iface].arb1,
312 IFX_WRITE_LOW_16BIT(id));
313 priv->write_reg(priv, &priv->regs->ifregs[iface].arb2, flags |
314 IFX_WRITE_HIGH_16BIT(id));
315
316 for (i = 0; i < frame->can_dlc; i += 2) {
317 priv->write_reg(priv, &priv->regs->ifregs[iface].data[i / 2],
318 frame->data[i] | (frame->data[i + 1] << 8));
319 }
320
321 /* enable interrupt for this message object */
322 priv->write_reg(priv, &priv->regs->ifregs[iface].msg_cntrl,
323 IF_MCONT_TXIE | IF_MCONT_TXRQST | IF_MCONT_EOB |
324 frame->can_dlc);
325 c_can_object_put(dev, iface, objno, IF_COMM_ALL);
326}
327
328static inline void c_can_mark_rx_msg_obj(struct net_device *dev,
329 int iface, int ctrl_mask,
330 int obj)
331{
332 struct c_can_priv *priv = netdev_priv(dev);
333
334 priv->write_reg(priv, &priv->regs->ifregs[iface].msg_cntrl,
335 ctrl_mask & ~(IF_MCONT_MSGLST | IF_MCONT_INTPND));
336 c_can_object_put(dev, iface, obj, IF_COMM_CONTROL);
337
338}
339
340static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev,
341 int iface,
342 int ctrl_mask)
343{
344 int i;
345 struct c_can_priv *priv = netdev_priv(dev);
346
347 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_MSG_RX_LOW_LAST; i++) {
348 priv->write_reg(priv, &priv->regs->ifregs[iface].msg_cntrl,
349 ctrl_mask & ~(IF_MCONT_MSGLST |
350 IF_MCONT_INTPND | IF_MCONT_NEWDAT));
351 c_can_object_put(dev, iface, i, IF_COMM_CONTROL);
352 }
353}
354
355static inline void c_can_activate_rx_msg_obj(struct net_device *dev,
356 int iface, int ctrl_mask,
357 int obj)
358{
359 struct c_can_priv *priv = netdev_priv(dev);
360
361 priv->write_reg(priv, &priv->regs->ifregs[iface].msg_cntrl,
362 ctrl_mask & ~(IF_MCONT_MSGLST |
363 IF_MCONT_INTPND | IF_MCONT_NEWDAT));
364 c_can_object_put(dev, iface, obj, IF_COMM_CONTROL);
365}
366
367static void c_can_handle_lost_msg_obj(struct net_device *dev,
368 int iface, int objno)
369{
370 struct c_can_priv *priv = netdev_priv(dev);
371 struct net_device_stats *stats = &dev->stats;
372 struct sk_buff *skb;
373 struct can_frame *frame;
374
375 netdev_err(dev, "msg lost in buffer %d\n", objno);
376
377 c_can_object_get(dev, iface, objno, IF_COMM_ALL & ~IF_COMM_TXRQST);
378
379 priv->write_reg(priv, &priv->regs->ifregs[iface].msg_cntrl,
380 IF_MCONT_CLR_MSGLST);
381
382 c_can_object_put(dev, 0, objno, IF_COMM_CONTROL);
383
384 /* create an error msg */
385 skb = alloc_can_err_skb(dev, &frame);
386 if (unlikely(!skb))
387 return;
388
389 frame->can_id |= CAN_ERR_CRTL;
390 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
391 stats->rx_errors++;
392 stats->rx_over_errors++;
393
394 netif_receive_skb(skb);
395}
396
397static int c_can_read_msg_object(struct net_device *dev, int iface, int ctrl)
398{
399 u16 flags, data;
400 int i;
401 unsigned int val;
402 struct c_can_priv *priv = netdev_priv(dev);
403 struct net_device_stats *stats = &dev->stats;
404 struct sk_buff *skb;
405 struct can_frame *frame;
406
407 skb = alloc_can_skb(dev, &frame);
408 if (!skb) {
409 stats->rx_dropped++;
410 return -ENOMEM;
411 }
412
413 frame->can_dlc = get_can_dlc(ctrl & 0x0F);
414
415 flags = priv->read_reg(priv, &priv->regs->ifregs[iface].arb2);
416 val = priv->read_reg(priv, &priv->regs->ifregs[iface].arb1) |
417 (flags << 16);
418
419 if (flags & IF_ARB_MSGXTD)
420 frame->can_id = (val & CAN_EFF_MASK) | CAN_EFF_FLAG;
421 else
422 frame->can_id = (val >> 18) & CAN_SFF_MASK;
423
424 if (flags & IF_ARB_TRANSMIT)
425 frame->can_id |= CAN_RTR_FLAG;
426 else {
427 for (i = 0; i < frame->can_dlc; i += 2) {
428 data = priv->read_reg(priv,
429 &priv->regs->ifregs[iface].data[i / 2]);
430 frame->data[i] = data;
431 frame->data[i + 1] = data >> 8;
432 }
433 }
434
435 netif_receive_skb(skb);
436
437 stats->rx_packets++;
438 stats->rx_bytes += frame->can_dlc;
439
440 return 0;
441}
442
443static void c_can_setup_receive_object(struct net_device *dev, int iface,
444 int objno, unsigned int mask,
445 unsigned int id, unsigned int mcont)
446{
447 struct c_can_priv *priv = netdev_priv(dev);
448
449 priv->write_reg(priv, &priv->regs->ifregs[iface].mask1,
450 IFX_WRITE_LOW_16BIT(mask));
451 priv->write_reg(priv, &priv->regs->ifregs[iface].mask2,
452 IFX_WRITE_HIGH_16BIT(mask));
453
454 priv->write_reg(priv, &priv->regs->ifregs[iface].arb1,
455 IFX_WRITE_LOW_16BIT(id));
456 priv->write_reg(priv, &priv->regs->ifregs[iface].arb2,
457 (IF_ARB_MSGVAL | IFX_WRITE_HIGH_16BIT(id)));
458
459 priv->write_reg(priv, &priv->regs->ifregs[iface].msg_cntrl, mcont);
460 c_can_object_put(dev, iface, objno, IF_COMM_ALL & ~IF_COMM_TXRQST);
461
462 netdev_dbg(dev, "obj no:%d, msgval:0x%08x\n", objno,
463 c_can_read_reg32(priv, &priv->regs->msgval1));
464}
465
466static void c_can_inval_msg_object(struct net_device *dev, int iface, int objno)
467{
468 struct c_can_priv *priv = netdev_priv(dev);
469
470 priv->write_reg(priv, &priv->regs->ifregs[iface].arb1, 0);
471 priv->write_reg(priv, &priv->regs->ifregs[iface].arb2, 0);
472 priv->write_reg(priv, &priv->regs->ifregs[iface].msg_cntrl, 0);
473
474 c_can_object_put(dev, iface, objno, IF_COMM_ARB | IF_COMM_CONTROL);
475
476 netdev_dbg(dev, "obj no:%d, msgval:0x%08x\n", objno,
477 c_can_read_reg32(priv, &priv->regs->msgval1));
478}
479
480static inline int c_can_is_next_tx_obj_busy(struct c_can_priv *priv, int objno)
481{
482 int val = c_can_read_reg32(priv, &priv->regs->txrqst1);
483
484 /*
485 * as transmission request register's bit n-1 corresponds to
486 * message object n, we need to handle the same properly.
487 */
488 if (val & (1 << (objno - 1)))
489 return 1;
490
491 return 0;
492}
493
494static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,
495 struct net_device *dev)
496{
497 u32 msg_obj_no;
498 struct c_can_priv *priv = netdev_priv(dev);
499 struct can_frame *frame = (struct can_frame *)skb->data;
500
501 if (can_dropped_invalid_skb(dev, skb))
502 return NETDEV_TX_OK;
503
504 msg_obj_no = get_tx_next_msg_obj(priv);
505
506 /* prepare message object for transmission */
507 c_can_write_msg_object(dev, 0, frame, msg_obj_no);
508 can_put_echo_skb(skb, dev, msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST);
509
510 /*
511 * we have to stop the queue in case of a wrap around or
512 * if the next TX message object is still in use
513 */
514 priv->tx_next++;
515 if (c_can_is_next_tx_obj_busy(priv, get_tx_next_msg_obj(priv)) ||
516 (priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) == 0)
517 netif_stop_queue(dev);
518
519 return NETDEV_TX_OK;
520}
521
522static int c_can_set_bittiming(struct net_device *dev)
523{
524 unsigned int reg_btr, reg_brpe, ctrl_save;
525 u8 brp, brpe, sjw, tseg1, tseg2;
526 u32 ten_bit_brp;
527 struct c_can_priv *priv = netdev_priv(dev);
528 const struct can_bittiming *bt = &priv->can.bittiming;
529
530 /* c_can provides a 6-bit brp and 4-bit brpe fields */
531 ten_bit_brp = bt->brp - 1;
532 brp = ten_bit_brp & BTR_BRP_MASK;
533 brpe = ten_bit_brp >> 6;
534
535 sjw = bt->sjw - 1;
536 tseg1 = bt->prop_seg + bt->phase_seg1 - 1;
537 tseg2 = bt->phase_seg2 - 1;
538 reg_btr = brp | (sjw << BTR_SJW_SHIFT) | (tseg1 << BTR_TSEG1_SHIFT) |
539 (tseg2 << BTR_TSEG2_SHIFT);
540 reg_brpe = brpe & BRP_EXT_BRPE_MASK;
541
542 netdev_info(dev,
543 "setting BTR=%04x BRPE=%04x\n", reg_btr, reg_brpe);
544
545 ctrl_save = priv->read_reg(priv, &priv->regs->control);
546 priv->write_reg(priv, &priv->regs->control,
547 ctrl_save | CONTROL_CCE | CONTROL_INIT);
548 priv->write_reg(priv, &priv->regs->btr, reg_btr);
549 priv->write_reg(priv, &priv->regs->brp_ext, reg_brpe);
550 priv->write_reg(priv, &priv->regs->control, ctrl_save);
551
552 return 0;
553}
554
555/*
556 * Configure C_CAN message objects for Tx and Rx purposes:
557 * C_CAN provides a total of 32 message objects that can be configured
558 * either for Tx or Rx purposes. Here the first 16 message objects are used as
559 * a reception FIFO. The end of reception FIFO is signified by the EoB bit
560 * being SET. The remaining 16 message objects are kept aside for Tx purposes.
561 * See user guide document for further details on configuring message
562 * objects.
563 */
564static void c_can_configure_msg_objects(struct net_device *dev)
565{
566 int i;
567
568 /* first invalidate all message objects */
569 for (i = C_CAN_MSG_OBJ_RX_FIRST; i <= C_CAN_NO_OF_OBJECTS; i++)
570 c_can_inval_msg_object(dev, 0, i);
571
572 /* setup receive message objects */
573 for (i = C_CAN_MSG_OBJ_RX_FIRST; i < C_CAN_MSG_OBJ_RX_LAST; i++)
574 c_can_setup_receive_object(dev, 0, i, 0, 0,
575 (IF_MCONT_RXIE | IF_MCONT_UMASK) & ~IF_MCONT_EOB);
576
577 c_can_setup_receive_object(dev, 0, C_CAN_MSG_OBJ_RX_LAST, 0, 0,
578 IF_MCONT_EOB | IF_MCONT_RXIE | IF_MCONT_UMASK);
579}
580
581/*
582 * Configure C_CAN chip:
583 * - enable/disable auto-retransmission
584 * - set operating mode
585 * - configure message objects
586 */
587static void c_can_chip_config(struct net_device *dev)
588{
589 struct c_can_priv *priv = netdev_priv(dev);
590
591 /* enable automatic retransmission */
592 priv->write_reg(priv, &priv->regs->control,
593 CONTROL_ENABLE_AR);
594
595 if (priv->can.ctrlmode & (CAN_CTRLMODE_LISTENONLY &
596 CAN_CTRLMODE_LOOPBACK)) {
597 /* loopback + silent mode : useful for hot self-test */
598 priv->write_reg(priv, &priv->regs->control, CONTROL_EIE |
599 CONTROL_SIE | CONTROL_IE | CONTROL_TEST);
600 priv->write_reg(priv, &priv->regs->test,
601 TEST_LBACK | TEST_SILENT);
602 } else if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
603 /* loopback mode : useful for self-test function */
604 priv->write_reg(priv, &priv->regs->control, CONTROL_EIE |
605 CONTROL_SIE | CONTROL_IE | CONTROL_TEST);
606 priv->write_reg(priv, &priv->regs->test, TEST_LBACK);
607 } else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) {
608 /* silent mode : bus-monitoring mode */
609 priv->write_reg(priv, &priv->regs->control, CONTROL_EIE |
610 CONTROL_SIE | CONTROL_IE | CONTROL_TEST);
611 priv->write_reg(priv, &priv->regs->test, TEST_SILENT);
612 } else
613 /* normal mode*/
614 priv->write_reg(priv, &priv->regs->control,
615 CONTROL_EIE | CONTROL_SIE | CONTROL_IE);
616
617 /* configure message objects */
618 c_can_configure_msg_objects(dev);
619
620 /* set a `lec` value so that we can check for updates later */
621 priv->write_reg(priv, &priv->regs->status, LEC_UNUSED);
622
623 /* set bittiming params */
624 c_can_set_bittiming(dev);
625}
626
627static void c_can_start(struct net_device *dev)
628{
629 struct c_can_priv *priv = netdev_priv(dev);
630
631 /* basic c_can configuration */
632 c_can_chip_config(dev);
633
634 priv->can.state = CAN_STATE_ERROR_ACTIVE;
635
636 /* reset tx helper pointers */
637 priv->tx_next = priv->tx_echo = 0;
638
639 /* enable status change, error and module interrupts */
640 c_can_enable_all_interrupts(priv, ENABLE_ALL_INTERRUPTS);
641}
642
643static void c_can_stop(struct net_device *dev)
644{
645 struct c_can_priv *priv = netdev_priv(dev);
646
647 /* disable all interrupts */
648 c_can_enable_all_interrupts(priv, DISABLE_ALL_INTERRUPTS);
649
650 /* set the state as STOPPED */
651 priv->can.state = CAN_STATE_STOPPED;
652}
653
654static int c_can_set_mode(struct net_device *dev, enum can_mode mode)
655{
656 switch (mode) {
657 case CAN_MODE_START:
658 c_can_start(dev);
659 netif_wake_queue(dev);
660 break;
661 default:
662 return -EOPNOTSUPP;
663 }
664
665 return 0;
666}
667
668static int c_can_get_berr_counter(const struct net_device *dev,
669 struct can_berr_counter *bec)
670{
671 unsigned int reg_err_counter;
672 struct c_can_priv *priv = netdev_priv(dev);
673
674 reg_err_counter = priv->read_reg(priv, &priv->regs->err_cnt);
675 bec->rxerr = (reg_err_counter & ERR_CNT_REC_MASK) >>
676 ERR_CNT_REC_SHIFT;
677 bec->txerr = reg_err_counter & ERR_CNT_TEC_MASK;
678
679 return 0;
680}
681
682/*
683 * theory of operation:
684 *
685 * priv->tx_echo holds the number of the oldest can_frame put for
686 * transmission into the hardware, but not yet ACKed by the CAN tx
687 * complete IRQ.
688 *
689 * We iterate from priv->tx_echo to priv->tx_next and check if the
690 * packet has been transmitted, echo it back to the CAN framework.
691 * If we discover a not yet transmitted package, stop looking for more.
692 */
693static void c_can_do_tx(struct net_device *dev)
694{
695 u32 val;
696 u32 msg_obj_no;
697 struct c_can_priv *priv = netdev_priv(dev);
698 struct net_device_stats *stats = &dev->stats;
699
700 for (/* nix */; (priv->tx_next - priv->tx_echo) > 0; priv->tx_echo++) {
701 msg_obj_no = get_tx_echo_msg_obj(priv);
702 val = c_can_read_reg32(priv, &priv->regs->txrqst1);
703 if (!(val & (1 << msg_obj_no))) {
704 can_get_echo_skb(dev,
705 msg_obj_no - C_CAN_MSG_OBJ_TX_FIRST);
706 stats->tx_bytes += priv->read_reg(priv,
707 &priv->regs->ifregs[0].msg_cntrl)
708 & IF_MCONT_DLC_MASK;
709 stats->tx_packets++;
710 c_can_inval_msg_object(dev, 0, msg_obj_no);
711 }
712 }
713
714 /* restart queue if wrap-up or if queue stalled on last pkt */
715 if (((priv->tx_next & C_CAN_NEXT_MSG_OBJ_MASK) != 0) ||
716 ((priv->tx_echo & C_CAN_NEXT_MSG_OBJ_MASK) == 0))
717 netif_wake_queue(dev);
718}
719
720/*
721 * theory of operation:
722 *
723 * c_can core saves a received CAN message into the first free message
724 * object it finds free (starting with the lowest). Bits NEWDAT and
725 * INTPND are set for this message object indicating that a new message
726 * has arrived. To work-around this issue, we keep two groups of message
727 * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT.
728 *
729 * To ensure in-order frame reception we use the following
730 * approach while re-activating a message object to receive further
731 * frames:
732 * - if the current message object number is lower than
733 * C_CAN_MSG_RX_LOW_LAST, do not clear the NEWDAT bit while clearing
734 * the INTPND bit.
735 * - if the current message object number is equal to
736 * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of all lower
737 * receive message objects.
738 * - if the current message object number is greater than
739 * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of
740 * only this message object.
741 */
742static int c_can_do_rx_poll(struct net_device *dev, int quota)
743{
744 u32 num_rx_pkts = 0;
745 unsigned int msg_obj, msg_ctrl_save;
746 struct c_can_priv *priv = netdev_priv(dev);
747 u32 val = c_can_read_reg32(priv, &priv->regs->intpnd1);
748
749 for (msg_obj = C_CAN_MSG_OBJ_RX_FIRST;
750 msg_obj <= C_CAN_MSG_OBJ_RX_LAST && quota > 0;
751 val = c_can_read_reg32(priv, &priv->regs->intpnd1),
752 msg_obj++) {
753 /*
754 * as interrupt pending register's bit n-1 corresponds to
755 * message object n, we need to handle the same properly.
756 */
757 if (val & (1 << (msg_obj - 1))) {
758 c_can_object_get(dev, 0, msg_obj, IF_COMM_ALL &
759 ~IF_COMM_TXRQST);
760 msg_ctrl_save = priv->read_reg(priv,
761 &priv->regs->ifregs[0].msg_cntrl);
762
763 if (msg_ctrl_save & IF_MCONT_EOB)
764 return num_rx_pkts;
765
766 if (msg_ctrl_save & IF_MCONT_MSGLST) {
767 c_can_handle_lost_msg_obj(dev, 0, msg_obj);
768 num_rx_pkts++;
769 quota--;
770 continue;
771 }
772
773 if (!(msg_ctrl_save & IF_MCONT_NEWDAT))
774 continue;
775
776 /* read the data from the message object */
777 c_can_read_msg_object(dev, 0, msg_ctrl_save);
778
779 if (msg_obj < C_CAN_MSG_RX_LOW_LAST)
780 c_can_mark_rx_msg_obj(dev, 0,
781 msg_ctrl_save, msg_obj);
782 else if (msg_obj > C_CAN_MSG_RX_LOW_LAST)
783 /* activate this msg obj */
784 c_can_activate_rx_msg_obj(dev, 0,
785 msg_ctrl_save, msg_obj);
786 else if (msg_obj == C_CAN_MSG_RX_LOW_LAST)
787 /* activate all lower message objects */
788 c_can_activate_all_lower_rx_msg_obj(dev,
789 0, msg_ctrl_save);
790
791 num_rx_pkts++;
792 quota--;
793 }
794 }
795
796 return num_rx_pkts;
797}
798
799static inline int c_can_has_and_handle_berr(struct c_can_priv *priv)
800{
801 return (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) &&
802 (priv->current_status & LEC_UNUSED);
803}
804
805static int c_can_handle_state_change(struct net_device *dev,
806 enum c_can_bus_error_types error_type)
807{
808 unsigned int reg_err_counter;
809 unsigned int rx_err_passive;
810 struct c_can_priv *priv = netdev_priv(dev);
811 struct net_device_stats *stats = &dev->stats;
812 struct can_frame *cf;
813 struct sk_buff *skb;
814 struct can_berr_counter bec;
815
816 /* propagate the error condition to the CAN stack */
817 skb = alloc_can_err_skb(dev, &cf);
818 if (unlikely(!skb))
819 return 0;
820
821 c_can_get_berr_counter(dev, &bec);
822 reg_err_counter = priv->read_reg(priv, &priv->regs->err_cnt);
823 rx_err_passive = (reg_err_counter & ERR_CNT_RP_MASK) >>
824 ERR_CNT_RP_SHIFT;
825
826 switch (error_type) {
827 case C_CAN_ERROR_WARNING:
828 /* error warning state */
829 priv->can.can_stats.error_warning++;
830 priv->can.state = CAN_STATE_ERROR_WARNING;
831 cf->can_id |= CAN_ERR_CRTL;
832 cf->data[1] = (bec.txerr > bec.rxerr) ?
833 CAN_ERR_CRTL_TX_WARNING :
834 CAN_ERR_CRTL_RX_WARNING;
835 cf->data[6] = bec.txerr;
836 cf->data[7] = bec.rxerr;
837
838 break;
839 case C_CAN_ERROR_PASSIVE:
840 /* error passive state */
841 priv->can.can_stats.error_passive++;
842 priv->can.state = CAN_STATE_ERROR_PASSIVE;
843 cf->can_id |= CAN_ERR_CRTL;
844 if (rx_err_passive)
845 cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
846 if (bec.txerr > 127)
847 cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE;
848
849 cf->data[6] = bec.txerr;
850 cf->data[7] = bec.rxerr;
851 break;
852 case C_CAN_BUS_OFF:
853 /* bus-off state */
854 priv->can.state = CAN_STATE_BUS_OFF;
855 cf->can_id |= CAN_ERR_BUSOFF;
856 /*
857 * disable all interrupts in bus-off mode to ensure that
858 * the CPU is not hogged down
859 */
860 c_can_enable_all_interrupts(priv, DISABLE_ALL_INTERRUPTS);
861 can_bus_off(dev);
862 break;
863 default:
864 break;
865 }
866
867 netif_receive_skb(skb);
868 stats->rx_packets++;
869 stats->rx_bytes += cf->can_dlc;
870
871 return 1;
872}
873
874static int c_can_handle_bus_err(struct net_device *dev,
875 enum c_can_lec_type lec_type)
876{
877 struct c_can_priv *priv = netdev_priv(dev);
878 struct net_device_stats *stats = &dev->stats;
879 struct can_frame *cf;
880 struct sk_buff *skb;
881
882 /*
883 * early exit if no lec update or no error.
884 * no lec update means that no CAN bus event has been detected
885 * since CPU wrote 0x7 value to status reg.
886 */
887 if (lec_type == LEC_UNUSED || lec_type == LEC_NO_ERROR)
888 return 0;
889
890 /* propagate the error condition to the CAN stack */
891 skb = alloc_can_err_skb(dev, &cf);
892 if (unlikely(!skb))
893 return 0;
894
895 /*
896 * check for 'last error code' which tells us the
897 * type of the last error to occur on the CAN bus
898 */
899
900 /* common for all type of bus errors */
901 priv->can.can_stats.bus_error++;
902 stats->rx_errors++;
903 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
904 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
905
906 switch (lec_type) {
907 case LEC_STUFF_ERROR:
908 netdev_dbg(dev, "stuff error\n");
909 cf->data[2] |= CAN_ERR_PROT_STUFF;
910 break;
911 case LEC_FORM_ERROR:
912 netdev_dbg(dev, "form error\n");
913 cf->data[2] |= CAN_ERR_PROT_FORM;
914 break;
915 case LEC_ACK_ERROR:
916 netdev_dbg(dev, "ack error\n");
917 cf->data[2] |= (CAN_ERR_PROT_LOC_ACK |
918 CAN_ERR_PROT_LOC_ACK_DEL);
919 break;
920 case LEC_BIT1_ERROR:
921 netdev_dbg(dev, "bit1 error\n");
922 cf->data[2] |= CAN_ERR_PROT_BIT1;
923 break;
924 case LEC_BIT0_ERROR:
925 netdev_dbg(dev, "bit0 error\n");
926 cf->data[2] |= CAN_ERR_PROT_BIT0;
927 break;
928 case LEC_CRC_ERROR:
929 netdev_dbg(dev, "CRC error\n");
930 cf->data[2] |= (CAN_ERR_PROT_LOC_CRC_SEQ |
931 CAN_ERR_PROT_LOC_CRC_DEL);
932 break;
933 default:
934 break;
935 }
936
937 /* set a `lec` value so that we can check for updates later */
938 priv->write_reg(priv, &priv->regs->status, LEC_UNUSED);
939
940 netif_receive_skb(skb);
941 stats->rx_packets++;
942 stats->rx_bytes += cf->can_dlc;
943
944 return 1;
945}
946
947static int c_can_poll(struct napi_struct *napi, int quota)
948{
949 u16 irqstatus;
950 int lec_type = 0;
951 int work_done = 0;
952 struct net_device *dev = napi->dev;
953 struct c_can_priv *priv = netdev_priv(dev);
954
955 irqstatus = priv->read_reg(priv, &priv->regs->interrupt);
956 if (!irqstatus)
957 goto end;
958
959 /* status events have the highest priority */
960 if (irqstatus == STATUS_INTERRUPT) {
961 priv->current_status = priv->read_reg(priv,
962 &priv->regs->status);
963
964 /* handle Tx/Rx events */
965 if (priv->current_status & STATUS_TXOK)
966 priv->write_reg(priv, &priv->regs->status,
967 priv->current_status & ~STATUS_TXOK);
968
969 if (priv->current_status & STATUS_RXOK)
970 priv->write_reg(priv, &priv->regs->status,
971 priv->current_status & ~STATUS_RXOK);
972
973 /* handle state changes */
974 if ((priv->current_status & STATUS_EWARN) &&
975 (!(priv->last_status & STATUS_EWARN))) {
976 netdev_dbg(dev, "entered error warning state\n");
977 work_done += c_can_handle_state_change(dev,
978 C_CAN_ERROR_WARNING);
979 }
980 if ((priv->current_status & STATUS_EPASS) &&
981 (!(priv->last_status & STATUS_EPASS))) {
982 netdev_dbg(dev, "entered error passive state\n");
983 work_done += c_can_handle_state_change(dev,
984 C_CAN_ERROR_PASSIVE);
985 }
986 if ((priv->current_status & STATUS_BOFF) &&
987 (!(priv->last_status & STATUS_BOFF))) {
988 netdev_dbg(dev, "entered bus off state\n");
989 work_done += c_can_handle_state_change(dev,
990 C_CAN_BUS_OFF);
991 }
992
993 /* handle bus recovery events */
994 if ((!(priv->current_status & STATUS_BOFF)) &&
995 (priv->last_status & STATUS_BOFF)) {
996 netdev_dbg(dev, "left bus off state\n");
997 priv->can.state = CAN_STATE_ERROR_ACTIVE;
998 }
999 if ((!(priv->current_status & STATUS_EPASS)) &&
1000 (priv->last_status & STATUS_EPASS)) {
1001 netdev_dbg(dev, "left error passive state\n");
1002 priv->can.state = CAN_STATE_ERROR_ACTIVE;
1003 }
1004
1005 priv->last_status = priv->current_status;
1006
1007 /* handle lec errors on the bus */
1008 lec_type = c_can_has_and_handle_berr(priv);
1009 if (lec_type)
1010 work_done += c_can_handle_bus_err(dev, lec_type);
1011 } else if ((irqstatus >= C_CAN_MSG_OBJ_RX_FIRST) &&
1012 (irqstatus <= C_CAN_MSG_OBJ_RX_LAST)) {
1013 /* handle events corresponding to receive message objects */
1014 work_done += c_can_do_rx_poll(dev, (quota - work_done));
1015 } else if ((irqstatus >= C_CAN_MSG_OBJ_TX_FIRST) &&
1016 (irqstatus <= C_CAN_MSG_OBJ_TX_LAST)) {
1017 /* handle events corresponding to transmit message objects */
1018 c_can_do_tx(dev);
1019 }
1020
1021end:
1022 if (work_done < quota) {
1023 napi_complete(napi);
1024 /* enable all IRQs */
1025 c_can_enable_all_interrupts(priv, ENABLE_ALL_INTERRUPTS);
1026 }
1027
1028 return work_done;
1029}
1030
1031static irqreturn_t c_can_isr(int irq, void *dev_id)
1032{
1033 u16 irqstatus;
1034 struct net_device *dev = (struct net_device *)dev_id;
1035 struct c_can_priv *priv = netdev_priv(dev);
1036
1037 irqstatus = priv->read_reg(priv, &priv->regs->interrupt);
1038 if (!irqstatus)
1039 return IRQ_NONE;
1040
1041 /* disable all interrupts and schedule the NAPI */
1042 c_can_enable_all_interrupts(priv, DISABLE_ALL_INTERRUPTS);
1043 napi_schedule(&priv->napi);
1044
1045 return IRQ_HANDLED;
1046}
1047
1048static int c_can_open(struct net_device *dev)
1049{
1050 int err;
1051 struct c_can_priv *priv = netdev_priv(dev);
1052
1053 /* open the can device */
1054 err = open_candev(dev);
1055 if (err) {
1056 netdev_err(dev, "failed to open can device\n");
1057 return err;
1058 }
1059
1060 /* register interrupt handler */
1061 err = request_irq(dev->irq, &c_can_isr, IRQF_SHARED, dev->name,
1062 dev);
1063 if (err < 0) {
1064 netdev_err(dev, "failed to request interrupt\n");
1065 goto exit_irq_fail;
1066 }
1067
1068 /* start the c_can controller */
1069 c_can_start(dev);
1070
1071 napi_enable(&priv->napi);
1072 netif_start_queue(dev);
1073
1074 return 0;
1075
1076exit_irq_fail:
1077 close_candev(dev);
1078 return err;
1079}
1080
1081static int c_can_close(struct net_device *dev)
1082{
1083 struct c_can_priv *priv = netdev_priv(dev);
1084
1085 netif_stop_queue(dev);
1086 napi_disable(&priv->napi);
1087 c_can_stop(dev);
1088 free_irq(dev->irq, dev);
1089 close_candev(dev);
1090
1091 return 0;
1092}
1093
1094struct net_device *alloc_c_can_dev(void)
1095{
1096 struct net_device *dev;
1097 struct c_can_priv *priv;
1098
1099 dev = alloc_candev(sizeof(struct c_can_priv), C_CAN_MSG_OBJ_TX_NUM);
1100 if (!dev)
1101 return NULL;
1102
1103 priv = netdev_priv(dev);
1104 netif_napi_add(dev, &priv->napi, c_can_poll, C_CAN_NAPI_WEIGHT);
1105
1106 priv->dev = dev;
1107 priv->can.bittiming_const = &c_can_bittiming_const;
1108 priv->can.do_set_mode = c_can_set_mode;
1109 priv->can.do_get_berr_counter = c_can_get_berr_counter;
1110 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
1111 CAN_CTRLMODE_LISTENONLY |
1112 CAN_CTRLMODE_BERR_REPORTING;
1113
1114 return dev;
1115}
1116EXPORT_SYMBOL_GPL(alloc_c_can_dev);
1117
1118void free_c_can_dev(struct net_device *dev)
1119{
1120 free_candev(dev);
1121}
1122EXPORT_SYMBOL_GPL(free_c_can_dev);
1123
1124static const struct net_device_ops c_can_netdev_ops = {
1125 .ndo_open = c_can_open,
1126 .ndo_stop = c_can_close,
1127 .ndo_start_xmit = c_can_start_xmit,
1128};
1129
1130int register_c_can_dev(struct net_device *dev)
1131{
1132 dev->flags |= IFF_ECHO; /* we support local echo */
1133 dev->netdev_ops = &c_can_netdev_ops;
1134
1135 return register_candev(dev);
1136}
1137EXPORT_SYMBOL_GPL(register_c_can_dev);
1138
1139void unregister_c_can_dev(struct net_device *dev)
1140{
1141 struct c_can_priv *priv = netdev_priv(dev);
1142
1143 /* disable all interrupts */
1144 c_can_enable_all_interrupts(priv, DISABLE_ALL_INTERRUPTS);
1145
1146 unregister_candev(dev);
1147}
1148EXPORT_SYMBOL_GPL(unregister_c_can_dev);
1149
1150MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
1151MODULE_LICENSE("GPL v2");
1152MODULE_DESCRIPTION("CAN bus driver for Bosch C_CAN controller");
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
new file mode 100644
index 000000000000..9b7fbef3d09a
--- /dev/null
+++ b/drivers/net/can/c_can/c_can.h
@@ -0,0 +1,86 @@
1/*
2 * CAN bus driver for Bosch C_CAN controller
3 *
4 * Copyright (C) 2010 ST Microelectronics
5 * Bhupesh Sharma <bhupesh.sharma@st.com>
6 *
7 * Borrowed heavily from the C_CAN driver originally written by:
8 * Copyright (C) 2007
9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
11 *
12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
13 * Bosch C_CAN user manual can be obtained from:
14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
15 * users_manual_c_can.pdf
16 *
17 * This file is licensed under the terms of the GNU General Public
18 * License version 2. This program is licensed "as is" without any
19 * warranty of any kind, whether express or implied.
20 */
21
22#ifndef C_CAN_H
23#define C_CAN_H
24
25/* c_can IF registers */
26struct c_can_if_regs {
27 u16 com_req;
28 u16 com_mask;
29 u16 mask1;
30 u16 mask2;
31 u16 arb1;
32 u16 arb2;
33 u16 msg_cntrl;
34 u16 data[4];
35 u16 _reserved[13];
36};
37
38/* c_can hardware registers */
39struct c_can_regs {
40 u16 control;
41 u16 status;
42 u16 err_cnt;
43 u16 btr;
44 u16 interrupt;
45 u16 test;
46 u16 brp_ext;
47 u16 _reserved1;
48 struct c_can_if_regs ifregs[2]; /* [0] = IF1 and [1] = IF2 */
49 u16 _reserved2[8];
50 u16 txrqst1;
51 u16 txrqst2;
52 u16 _reserved3[6];
53 u16 newdat1;
54 u16 newdat2;
55 u16 _reserved4[6];
56 u16 intpnd1;
57 u16 intpnd2;
58 u16 _reserved5[6];
59 u16 msgval1;
60 u16 msgval2;
61 u16 _reserved6[6];
62};
63
64/* c_can private data structure */
65struct c_can_priv {
66 struct can_priv can; /* must be the first member */
67 struct napi_struct napi;
68 struct net_device *dev;
69 int tx_object;
70 int current_status;
71 int last_status;
72 u16 (*read_reg) (struct c_can_priv *priv, void *reg);
73 void (*write_reg) (struct c_can_priv *priv, void *reg, u16 val);
74 struct c_can_regs __iomem *regs;
75 unsigned long irq_flags; /* for request_irq() */
76 unsigned int tx_next;
77 unsigned int tx_echo;
78 void *priv; /* for board-specific data */
79};
80
81struct net_device *alloc_c_can_dev(void);
82void free_c_can_dev(struct net_device *dev);
83int register_c_can_dev(struct net_device *dev);
84void unregister_c_can_dev(struct net_device *dev);
85
86#endif /* C_CAN_H */
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c
new file mode 100644
index 000000000000..cc90824f2c9c
--- /dev/null
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -0,0 +1,216 @@
1/*
2 * Platform CAN bus driver for Bosch C_CAN controller
3 *
4 * Copyright (C) 2010 ST Microelectronics
5 * Bhupesh Sharma <bhupesh.sharma@st.com>
6 *
7 * Borrowed heavily from the C_CAN driver originally written by:
8 * Copyright (C) 2007
9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
11 *
12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
13 * Bosch C_CAN user manual can be obtained from:
14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
15 * users_manual_c_can.pdf
16 *
17 * This file is licensed under the terms of the GNU General Public
18 * License version 2. This program is licensed "as is" without any
19 * warranty of any kind, whether express or implied.
20 */
21
22#include <linux/kernel.h>
23#include <linux/version.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/if_arp.h>
29#include <linux/if_ether.h>
30#include <linux/list.h>
31#include <linux/delay.h>
32#include <linux/io.h>
33#include <linux/platform_device.h>
34#include <linux/clk.h>
35
36#include <linux/can/dev.h>
37
38#include "c_can.h"
39
40/*
41 * 16-bit c_can registers can be arranged differently in the memory
42 * architecture of different implementations. For example: 16-bit
43 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
44 * Handle the same by providing a common read/write interface.
45 */
46static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,
47 void *reg)
48{
49 return readw(reg);
50}
51
52static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,
53 void *reg, u16 val)
54{
55 writew(val, reg);
56}
57
58static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,
59 void *reg)
60{
61 return readw(reg + (long)reg - (long)priv->regs);
62}
63
64static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,
65 void *reg, u16 val)
66{
67 writew(val, reg + (long)reg - (long)priv->regs);
68}
69
70static int __devinit c_can_plat_probe(struct platform_device *pdev)
71{
72 int ret;
73 void __iomem *addr;
74 struct net_device *dev;
75 struct c_can_priv *priv;
76 struct resource *mem;
77 int irq;
78#ifdef CONFIG_HAVE_CLK
79 struct clk *clk;
80
81 /* get the appropriate clk */
82 clk = clk_get(&pdev->dev, NULL);
83 if (IS_ERR(clk)) {
84 dev_err(&pdev->dev, "no clock defined\n");
85 ret = -ENODEV;
86 goto exit;
87 }
88#endif
89
90 /* get the platform data */
91 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
92 irq = platform_get_irq(pdev, 0);
93 if (!mem || irq <= 0) {
94 ret = -ENODEV;
95 goto exit_free_clk;
96 }
97
98 if (!request_mem_region(mem->start, resource_size(mem),
99 KBUILD_MODNAME)) {
100 dev_err(&pdev->dev, "resource unavailable\n");
101 ret = -ENODEV;
102 goto exit_free_clk;
103 }
104
105 addr = ioremap(mem->start, resource_size(mem));
106 if (!addr) {
107 dev_err(&pdev->dev, "failed to map can port\n");
108 ret = -ENOMEM;
109 goto exit_release_mem;
110 }
111
112 /* allocate the c_can device */
113 dev = alloc_c_can_dev();
114 if (!dev) {
115 ret = -ENOMEM;
116 goto exit_iounmap;
117 }
118
119 priv = netdev_priv(dev);
120
121 dev->irq = irq;
122 priv->regs = addr;
123#ifdef CONFIG_HAVE_CLK
124 priv->can.clock.freq = clk_get_rate(clk);
125 priv->priv = clk;
126#endif
127
128 switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {
129 case IORESOURCE_MEM_32BIT:
130 priv->read_reg = c_can_plat_read_reg_aligned_to_32bit;
131 priv->write_reg = c_can_plat_write_reg_aligned_to_32bit;
132 break;
133 case IORESOURCE_MEM_16BIT:
134 default:
135 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
136 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
137 break;
138 }
139
140 platform_set_drvdata(pdev, dev);
141 SET_NETDEV_DEV(dev, &pdev->dev);
142
143 ret = register_c_can_dev(dev);
144 if (ret) {
145 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
146 KBUILD_MODNAME, ret);
147 goto exit_free_device;
148 }
149
150 dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
151 KBUILD_MODNAME, priv->regs, dev->irq);
152 return 0;
153
154exit_free_device:
155 platform_set_drvdata(pdev, NULL);
156 free_c_can_dev(dev);
157exit_iounmap:
158 iounmap(addr);
159exit_release_mem:
160 release_mem_region(mem->start, resource_size(mem));
161exit_free_clk:
162#ifdef CONFIG_HAVE_CLK
163 clk_put(clk);
164exit:
165#endif
166 dev_err(&pdev->dev, "probe failed\n");
167
168 return ret;
169}
170
171static int __devexit c_can_plat_remove(struct platform_device *pdev)
172{
173 struct net_device *dev = platform_get_drvdata(pdev);
174 struct c_can_priv *priv = netdev_priv(dev);
175 struct resource *mem;
176
177 unregister_c_can_dev(dev);
178 platform_set_drvdata(pdev, NULL);
179
180 free_c_can_dev(dev);
181 iounmap(priv->regs);
182
183 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184 release_mem_region(mem->start, resource_size(mem));
185
186#ifdef CONFIG_HAVE_CLK
187 clk_put(priv->priv);
188#endif
189
190 return 0;
191}
192
193static struct platform_driver c_can_plat_driver = {
194 .driver = {
195 .name = KBUILD_MODNAME,
196 .owner = THIS_MODULE,
197 },
198 .probe = c_can_plat_probe,
199 .remove = __devexit_p(c_can_plat_remove),
200};
201
202static int __init c_can_plat_init(void)
203{
204 return platform_driver_register(&c_can_plat_driver);
205}
206module_init(c_can_plat_init);
207
208static void __exit c_can_plat_exit(void)
209{
210 platform_driver_unregister(&c_can_plat_driver);
211}
212module_exit(c_can_plat_exit);
213
214MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
215MODULE_LICENSE("GPL v2");
216MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller");
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index ef443a090ba7..17678117ed69 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -923,7 +923,7 @@ static int __devinit flexcan_probe(struct platform_device *pdev)
923 mem_size = resource_size(mem); 923 mem_size = resource_size(mem);
924 if (!request_mem_region(mem->start, mem_size, pdev->name)) { 924 if (!request_mem_region(mem->start, mem_size, pdev->name)) {
925 err = -EBUSY; 925 err = -EBUSY;
926 goto failed_req; 926 goto failed_get;
927 } 927 }
928 928
929 base = ioremap(mem->start, mem_size); 929 base = ioremap(mem->start, mem_size);
@@ -977,9 +977,8 @@ static int __devinit flexcan_probe(struct platform_device *pdev)
977 iounmap(base); 977 iounmap(base);
978 failed_map: 978 failed_map:
979 release_mem_region(mem->start, mem_size); 979 release_mem_region(mem->start, mem_size);
980 failed_req:
981 clk_put(clk);
982 failed_get: 980 failed_get:
981 clk_put(clk);
983 failed_clock: 982 failed_clock:
984 return err; 983 return err;
985} 984}
@@ -992,7 +991,6 @@ static int __devexit flexcan_remove(struct platform_device *pdev)
992 991
993 unregister_flexcandev(dev); 992 unregister_flexcandev(dev);
994 platform_set_drvdata(pdev, NULL); 993 platform_set_drvdata(pdev, NULL);
995 free_candev(dev);
996 iounmap(priv->base); 994 iounmap(priv->base);
997 995
998 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 996 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1000,6 +998,8 @@ static int __devexit flexcan_remove(struct platform_device *pdev)
1000 998
1001 clk_put(priv->clk); 999 clk_put(priv->clk);
1002 1000
1001 free_candev(dev);
1002
1003 return 0; 1003 return 0;
1004} 1004}
1005 1005
diff --git a/drivers/net/can/janz-ican3.c b/drivers/net/can/janz-ican3.c
index 6e533dcc36c0..f1942cab35f6 100644
--- a/drivers/net/can/janz-ican3.c
+++ b/drivers/net/can/janz-ican3.c
@@ -273,7 +273,7 @@ static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
273 */ 273 */
274 274
275/* 275/*
276 * Recieve a message from the ICAN3 "old-style" firmware interface 276 * Receive a message from the ICAN3 "old-style" firmware interface
277 * 277 *
278 * LOCKING: must hold mod->lock 278 * LOCKING: must hold mod->lock
279 * 279 *
@@ -1049,7 +1049,7 @@ static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1049 complete(&mod->termination_comp); 1049 complete(&mod->termination_comp);
1050 break; 1050 break;
1051 default: 1051 default:
1052 dev_err(mod->dev, "recieved an unknown inquiry response\n"); 1052 dev_err(mod->dev, "received an unknown inquiry response\n");
1053 break; 1053 break;
1054 } 1054 }
1055} 1055}
@@ -1057,7 +1057,7 @@ static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1057static void ican3_handle_unknown_message(struct ican3_dev *mod, 1057static void ican3_handle_unknown_message(struct ican3_dev *mod,
1058 struct ican3_msg *msg) 1058 struct ican3_msg *msg)
1059{ 1059{
1060 dev_warn(mod->dev, "recieved unknown message: spec 0x%.2x length %d\n", 1060 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n",
1061 msg->spec, le16_to_cpu(msg->len)); 1061 msg->spec, le16_to_cpu(msg->len));
1062} 1062}
1063 1063
@@ -1112,12 +1112,7 @@ static bool ican3_txok(struct ican3_dev *mod)
1112} 1112}
1113 1113
1114/* 1114/*
1115 * Recieve one CAN frame from the hardware 1115 * Receive one CAN frame from the hardware
1116 *
1117 * This works like the core of a NAPI function, but is intended to be called
1118 * from workqueue context instead. This driver already needs a workqueue to
1119 * process control messages, so we use the workqueue instead of using NAPI.
1120 * This was done to simplify locking.
1121 * 1116 *
1122 * CONTEXT: must be called from user context 1117 * CONTEXT: must be called from user context
1123 */ 1118 */
@@ -1251,7 +1246,6 @@ static irqreturn_t ican3_irq(int irq, void *dev_id)
1251 * Reset an ICAN module to its power-on state 1246 * Reset an ICAN module to its power-on state
1252 * 1247 *
1253 * CONTEXT: no network device registered 1248 * CONTEXT: no network device registered
1254 * LOCKING: work function disabled
1255 */ 1249 */
1256static int ican3_reset_module(struct ican3_dev *mod) 1250static int ican3_reset_module(struct ican3_dev *mod)
1257{ 1251{
@@ -1262,9 +1256,6 @@ static int ican3_reset_module(struct ican3_dev *mod)
1262 /* disable interrupts so no more work is scheduled */ 1256 /* disable interrupts so no more work is scheduled */
1263 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1257 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1264 1258
1265 /* flush any pending work */
1266 flush_scheduled_work();
1267
1268 /* the first unallocated page in the DPM is #9 */ 1259 /* the first unallocated page in the DPM is #9 */
1269 mod->free_page = DPM_FREE_START; 1260 mod->free_page = DPM_FREE_START;
1270 1261
@@ -1627,7 +1618,7 @@ static ssize_t ican3_sysfs_set_term(struct device *dev,
1627 return count; 1618 return count;
1628} 1619}
1629 1620
1630static DEVICE_ATTR(termination, S_IWUGO | S_IRUGO, ican3_sysfs_show_term, 1621static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
1631 ican3_sysfs_set_term); 1622 ican3_sysfs_set_term);
1632 1623
1633static struct attribute *ican3_sysfs_attrs[] = { 1624static struct attribute *ican3_sysfs_attrs[] = {
diff --git a/drivers/net/can/mcp251x.c b/drivers/net/can/mcp251x.c
index b11a0cb5ed81..330140ee266d 100644
--- a/drivers/net/can/mcp251x.c
+++ b/drivers/net/can/mcp251x.c
@@ -38,14 +38,14 @@
38 * static struct mcp251x_platform_data mcp251x_info = { 38 * static struct mcp251x_platform_data mcp251x_info = {
39 * .oscillator_frequency = 8000000, 39 * .oscillator_frequency = 8000000,
40 * .board_specific_setup = &mcp251x_setup, 40 * .board_specific_setup = &mcp251x_setup,
41 * .model = CAN_MCP251X_MCP2510,
42 * .power_enable = mcp251x_power_enable, 41 * .power_enable = mcp251x_power_enable,
43 * .transceiver_enable = NULL, 42 * .transceiver_enable = NULL,
44 * }; 43 * };
45 * 44 *
46 * static struct spi_board_info spi_board_info[] = { 45 * static struct spi_board_info spi_board_info[] = {
47 * { 46 * {
48 * .modalias = "mcp251x", 47 * .modalias = "mcp2510",
48 * // or "mcp2515" depending on your controller
49 * .platform_data = &mcp251x_info, 49 * .platform_data = &mcp251x_info,
50 * .irq = IRQ_EINT13, 50 * .irq = IRQ_EINT13,
51 * .max_speed_hz = 2*1000*1000, 51 * .max_speed_hz = 2*1000*1000,
@@ -125,6 +125,9 @@
125# define CANINTF_TX0IF 0x04 125# define CANINTF_TX0IF 0x04
126# define CANINTF_RX1IF 0x02 126# define CANINTF_RX1IF 0x02
127# define CANINTF_RX0IF 0x01 127# define CANINTF_RX0IF 0x01
128# define CANINTF_RX (CANINTF_RX0IF | CANINTF_RX1IF)
129# define CANINTF_TX (CANINTF_TX2IF | CANINTF_TX1IF | CANINTF_TX0IF)
130# define CANINTF_ERR (CANINTF_ERRIF)
128#define EFLG 0x2d 131#define EFLG 0x2d
129# define EFLG_EWARN 0x01 132# define EFLG_EWARN 0x01
130# define EFLG_RXWAR 0x02 133# define EFLG_RXWAR 0x02
@@ -166,6 +169,7 @@
166# define RXBSIDH_SHIFT 3 169# define RXBSIDH_SHIFT 3
167#define RXBSIDL(n) (((n) * 0x10) + 0x60 + RXBSIDL_OFF) 170#define RXBSIDL(n) (((n) * 0x10) + 0x60 + RXBSIDL_OFF)
168# define RXBSIDL_IDE 0x08 171# define RXBSIDL_IDE 0x08
172# define RXBSIDL_SRR 0x10
169# define RXBSIDL_EID 3 173# define RXBSIDL_EID 3
170# define RXBSIDL_SHIFT 5 174# define RXBSIDL_SHIFT 5
171#define RXBEID8(n) (((n) * 0x10) + 0x60 + RXBEID8_OFF) 175#define RXBEID8(n) (((n) * 0x10) + 0x60 + RXBEID8_OFF)
@@ -222,10 +226,16 @@ static struct can_bittiming_const mcp251x_bittiming_const = {
222 .brp_inc = 1, 226 .brp_inc = 1,
223}; 227};
224 228
229enum mcp251x_model {
230 CAN_MCP251X_MCP2510 = 0x2510,
231 CAN_MCP251X_MCP2515 = 0x2515,
232};
233
225struct mcp251x_priv { 234struct mcp251x_priv {
226 struct can_priv can; 235 struct can_priv can;
227 struct net_device *net; 236 struct net_device *net;
228 struct spi_device *spi; 237 struct spi_device *spi;
238 enum mcp251x_model model;
229 239
230 struct mutex mcp_lock; /* SPI device lock */ 240 struct mutex mcp_lock; /* SPI device lock */
231 241
@@ -250,6 +260,16 @@ struct mcp251x_priv {
250 int restart_tx; 260 int restart_tx;
251}; 261};
252 262
263#define MCP251X_IS(_model) \
264static inline int mcp251x_is_##_model(struct spi_device *spi) \
265{ \
266 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev); \
267 return priv->model == CAN_MCP251X_MCP##_model; \
268}
269
270MCP251X_IS(2510);
271MCP251X_IS(2515);
272
253static void mcp251x_clean(struct net_device *net) 273static void mcp251x_clean(struct net_device *net)
254{ 274{
255 struct mcp251x_priv *priv = netdev_priv(net); 275 struct mcp251x_priv *priv = netdev_priv(net);
@@ -319,6 +339,20 @@ static u8 mcp251x_read_reg(struct spi_device *spi, uint8_t reg)
319 return val; 339 return val;
320} 340}
321 341
342static void mcp251x_read_2regs(struct spi_device *spi, uint8_t reg,
343 uint8_t *v1, uint8_t *v2)
344{
345 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
346
347 priv->spi_tx_buf[0] = INSTRUCTION_READ;
348 priv->spi_tx_buf[1] = reg;
349
350 mcp251x_spi_trans(spi, 4);
351
352 *v1 = priv->spi_rx_buf[2];
353 *v2 = priv->spi_rx_buf[3];
354}
355
322static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val) 356static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val)
323{ 357{
324 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev); 358 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
@@ -346,10 +380,9 @@ static void mcp251x_write_bits(struct spi_device *spi, u8 reg,
346static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf, 380static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf,
347 int len, int tx_buf_idx) 381 int len, int tx_buf_idx)
348{ 382{
349 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
350 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev); 383 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
351 384
352 if (pdata->model == CAN_MCP251X_MCP2510) { 385 if (mcp251x_is_2510(spi)) {
353 int i; 386 int i;
354 387
355 for (i = 1; i < TXBDAT_OFF + len; i++) 388 for (i = 1; i < TXBDAT_OFF + len; i++)
@@ -392,9 +425,8 @@ static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,
392 int buf_idx) 425 int buf_idx)
393{ 426{
394 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev); 427 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
395 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
396 428
397 if (pdata->model == CAN_MCP251X_MCP2510) { 429 if (mcp251x_is_2510(spi)) {
398 int i, len; 430 int i, len;
399 431
400 for (i = 1; i < RXBDAT_OFF; i++) 432 for (i = 1; i < RXBDAT_OFF; i++)
@@ -444,6 +476,8 @@ static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
444 frame->can_id = 476 frame->can_id =
445 (buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) | 477 (buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) |
446 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT); 478 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT);
479 if (buf[RXBSIDL_OFF] & RXBSIDL_SRR)
480 frame->can_id |= CAN_RTR_FLAG;
447 } 481 }
448 /* Data length */ 482 /* Data length */
449 frame->can_dlc = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK); 483 frame->can_dlc = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK);
@@ -451,7 +485,7 @@ static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
451 485
452 priv->net->stats.rx_packets++; 486 priv->net->stats.rx_packets++;
453 priv->net->stats.rx_bytes += frame->can_dlc; 487 priv->net->stats.rx_bytes += frame->can_dlc;
454 netif_rx(skb); 488 netif_rx_ni(skb);
455} 489}
456 490
457static void mcp251x_hw_sleep(struct spi_device *spi) 491static void mcp251x_hw_sleep(struct spi_device *spi)
@@ -674,9 +708,9 @@ static void mcp251x_error_skb(struct net_device *net, int can_id, int data1)
674 708
675 skb = alloc_can_err_skb(net, &frame); 709 skb = alloc_can_err_skb(net, &frame);
676 if (skb) { 710 if (skb) {
677 frame->can_id = can_id; 711 frame->can_id |= can_id;
678 frame->data[1] = data1; 712 frame->data[1] = data1;
679 netif_rx(skb); 713 netif_rx_ni(skb);
680 } else { 714 } else {
681 dev_err(&net->dev, 715 dev_err(&net->dev,
682 "cannot allocate error skb\n"); 716 "cannot allocate error skb\n");
@@ -754,24 +788,42 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
754 mutex_lock(&priv->mcp_lock); 788 mutex_lock(&priv->mcp_lock);
755 while (!priv->force_quit) { 789 while (!priv->force_quit) {
756 enum can_state new_state; 790 enum can_state new_state;
757 u8 intf = mcp251x_read_reg(spi, CANINTF); 791 u8 intf, eflag;
758 u8 eflag; 792 u8 clear_intf = 0;
759 int can_id = 0, data1 = 0; 793 int can_id = 0, data1 = 0;
760 794
795 mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
796
797 /* mask out flags we don't care about */
798 intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
799
800 /* receive buffer 0 */
761 if (intf & CANINTF_RX0IF) { 801 if (intf & CANINTF_RX0IF) {
762 mcp251x_hw_rx(spi, 0); 802 mcp251x_hw_rx(spi, 0);
763 /* Free one buffer ASAP */ 803 /*
764 mcp251x_write_bits(spi, CANINTF, intf & CANINTF_RX0IF, 804 * Free one buffer ASAP
765 0x00); 805 * (The MCP2515 does this automatically.)
806 */
807 if (mcp251x_is_2510(spi))
808 mcp251x_write_bits(spi, CANINTF, CANINTF_RX0IF, 0x00);
766 } 809 }
767 810
768 if (intf & CANINTF_RX1IF) 811 /* receive buffer 1 */
812 if (intf & CANINTF_RX1IF) {
769 mcp251x_hw_rx(spi, 1); 813 mcp251x_hw_rx(spi, 1);
814 /* the MCP2515 does this automatically */
815 if (mcp251x_is_2510(spi))
816 clear_intf |= CANINTF_RX1IF;
817 }
770 818
771 mcp251x_write_bits(spi, CANINTF, intf, 0x00); 819 /* any error or tx interrupt we need to clear? */
820 if (intf & (CANINTF_ERR | CANINTF_TX))
821 clear_intf |= intf & (CANINTF_ERR | CANINTF_TX);
822 if (clear_intf)
823 mcp251x_write_bits(spi, CANINTF, clear_intf, 0x00);
772 824
773 eflag = mcp251x_read_reg(spi, EFLG); 825 if (eflag)
774 mcp251x_write_reg(spi, EFLG, 0x00); 826 mcp251x_write_bits(spi, EFLG, eflag, 0x00);
775 827
776 /* Update can state */ 828 /* Update can state */
777 if (eflag & EFLG_TXBO) { 829 if (eflag & EFLG_TXBO) {
@@ -816,10 +868,14 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
816 if (intf & CANINTF_ERRIF) { 868 if (intf & CANINTF_ERRIF) {
817 /* Handle overflow counters */ 869 /* Handle overflow counters */
818 if (eflag & (EFLG_RX0OVR | EFLG_RX1OVR)) { 870 if (eflag & (EFLG_RX0OVR | EFLG_RX1OVR)) {
819 if (eflag & EFLG_RX0OVR) 871 if (eflag & EFLG_RX0OVR) {
820 net->stats.rx_over_errors++; 872 net->stats.rx_over_errors++;
821 if (eflag & EFLG_RX1OVR) 873 net->stats.rx_errors++;
874 }
875 if (eflag & EFLG_RX1OVR) {
822 net->stats.rx_over_errors++; 876 net->stats.rx_over_errors++;
877 net->stats.rx_errors++;
878 }
823 can_id |= CAN_ERR_CRTL; 879 can_id |= CAN_ERR_CRTL;
824 data1 |= CAN_ERR_CRTL_RX_OVERFLOW; 880 data1 |= CAN_ERR_CRTL_RX_OVERFLOW;
825 } 881 }
@@ -838,7 +894,7 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
838 if (intf == 0) 894 if (intf == 0)
839 break; 895 break;
840 896
841 if (intf & (CANINTF_TX2IF | CANINTF_TX1IF | CANINTF_TX0IF)) { 897 if (intf & CANINTF_TX) {
842 net->stats.tx_packets++; 898 net->stats.tx_packets++;
843 net->stats.tx_bytes += priv->tx_len - 1; 899 net->stats.tx_bytes += priv->tx_len - 1;
844 if (priv->tx_len) { 900 if (priv->tx_len) {
@@ -875,7 +931,8 @@ static int mcp251x_open(struct net_device *net)
875 priv->tx_len = 0; 931 priv->tx_len = 0;
876 932
877 ret = request_threaded_irq(spi->irq, NULL, mcp251x_can_ist, 933 ret = request_threaded_irq(spi->irq, NULL, mcp251x_can_ist,
878 IRQF_TRIGGER_FALLING, DEVICE_NAME, priv); 934 pdata->irq_flags ? pdata->irq_flags : IRQF_TRIGGER_FALLING,
935 DEVICE_NAME, priv);
879 if (ret) { 936 if (ret) {
880 dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq); 937 dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
881 if (pdata->transceiver_enable) 938 if (pdata->transceiver_enable)
@@ -884,7 +941,7 @@ static int mcp251x_open(struct net_device *net)
884 goto open_unlock; 941 goto open_unlock;
885 } 942 }
886 943
887 priv->wq = create_freezeable_workqueue("mcp251x_wq"); 944 priv->wq = create_freezable_workqueue("mcp251x_wq");
888 INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler); 945 INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
889 INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler); 946 INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler);
890 947
@@ -921,16 +978,12 @@ static int __devinit mcp251x_can_probe(struct spi_device *spi)
921 struct net_device *net; 978 struct net_device *net;
922 struct mcp251x_priv *priv; 979 struct mcp251x_priv *priv;
923 struct mcp251x_platform_data *pdata = spi->dev.platform_data; 980 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
924 int model = spi_get_device_id(spi)->driver_data;
925 int ret = -ENODEV; 981 int ret = -ENODEV;
926 982
927 if (!pdata) 983 if (!pdata)
928 /* Platform data is required for osc freq */ 984 /* Platform data is required for osc freq */
929 goto error_out; 985 goto error_out;
930 986
931 if (model)
932 pdata->model = model;
933
934 /* Allocate can/net device */ 987 /* Allocate can/net device */
935 net = alloc_candev(sizeof(struct mcp251x_priv), TX_ECHO_SKB_MAX); 988 net = alloc_candev(sizeof(struct mcp251x_priv), TX_ECHO_SKB_MAX);
936 if (!net) { 989 if (!net) {
@@ -947,6 +1000,7 @@ static int __devinit mcp251x_can_probe(struct spi_device *spi)
947 priv->can.clock.freq = pdata->oscillator_frequency / 2; 1000 priv->can.clock.freq = pdata->oscillator_frequency / 2;
948 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | 1001 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
949 CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY; 1002 CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY;
1003 priv->model = spi_get_device_id(spi)->driver_data;
950 priv->net = net; 1004 priv->net = net;
951 dev_set_drvdata(&spi->dev, priv); 1005 dev_set_drvdata(&spi->dev, priv);
952 1006
@@ -1120,8 +1174,7 @@ static int mcp251x_can_resume(struct spi_device *spi)
1120#define mcp251x_can_resume NULL 1174#define mcp251x_can_resume NULL
1121#endif 1175#endif
1122 1176
1123static struct spi_device_id mcp251x_id_table[] = { 1177static const struct spi_device_id mcp251x_id_table[] = {
1124 { "mcp251x", 0 /* Use pdata.model */ },
1125 { "mcp2510", CAN_MCP251X_MCP2510 }, 1178 { "mcp2510", CAN_MCP251X_MCP2510 },
1126 { "mcp2515", CAN_MCP251X_MCP2515 }, 1179 { "mcp2515", CAN_MCP251X_MCP2515 },
1127 { }, 1180 { },
diff --git a/drivers/net/can/mscan/Kconfig b/drivers/net/can/mscan/Kconfig
index 27d1d398e25e..d38706958af6 100644
--- a/drivers/net/can/mscan/Kconfig
+++ b/drivers/net/can/mscan/Kconfig
@@ -1,5 +1,5 @@
1config CAN_MSCAN 1config CAN_MSCAN
2 depends on CAN_DEV && (PPC || M68K || M68KNOMMU) 2 depends on CAN_DEV && (PPC || M68K)
3 tristate "Support for Freescale MSCAN based chips" 3 tristate "Support for Freescale MSCAN based chips"
4 ---help--- 4 ---help---
5 The Motorola Scalable Controller Area Network (MSCAN) definition 5 The Motorola Scalable Controller Area Network (MSCAN) definition
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c b/drivers/net/can/mscan/mpc5xxx_can.c
index b1bdc909090f..5fedc3375562 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -143,12 +143,12 @@ static u32 __devinit mpc512x_can_get_clock(struct platform_device *ofdev,
143 np_clock = of_find_matching_node(NULL, mpc512x_clock_ids); 143 np_clock = of_find_matching_node(NULL, mpc512x_clock_ids);
144 if (!np_clock) { 144 if (!np_clock) {
145 dev_err(&ofdev->dev, "couldn't find clock node\n"); 145 dev_err(&ofdev->dev, "couldn't find clock node\n");
146 return -ENODEV; 146 return 0;
147 } 147 }
148 clockctl = of_iomap(np_clock, 0); 148 clockctl = of_iomap(np_clock, 0);
149 if (!clockctl) { 149 if (!clockctl) {
150 dev_err(&ofdev->dev, "couldn't map clock registers\n"); 150 dev_err(&ofdev->dev, "couldn't map clock registers\n");
151 return 0; 151 goto exit_put;
152 } 152 }
153 153
154 /* Determine the MSCAN device index from the physical address */ 154 /* Determine the MSCAN device index from the physical address */
@@ -233,9 +233,9 @@ static u32 __devinit mpc512x_can_get_clock(struct platform_device *ofdev,
233 clocksrc == 1 ? "ref_clk" : "sys_clk", clockdiv); 233 clocksrc == 1 ? "ref_clk" : "sys_clk", clockdiv);
234 234
235exit_unmap: 235exit_unmap:
236 of_node_put(np_clock);
237 iounmap(clockctl); 236 iounmap(clockctl);
238 237exit_put:
238 of_node_put(np_clock);
239 return freq; 239 return freq;
240} 240}
241#else /* !CONFIG_PPC_MPC512x */ 241#else /* !CONFIG_PPC_MPC512x */
@@ -247,10 +247,11 @@ static u32 __devinit mpc512x_can_get_clock(struct platform_device *ofdev,
247} 247}
248#endif /* CONFIG_PPC_MPC512x */ 248#endif /* CONFIG_PPC_MPC512x */
249 249
250static int __devinit mpc5xxx_can_probe(struct platform_device *ofdev, 250static struct of_device_id mpc5xxx_can_table[];
251 const struct of_device_id *id) 251static int __devinit mpc5xxx_can_probe(struct platform_device *ofdev)
252{ 252{
253 struct mpc5xxx_can_data *data = (struct mpc5xxx_can_data *)id->data; 253 const struct of_device_id *match;
254 struct mpc5xxx_can_data *data;
254 struct device_node *np = ofdev->dev.of_node; 255 struct device_node *np = ofdev->dev.of_node;
255 struct net_device *dev; 256 struct net_device *dev;
256 struct mscan_priv *priv; 257 struct mscan_priv *priv;
@@ -259,6 +260,11 @@ static int __devinit mpc5xxx_can_probe(struct platform_device *ofdev,
259 int irq, mscan_clksrc = 0; 260 int irq, mscan_clksrc = 0;
260 int err = -ENOMEM; 261 int err = -ENOMEM;
261 262
263 match = of_match_device(mpc5xxx_can_table, &ofdev->dev);
264 if (!match)
265 return -EINVAL;
266 data = match->data;
267
262 base = of_iomap(np, 0); 268 base = of_iomap(np, 0);
263 if (!base) { 269 if (!base) {
264 dev_err(&ofdev->dev, "couldn't ioremap\n"); 270 dev_err(&ofdev->dev, "couldn't ioremap\n");
@@ -391,7 +397,7 @@ static struct of_device_id __devinitdata mpc5xxx_can_table[] = {
391 {}, 397 {},
392}; 398};
393 399
394static struct of_platform_driver mpc5xxx_can_driver = { 400static struct platform_driver mpc5xxx_can_driver = {
395 .driver = { 401 .driver = {
396 .name = "mpc5xxx_can", 402 .name = "mpc5xxx_can",
397 .owner = THIS_MODULE, 403 .owner = THIS_MODULE,
@@ -407,13 +413,13 @@ static struct of_platform_driver mpc5xxx_can_driver = {
407 413
408static int __init mpc5xxx_can_init(void) 414static int __init mpc5xxx_can_init(void)
409{ 415{
410 return of_register_platform_driver(&mpc5xxx_can_driver); 416 return platform_driver_register(&mpc5xxx_can_driver);
411} 417}
412module_init(mpc5xxx_can_init); 418module_init(mpc5xxx_can_init);
413 419
414static void __exit mpc5xxx_can_exit(void) 420static void __exit mpc5xxx_can_exit(void)
415{ 421{
416 return of_unregister_platform_driver(&mpc5xxx_can_driver); 422 platform_driver_unregister(&mpc5xxx_can_driver);
417}; 423};
418module_exit(mpc5xxx_can_exit); 424module_exit(mpc5xxx_can_exit);
419 425
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index 64c378cd0c34..92feac68b66e 100644
--- a/drivers/net/can/mscan/mscan.c
+++ b/drivers/net/can/mscan/mscan.c
@@ -182,7 +182,7 @@ static int mscan_restart(struct net_device *dev)
182 182
183 priv->can.state = CAN_STATE_ERROR_ACTIVE; 183 priv->can.state = CAN_STATE_ERROR_ACTIVE;
184 WARN(!(in_8(&regs->canmisc) & MSCAN_BOHOLD), 184 WARN(!(in_8(&regs->canmisc) & MSCAN_BOHOLD),
185 "bus-off state expected"); 185 "bus-off state expected\n");
186 out_8(&regs->canmisc, MSCAN_BOHOLD); 186 out_8(&regs->canmisc, MSCAN_BOHOLD);
187 /* Re-enable receive interrupts. */ 187 /* Re-enable receive interrupts. */
188 out_8(&regs->canrier, MSCAN_RX_INTS_ENABLE); 188 out_8(&regs->canrier, MSCAN_RX_INTS_ENABLE);
@@ -246,7 +246,7 @@ static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
246 out_be16(&regs->tx.idr3_2, can_id); 246 out_be16(&regs->tx.idr3_2, can_id);
247 247
248 can_id >>= 16; 248 can_id >>= 16;
249 /* EFF_FLAGS are inbetween the IDs :( */ 249 /* EFF_FLAGS are between the IDs :( */
250 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) 250 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0)
251 | MSCAN_EFF_FLAGS; 251 | MSCAN_EFF_FLAGS;
252 } else { 252 } else {
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
new file mode 100644
index 000000000000..d11fbb2b95ff
--- /dev/null
+++ b/drivers/net/can/pch_can.c
@@ -0,0 +1,1290 @@
1/*
2 * Copyright (C) 1999 - 2010 Intel Corporation.
3 * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19#include <linux/interrupt.h>
20#include <linux/delay.h>
21#include <linux/io.h>
22#include <linux/module.h>
23#include <linux/sched.h>
24#include <linux/pci.h>
25#include <linux/init.h>
26#include <linux/kernel.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/netdevice.h>
30#include <linux/skbuff.h>
31#include <linux/can.h>
32#include <linux/can/dev.h>
33#include <linux/can/error.h>
34
35#define PCH_CTRL_INIT BIT(0) /* The INIT bit of CANCONT register. */
36#define PCH_CTRL_IE BIT(1) /* The IE bit of CAN control register */
37#define PCH_CTRL_IE_SIE_EIE (BIT(3) | BIT(2) | BIT(1))
38#define PCH_CTRL_CCE BIT(6)
39#define PCH_CTRL_OPT BIT(7) /* The OPT bit of CANCONT register. */
40#define PCH_OPT_SILENT BIT(3) /* The Silent bit of CANOPT reg. */
41#define PCH_OPT_LBACK BIT(4) /* The LoopBack bit of CANOPT reg. */
42
43#define PCH_CMASK_RX_TX_SET 0x00f3
44#define PCH_CMASK_RX_TX_GET 0x0073
45#define PCH_CMASK_ALL 0xff
46#define PCH_CMASK_NEWDAT BIT(2)
47#define PCH_CMASK_CLRINTPND BIT(3)
48#define PCH_CMASK_CTRL BIT(4)
49#define PCH_CMASK_ARB BIT(5)
50#define PCH_CMASK_MASK BIT(6)
51#define PCH_CMASK_RDWR BIT(7)
52#define PCH_IF_MCONT_NEWDAT BIT(15)
53#define PCH_IF_MCONT_MSGLOST BIT(14)
54#define PCH_IF_MCONT_INTPND BIT(13)
55#define PCH_IF_MCONT_UMASK BIT(12)
56#define PCH_IF_MCONT_TXIE BIT(11)
57#define PCH_IF_MCONT_RXIE BIT(10)
58#define PCH_IF_MCONT_RMTEN BIT(9)
59#define PCH_IF_MCONT_TXRQXT BIT(8)
60#define PCH_IF_MCONT_EOB BIT(7)
61#define PCH_IF_MCONT_DLC (BIT(0) | BIT(1) | BIT(2) | BIT(3))
62#define PCH_MASK2_MDIR_MXTD (BIT(14) | BIT(15))
63#define PCH_ID2_DIR BIT(13)
64#define PCH_ID2_XTD BIT(14)
65#define PCH_ID_MSGVAL BIT(15)
66#define PCH_IF_CREQ_BUSY BIT(15)
67
68#define PCH_STATUS_INT 0x8000
69#define PCH_REC 0x00007f00
70#define PCH_TEC 0x000000ff
71
72#define PCH_TX_OK BIT(3)
73#define PCH_RX_OK BIT(4)
74#define PCH_EPASSIV BIT(5)
75#define PCH_EWARN BIT(6)
76#define PCH_BUS_OFF BIT(7)
77
78/* bit position of certain controller bits. */
79#define PCH_BIT_BRP_SHIFT 0
80#define PCH_BIT_SJW_SHIFT 6
81#define PCH_BIT_TSEG1_SHIFT 8
82#define PCH_BIT_TSEG2_SHIFT 12
83#define PCH_BIT_BRPE_BRPE_SHIFT 6
84
85#define PCH_MSK_BITT_BRP 0x3f
86#define PCH_MSK_BRPE_BRPE 0x3c0
87#define PCH_MSK_CTRL_IE_SIE_EIE 0x07
88#define PCH_COUNTER_LIMIT 10
89
90#define PCH_CAN_CLK 50000000 /* 50MHz */
91
92/*
93 * Define the number of message object.
94 * PCH CAN communications are done via Message RAM.
95 * The Message RAM consists of 32 message objects.
96 */
97#define PCH_RX_OBJ_NUM 26
98#define PCH_TX_OBJ_NUM 6
99#define PCH_RX_OBJ_START 1
100#define PCH_RX_OBJ_END PCH_RX_OBJ_NUM
101#define PCH_TX_OBJ_START (PCH_RX_OBJ_END + 1)
102#define PCH_TX_OBJ_END (PCH_RX_OBJ_NUM + PCH_TX_OBJ_NUM)
103
104#define PCH_FIFO_THRESH 16
105
106/* TxRqst2 show status of MsgObjNo.17~32 */
107#define PCH_TREQ2_TX_MASK (((1 << PCH_TX_OBJ_NUM) - 1) <<\
108 (PCH_RX_OBJ_END - 16))
109
110enum pch_ifreg {
111 PCH_RX_IFREG,
112 PCH_TX_IFREG,
113};
114
115enum pch_can_err {
116 PCH_STUF_ERR = 1,
117 PCH_FORM_ERR,
118 PCH_ACK_ERR,
119 PCH_BIT1_ERR,
120 PCH_BIT0_ERR,
121 PCH_CRC_ERR,
122 PCH_LEC_ALL,
123};
124
125enum pch_can_mode {
126 PCH_CAN_ENABLE,
127 PCH_CAN_DISABLE,
128 PCH_CAN_ALL,
129 PCH_CAN_NONE,
130 PCH_CAN_STOP,
131 PCH_CAN_RUN,
132};
133
134struct pch_can_if_regs {
135 u32 creq;
136 u32 cmask;
137 u32 mask1;
138 u32 mask2;
139 u32 id1;
140 u32 id2;
141 u32 mcont;
142 u32 data[4];
143 u32 rsv[13];
144};
145
146struct pch_can_regs {
147 u32 cont;
148 u32 stat;
149 u32 errc;
150 u32 bitt;
151 u32 intr;
152 u32 opt;
153 u32 brpe;
154 u32 reserve;
155 struct pch_can_if_regs ifregs[2]; /* [0]=if1 [1]=if2 */
156 u32 reserve1[8];
157 u32 treq1;
158 u32 treq2;
159 u32 reserve2[6];
160 u32 data1;
161 u32 data2;
162 u32 reserve3[6];
163 u32 canipend1;
164 u32 canipend2;
165 u32 reserve4[6];
166 u32 canmval1;
167 u32 canmval2;
168 u32 reserve5[37];
169 u32 srst;
170};
171
172struct pch_can_priv {
173 struct can_priv can;
174 struct pci_dev *dev;
175 u32 tx_enable[PCH_TX_OBJ_END];
176 u32 rx_enable[PCH_TX_OBJ_END];
177 u32 rx_link[PCH_TX_OBJ_END];
178 u32 int_enables;
179 struct net_device *ndev;
180 struct pch_can_regs __iomem *regs;
181 struct napi_struct napi;
182 int tx_obj; /* Point next Tx Obj index */
183 int use_msi;
184};
185
186static struct can_bittiming_const pch_can_bittiming_const = {
187 .name = KBUILD_MODNAME,
188 .tseg1_min = 2,
189 .tseg1_max = 16,
190 .tseg2_min = 1,
191 .tseg2_max = 8,
192 .sjw_max = 4,
193 .brp_min = 1,
194 .brp_max = 1024, /* 6bit + extended 4bit */
195 .brp_inc = 1,
196};
197
198static DEFINE_PCI_DEVICE_TABLE(pch_pci_tbl) = {
199 {PCI_VENDOR_ID_INTEL, 0x8818, PCI_ANY_ID, PCI_ANY_ID,},
200 {0,}
201};
202MODULE_DEVICE_TABLE(pci, pch_pci_tbl);
203
204static inline void pch_can_bit_set(void __iomem *addr, u32 mask)
205{
206 iowrite32(ioread32(addr) | mask, addr);
207}
208
209static inline void pch_can_bit_clear(void __iomem *addr, u32 mask)
210{
211 iowrite32(ioread32(addr) & ~mask, addr);
212}
213
214static void pch_can_set_run_mode(struct pch_can_priv *priv,
215 enum pch_can_mode mode)
216{
217 switch (mode) {
218 case PCH_CAN_RUN:
219 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_INIT);
220 break;
221
222 case PCH_CAN_STOP:
223 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_INIT);
224 break;
225
226 default:
227 netdev_err(priv->ndev, "%s -> Invalid Mode.\n", __func__);
228 break;
229 }
230}
231
232static void pch_can_set_optmode(struct pch_can_priv *priv)
233{
234 u32 reg_val = ioread32(&priv->regs->opt);
235
236 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
237 reg_val |= PCH_OPT_SILENT;
238
239 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
240 reg_val |= PCH_OPT_LBACK;
241
242 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_OPT);
243 iowrite32(reg_val, &priv->regs->opt);
244}
245
246static void pch_can_rw_msg_obj(void __iomem *creq_addr, u32 num)
247{
248 int counter = PCH_COUNTER_LIMIT;
249 u32 ifx_creq;
250
251 iowrite32(num, creq_addr);
252 while (counter) {
253 ifx_creq = ioread32(creq_addr) & PCH_IF_CREQ_BUSY;
254 if (!ifx_creq)
255 break;
256 counter--;
257 udelay(1);
258 }
259 if (!counter)
260 pr_err("%s:IF1 BUSY Flag is set forever.\n", __func__);
261}
262
263static void pch_can_set_int_enables(struct pch_can_priv *priv,
264 enum pch_can_mode interrupt_no)
265{
266 switch (interrupt_no) {
267 case PCH_CAN_DISABLE:
268 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE);
269 break;
270
271 case PCH_CAN_ALL:
272 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE);
273 break;
274
275 case PCH_CAN_NONE:
276 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE);
277 break;
278
279 default:
280 netdev_err(priv->ndev, "Invalid interrupt number.\n");
281 break;
282 }
283}
284
285static void pch_can_set_rxtx(struct pch_can_priv *priv, u32 buff_num,
286 int set, enum pch_ifreg dir)
287{
288 u32 ie;
289
290 if (dir)
291 ie = PCH_IF_MCONT_TXIE;
292 else
293 ie = PCH_IF_MCONT_RXIE;
294
295 /* Reading the Msg buffer from Message RAM to IF1/2 registers. */
296 iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
297 pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
298
299 /* Setting the IF1/2MASK1 register to access MsgVal and RxIE bits */
300 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_ARB | PCH_CMASK_CTRL,
301 &priv->regs->ifregs[dir].cmask);
302
303 if (set) {
304 /* Setting the MsgVal and RxIE/TxIE bits */
305 pch_can_bit_set(&priv->regs->ifregs[dir].mcont, ie);
306 pch_can_bit_set(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
307 } else {
308 /* Clearing the MsgVal and RxIE/TxIE bits */
309 pch_can_bit_clear(&priv->regs->ifregs[dir].mcont, ie);
310 pch_can_bit_clear(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
311 }
312
313 pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
314}
315
316static void pch_can_set_rx_all(struct pch_can_priv *priv, int set)
317{
318 int i;
319
320 /* Traversing to obtain the object configured as receivers. */
321 for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++)
322 pch_can_set_rxtx(priv, i, set, PCH_RX_IFREG);
323}
324
325static void pch_can_set_tx_all(struct pch_can_priv *priv, int set)
326{
327 int i;
328
329 /* Traversing to obtain the object configured as transmit object. */
330 for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++)
331 pch_can_set_rxtx(priv, i, set, PCH_TX_IFREG);
332}
333
334static u32 pch_can_int_pending(struct pch_can_priv *priv)
335{
336 return ioread32(&priv->regs->intr) & 0xffff;
337}
338
339static void pch_can_clear_if_buffers(struct pch_can_priv *priv)
340{
341 int i; /* Msg Obj ID (1~32) */
342
343 for (i = PCH_RX_OBJ_START; i <= PCH_TX_OBJ_END; i++) {
344 iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->ifregs[0].cmask);
345 iowrite32(0xffff, &priv->regs->ifregs[0].mask1);
346 iowrite32(0xffff, &priv->regs->ifregs[0].mask2);
347 iowrite32(0x0, &priv->regs->ifregs[0].id1);
348 iowrite32(0x0, &priv->regs->ifregs[0].id2);
349 iowrite32(0x0, &priv->regs->ifregs[0].mcont);
350 iowrite32(0x0, &priv->regs->ifregs[0].data[0]);
351 iowrite32(0x0, &priv->regs->ifregs[0].data[1]);
352 iowrite32(0x0, &priv->regs->ifregs[0].data[2]);
353 iowrite32(0x0, &priv->regs->ifregs[0].data[3]);
354 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
355 PCH_CMASK_ARB | PCH_CMASK_CTRL,
356 &priv->regs->ifregs[0].cmask);
357 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
358 }
359}
360
361static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
362{
363 int i;
364
365 for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) {
366 iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
367 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
368
369 iowrite32(0x0, &priv->regs->ifregs[0].id1);
370 iowrite32(0x0, &priv->regs->ifregs[0].id2);
371
372 pch_can_bit_set(&priv->regs->ifregs[0].mcont,
373 PCH_IF_MCONT_UMASK);
374
375 /* In case FIFO mode, Last EoB of Rx Obj must be 1 */
376 if (i == PCH_RX_OBJ_END)
377 pch_can_bit_set(&priv->regs->ifregs[0].mcont,
378 PCH_IF_MCONT_EOB);
379 else
380 pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
381 PCH_IF_MCONT_EOB);
382
383 iowrite32(0, &priv->regs->ifregs[0].mask1);
384 pch_can_bit_clear(&priv->regs->ifregs[0].mask2,
385 0x1fff | PCH_MASK2_MDIR_MXTD);
386
387 /* Setting CMASK for writing */
388 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB |
389 PCH_CMASK_CTRL, &priv->regs->ifregs[0].cmask);
390
391 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
392 }
393
394 for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) {
395 iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[1].cmask);
396 pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i);
397
398 /* Resetting DIR bit for reception */
399 iowrite32(0x0, &priv->regs->ifregs[1].id1);
400 iowrite32(PCH_ID2_DIR, &priv->regs->ifregs[1].id2);
401
402 /* Setting EOB bit for transmitter */
403 iowrite32(PCH_IF_MCONT_EOB | PCH_IF_MCONT_UMASK,
404 &priv->regs->ifregs[1].mcont);
405
406 iowrite32(0, &priv->regs->ifregs[1].mask1);
407 pch_can_bit_clear(&priv->regs->ifregs[1].mask2, 0x1fff);
408
409 /* Setting CMASK for writing */
410 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB |
411 PCH_CMASK_CTRL, &priv->regs->ifregs[1].cmask);
412
413 pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i);
414 }
415}
416
417static void pch_can_init(struct pch_can_priv *priv)
418{
419 /* Stopping the Can device. */
420 pch_can_set_run_mode(priv, PCH_CAN_STOP);
421
422 /* Clearing all the message object buffers. */
423 pch_can_clear_if_buffers(priv);
424
425 /* Configuring the respective message object as either rx/tx object. */
426 pch_can_config_rx_tx_buffers(priv);
427
428 /* Enabling the interrupts. */
429 pch_can_set_int_enables(priv, PCH_CAN_ALL);
430}
431
432static void pch_can_release(struct pch_can_priv *priv)
433{
434 /* Stooping the CAN device. */
435 pch_can_set_run_mode(priv, PCH_CAN_STOP);
436
437 /* Disabling the interrupts. */
438 pch_can_set_int_enables(priv, PCH_CAN_NONE);
439
440 /* Disabling all the receive object. */
441 pch_can_set_rx_all(priv, 0);
442
443 /* Disabling all the transmit object. */
444 pch_can_set_tx_all(priv, 0);
445}
446
447/* This function clears interrupt(s) from the CAN device. */
448static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)
449{
450 /* Clear interrupt for transmit object */
451 if ((mask >= PCH_RX_OBJ_START) && (mask <= PCH_RX_OBJ_END)) {
452 /* Setting CMASK for clearing the reception interrupts. */
453 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB,
454 &priv->regs->ifregs[0].cmask);
455
456 /* Clearing the Dir bit. */
457 pch_can_bit_clear(&priv->regs->ifregs[0].id2, PCH_ID2_DIR);
458
459 /* Clearing NewDat & IntPnd */
460 pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
461 PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND);
462
463 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, mask);
464 } else if ((mask >= PCH_TX_OBJ_START) && (mask <= PCH_TX_OBJ_END)) {
465 /*
466 * Setting CMASK for clearing interrupts for frame transmission.
467 */
468 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB,
469 &priv->regs->ifregs[1].cmask);
470
471 /* Resetting the ID registers. */
472 pch_can_bit_set(&priv->regs->ifregs[1].id2,
473 PCH_ID2_DIR | (0x7ff << 2));
474 iowrite32(0x0, &priv->regs->ifregs[1].id1);
475
476 /* Claring NewDat, TxRqst & IntPnd */
477 pch_can_bit_clear(&priv->regs->ifregs[1].mcont,
478 PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND |
479 PCH_IF_MCONT_TXRQXT);
480 pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, mask);
481 }
482}
483
484static void pch_can_reset(struct pch_can_priv *priv)
485{
486 /* write to sw reset register */
487 iowrite32(1, &priv->regs->srst);
488 iowrite32(0, &priv->regs->srst);
489}
490
491static void pch_can_error(struct net_device *ndev, u32 status)
492{
493 struct sk_buff *skb;
494 struct pch_can_priv *priv = netdev_priv(ndev);
495 struct can_frame *cf;
496 u32 errc, lec;
497 struct net_device_stats *stats = &(priv->ndev->stats);
498 enum can_state state = priv->can.state;
499
500 skb = alloc_can_err_skb(ndev, &cf);
501 if (!skb)
502 return;
503
504 if (status & PCH_BUS_OFF) {
505 pch_can_set_tx_all(priv, 0);
506 pch_can_set_rx_all(priv, 0);
507 state = CAN_STATE_BUS_OFF;
508 cf->can_id |= CAN_ERR_BUSOFF;
509 can_bus_off(ndev);
510 }
511
512 errc = ioread32(&priv->regs->errc);
513 /* Warning interrupt. */
514 if (status & PCH_EWARN) {
515 state = CAN_STATE_ERROR_WARNING;
516 priv->can.can_stats.error_warning++;
517 cf->can_id |= CAN_ERR_CRTL;
518 if (((errc & PCH_REC) >> 8) > 96)
519 cf->data[1] |= CAN_ERR_CRTL_RX_WARNING;
520 if ((errc & PCH_TEC) > 96)
521 cf->data[1] |= CAN_ERR_CRTL_TX_WARNING;
522 netdev_dbg(ndev,
523 "%s -> Error Counter is more than 96.\n", __func__);
524 }
525 /* Error passive interrupt. */
526 if (status & PCH_EPASSIV) {
527 priv->can.can_stats.error_passive++;
528 state = CAN_STATE_ERROR_PASSIVE;
529 cf->can_id |= CAN_ERR_CRTL;
530 if (((errc & PCH_REC) >> 8) > 127)
531 cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
532 if ((errc & PCH_TEC) > 127)
533 cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE;
534 netdev_dbg(ndev,
535 "%s -> CAN controller is ERROR PASSIVE .\n", __func__);
536 }
537
538 lec = status & PCH_LEC_ALL;
539 switch (lec) {
540 case PCH_STUF_ERR:
541 cf->data[2] |= CAN_ERR_PROT_STUFF;
542 priv->can.can_stats.bus_error++;
543 stats->rx_errors++;
544 break;
545 case PCH_FORM_ERR:
546 cf->data[2] |= CAN_ERR_PROT_FORM;
547 priv->can.can_stats.bus_error++;
548 stats->rx_errors++;
549 break;
550 case PCH_ACK_ERR:
551 cf->can_id |= CAN_ERR_ACK;
552 priv->can.can_stats.bus_error++;
553 stats->rx_errors++;
554 break;
555 case PCH_BIT1_ERR:
556 case PCH_BIT0_ERR:
557 cf->data[2] |= CAN_ERR_PROT_BIT;
558 priv->can.can_stats.bus_error++;
559 stats->rx_errors++;
560 break;
561 case PCH_CRC_ERR:
562 cf->data[2] |= CAN_ERR_PROT_LOC_CRC_SEQ |
563 CAN_ERR_PROT_LOC_CRC_DEL;
564 priv->can.can_stats.bus_error++;
565 stats->rx_errors++;
566 break;
567 case PCH_LEC_ALL: /* Written by CPU. No error status */
568 break;
569 }
570
571 cf->data[6] = errc & PCH_TEC;
572 cf->data[7] = (errc & PCH_REC) >> 8;
573
574 priv->can.state = state;
575 netif_receive_skb(skb);
576
577 stats->rx_packets++;
578 stats->rx_bytes += cf->can_dlc;
579}
580
581static irqreturn_t pch_can_interrupt(int irq, void *dev_id)
582{
583 struct net_device *ndev = (struct net_device *)dev_id;
584 struct pch_can_priv *priv = netdev_priv(ndev);
585
586 if (!pch_can_int_pending(priv))
587 return IRQ_NONE;
588
589 pch_can_set_int_enables(priv, PCH_CAN_NONE);
590 napi_schedule(&priv->napi);
591 return IRQ_HANDLED;
592}
593
594static void pch_fifo_thresh(struct pch_can_priv *priv, int obj_id)
595{
596 if (obj_id < PCH_FIFO_THRESH) {
597 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL |
598 PCH_CMASK_ARB, &priv->regs->ifregs[0].cmask);
599
600 /* Clearing the Dir bit. */
601 pch_can_bit_clear(&priv->regs->ifregs[0].id2, PCH_ID2_DIR);
602
603 /* Clearing NewDat & IntPnd */
604 pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
605 PCH_IF_MCONT_INTPND);
606 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_id);
607 } else if (obj_id > PCH_FIFO_THRESH) {
608 pch_can_int_clr(priv, obj_id);
609 } else if (obj_id == PCH_FIFO_THRESH) {
610 int cnt;
611 for (cnt = 0; cnt < PCH_FIFO_THRESH; cnt++)
612 pch_can_int_clr(priv, cnt + 1);
613 }
614}
615
616static void pch_can_rx_msg_lost(struct net_device *ndev, int obj_id)
617{
618 struct pch_can_priv *priv = netdev_priv(ndev);
619 struct net_device_stats *stats = &(priv->ndev->stats);
620 struct sk_buff *skb;
621 struct can_frame *cf;
622
623 netdev_dbg(priv->ndev, "Msg Obj is overwritten.\n");
624 pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
625 PCH_IF_MCONT_MSGLOST);
626 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
627 &priv->regs->ifregs[0].cmask);
628 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_id);
629
630 skb = alloc_can_err_skb(ndev, &cf);
631 if (!skb)
632 return;
633
634 cf->can_id |= CAN_ERR_CRTL;
635 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
636 stats->rx_over_errors++;
637 stats->rx_errors++;
638
639 netif_receive_skb(skb);
640}
641
642static int pch_can_rx_normal(struct net_device *ndev, u32 obj_num, int quota)
643{
644 u32 reg;
645 canid_t id;
646 int rcv_pkts = 0;
647 struct sk_buff *skb;
648 struct can_frame *cf;
649 struct pch_can_priv *priv = netdev_priv(ndev);
650 struct net_device_stats *stats = &(priv->ndev->stats);
651 int i;
652 u32 id2;
653 u16 data_reg;
654
655 do {
656 /* Reading the message object from the Message RAM */
657 iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
658 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_num);
659
660 /* Reading the MCONT register. */
661 reg = ioread32(&priv->regs->ifregs[0].mcont);
662
663 if (reg & PCH_IF_MCONT_EOB)
664 break;
665
666 /* If MsgLost bit set. */
667 if (reg & PCH_IF_MCONT_MSGLOST) {
668 pch_can_rx_msg_lost(ndev, obj_num);
669 rcv_pkts++;
670 quota--;
671 obj_num++;
672 continue;
673 } else if (!(reg & PCH_IF_MCONT_NEWDAT)) {
674 obj_num++;
675 continue;
676 }
677
678 skb = alloc_can_skb(priv->ndev, &cf);
679 if (!skb) {
680 netdev_err(ndev, "alloc_can_skb Failed\n");
681 return rcv_pkts;
682 }
683
684 /* Get Received data */
685 id2 = ioread32(&priv->regs->ifregs[0].id2);
686 if (id2 & PCH_ID2_XTD) {
687 id = (ioread32(&priv->regs->ifregs[0].id1) & 0xffff);
688 id |= (((id2) & 0x1fff) << 16);
689 cf->can_id = id | CAN_EFF_FLAG;
690 } else {
691 id = (id2 >> 2) & CAN_SFF_MASK;
692 cf->can_id = id;
693 }
694
695 if (id2 & PCH_ID2_DIR)
696 cf->can_id |= CAN_RTR_FLAG;
697
698 cf->can_dlc = get_can_dlc((ioread32(&priv->regs->
699 ifregs[0].mcont)) & 0xF);
700
701 for (i = 0; i < cf->can_dlc; i += 2) {
702 data_reg = ioread16(&priv->regs->ifregs[0].data[i / 2]);
703 cf->data[i] = data_reg;
704 cf->data[i + 1] = data_reg >> 8;
705 }
706
707 netif_receive_skb(skb);
708 rcv_pkts++;
709 stats->rx_packets++;
710 quota--;
711 stats->rx_bytes += cf->can_dlc;
712
713 pch_fifo_thresh(priv, obj_num);
714 obj_num++;
715 } while (quota > 0);
716
717 return rcv_pkts;
718}
719
720static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat)
721{
722 struct pch_can_priv *priv = netdev_priv(ndev);
723 struct net_device_stats *stats = &(priv->ndev->stats);
724 u32 dlc;
725
726 can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);
727 iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
728 &priv->regs->ifregs[1].cmask);
729 pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, int_stat);
730 dlc = get_can_dlc(ioread32(&priv->regs->ifregs[1].mcont) &
731 PCH_IF_MCONT_DLC);
732 stats->tx_bytes += dlc;
733 stats->tx_packets++;
734 if (int_stat == PCH_TX_OBJ_END)
735 netif_wake_queue(ndev);
736}
737
738static int pch_can_poll(struct napi_struct *napi, int quota)
739{
740 struct net_device *ndev = napi->dev;
741 struct pch_can_priv *priv = netdev_priv(ndev);
742 u32 int_stat;
743 u32 reg_stat;
744 int quota_save = quota;
745
746 int_stat = pch_can_int_pending(priv);
747 if (!int_stat)
748 goto end;
749
750 if (int_stat == PCH_STATUS_INT) {
751 reg_stat = ioread32(&priv->regs->stat);
752
753 if ((reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) &&
754 ((reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL)) {
755 pch_can_error(ndev, reg_stat);
756 quota--;
757 }
758
759 if (reg_stat & (PCH_TX_OK | PCH_RX_OK))
760 pch_can_bit_clear(&priv->regs->stat,
761 reg_stat & (PCH_TX_OK | PCH_RX_OK));
762
763 int_stat = pch_can_int_pending(priv);
764 }
765
766 if (quota == 0)
767 goto end;
768
769 if ((int_stat >= PCH_RX_OBJ_START) && (int_stat <= PCH_RX_OBJ_END)) {
770 quota -= pch_can_rx_normal(ndev, int_stat, quota);
771 } else if ((int_stat >= PCH_TX_OBJ_START) &&
772 (int_stat <= PCH_TX_OBJ_END)) {
773 /* Handle transmission interrupt */
774 pch_can_tx_complete(ndev, int_stat);
775 }
776
777end:
778 napi_complete(napi);
779 pch_can_set_int_enables(priv, PCH_CAN_ALL);
780
781 return quota_save - quota;
782}
783
784static int pch_set_bittiming(struct net_device *ndev)
785{
786 struct pch_can_priv *priv = netdev_priv(ndev);
787 const struct can_bittiming *bt = &priv->can.bittiming;
788 u32 canbit;
789 u32 bepe;
790
791 /* Setting the CCE bit for accessing the Can Timing register. */
792 pch_can_bit_set(&priv->regs->cont, PCH_CTRL_CCE);
793
794 canbit = (bt->brp - 1) & PCH_MSK_BITT_BRP;
795 canbit |= (bt->sjw - 1) << PCH_BIT_SJW_SHIFT;
796 canbit |= (bt->phase_seg1 + bt->prop_seg - 1) << PCH_BIT_TSEG1_SHIFT;
797 canbit |= (bt->phase_seg2 - 1) << PCH_BIT_TSEG2_SHIFT;
798 bepe = ((bt->brp - 1) & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE_SHIFT;
799 iowrite32(canbit, &priv->regs->bitt);
800 iowrite32(bepe, &priv->regs->brpe);
801 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_CCE);
802
803 return 0;
804}
805
806static void pch_can_start(struct net_device *ndev)
807{
808 struct pch_can_priv *priv = netdev_priv(ndev);
809
810 if (priv->can.state != CAN_STATE_STOPPED)
811 pch_can_reset(priv);
812
813 pch_set_bittiming(ndev);
814 pch_can_set_optmode(priv);
815
816 pch_can_set_tx_all(priv, 1);
817 pch_can_set_rx_all(priv, 1);
818
819 /* Setting the CAN to run mode. */
820 pch_can_set_run_mode(priv, PCH_CAN_RUN);
821
822 priv->can.state = CAN_STATE_ERROR_ACTIVE;
823
824 return;
825}
826
827static int pch_can_do_set_mode(struct net_device *ndev, enum can_mode mode)
828{
829 int ret = 0;
830
831 switch (mode) {
832 case CAN_MODE_START:
833 pch_can_start(ndev);
834 netif_wake_queue(ndev);
835 break;
836 default:
837 ret = -EOPNOTSUPP;
838 break;
839 }
840
841 return ret;
842}
843
844static int pch_can_open(struct net_device *ndev)
845{
846 struct pch_can_priv *priv = netdev_priv(ndev);
847 int retval;
848
849 /* Regstering the interrupt. */
850 retval = request_irq(priv->dev->irq, pch_can_interrupt, IRQF_SHARED,
851 ndev->name, ndev);
852 if (retval) {
853 netdev_err(ndev, "request_irq failed.\n");
854 goto req_irq_err;
855 }
856
857 /* Open common can device */
858 retval = open_candev(ndev);
859 if (retval) {
860 netdev_err(ndev, "open_candev() failed %d\n", retval);
861 goto err_open_candev;
862 }
863
864 pch_can_init(priv);
865 pch_can_start(ndev);
866 napi_enable(&priv->napi);
867 netif_start_queue(ndev);
868
869 return 0;
870
871err_open_candev:
872 free_irq(priv->dev->irq, ndev);
873req_irq_err:
874 pch_can_release(priv);
875
876 return retval;
877}
878
879static int pch_close(struct net_device *ndev)
880{
881 struct pch_can_priv *priv = netdev_priv(ndev);
882
883 netif_stop_queue(ndev);
884 napi_disable(&priv->napi);
885 pch_can_release(priv);
886 free_irq(priv->dev->irq, ndev);
887 close_candev(ndev);
888 priv->can.state = CAN_STATE_STOPPED;
889 return 0;
890}
891
892static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
893{
894 struct pch_can_priv *priv = netdev_priv(ndev);
895 struct can_frame *cf = (struct can_frame *)skb->data;
896 int tx_obj_no;
897 int i;
898 u32 id2;
899
900 if (can_dropped_invalid_skb(ndev, skb))
901 return NETDEV_TX_OK;
902
903 tx_obj_no = priv->tx_obj;
904 if (priv->tx_obj == PCH_TX_OBJ_END) {
905 if (ioread32(&priv->regs->treq2) & PCH_TREQ2_TX_MASK)
906 netif_stop_queue(ndev);
907
908 priv->tx_obj = PCH_TX_OBJ_START;
909 } else {
910 priv->tx_obj++;
911 }
912
913 /* Setting the CMASK register. */
914 pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL);
915
916 /* If ID extended is set. */
917 if (cf->can_id & CAN_EFF_FLAG) {
918 iowrite32(cf->can_id & 0xffff, &priv->regs->ifregs[1].id1);
919 id2 = ((cf->can_id >> 16) & 0x1fff) | PCH_ID2_XTD;
920 } else {
921 iowrite32(0, &priv->regs->ifregs[1].id1);
922 id2 = (cf->can_id & CAN_SFF_MASK) << 2;
923 }
924
925 id2 |= PCH_ID_MSGVAL;
926
927 /* If remote frame has to be transmitted.. */
928 if (!(cf->can_id & CAN_RTR_FLAG))
929 id2 |= PCH_ID2_DIR;
930
931 iowrite32(id2, &priv->regs->ifregs[1].id2);
932
933 /* Copy data to register */
934 for (i = 0; i < cf->can_dlc; i += 2) {
935 iowrite16(cf->data[i] | (cf->data[i + 1] << 8),
936 &priv->regs->ifregs[1].data[i / 2]);
937 }
938
939 can_put_echo_skb(skb, ndev, tx_obj_no - PCH_RX_OBJ_END - 1);
940
941 /* Set the size of the data. Update if2_mcont */
942 iowrite32(cf->can_dlc | PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT |
943 PCH_IF_MCONT_TXIE, &priv->regs->ifregs[1].mcont);
944
945 pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no);
946
947 return NETDEV_TX_OK;
948}
949
950static const struct net_device_ops pch_can_netdev_ops = {
951 .ndo_open = pch_can_open,
952 .ndo_stop = pch_close,
953 .ndo_start_xmit = pch_xmit,
954};
955
956static void __devexit pch_can_remove(struct pci_dev *pdev)
957{
958 struct net_device *ndev = pci_get_drvdata(pdev);
959 struct pch_can_priv *priv = netdev_priv(ndev);
960
961 unregister_candev(priv->ndev);
962 if (priv->use_msi)
963 pci_disable_msi(priv->dev);
964 pci_release_regions(pdev);
965 pci_disable_device(pdev);
966 pci_set_drvdata(pdev, NULL);
967 pch_can_reset(priv);
968 pci_iounmap(pdev, priv->regs);
969 free_candev(priv->ndev);
970}
971
972#ifdef CONFIG_PM
973static void pch_can_set_int_custom(struct pch_can_priv *priv)
974{
975 /* Clearing the IE, SIE and EIE bits of Can control register. */
976 pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE);
977
978 /* Appropriately setting them. */
979 pch_can_bit_set(&priv->regs->cont,
980 ((priv->int_enables & PCH_MSK_CTRL_IE_SIE_EIE) << 1));
981}
982
983/* This function retrieves interrupt enabled for the CAN device. */
984static u32 pch_can_get_int_enables(struct pch_can_priv *priv)
985{
986 /* Obtaining the status of IE, SIE and EIE interrupt bits. */
987 return (ioread32(&priv->regs->cont) & PCH_CTRL_IE_SIE_EIE) >> 1;
988}
989
990static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
991 enum pch_ifreg dir)
992{
993 u32 ie, enable;
994
995 if (dir)
996 ie = PCH_IF_MCONT_RXIE;
997 else
998 ie = PCH_IF_MCONT_TXIE;
999
1000 iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
1001 pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
1002
1003 if (((ioread32(&priv->regs->ifregs[dir].id2)) & PCH_ID_MSGVAL) &&
1004 ((ioread32(&priv->regs->ifregs[dir].mcont)) & ie))
1005 enable = 1;
1006 else
1007 enable = 0;
1008
1009 return enable;
1010}
1011
1012static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
1013 u32 buffer_num, int set)
1014{
1015 iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
1016 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
1017 iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
1018 &priv->regs->ifregs[0].cmask);
1019 if (set)
1020 pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
1021 PCH_IF_MCONT_EOB);
1022 else
1023 pch_can_bit_set(&priv->regs->ifregs[0].mcont, PCH_IF_MCONT_EOB);
1024
1025 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
1026}
1027
1028static u32 pch_can_get_rx_buffer_link(struct pch_can_priv *priv, u32 buffer_num)
1029{
1030 u32 link;
1031
1032 iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
1033 pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
1034
1035 if (ioread32(&priv->regs->ifregs[0].mcont) & PCH_IF_MCONT_EOB)
1036 link = 0;
1037 else
1038 link = 1;
1039 return link;
1040}
1041
1042static int pch_can_get_buffer_status(struct pch_can_priv *priv)
1043{
1044 return (ioread32(&priv->regs->treq1) & 0xffff) |
1045 (ioread32(&priv->regs->treq2) << 16);
1046}
1047
1048static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
1049{
1050 int i;
1051 int retval;
1052 u32 buf_stat; /* Variable for reading the transmit buffer status. */
1053 int counter = PCH_COUNTER_LIMIT;
1054
1055 struct net_device *dev = pci_get_drvdata(pdev);
1056 struct pch_can_priv *priv = netdev_priv(dev);
1057
1058 /* Stop the CAN controller */
1059 pch_can_set_run_mode(priv, PCH_CAN_STOP);
1060
1061 /* Indicate that we are aboutto/in suspend */
1062 priv->can.state = CAN_STATE_STOPPED;
1063
1064 /* Waiting for all transmission to complete. */
1065 while (counter) {
1066 buf_stat = pch_can_get_buffer_status(priv);
1067 if (!buf_stat)
1068 break;
1069 counter--;
1070 udelay(1);
1071 }
1072 if (!counter)
1073 dev_err(&pdev->dev, "%s -> Transmission time out.\n", __func__);
1074
1075 /* Save interrupt configuration and then disable them */
1076 priv->int_enables = pch_can_get_int_enables(priv);
1077 pch_can_set_int_enables(priv, PCH_CAN_DISABLE);
1078
1079 /* Save Tx buffer enable state */
1080 for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++)
1081 priv->tx_enable[i - 1] = pch_can_get_rxtx_ir(priv, i,
1082 PCH_TX_IFREG);
1083
1084 /* Disable all Transmit buffers */
1085 pch_can_set_tx_all(priv, 0);
1086
1087 /* Save Rx buffer enable state */
1088 for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) {
1089 priv->rx_enable[i - 1] = pch_can_get_rxtx_ir(priv, i,
1090 PCH_RX_IFREG);
1091 priv->rx_link[i - 1] = pch_can_get_rx_buffer_link(priv, i);
1092 }
1093
1094 /* Disable all Receive buffers */
1095 pch_can_set_rx_all(priv, 0);
1096 retval = pci_save_state(pdev);
1097 if (retval) {
1098 dev_err(&pdev->dev, "pci_save_state failed.\n");
1099 } else {
1100 pci_enable_wake(pdev, PCI_D3hot, 0);
1101 pci_disable_device(pdev);
1102 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1103 }
1104
1105 return retval;
1106}
1107
1108static int pch_can_resume(struct pci_dev *pdev)
1109{
1110 int i;
1111 int retval;
1112 struct net_device *dev = pci_get_drvdata(pdev);
1113 struct pch_can_priv *priv = netdev_priv(dev);
1114
1115 pci_set_power_state(pdev, PCI_D0);
1116 pci_restore_state(pdev);
1117 retval = pci_enable_device(pdev);
1118 if (retval) {
1119 dev_err(&pdev->dev, "pci_enable_device failed.\n");
1120 return retval;
1121 }
1122
1123 pci_enable_wake(pdev, PCI_D3hot, 0);
1124
1125 priv->can.state = CAN_STATE_ERROR_ACTIVE;
1126
1127 /* Disabling all interrupts. */
1128 pch_can_set_int_enables(priv, PCH_CAN_DISABLE);
1129
1130 /* Setting the CAN device in Stop Mode. */
1131 pch_can_set_run_mode(priv, PCH_CAN_STOP);
1132
1133 /* Configuring the transmit and receive buffers. */
1134 pch_can_config_rx_tx_buffers(priv);
1135
1136 /* Restore the CAN state */
1137 pch_set_bittiming(dev);
1138
1139 /* Listen/Active */
1140 pch_can_set_optmode(priv);
1141
1142 /* Enabling the transmit buffer. */
1143 for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++)
1144 pch_can_set_rxtx(priv, i, priv->tx_enable[i - 1], PCH_TX_IFREG);
1145
1146 /* Configuring the receive buffer and enabling them. */
1147 for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) {
1148 /* Restore buffer link */
1149 pch_can_set_rx_buffer_link(priv, i, priv->rx_link[i - 1]);
1150
1151 /* Restore buffer enables */
1152 pch_can_set_rxtx(priv, i, priv->rx_enable[i - 1], PCH_RX_IFREG);
1153 }
1154
1155 /* Enable CAN Interrupts */
1156 pch_can_set_int_custom(priv);
1157
1158 /* Restore Run Mode */
1159 pch_can_set_run_mode(priv, PCH_CAN_RUN);
1160
1161 return retval;
1162}
1163#else
1164#define pch_can_suspend NULL
1165#define pch_can_resume NULL
1166#endif
1167
1168static int pch_can_get_berr_counter(const struct net_device *dev,
1169 struct can_berr_counter *bec)
1170{
1171 struct pch_can_priv *priv = netdev_priv(dev);
1172 u32 errc = ioread32(&priv->regs->errc);
1173
1174 bec->txerr = errc & PCH_TEC;
1175 bec->rxerr = (errc & PCH_REC) >> 8;
1176
1177 return 0;
1178}
1179
1180static int __devinit pch_can_probe(struct pci_dev *pdev,
1181 const struct pci_device_id *id)
1182{
1183 struct net_device *ndev;
1184 struct pch_can_priv *priv;
1185 int rc;
1186 void __iomem *addr;
1187
1188 rc = pci_enable_device(pdev);
1189 if (rc) {
1190 dev_err(&pdev->dev, "Failed pci_enable_device %d\n", rc);
1191 goto probe_exit_endev;
1192 }
1193
1194 rc = pci_request_regions(pdev, KBUILD_MODNAME);
1195 if (rc) {
1196 dev_err(&pdev->dev, "Failed pci_request_regions %d\n", rc);
1197 goto probe_exit_pcireq;
1198 }
1199
1200 addr = pci_iomap(pdev, 1, 0);
1201 if (!addr) {
1202 rc = -EIO;
1203 dev_err(&pdev->dev, "Failed pci_iomap\n");
1204 goto probe_exit_ipmap;
1205 }
1206
1207 ndev = alloc_candev(sizeof(struct pch_can_priv), PCH_TX_OBJ_END);
1208 if (!ndev) {
1209 rc = -ENOMEM;
1210 dev_err(&pdev->dev, "Failed alloc_candev\n");
1211 goto probe_exit_alloc_candev;
1212 }
1213
1214 priv = netdev_priv(ndev);
1215 priv->ndev = ndev;
1216 priv->regs = addr;
1217 priv->dev = pdev;
1218 priv->can.bittiming_const = &pch_can_bittiming_const;
1219 priv->can.do_set_mode = pch_can_do_set_mode;
1220 priv->can.do_get_berr_counter = pch_can_get_berr_counter;
1221 priv->can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY |
1222 CAN_CTRLMODE_LOOPBACK;
1223 priv->tx_obj = PCH_TX_OBJ_START; /* Point head of Tx Obj */
1224
1225 ndev->irq = pdev->irq;
1226 ndev->flags |= IFF_ECHO;
1227
1228 pci_set_drvdata(pdev, ndev);
1229 SET_NETDEV_DEV(ndev, &pdev->dev);
1230 ndev->netdev_ops = &pch_can_netdev_ops;
1231 priv->can.clock.freq = PCH_CAN_CLK; /* Hz */
1232
1233 netif_napi_add(ndev, &priv->napi, pch_can_poll, PCH_RX_OBJ_END);
1234
1235 rc = pci_enable_msi(priv->dev);
1236 if (rc) {
1237 netdev_err(ndev, "PCH CAN opened without MSI\n");
1238 priv->use_msi = 0;
1239 } else {
1240 netdev_err(ndev, "PCH CAN opened with MSI\n");
1241 pci_set_master(pdev);
1242 priv->use_msi = 1;
1243 }
1244
1245 rc = register_candev(ndev);
1246 if (rc) {
1247 dev_err(&pdev->dev, "Failed register_candev %d\n", rc);
1248 goto probe_exit_reg_candev;
1249 }
1250
1251 return 0;
1252
1253probe_exit_reg_candev:
1254 if (priv->use_msi)
1255 pci_disable_msi(priv->dev);
1256 free_candev(ndev);
1257probe_exit_alloc_candev:
1258 pci_iounmap(pdev, addr);
1259probe_exit_ipmap:
1260 pci_release_regions(pdev);
1261probe_exit_pcireq:
1262 pci_disable_device(pdev);
1263probe_exit_endev:
1264 return rc;
1265}
1266
1267static struct pci_driver pch_can_pci_driver = {
1268 .name = "pch_can",
1269 .id_table = pch_pci_tbl,
1270 .probe = pch_can_probe,
1271 .remove = __devexit_p(pch_can_remove),
1272 .suspend = pch_can_suspend,
1273 .resume = pch_can_resume,
1274};
1275
1276static int __init pch_can_pci_init(void)
1277{
1278 return pci_register_driver(&pch_can_pci_driver);
1279}
1280module_init(pch_can_pci_init);
1281
1282static void __exit pch_can_pci_exit(void)
1283{
1284 pci_unregister_driver(&pch_can_pci_driver);
1285}
1286module_exit(pch_can_pci_exit);
1287
1288MODULE_DESCRIPTION("Intel EG20T PCH CAN(Controller Area Network) Driver");
1289MODULE_LICENSE("GPL v2");
1290MODULE_VERSION("0.94");
diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig
index ae3505afd682..6fdc031daaae 100644
--- a/drivers/net/can/sja1000/Kconfig
+++ b/drivers/net/can/sja1000/Kconfig
@@ -58,4 +58,16 @@ config CAN_PLX_PCI
58 - esd CAN-PCIe/2000 58 - esd CAN-PCIe/2000
59 - Marathon CAN-bus-PCI card (http://www.marathon.ru/) 59 - Marathon CAN-bus-PCI card (http://www.marathon.ru/)
60 - TEWS TECHNOLOGIES TPMC810 card (http://www.tews.com/) 60 - TEWS TECHNOLOGIES TPMC810 card (http://www.tews.com/)
61
62config CAN_TSCAN1
63 tristate "TS-CAN1 PC104 boards"
64 depends on ISA
65 help
66 This driver is for Technologic Systems' TSCAN-1 PC104 boards.
67 http://www.embeddedarm.com/products/board-detail.php?product=TS-CAN1
68 The driver supports multiple boards and automatically configures them:
69 PLD IO base addresses are read from jumpers JP1 and JP2,
70 IRQ numbers are read from jumpers JP4 and JP5,
71 SJA1000 IO base addresses are chosen heuristically (first that works).
72
61endif 73endif
diff --git a/drivers/net/can/sja1000/Makefile b/drivers/net/can/sja1000/Makefile
index ce924553995d..2c591eb321c7 100644
--- a/drivers/net/can/sja1000/Makefile
+++ b/drivers/net/can/sja1000/Makefile
@@ -9,5 +9,6 @@ obj-$(CONFIG_CAN_SJA1000_OF_PLATFORM) += sja1000_of_platform.o
9obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o 9obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o
10obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o 10obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o
11obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o 11obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o
12obj-$(CONFIG_CAN_TSCAN1) += tscan1.o
12 13
13ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG 14ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/sja1000/plx_pci.c b/drivers/net/can/sja1000/plx_pci.c
index 437b5c716a24..231385b8e08f 100644
--- a/drivers/net/can/sja1000/plx_pci.c
+++ b/drivers/net/can/sja1000/plx_pci.c
@@ -383,7 +383,7 @@ static void plx_pci_reset_marathon(struct pci_dev *pdev)
383{ 383{
384 void __iomem *reset_addr; 384 void __iomem *reset_addr;
385 int i; 385 int i;
386 int reset_bar[2] = {3, 5}; 386 static const int reset_bar[2] = {3, 5};
387 387
388 plx_pci_reset_common(pdev); 388 plx_pci_reset_common(pdev);
389 389
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c
index 0a8de01d52f7..f501bba1fc6f 100644
--- a/drivers/net/can/sja1000/sja1000.c
+++ b/drivers/net/can/sja1000/sja1000.c
@@ -346,10 +346,10 @@ static void sja1000_rx(struct net_device *dev)
346 | (priv->read_reg(priv, REG_ID2) >> 5); 346 | (priv->read_reg(priv, REG_ID2) >> 5);
347 } 347 }
348 348
349 cf->can_dlc = get_can_dlc(fi & 0x0F);
349 if (fi & FI_RTR) { 350 if (fi & FI_RTR) {
350 id |= CAN_RTR_FLAG; 351 id |= CAN_RTR_FLAG;
351 } else { 352 } else {
352 cf->can_dlc = get_can_dlc(fi & 0x0F);
353 for (i = 0; i < cf->can_dlc; i++) 353 for (i = 0; i < cf->can_dlc; i++)
354 cf->data[i] = priv->read_reg(priv, dreg++); 354 cf->data[i] = priv->read_reg(priv, dreg++);
355 } 355 }
@@ -425,7 +425,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
425 cf->data[3] = ecc & ECC_SEG; 425 cf->data[3] = ecc & ECC_SEG;
426 break; 426 break;
427 } 427 }
428 /* Error occured during transmission? */ 428 /* Error occurred during transmission? */
429 if ((ecc & ECC_DIR) == 0) 429 if ((ecc & ECC_DIR) == 0)
430 cf->data[2] |= CAN_ERR_PROT_TX; 430 cf->data[2] |= CAN_ERR_PROT_TX;
431 } 431 }
diff --git a/drivers/net/can/sja1000/sja1000_of_platform.c b/drivers/net/can/sja1000/sja1000_of_platform.c
index 5bfccfdf3bbb..9793df6e3455 100644
--- a/drivers/net/can/sja1000/sja1000_of_platform.c
+++ b/drivers/net/can/sja1000/sja1000_of_platform.c
@@ -87,8 +87,7 @@ static int __devexit sja1000_ofp_remove(struct platform_device *ofdev)
87 return 0; 87 return 0;
88} 88}
89 89
90static int __devinit sja1000_ofp_probe(struct platform_device *ofdev, 90static int __devinit sja1000_ofp_probe(struct platform_device *ofdev)
91 const struct of_device_id *id)
92{ 91{
93 struct device_node *np = ofdev->dev.of_node; 92 struct device_node *np = ofdev->dev.of_node;
94 struct net_device *dev; 93 struct net_device *dev;
@@ -107,17 +106,13 @@ static int __devinit sja1000_ofp_probe(struct platform_device *ofdev,
107 res_size = resource_size(&res); 106 res_size = resource_size(&res);
108 107
109 if (!request_mem_region(res.start, res_size, DRV_NAME)) { 108 if (!request_mem_region(res.start, res_size, DRV_NAME)) {
110 dev_err(&ofdev->dev, "couldn't request %#llx..%#llx\n", 109 dev_err(&ofdev->dev, "couldn't request %pR\n", &res);
111 (unsigned long long)res.start,
112 (unsigned long long)res.end);
113 return -EBUSY; 110 return -EBUSY;
114 } 111 }
115 112
116 base = ioremap_nocache(res.start, res_size); 113 base = ioremap_nocache(res.start, res_size);
117 if (!base) { 114 if (!base) {
118 dev_err(&ofdev->dev, "couldn't ioremap %#llx..%#llx\n", 115 dev_err(&ofdev->dev, "couldn't ioremap %pR\n", &res);
119 (unsigned long long)res.start,
120 (unsigned long long)res.end);
121 err = -ENOMEM; 116 err = -ENOMEM;
122 goto exit_release_mem; 117 goto exit_release_mem;
123 } 118 }
@@ -214,7 +209,7 @@ static struct of_device_id __devinitdata sja1000_ofp_table[] = {
214}; 209};
215MODULE_DEVICE_TABLE(of, sja1000_ofp_table); 210MODULE_DEVICE_TABLE(of, sja1000_ofp_table);
216 211
217static struct of_platform_driver sja1000_ofp_driver = { 212static struct platform_driver sja1000_ofp_driver = {
218 .driver = { 213 .driver = {
219 .owner = THIS_MODULE, 214 .owner = THIS_MODULE,
220 .name = DRV_NAME, 215 .name = DRV_NAME,
@@ -226,12 +221,12 @@ static struct of_platform_driver sja1000_ofp_driver = {
226 221
227static int __init sja1000_ofp_init(void) 222static int __init sja1000_ofp_init(void)
228{ 223{
229 return of_register_platform_driver(&sja1000_ofp_driver); 224 return platform_driver_register(&sja1000_ofp_driver);
230} 225}
231module_init(sja1000_ofp_init); 226module_init(sja1000_ofp_init);
232 227
233static void __exit sja1000_ofp_exit(void) 228static void __exit sja1000_ofp_exit(void)
234{ 229{
235 return of_unregister_platform_driver(&sja1000_ofp_driver); 230 return platform_driver_unregister(&sja1000_ofp_driver);
236}; 231};
237module_exit(sja1000_ofp_exit); 232module_exit(sja1000_ofp_exit);
diff --git a/drivers/net/can/sja1000/tscan1.c b/drivers/net/can/sja1000/tscan1.c
new file mode 100644
index 000000000000..9756099a883a
--- /dev/null
+++ b/drivers/net/can/sja1000/tscan1.c
@@ -0,0 +1,216 @@
1/*
2 * tscan1.c: driver for Technologic Systems TS-CAN1 PC104 boards
3 *
4 * Copyright 2010 Andre B. Oliveira
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20/*
21 * References:
22 * - Getting started with TS-CAN1, Technologic Systems, Jun 2009
23 * http://www.embeddedarm.com/documentation/ts-can1-manual.pdf
24 */
25
26#include <linux/init.h>
27#include <linux/io.h>
28#include <linux/ioport.h>
29#include <linux/isa.h>
30#include <linux/module.h>
31#include <linux/netdevice.h>
32#include "sja1000.h"
33
34MODULE_DESCRIPTION("Driver for Technologic Systems TS-CAN1 PC104 boards");
35MODULE_AUTHOR("Andre B. Oliveira <anbadeol@gmail.com>");
36MODULE_LICENSE("GPL");
37
38/* Maximum number of boards (one in each JP1:JP2 setting of IO address) */
39#define TSCAN1_MAXDEV 4
40
41/* PLD registers address offsets */
42#define TSCAN1_ID1 0
43#define TSCAN1_ID2 1
44#define TSCAN1_VERSION 2
45#define TSCAN1_LED 3
46#define TSCAN1_PAGE 4
47#define TSCAN1_MODE 5
48#define TSCAN1_JUMPERS 6
49
50/* PLD board identifier registers magic values */
51#define TSCAN1_ID1_VALUE 0xf6
52#define TSCAN1_ID2_VALUE 0xb9
53
54/* PLD mode register SJA1000 IO enable bit */
55#define TSCAN1_MODE_ENABLE 0x40
56
57/* PLD jumpers register bits */
58#define TSCAN1_JP4 0x10
59#define TSCAN1_JP5 0x20
60
61/* PLD IO base addresses start */
62#define TSCAN1_PLD_ADDRESS 0x150
63
64/* PLD register space size */
65#define TSCAN1_PLD_SIZE 8
66
67/* SJA1000 register space size */
68#define TSCAN1_SJA1000_SIZE 32
69
70/* SJA1000 crystal frequency (16MHz) */
71#define TSCAN1_SJA1000_XTAL 16000000
72
73/* SJA1000 IO base addresses */
74static const unsigned short tscan1_sja1000_addresses[] __devinitconst = {
75 0x100, 0x120, 0x180, 0x1a0, 0x200, 0x240, 0x280, 0x320
76};
77
78/* Read SJA1000 register */
79static u8 tscan1_read(const struct sja1000_priv *priv, int reg)
80{
81 return inb((unsigned long)priv->reg_base + reg);
82}
83
84/* Write SJA1000 register */
85static void tscan1_write(const struct sja1000_priv *priv, int reg, u8 val)
86{
87 outb(val, (unsigned long)priv->reg_base + reg);
88}
89
90/* Probe for a TS-CAN1 board with JP2:JP1 jumper setting ID */
91static int __devinit tscan1_probe(struct device *dev, unsigned id)
92{
93 struct net_device *netdev;
94 struct sja1000_priv *priv;
95 unsigned long pld_base, sja1000_base;
96 int irq, i;
97
98 pld_base = TSCAN1_PLD_ADDRESS + id * TSCAN1_PLD_SIZE;
99 if (!request_region(pld_base, TSCAN1_PLD_SIZE, dev_name(dev)))
100 return -EBUSY;
101
102 if (inb(pld_base + TSCAN1_ID1) != TSCAN1_ID1_VALUE ||
103 inb(pld_base + TSCAN1_ID2) != TSCAN1_ID2_VALUE) {
104 release_region(pld_base, TSCAN1_PLD_SIZE);
105 return -ENODEV;
106 }
107
108 switch (inb(pld_base + TSCAN1_JUMPERS) & (TSCAN1_JP4 | TSCAN1_JP5)) {
109 case TSCAN1_JP4:
110 irq = 6;
111 break;
112 case TSCAN1_JP5:
113 irq = 7;
114 break;
115 case TSCAN1_JP4 | TSCAN1_JP5:
116 irq = 5;
117 break;
118 default:
119 dev_err(dev, "invalid JP4:JP5 setting (no IRQ)\n");
120 release_region(pld_base, TSCAN1_PLD_SIZE);
121 return -EINVAL;
122 }
123
124 netdev = alloc_sja1000dev(0);
125 if (!netdev) {
126 release_region(pld_base, TSCAN1_PLD_SIZE);
127 return -ENOMEM;
128 }
129
130 dev_set_drvdata(dev, netdev);
131 SET_NETDEV_DEV(netdev, dev);
132
133 netdev->base_addr = pld_base;
134 netdev->irq = irq;
135
136 priv = netdev_priv(netdev);
137 priv->read_reg = tscan1_read;
138 priv->write_reg = tscan1_write;
139 priv->can.clock.freq = TSCAN1_SJA1000_XTAL / 2;
140 priv->cdr = CDR_CBP | CDR_CLK_OFF;
141 priv->ocr = OCR_TX0_PUSHPULL;
142
143 /* Select the first SJA1000 IO address that is free and that works */
144 for (i = 0; i < ARRAY_SIZE(tscan1_sja1000_addresses); i++) {
145 sja1000_base = tscan1_sja1000_addresses[i];
146 if (!request_region(sja1000_base, TSCAN1_SJA1000_SIZE,
147 dev_name(dev)))
148 continue;
149
150 /* Set SJA1000 IO base address and enable it */
151 outb(TSCAN1_MODE_ENABLE | i, pld_base + TSCAN1_MODE);
152
153 priv->reg_base = (void __iomem *)sja1000_base;
154 if (!register_sja1000dev(netdev)) {
155 /* SJA1000 probe succeeded; turn LED off and return */
156 outb(0, pld_base + TSCAN1_LED);
157 netdev_info(netdev, "TS-CAN1 at 0x%lx 0x%lx irq %d\n",
158 pld_base, sja1000_base, irq);
159 return 0;
160 }
161
162 /* SJA1000 probe failed; release and try next address */
163 outb(0, pld_base + TSCAN1_MODE);
164 release_region(sja1000_base, TSCAN1_SJA1000_SIZE);
165 }
166
167 dev_err(dev, "failed to assign SJA1000 IO address\n");
168 dev_set_drvdata(dev, NULL);
169 free_sja1000dev(netdev);
170 release_region(pld_base, TSCAN1_PLD_SIZE);
171 return -ENXIO;
172}
173
174static int __devexit tscan1_remove(struct device *dev, unsigned id /*unused*/)
175{
176 struct net_device *netdev;
177 struct sja1000_priv *priv;
178 unsigned long pld_base, sja1000_base;
179
180 netdev = dev_get_drvdata(dev);
181 unregister_sja1000dev(netdev);
182 dev_set_drvdata(dev, NULL);
183
184 priv = netdev_priv(netdev);
185 pld_base = netdev->base_addr;
186 sja1000_base = (unsigned long)priv->reg_base;
187
188 outb(0, pld_base + TSCAN1_MODE); /* disable SJA1000 IO space */
189
190 release_region(sja1000_base, TSCAN1_SJA1000_SIZE);
191 release_region(pld_base, TSCAN1_PLD_SIZE);
192
193 free_sja1000dev(netdev);
194
195 return 0;
196}
197
198static struct isa_driver tscan1_isa_driver = {
199 .probe = tscan1_probe,
200 .remove = __devexit_p(tscan1_remove),
201 .driver = {
202 .name = "tscan1",
203 },
204};
205
206static int __init tscan1_init(void)
207{
208 return isa_register_driver(&tscan1_isa_driver, TSCAN1_MAXDEV);
209}
210module_init(tscan1_init);
211
212static void __exit tscan1_exit(void)
213{
214 isa_unregister_driver(&tscan1_isa_driver);
215}
216module_exit(tscan1_exit);
diff --git a/drivers/net/can/slcan.c b/drivers/net/can/slcan.c
new file mode 100644
index 000000000000..1b49df6b2470
--- /dev/null
+++ b/drivers/net/can/slcan.c
@@ -0,0 +1,758 @@
1/*
2 * slcan.c - serial line CAN interface driver (using tty line discipline)
3 *
4 * This file is derived from linux/drivers/net/slip.c
5 *
6 * slip.c Authors : Laurence Culhane <loz@holmes.demon.co.uk>
7 * Fred N. van Kempen <waltje@uwalt.nl.mugnet.org>
8 * slcan.c Author : Oliver Hartkopp <socketcan@hartkopp.net>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307. You can also get it
23 * at http://www.gnu.org/licenses/gpl.html
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
36 * DAMAGE.
37 *
38 * Send feedback to <socketcan-users@lists.berlios.de>
39 *
40 */
41
42#include <linux/module.h>
43#include <linux/moduleparam.h>
44
45#include <asm/system.h>
46#include <linux/uaccess.h>
47#include <linux/bitops.h>
48#include <linux/string.h>
49#include <linux/tty.h>
50#include <linux/errno.h>
51#include <linux/netdevice.h>
52#include <linux/skbuff.h>
53#include <linux/rtnetlink.h>
54#include <linux/if_arp.h>
55#include <linux/if_ether.h>
56#include <linux/sched.h>
57#include <linux/delay.h>
58#include <linux/init.h>
59#include <linux/can.h>
60
61static __initdata const char banner[] =
62 KERN_INFO "slcan: serial line CAN interface driver\n";
63
64MODULE_ALIAS_LDISC(N_SLCAN);
65MODULE_DESCRIPTION("serial line CAN interface");
66MODULE_LICENSE("GPL");
67MODULE_AUTHOR("Oliver Hartkopp <socketcan@hartkopp.net>");
68
69#define SLCAN_MAGIC 0x53CA
70
71static int maxdev = 10; /* MAX number of SLCAN channels;
72 This can be overridden with
73 insmod slcan.ko maxdev=nnn */
74module_param(maxdev, int, 0);
75MODULE_PARM_DESC(maxdev, "Maximum number of slcan interfaces");
76
77/* maximum rx buffer len: extended CAN frame with timestamp */
78#define SLC_MTU (sizeof("T1111222281122334455667788EA5F\r")+1)
79
80struct slcan {
81 int magic;
82
83 /* Various fields. */
84 struct tty_struct *tty; /* ptr to TTY structure */
85 struct net_device *dev; /* easy for intr handling */
86 spinlock_t lock;
87
88 /* These are pointers to the malloc()ed frame buffers. */
89 unsigned char rbuff[SLC_MTU]; /* receiver buffer */
90 int rcount; /* received chars counter */
91 unsigned char xbuff[SLC_MTU]; /* transmitter buffer */
92 unsigned char *xhead; /* pointer to next XMIT byte */
93 int xleft; /* bytes left in XMIT queue */
94
95 unsigned long flags; /* Flag values/ mode etc */
96#define SLF_INUSE 0 /* Channel in use */
97#define SLF_ERROR 1 /* Parity, etc. error */
98
99 unsigned char leased;
100 dev_t line;
101 pid_t pid;
102};
103
104static struct net_device **slcan_devs;
105
106 /************************************************************************
107 * SLCAN ENCAPSULATION FORMAT *
108 ************************************************************************/
109
110/*
111 * A CAN frame has a can_id (11 bit standard frame format OR 29 bit extended
112 * frame format) a data length code (can_dlc) which can be from 0 to 8
113 * and up to <can_dlc> data bytes as payload.
114 * Additionally a CAN frame may become a remote transmission frame if the
115 * RTR-bit is set. This causes another ECU to send a CAN frame with the
116 * given can_id.
117 *
118 * The SLCAN ASCII representation of these different frame types is:
119 * <type> <id> <dlc> <data>*
120 *
121 * Extended frames (29 bit) are defined by capital characters in the type.
122 * RTR frames are defined as 'r' types - normal frames have 't' type:
123 * t => 11 bit data frame
124 * r => 11 bit RTR frame
125 * T => 29 bit data frame
126 * R => 29 bit RTR frame
127 *
128 * The <id> is 3 (standard) or 8 (extended) bytes in ASCII Hex (base64).
129 * The <dlc> is a one byte ASCII number ('0' - '8')
130 * The <data> section has at much ASCII Hex bytes as defined by the <dlc>
131 *
132 * Examples:
133 *
134 * t1230 : can_id 0x123, can_dlc 0, no data
135 * t4563112233 : can_id 0x456, can_dlc 3, data 0x11 0x22 0x33
136 * T12ABCDEF2AA55 : extended can_id 0x12ABCDEF, can_dlc 2, data 0xAA 0x55
137 * r1230 : can_id 0x123, can_dlc 0, no data, remote transmission request
138 *
139 */
140
141 /************************************************************************
142 * STANDARD SLCAN DECAPSULATION *
143 ************************************************************************/
144
145static int asc2nibble(char c)
146{
147
148 if ((c >= '0') && (c <= '9'))
149 return c - '0';
150
151 if ((c >= 'A') && (c <= 'F'))
152 return c - 'A' + 10;
153
154 if ((c >= 'a') && (c <= 'f'))
155 return c - 'a' + 10;
156
157 return 16; /* error */
158}
159
160/* Send one completely decapsulated can_frame to the network layer */
161static void slc_bump(struct slcan *sl)
162{
163 struct sk_buff *skb;
164 struct can_frame cf;
165 int i, dlc_pos, tmp;
166 unsigned long ultmp;
167 char cmd = sl->rbuff[0];
168
169 if ((cmd != 't') && (cmd != 'T') && (cmd != 'r') && (cmd != 'R'))
170 return;
171
172 if (cmd & 0x20) /* tiny chars 'r' 't' => standard frame format */
173 dlc_pos = 4; /* dlc position tiiid */
174 else
175 dlc_pos = 9; /* dlc position Tiiiiiiiid */
176
177 if (!((sl->rbuff[dlc_pos] >= '0') && (sl->rbuff[dlc_pos] < '9')))
178 return;
179
180 cf.can_dlc = sl->rbuff[dlc_pos] - '0'; /* get can_dlc from ASCII val */
181
182 sl->rbuff[dlc_pos] = 0; /* terminate can_id string */
183
184 if (strict_strtoul(sl->rbuff+1, 16, &ultmp))
185 return;
186
187 cf.can_id = ultmp;
188
189 if (!(cmd & 0x20)) /* NO tiny chars => extended frame format */
190 cf.can_id |= CAN_EFF_FLAG;
191
192 if ((cmd | 0x20) == 'r') /* RTR frame */
193 cf.can_id |= CAN_RTR_FLAG;
194
195 *(u64 *) (&cf.data) = 0; /* clear payload */
196
197 for (i = 0, dlc_pos++; i < cf.can_dlc; i++) {
198
199 tmp = asc2nibble(sl->rbuff[dlc_pos++]);
200 if (tmp > 0x0F)
201 return;
202 cf.data[i] = (tmp << 4);
203 tmp = asc2nibble(sl->rbuff[dlc_pos++]);
204 if (tmp > 0x0F)
205 return;
206 cf.data[i] |= tmp;
207 }
208
209
210 skb = dev_alloc_skb(sizeof(struct can_frame));
211 if (!skb)
212 return;
213
214 skb->dev = sl->dev;
215 skb->protocol = htons(ETH_P_CAN);
216 skb->pkt_type = PACKET_BROADCAST;
217 skb->ip_summed = CHECKSUM_UNNECESSARY;
218 memcpy(skb_put(skb, sizeof(struct can_frame)),
219 &cf, sizeof(struct can_frame));
220 netif_rx(skb);
221
222 sl->dev->stats.rx_packets++;
223 sl->dev->stats.rx_bytes += cf.can_dlc;
224}
225
226/* parse tty input stream */
227static void slcan_unesc(struct slcan *sl, unsigned char s)
228{
229
230 if ((s == '\r') || (s == '\a')) { /* CR or BEL ends the pdu */
231 if (!test_and_clear_bit(SLF_ERROR, &sl->flags) &&
232 (sl->rcount > 4)) {
233 slc_bump(sl);
234 }
235 sl->rcount = 0;
236 } else {
237 if (!test_bit(SLF_ERROR, &sl->flags)) {
238 if (sl->rcount < SLC_MTU) {
239 sl->rbuff[sl->rcount++] = s;
240 return;
241 } else {
242 sl->dev->stats.rx_over_errors++;
243 set_bit(SLF_ERROR, &sl->flags);
244 }
245 }
246 }
247}
248
249 /************************************************************************
250 * STANDARD SLCAN ENCAPSULATION *
251 ************************************************************************/
252
253/* Encapsulate one can_frame and stuff into a TTY queue. */
254static void slc_encaps(struct slcan *sl, struct can_frame *cf)
255{
256 int actual, idx, i;
257 char cmd;
258
259 if (cf->can_id & CAN_RTR_FLAG)
260 cmd = 'R'; /* becomes 'r' in standard frame format */
261 else
262 cmd = 'T'; /* becomes 't' in standard frame format */
263
264 if (cf->can_id & CAN_EFF_FLAG)
265 sprintf(sl->xbuff, "%c%08X%d", cmd,
266 cf->can_id & CAN_EFF_MASK, cf->can_dlc);
267 else
268 sprintf(sl->xbuff, "%c%03X%d", cmd | 0x20,
269 cf->can_id & CAN_SFF_MASK, cf->can_dlc);
270
271 idx = strlen(sl->xbuff);
272
273 for (i = 0; i < cf->can_dlc; i++)
274 sprintf(&sl->xbuff[idx + 2*i], "%02X", cf->data[i]);
275
276 strcat(sl->xbuff, "\r"); /* add terminating character */
277
278 /* Order of next two lines is *very* important.
279 * When we are sending a little amount of data,
280 * the transfer may be completed inside the ops->write()
281 * routine, because it's running with interrupts enabled.
282 * In this case we *never* got WRITE_WAKEUP event,
283 * if we did not request it before write operation.
284 * 14 Oct 1994 Dmitry Gorodchanin.
285 */
286 set_bit(TTY_DO_WRITE_WAKEUP, &sl->tty->flags);
287 actual = sl->tty->ops->write(sl->tty, sl->xbuff, strlen(sl->xbuff));
288 sl->xleft = strlen(sl->xbuff) - actual;
289 sl->xhead = sl->xbuff + actual;
290 sl->dev->stats.tx_bytes += cf->can_dlc;
291}
292
293/*
294 * Called by the driver when there's room for more data. If we have
295 * more packets to send, we send them here.
296 */
297static void slcan_write_wakeup(struct tty_struct *tty)
298{
299 int actual;
300 struct slcan *sl = (struct slcan *) tty->disc_data;
301
302 /* First make sure we're connected. */
303 if (!sl || sl->magic != SLCAN_MAGIC || !netif_running(sl->dev))
304 return;
305
306 if (sl->xleft <= 0) {
307 /* Now serial buffer is almost free & we can start
308 * transmission of another packet */
309 sl->dev->stats.tx_packets++;
310 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
311 netif_wake_queue(sl->dev);
312 return;
313 }
314
315 actual = tty->ops->write(tty, sl->xhead, sl->xleft);
316 sl->xleft -= actual;
317 sl->xhead += actual;
318}
319
320/* Send a can_frame to a TTY queue. */
321static netdev_tx_t slc_xmit(struct sk_buff *skb, struct net_device *dev)
322{
323 struct slcan *sl = netdev_priv(dev);
324
325 if (skb->len != sizeof(struct can_frame))
326 goto out;
327
328 spin_lock(&sl->lock);
329 if (!netif_running(dev)) {
330 spin_unlock(&sl->lock);
331 printk(KERN_WARNING "%s: xmit: iface is down\n", dev->name);
332 goto out;
333 }
334 if (sl->tty == NULL) {
335 spin_unlock(&sl->lock);
336 goto out;
337 }
338
339 netif_stop_queue(sl->dev);
340 slc_encaps(sl, (struct can_frame *) skb->data); /* encaps & send */
341 spin_unlock(&sl->lock);
342
343out:
344 kfree_skb(skb);
345 return NETDEV_TX_OK;
346}
347
348
349/******************************************
350 * Routines looking at netdevice side.
351 ******************************************/
352
353/* Netdevice UP -> DOWN routine */
354static int slc_close(struct net_device *dev)
355{
356 struct slcan *sl = netdev_priv(dev);
357
358 spin_lock_bh(&sl->lock);
359 if (sl->tty) {
360 /* TTY discipline is running. */
361 clear_bit(TTY_DO_WRITE_WAKEUP, &sl->tty->flags);
362 }
363 netif_stop_queue(dev);
364 sl->rcount = 0;
365 sl->xleft = 0;
366 spin_unlock_bh(&sl->lock);
367
368 return 0;
369}
370
371/* Netdevice DOWN -> UP routine */
372static int slc_open(struct net_device *dev)
373{
374 struct slcan *sl = netdev_priv(dev);
375
376 if (sl->tty == NULL)
377 return -ENODEV;
378
379 sl->flags &= (1 << SLF_INUSE);
380 netif_start_queue(dev);
381 return 0;
382}
383
384/* Hook the destructor so we can free slcan devs at the right point in time */
385static void slc_free_netdev(struct net_device *dev)
386{
387 int i = dev->base_addr;
388 free_netdev(dev);
389 slcan_devs[i] = NULL;
390}
391
392static const struct net_device_ops slc_netdev_ops = {
393 .ndo_open = slc_open,
394 .ndo_stop = slc_close,
395 .ndo_start_xmit = slc_xmit,
396};
397
398static void slc_setup(struct net_device *dev)
399{
400 dev->netdev_ops = &slc_netdev_ops;
401 dev->destructor = slc_free_netdev;
402
403 dev->hard_header_len = 0;
404 dev->addr_len = 0;
405 dev->tx_queue_len = 10;
406
407 dev->mtu = sizeof(struct can_frame);
408 dev->type = ARPHRD_CAN;
409
410 /* New-style flags. */
411 dev->flags = IFF_NOARP;
412 dev->features = NETIF_F_NO_CSUM;
413}
414
415/******************************************
416 Routines looking at TTY side.
417 ******************************************/
418
419/*
420 * Handle the 'receiver data ready' interrupt.
421 * This function is called by the 'tty_io' module in the kernel when
422 * a block of SLCAN data has been received, which can now be decapsulated
423 * and sent on to some IP layer for further processing. This will not
424 * be re-entered while running but other ldisc functions may be called
425 * in parallel
426 */
427
428static void slcan_receive_buf(struct tty_struct *tty,
429 const unsigned char *cp, char *fp, int count)
430{
431 struct slcan *sl = (struct slcan *) tty->disc_data;
432
433 if (!sl || sl->magic != SLCAN_MAGIC || !netif_running(sl->dev))
434 return;
435
436 /* Read the characters out of the buffer */
437 while (count--) {
438 if (fp && *fp++) {
439 if (!test_and_set_bit(SLF_ERROR, &sl->flags))
440 sl->dev->stats.rx_errors++;
441 cp++;
442 continue;
443 }
444 slcan_unesc(sl, *cp++);
445 }
446}
447
448/************************************
449 * slcan_open helper routines.
450 ************************************/
451
452/* Collect hanged up channels */
453static void slc_sync(void)
454{
455 int i;
456 struct net_device *dev;
457 struct slcan *sl;
458
459 for (i = 0; i < maxdev; i++) {
460 dev = slcan_devs[i];
461 if (dev == NULL)
462 break;
463
464 sl = netdev_priv(dev);
465 if (sl->tty || sl->leased)
466 continue;
467 if (dev->flags & IFF_UP)
468 dev_close(dev);
469 }
470}
471
472/* Find a free SLCAN channel, and link in this `tty' line. */
473static struct slcan *slc_alloc(dev_t line)
474{
475 int i;
476 struct net_device *dev = NULL;
477 struct slcan *sl;
478
479 if (slcan_devs == NULL)
480 return NULL; /* Master array missing ! */
481
482 for (i = 0; i < maxdev; i++) {
483 dev = slcan_devs[i];
484 if (dev == NULL)
485 break;
486
487 }
488
489 /* Sorry, too many, all slots in use */
490 if (i >= maxdev)
491 return NULL;
492
493 if (dev) {
494 sl = netdev_priv(dev);
495 if (test_bit(SLF_INUSE, &sl->flags)) {
496 unregister_netdevice(dev);
497 dev = NULL;
498 slcan_devs[i] = NULL;
499 }
500 }
501
502 if (!dev) {
503 char name[IFNAMSIZ];
504 sprintf(name, "slcan%d", i);
505
506 dev = alloc_netdev(sizeof(*sl), name, slc_setup);
507 if (!dev)
508 return NULL;
509 dev->base_addr = i;
510 }
511
512 sl = netdev_priv(dev);
513
514 /* Initialize channel control data */
515 sl->magic = SLCAN_MAGIC;
516 sl->dev = dev;
517 spin_lock_init(&sl->lock);
518 slcan_devs[i] = dev;
519
520 return sl;
521}
522
523/*
524 * Open the high-level part of the SLCAN channel.
525 * This function is called by the TTY module when the
526 * SLCAN line discipline is called for. Because we are
527 * sure the tty line exists, we only have to link it to
528 * a free SLCAN channel...
529 *
530 * Called in process context serialized from other ldisc calls.
531 */
532
533static int slcan_open(struct tty_struct *tty)
534{
535 struct slcan *sl;
536 int err;
537
538 if (!capable(CAP_NET_ADMIN))
539 return -EPERM;
540
541 if (tty->ops->write == NULL)
542 return -EOPNOTSUPP;
543
544 /* RTnetlink lock is misused here to serialize concurrent
545 opens of slcan channels. There are better ways, but it is
546 the simplest one.
547 */
548 rtnl_lock();
549
550 /* Collect hanged up channels. */
551 slc_sync();
552
553 sl = tty->disc_data;
554
555 err = -EEXIST;
556 /* First make sure we're not already connected. */
557 if (sl && sl->magic == SLCAN_MAGIC)
558 goto err_exit;
559
560 /* OK. Find a free SLCAN channel to use. */
561 err = -ENFILE;
562 sl = slc_alloc(tty_devnum(tty));
563 if (sl == NULL)
564 goto err_exit;
565
566 sl->tty = tty;
567 tty->disc_data = sl;
568 sl->line = tty_devnum(tty);
569 sl->pid = current->pid;
570
571 if (!test_bit(SLF_INUSE, &sl->flags)) {
572 /* Perform the low-level SLCAN initialization. */
573 sl->rcount = 0;
574 sl->xleft = 0;
575
576 set_bit(SLF_INUSE, &sl->flags);
577
578 err = register_netdevice(sl->dev);
579 if (err)
580 goto err_free_chan;
581 }
582
583 /* Done. We have linked the TTY line to a channel. */
584 rtnl_unlock();
585 tty->receive_room = 65536; /* We don't flow control */
586
587 /* TTY layer expects 0 on success */
588 return 0;
589
590err_free_chan:
591 sl->tty = NULL;
592 tty->disc_data = NULL;
593 clear_bit(SLF_INUSE, &sl->flags);
594
595err_exit:
596 rtnl_unlock();
597
598 /* Count references from TTY module */
599 return err;
600}
601
602/*
603 * Close down a SLCAN channel.
604 * This means flushing out any pending queues, and then returning. This
605 * call is serialized against other ldisc functions.
606 *
607 * We also use this method for a hangup event.
608 */
609
610static void slcan_close(struct tty_struct *tty)
611{
612 struct slcan *sl = (struct slcan *) tty->disc_data;
613
614 /* First make sure we're connected. */
615 if (!sl || sl->magic != SLCAN_MAGIC || sl->tty != tty)
616 return;
617
618 tty->disc_data = NULL;
619 sl->tty = NULL;
620 if (!sl->leased)
621 sl->line = 0;
622
623 /* Flush network side */
624 unregister_netdev(sl->dev);
625 /* This will complete via sl_free_netdev */
626}
627
628static int slcan_hangup(struct tty_struct *tty)
629{
630 slcan_close(tty);
631 return 0;
632}
633
634/* Perform I/O control on an active SLCAN channel. */
635static int slcan_ioctl(struct tty_struct *tty, struct file *file,
636 unsigned int cmd, unsigned long arg)
637{
638 struct slcan *sl = (struct slcan *) tty->disc_data;
639 unsigned int tmp;
640
641 /* First make sure we're connected. */
642 if (!sl || sl->magic != SLCAN_MAGIC)
643 return -EINVAL;
644
645 switch (cmd) {
646 case SIOCGIFNAME:
647 tmp = strlen(sl->dev->name) + 1;
648 if (copy_to_user((void __user *)arg, sl->dev->name, tmp))
649 return -EFAULT;
650 return 0;
651
652 case SIOCSIFHWADDR:
653 return -EINVAL;
654
655 default:
656 return tty_mode_ioctl(tty, file, cmd, arg);
657 }
658}
659
660static struct tty_ldisc_ops slc_ldisc = {
661 .owner = THIS_MODULE,
662 .magic = TTY_LDISC_MAGIC,
663 .name = "slcan",
664 .open = slcan_open,
665 .close = slcan_close,
666 .hangup = slcan_hangup,
667 .ioctl = slcan_ioctl,
668 .receive_buf = slcan_receive_buf,
669 .write_wakeup = slcan_write_wakeup,
670};
671
672static int __init slcan_init(void)
673{
674 int status;
675
676 if (maxdev < 4)
677 maxdev = 4; /* Sanity */
678
679 printk(banner);
680 printk(KERN_INFO "slcan: %d dynamic interface channels.\n", maxdev);
681
682 slcan_devs = kzalloc(sizeof(struct net_device *)*maxdev, GFP_KERNEL);
683 if (!slcan_devs) {
684 printk(KERN_ERR "slcan: can't allocate slcan device array!\n");
685 return -ENOMEM;
686 }
687
688 /* Fill in our line protocol discipline, and register it */
689 status = tty_register_ldisc(N_SLCAN, &slc_ldisc);
690 if (status) {
691 printk(KERN_ERR "slcan: can't register line discipline\n");
692 kfree(slcan_devs);
693 }
694 return status;
695}
696
697static void __exit slcan_exit(void)
698{
699 int i;
700 struct net_device *dev;
701 struct slcan *sl;
702 unsigned long timeout = jiffies + HZ;
703 int busy = 0;
704
705 if (slcan_devs == NULL)
706 return;
707
708 /* First of all: check for active disciplines and hangup them.
709 */
710 do {
711 if (busy)
712 msleep_interruptible(100);
713
714 busy = 0;
715 for (i = 0; i < maxdev; i++) {
716 dev = slcan_devs[i];
717 if (!dev)
718 continue;
719 sl = netdev_priv(dev);
720 spin_lock_bh(&sl->lock);
721 if (sl->tty) {
722 busy++;
723 tty_hangup(sl->tty);
724 }
725 spin_unlock_bh(&sl->lock);
726 }
727 } while (busy && time_before(jiffies, timeout));
728
729 /* FIXME: hangup is async so we should wait when doing this second
730 phase */
731
732 for (i = 0; i < maxdev; i++) {
733 dev = slcan_devs[i];
734 if (!dev)
735 continue;
736 slcan_devs[i] = NULL;
737
738 sl = netdev_priv(dev);
739 if (sl->tty) {
740 printk(KERN_ERR "%s: tty discipline still running\n",
741 dev->name);
742 /* Intentionally leak the control block. */
743 dev->destructor = NULL;
744 }
745
746 unregister_netdev(dev);
747 }
748
749 kfree(slcan_devs);
750 slcan_devs = NULL;
751
752 i = tty_unregister_ldisc(N_SLCAN);
753 if (i)
754 printk(KERN_ERR "slcan: can't unregister ldisc (err %d)\n", i);
755}
756
757module_init(slcan_init);
758module_exit(slcan_exit);
diff --git a/drivers/net/can/softing/Kconfig b/drivers/net/can/softing/Kconfig
new file mode 100644
index 000000000000..5de46a9a77bb
--- /dev/null
+++ b/drivers/net/can/softing/Kconfig
@@ -0,0 +1,30 @@
1config CAN_SOFTING
2 tristate "Softing Gmbh CAN generic support"
3 depends on CAN_DEV && HAS_IOMEM
4 ---help---
5 Support for CAN cards from Softing Gmbh & some cards
6 from Vector Gmbh.
7 Softing Gmbh CAN cards come with 1 or 2 physical busses.
8 Those cards typically use Dual Port RAM to communicate
9 with the host CPU. The interface is then identical for PCI
10 and PCMCIA cards. This driver operates on a platform device,
11 which has been created by softing_cs or softing_pci driver.
12 Warning:
13 The API of the card does not allow fine control per bus, but
14 controls the 2 busses on the card together.
15 As such, some actions (start/stop/busoff recovery) on 1 bus
16 must bring down the other bus too temporarily.
17
18config CAN_SOFTING_CS
19 tristate "Softing Gmbh CAN pcmcia cards"
20 depends on PCMCIA
21 depends on CAN_SOFTING
22 ---help---
23 Support for PCMCIA cards from Softing Gmbh & some cards
24 from Vector Gmbh.
25 You need firmware for these, which you can get at
26 http://developer.berlios.de/projects/socketcan/
27 This version of the driver is written against
28 firmware version 4.6 (softing-fw-4.6-binaries.tar.gz)
29 In order to use the card as CAN device, you need the Softing generic
30 support too.
diff --git a/drivers/net/can/softing/Makefile b/drivers/net/can/softing/Makefile
new file mode 100644
index 000000000000..c5e5016c742e
--- /dev/null
+++ b/drivers/net/can/softing/Makefile
@@ -0,0 +1,6 @@
1
2softing-y := softing_main.o softing_fw.o
3obj-$(CONFIG_CAN_SOFTING) += softing.o
4obj-$(CONFIG_CAN_SOFTING_CS) += softing_cs.o
5
6ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/softing/softing.h b/drivers/net/can/softing/softing.h
new file mode 100644
index 000000000000..afd7d85b6915
--- /dev/null
+++ b/drivers/net/can/softing/softing.h
@@ -0,0 +1,167 @@
1/*
2 * softing common interfaces
3 *
4 * by Kurt Van Dijck, 2008-2010
5 */
6
7#include <linux/atomic.h>
8#include <linux/netdevice.h>
9#include <linux/ktime.h>
10#include <linux/mutex.h>
11#include <linux/spinlock.h>
12#include <linux/can.h>
13#include <linux/can/dev.h>
14
15#include "softing_platform.h"
16
17struct softing;
18
19struct softing_priv {
20 struct can_priv can; /* must be the first member! */
21 struct net_device *netdev;
22 struct softing *card;
23 struct {
24 int pending;
25 /* variables which hold the circular buffer */
26 int echo_put;
27 int echo_get;
28 } tx;
29 struct can_bittiming_const btr_const;
30 int index;
31 uint8_t output;
32 uint16_t chip;
33};
34#define netdev2softing(netdev) ((struct softing_priv *)netdev_priv(netdev))
35
36struct softing {
37 const struct softing_platform_data *pdat;
38 struct platform_device *pdev;
39 struct net_device *net[2];
40 spinlock_t spin; /* protect this structure & DPRAM access */
41 ktime_t ts_ref;
42 ktime_t ts_overflow; /* timestamp overflow value, in ktime */
43
44 struct {
45 /* indication of firmware status */
46 int up;
47 /* protection of the 'up' variable */
48 struct mutex lock;
49 } fw;
50 struct {
51 int nr;
52 int requested;
53 int svc_count;
54 unsigned int dpram_position;
55 } irq;
56 struct {
57 int pending;
58 int last_bus;
59 /*
60 * keep the bus that last tx'd a message,
61 * in order to let every netdev queue resume
62 */
63 } tx;
64 __iomem uint8_t *dpram;
65 unsigned long dpram_phys;
66 unsigned long dpram_size;
67 struct {
68 uint16_t fw_version, hw_version, license, serial;
69 uint16_t chip[2];
70 unsigned int freq; /* remote cpu's operating frequency */
71 } id;
72};
73
74extern int softing_default_output(struct net_device *netdev);
75
76extern ktime_t softing_raw2ktime(struct softing *card, u32 raw);
77
78extern int softing_chip_poweron(struct softing *card);
79
80extern int softing_bootloader_command(struct softing *card, int16_t cmd,
81 const char *msg);
82
83/* Load firmware after reset */
84extern int softing_load_fw(const char *file, struct softing *card,
85 __iomem uint8_t *virt, unsigned int size, int offset);
86
87/* Load final application firmware after bootloader */
88extern int softing_load_app_fw(const char *file, struct softing *card);
89
90/*
91 * enable or disable irq
92 * only called with fw.lock locked
93 */
94extern int softing_enable_irq(struct softing *card, int enable);
95
96/* start/stop 1 bus on card */
97extern int softing_startstop(struct net_device *netdev, int up);
98
99/* netif_rx() */
100extern int softing_netdev_rx(struct net_device *netdev,
101 const struct can_frame *msg, ktime_t ktime);
102
103/* SOFTING DPRAM mappings */
104#define DPRAM_RX 0x0000
105 #define DPRAM_RX_SIZE 32
106 #define DPRAM_RX_CNT 16
107#define DPRAM_RX_RD 0x0201 /* uint8_t */
108#define DPRAM_RX_WR 0x0205 /* uint8_t */
109#define DPRAM_RX_LOST 0x0207 /* uint8_t */
110
111#define DPRAM_FCT_PARAM 0x0300 /* int16_t [20] */
112#define DPRAM_FCT_RESULT 0x0328 /* int16_t */
113#define DPRAM_FCT_HOST 0x032b /* uint16_t */
114
115#define DPRAM_INFO_BUSSTATE 0x0331 /* uint16_t */
116#define DPRAM_INFO_BUSSTATE2 0x0335 /* uint16_t */
117#define DPRAM_INFO_ERRSTATE 0x0339 /* uint16_t */
118#define DPRAM_INFO_ERRSTATE2 0x033d /* uint16_t */
119#define DPRAM_RESET 0x0341 /* uint16_t */
120#define DPRAM_CLR_RECV_FIFO 0x0345 /* uint16_t */
121#define DPRAM_RESET_TIME 0x034d /* uint16_t */
122#define DPRAM_TIME 0x0350 /* uint64_t */
123#define DPRAM_WR_START 0x0358 /* uint8_t */
124#define DPRAM_WR_END 0x0359 /* uint8_t */
125#define DPRAM_RESET_RX_FIFO 0x0361 /* uint16_t */
126#define DPRAM_RESET_TX_FIFO 0x0364 /* uint8_t */
127#define DPRAM_READ_FIFO_LEVEL 0x0365 /* uint8_t */
128#define DPRAM_RX_FIFO_LEVEL 0x0366 /* uint16_t */
129#define DPRAM_TX_FIFO_LEVEL 0x0366 /* uint16_t */
130
131#define DPRAM_TX 0x0400 /* uint16_t */
132 #define DPRAM_TX_SIZE 16
133 #define DPRAM_TX_CNT 32
134#define DPRAM_TX_RD 0x0601 /* uint8_t */
135#define DPRAM_TX_WR 0x0605 /* uint8_t */
136
137#define DPRAM_COMMAND 0x07e0 /* uint16_t */
138#define DPRAM_RECEIPT 0x07f0 /* uint16_t */
139#define DPRAM_IRQ_TOHOST 0x07fe /* uint8_t */
140#define DPRAM_IRQ_TOCARD 0x07ff /* uint8_t */
141
142#define DPRAM_V2_RESET 0x0e00 /* uint8_t */
143#define DPRAM_V2_IRQ_TOHOST 0x0e02 /* uint8_t */
144
145#define TXMAX (DPRAM_TX_CNT - 1)
146
147/* DPRAM return codes */
148#define RES_NONE 0
149#define RES_OK 1
150#define RES_NOK 2
151#define RES_UNKNOWN 3
152/* DPRAM flags */
153#define CMD_TX 0x01
154#define CMD_ACK 0x02
155#define CMD_XTD 0x04
156#define CMD_RTR 0x08
157#define CMD_ERR 0x10
158#define CMD_BUS2 0x80
159
160/* returned fifo entry bus state masks */
161#define SF_MASK_BUSOFF 0x80
162#define SF_MASK_EPASSIVE 0x60
163
164/* bus states */
165#define STATE_BUSOFF 2
166#define STATE_EPASSIVE 1
167#define STATE_EACTIVE 0
diff --git a/drivers/net/can/softing/softing_cs.c b/drivers/net/can/softing/softing_cs.c
new file mode 100644
index 000000000000..c0e1b1eb87a9
--- /dev/null
+++ b/drivers/net/can/softing/softing_cs.c
@@ -0,0 +1,360 @@
1/*
2 * Copyright (C) 2008-2010
3 *
4 * - Kurt Van Dijck, EIA Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/slab.h>
23
24#include <pcmcia/cistpl.h>
25#include <pcmcia/ds.h>
26
27#include "softing_platform.h"
28
29static int softingcs_index;
30static spinlock_t softingcs_index_lock;
31
32static int softingcs_reset(struct platform_device *pdev, int v);
33static int softingcs_enable_irq(struct platform_device *pdev, int v);
34
35/*
36 * platform_data descriptions
37 */
38#define MHZ (1000*1000)
39static const struct softing_platform_data softingcs_platform_data[] = {
40{
41 .name = "CANcard",
42 .manf = 0x0168, .prod = 0x001,
43 .generation = 1,
44 .nbus = 2,
45 .freq = 16 * MHZ, .max_brp = 32, .max_sjw = 4,
46 .dpram_size = 0x0800,
47 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
48 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
49 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
50 .reset = softingcs_reset,
51 .enable_irq = softingcs_enable_irq,
52}, {
53 .name = "CANcard-NEC",
54 .manf = 0x0168, .prod = 0x002,
55 .generation = 1,
56 .nbus = 2,
57 .freq = 16 * MHZ, .max_brp = 32, .max_sjw = 4,
58 .dpram_size = 0x0800,
59 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
60 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
61 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
62 .reset = softingcs_reset,
63 .enable_irq = softingcs_enable_irq,
64}, {
65 .name = "CANcard-SJA",
66 .manf = 0x0168, .prod = 0x004,
67 .generation = 1,
68 .nbus = 2,
69 .freq = 20 * MHZ, .max_brp = 32, .max_sjw = 4,
70 .dpram_size = 0x0800,
71 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
72 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
73 .app = {0x0010, 0x0d0000, fw_dir "cansja.bin",},
74 .reset = softingcs_reset,
75 .enable_irq = softingcs_enable_irq,
76}, {
77 .name = "CANcard-2",
78 .manf = 0x0168, .prod = 0x005,
79 .generation = 2,
80 .nbus = 2,
81 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4,
82 .dpram_size = 0x1000,
83 .boot = {0x0000, 0x000000, fw_dir "bcard2.bin",},
84 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
85 .app = {0x0010, 0x0d0000, fw_dir "cancrd2.bin",},
86 .reset = softingcs_reset,
87 .enable_irq = NULL,
88}, {
89 .name = "Vector-CANcard",
90 .manf = 0x0168, .prod = 0x081,
91 .generation = 1,
92 .nbus = 2,
93 .freq = 16 * MHZ, .max_brp = 64, .max_sjw = 4,
94 .dpram_size = 0x0800,
95 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
96 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
97 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
98 .reset = softingcs_reset,
99 .enable_irq = softingcs_enable_irq,
100}, {
101 .name = "Vector-CANcard-SJA",
102 .manf = 0x0168, .prod = 0x084,
103 .generation = 1,
104 .nbus = 2,
105 .freq = 20 * MHZ, .max_brp = 32, .max_sjw = 4,
106 .dpram_size = 0x0800,
107 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
108 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
109 .app = {0x0010, 0x0d0000, fw_dir "cansja.bin",},
110 .reset = softingcs_reset,
111 .enable_irq = softingcs_enable_irq,
112}, {
113 .name = "Vector-CANcard-2",
114 .manf = 0x0168, .prod = 0x085,
115 .generation = 2,
116 .nbus = 2,
117 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4,
118 .dpram_size = 0x1000,
119 .boot = {0x0000, 0x000000, fw_dir "bcard2.bin",},
120 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
121 .app = {0x0010, 0x0d0000, fw_dir "cancrd2.bin",},
122 .reset = softingcs_reset,
123 .enable_irq = NULL,
124}, {
125 .name = "EDICcard-NEC",
126 .manf = 0x0168, .prod = 0x102,
127 .generation = 1,
128 .nbus = 2,
129 .freq = 16 * MHZ, .max_brp = 64, .max_sjw = 4,
130 .dpram_size = 0x0800,
131 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
132 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
133 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
134 .reset = softingcs_reset,
135 .enable_irq = softingcs_enable_irq,
136}, {
137 .name = "EDICcard-2",
138 .manf = 0x0168, .prod = 0x105,
139 .generation = 2,
140 .nbus = 2,
141 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4,
142 .dpram_size = 0x1000,
143 .boot = {0x0000, 0x000000, fw_dir "bcard2.bin",},
144 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
145 .app = {0x0010, 0x0d0000, fw_dir "cancrd2.bin",},
146 .reset = softingcs_reset,
147 .enable_irq = NULL,
148}, {
149 0, 0,
150},
151};
152
153MODULE_FIRMWARE(fw_dir "bcard.bin");
154MODULE_FIRMWARE(fw_dir "ldcard.bin");
155MODULE_FIRMWARE(fw_dir "cancard.bin");
156MODULE_FIRMWARE(fw_dir "cansja.bin");
157
158MODULE_FIRMWARE(fw_dir "bcard2.bin");
159MODULE_FIRMWARE(fw_dir "ldcard2.bin");
160MODULE_FIRMWARE(fw_dir "cancrd2.bin");
161
162static __devinit const struct softing_platform_data
163*softingcs_find_platform_data(unsigned int manf, unsigned int prod)
164{
165 const struct softing_platform_data *lp;
166
167 for (lp = softingcs_platform_data; lp->manf; ++lp) {
168 if ((lp->manf == manf) && (lp->prod == prod))
169 return lp;
170 }
171 return NULL;
172}
173
174/*
175 * platformdata callbacks
176 */
177static int softingcs_reset(struct platform_device *pdev, int v)
178{
179 struct pcmcia_device *pcmcia = to_pcmcia_dev(pdev->dev.parent);
180
181 dev_dbg(&pdev->dev, "pcmcia config [2] %02x\n", v ? 0 : 0x20);
182 return pcmcia_write_config_byte(pcmcia, 2, v ? 0 : 0x20);
183}
184
185static int softingcs_enable_irq(struct platform_device *pdev, int v)
186{
187 struct pcmcia_device *pcmcia = to_pcmcia_dev(pdev->dev.parent);
188
189 dev_dbg(&pdev->dev, "pcmcia config [0] %02x\n", v ? 0x60 : 0);
190 return pcmcia_write_config_byte(pcmcia, 0, v ? 0x60 : 0);
191}
192
193/*
194 * pcmcia check
195 */
196static __devinit int softingcs_probe_config(struct pcmcia_device *pcmcia,
197 void *priv_data)
198{
199 struct softing_platform_data *pdat = priv_data;
200 struct resource *pres;
201 int memspeed = 0;
202
203 WARN_ON(!pdat);
204 pres = pcmcia->resource[PCMCIA_IOMEM_0];
205 if (resource_size(pres) < 0x1000)
206 return -ERANGE;
207
208 pres->flags |= WIN_MEMORY_TYPE_CM | WIN_ENABLE;
209 if (pdat->generation < 2) {
210 pres->flags |= WIN_USE_WAIT | WIN_DATA_WIDTH_8;
211 memspeed = 3;
212 } else {
213 pres->flags |= WIN_DATA_WIDTH_16;
214 }
215 return pcmcia_request_window(pcmcia, pres, memspeed);
216}
217
218static __devexit void softingcs_remove(struct pcmcia_device *pcmcia)
219{
220 struct platform_device *pdev = pcmcia->priv;
221
222 /* free bits */
223 platform_device_unregister(pdev);
224 /* release pcmcia stuff */
225 pcmcia_disable_device(pcmcia);
226}
227
228/*
229 * platform_device wrapper
230 * pdev->resource has 2 entries: io & irq
231 */
232static void softingcs_pdev_release(struct device *dev)
233{
234 struct platform_device *pdev = to_platform_device(dev);
235 kfree(pdev);
236}
237
238static __devinit int softingcs_probe(struct pcmcia_device *pcmcia)
239{
240 int ret;
241 struct platform_device *pdev;
242 const struct softing_platform_data *pdat;
243 struct resource *pres;
244 struct dev {
245 struct platform_device pdev;
246 struct resource res[2];
247 } *dev;
248
249 /* find matching platform_data */
250 pdat = softingcs_find_platform_data(pcmcia->manf_id, pcmcia->card_id);
251 if (!pdat)
252 return -ENOTTY;
253
254 /* setup pcmcia device */
255 pcmcia->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IOMEM |
256 CONF_AUTO_SET_VPP | CONF_AUTO_CHECK_VCC;
257 ret = pcmcia_loop_config(pcmcia, softingcs_probe_config, (void *)pdat);
258 if (ret)
259 goto pcmcia_failed;
260
261 ret = pcmcia_enable_device(pcmcia);
262 if (ret < 0)
263 goto pcmcia_failed;
264
265 pres = pcmcia->resource[PCMCIA_IOMEM_0];
266 if (!pres) {
267 ret = -EBADF;
268 goto pcmcia_bad;
269 }
270
271 /* create softing platform device */
272 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
273 if (!dev) {
274 ret = -ENOMEM;
275 goto mem_failed;
276 }
277 dev->pdev.resource = dev->res;
278 dev->pdev.num_resources = ARRAY_SIZE(dev->res);
279 dev->pdev.dev.release = softingcs_pdev_release;
280
281 pdev = &dev->pdev;
282 pdev->dev.platform_data = (void *)pdat;
283 pdev->dev.parent = &pcmcia->dev;
284 pcmcia->priv = pdev;
285
286 /* platform device resources */
287 pdev->resource[0].flags = IORESOURCE_MEM;
288 pdev->resource[0].start = pres->start;
289 pdev->resource[0].end = pres->end;
290
291 pdev->resource[1].flags = IORESOURCE_IRQ;
292 pdev->resource[1].start = pcmcia->irq;
293 pdev->resource[1].end = pdev->resource[1].start;
294
295 /* platform device setup */
296 spin_lock(&softingcs_index_lock);
297 pdev->id = softingcs_index++;
298 spin_unlock(&softingcs_index_lock);
299 pdev->name = "softing";
300 dev_set_name(&pdev->dev, "softingcs.%i", pdev->id);
301 ret = platform_device_register(pdev);
302 if (ret < 0)
303 goto platform_failed;
304
305 dev_info(&pcmcia->dev, "created %s\n", dev_name(&pdev->dev));
306 return 0;
307
308platform_failed:
309 kfree(dev);
310mem_failed:
311pcmcia_bad:
312pcmcia_failed:
313 pcmcia_disable_device(pcmcia);
314 pcmcia->priv = NULL;
315 return ret ?: -ENODEV;
316}
317
318static const struct pcmcia_device_id softingcs_ids[] = {
319 /* softing */
320 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0001),
321 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0002),
322 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0004),
323 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0005),
324 /* vector, manufacturer? */
325 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0081),
326 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0084),
327 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0085),
328 /* EDIC */
329 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0102),
330 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0105),
331 PCMCIA_DEVICE_NULL,
332};
333
334MODULE_DEVICE_TABLE(pcmcia, softingcs_ids);
335
336static struct pcmcia_driver softingcs_driver = {
337 .owner = THIS_MODULE,
338 .name = "softingcs",
339 .id_table = softingcs_ids,
340 .probe = softingcs_probe,
341 .remove = __devexit_p(softingcs_remove),
342};
343
344static int __init softingcs_start(void)
345{
346 spin_lock_init(&softingcs_index_lock);
347 return pcmcia_register_driver(&softingcs_driver);
348}
349
350static void __exit softingcs_stop(void)
351{
352 pcmcia_unregister_driver(&softingcs_driver);
353}
354
355module_init(softingcs_start);
356module_exit(softingcs_stop);
357
358MODULE_DESCRIPTION("softing CANcard driver"
359 ", links PCMCIA card to softing driver");
360MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/can/softing/softing_fw.c b/drivers/net/can/softing/softing_fw.c
new file mode 100644
index 000000000000..b520784fb197
--- /dev/null
+++ b/drivers/net/can/softing/softing_fw.c
@@ -0,0 +1,691 @@
1/*
2 * Copyright (C) 2008-2010
3 *
4 * - Kurt Van Dijck, EIA Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/firmware.h>
21#include <linux/sched.h>
22#include <asm/div64.h>
23
24#include "softing.h"
25
26/*
27 * low level DPRAM command.
28 * Make sure that card->dpram[DPRAM_FCT_HOST] is preset
29 */
30static int _softing_fct_cmd(struct softing *card, int16_t cmd, uint16_t vector,
31 const char *msg)
32{
33 int ret;
34 unsigned long stamp;
35
36 iowrite16(cmd, &card->dpram[DPRAM_FCT_PARAM]);
37 iowrite8(vector >> 8, &card->dpram[DPRAM_FCT_HOST + 1]);
38 iowrite8(vector, &card->dpram[DPRAM_FCT_HOST]);
39 /* be sure to flush this to the card */
40 wmb();
41 stamp = jiffies + 1 * HZ;
42 /* wait for card */
43 do {
44 /* DPRAM_FCT_HOST is _not_ aligned */
45 ret = ioread8(&card->dpram[DPRAM_FCT_HOST]) +
46 (ioread8(&card->dpram[DPRAM_FCT_HOST + 1]) << 8);
47 /* don't have any cached variables */
48 rmb();
49 if (ret == RES_OK)
50 /* read return-value now */
51 return ioread16(&card->dpram[DPRAM_FCT_RESULT]);
52
53 if ((ret != vector) || time_after(jiffies, stamp))
54 break;
55 /* process context => relax */
56 usleep_range(500, 10000);
57 } while (1);
58
59 ret = (ret == RES_NONE) ? -ETIMEDOUT : -ECANCELED;
60 dev_alert(&card->pdev->dev, "firmware %s failed (%i)\n", msg, ret);
61 return ret;
62}
63
64static int softing_fct_cmd(struct softing *card, int16_t cmd, const char *msg)
65{
66 int ret;
67
68 ret = _softing_fct_cmd(card, cmd, 0, msg);
69 if (ret > 0) {
70 dev_alert(&card->pdev->dev, "%s returned %u\n", msg, ret);
71 ret = -EIO;
72 }
73 return ret;
74}
75
76int softing_bootloader_command(struct softing *card, int16_t cmd,
77 const char *msg)
78{
79 int ret;
80 unsigned long stamp;
81
82 iowrite16(RES_NONE, &card->dpram[DPRAM_RECEIPT]);
83 iowrite16(cmd, &card->dpram[DPRAM_COMMAND]);
84 /* be sure to flush this to the card */
85 wmb();
86 stamp = jiffies + 3 * HZ;
87 /* wait for card */
88 do {
89 ret = ioread16(&card->dpram[DPRAM_RECEIPT]);
90 /* don't have any cached variables */
91 rmb();
92 if (ret == RES_OK)
93 return 0;
94 if (time_after(jiffies, stamp))
95 break;
96 /* process context => relax */
97 usleep_range(500, 10000);
98 } while (!signal_pending(current));
99
100 ret = (ret == RES_NONE) ? -ETIMEDOUT : -ECANCELED;
101 dev_alert(&card->pdev->dev, "bootloader %s failed (%i)\n", msg, ret);
102 return ret;
103}
104
105static int fw_parse(const uint8_t **pmem, uint16_t *ptype, uint32_t *paddr,
106 uint16_t *plen, const uint8_t **pdat)
107{
108 uint16_t checksum[2];
109 const uint8_t *mem;
110 const uint8_t *end;
111
112 /*
113 * firmware records are a binary, unaligned stream composed of:
114 * uint16_t type;
115 * uint32_t addr;
116 * uint16_t len;
117 * uint8_t dat[len];
118 * uint16_t checksum;
119 * all values in little endian.
120 * We could define a struct for this, with __attribute__((packed)),
121 * but would that solve the alignment in _all_ cases (cfr. the
122 * struct itself may be an odd address)?
123 *
124 * I chose to use leXX_to_cpup() since this solves both
125 * endianness & alignment.
126 */
127 mem = *pmem;
128 *ptype = le16_to_cpup((void *)&mem[0]);
129 *paddr = le32_to_cpup((void *)&mem[2]);
130 *plen = le16_to_cpup((void *)&mem[6]);
131 *pdat = &mem[8];
132 /* verify checksum */
133 end = &mem[8 + *plen];
134 checksum[0] = le16_to_cpup((void *)end);
135 for (checksum[1] = 0; mem < end; ++mem)
136 checksum[1] += *mem;
137 if (checksum[0] != checksum[1])
138 return -EINVAL;
139 /* increment */
140 *pmem += 10 + *plen;
141 return 0;
142}
143
144int softing_load_fw(const char *file, struct softing *card,
145 __iomem uint8_t *dpram, unsigned int size, int offset)
146{
147 const struct firmware *fw;
148 int ret;
149 const uint8_t *mem, *end, *dat;
150 uint16_t type, len;
151 uint32_t addr;
152 uint8_t *buf = NULL;
153 int buflen = 0;
154 int8_t type_end = 0;
155
156 ret = request_firmware(&fw, file, &card->pdev->dev);
157 if (ret < 0)
158 return ret;
159 dev_dbg(&card->pdev->dev, "%s, firmware(%s) got %u bytes"
160 ", offset %c0x%04x\n",
161 card->pdat->name, file, (unsigned int)fw->size,
162 (offset >= 0) ? '+' : '-', (unsigned int)abs(offset));
163 /* parse the firmware */
164 mem = fw->data;
165 end = &mem[fw->size];
166 /* look for header record */
167 ret = fw_parse(&mem, &type, &addr, &len, &dat);
168 if (ret < 0)
169 goto failed;
170 if (type != 0xffff)
171 goto failed;
172 if (strncmp("Structured Binary Format, Softing GmbH" , dat, len)) {
173 ret = -EINVAL;
174 goto failed;
175 }
176 /* ok, we had a header */
177 while (mem < end) {
178 ret = fw_parse(&mem, &type, &addr, &len, &dat);
179 if (ret < 0)
180 goto failed;
181 if (type == 3) {
182 /* start address, not used here */
183 continue;
184 } else if (type == 1) {
185 /* eof */
186 type_end = 1;
187 break;
188 } else if (type != 0) {
189 ret = -EINVAL;
190 goto failed;
191 }
192
193 if ((addr + len + offset) > size)
194 goto failed;
195 memcpy_toio(&dpram[addr + offset], dat, len);
196 /* be sure to flush caches from IO space */
197 mb();
198 if (len > buflen) {
199 /* align buflen */
200 buflen = (len + (1024-1)) & ~(1024-1);
201 buf = krealloc(buf, buflen, GFP_KERNEL);
202 if (!buf) {
203 ret = -ENOMEM;
204 goto failed;
205 }
206 }
207 /* verify record data */
208 memcpy_fromio(buf, &dpram[addr + offset], len);
209 if (memcmp(buf, dat, len)) {
210 /* is not ok */
211 dev_alert(&card->pdev->dev, "DPRAM readback failed\n");
212 ret = -EIO;
213 goto failed;
214 }
215 }
216 if (!type_end)
217 /* no end record seen */
218 goto failed;
219 ret = 0;
220failed:
221 kfree(buf);
222 release_firmware(fw);
223 if (ret < 0)
224 dev_info(&card->pdev->dev, "firmware %s failed\n", file);
225 return ret;
226}
227
228int softing_load_app_fw(const char *file, struct softing *card)
229{
230 const struct firmware *fw;
231 const uint8_t *mem, *end, *dat;
232 int ret, j;
233 uint16_t type, len;
234 uint32_t addr, start_addr = 0;
235 unsigned int sum, rx_sum;
236 int8_t type_end = 0, type_entrypoint = 0;
237
238 ret = request_firmware(&fw, file, &card->pdev->dev);
239 if (ret) {
240 dev_alert(&card->pdev->dev, "request_firmware(%s) got %i\n",
241 file, ret);
242 return ret;
243 }
244 dev_dbg(&card->pdev->dev, "firmware(%s) got %lu bytes\n",
245 file, (unsigned long)fw->size);
246 /* parse the firmware */
247 mem = fw->data;
248 end = &mem[fw->size];
249 /* look for header record */
250 ret = fw_parse(&mem, &type, &addr, &len, &dat);
251 if (ret)
252 goto failed;
253 ret = -EINVAL;
254 if (type != 0xffff) {
255 dev_alert(&card->pdev->dev, "firmware starts with type 0x%x\n",
256 type);
257 goto failed;
258 }
259 if (strncmp("Structured Binary Format, Softing GmbH", dat, len)) {
260 dev_alert(&card->pdev->dev, "firmware string '%.*s' fault\n",
261 len, dat);
262 goto failed;
263 }
264 /* ok, we had a header */
265 while (mem < end) {
266 ret = fw_parse(&mem, &type, &addr, &len, &dat);
267 if (ret)
268 goto failed;
269
270 if (type == 3) {
271 /* start address */
272 start_addr = addr;
273 type_entrypoint = 1;
274 continue;
275 } else if (type == 1) {
276 /* eof */
277 type_end = 1;
278 break;
279 } else if (type != 0) {
280 dev_alert(&card->pdev->dev,
281 "unknown record type 0x%04x\n", type);
282 ret = -EINVAL;
283 goto failed;
284 }
285
286 /* regualar data */
287 for (sum = 0, j = 0; j < len; ++j)
288 sum += dat[j];
289 /* work in 16bit (target) */
290 sum &= 0xffff;
291
292 memcpy_toio(&card->dpram[card->pdat->app.offs], dat, len);
293 iowrite32(card->pdat->app.offs + card->pdat->app.addr,
294 &card->dpram[DPRAM_COMMAND + 2]);
295 iowrite32(addr, &card->dpram[DPRAM_COMMAND + 6]);
296 iowrite16(len, &card->dpram[DPRAM_COMMAND + 10]);
297 iowrite8(1, &card->dpram[DPRAM_COMMAND + 12]);
298 ret = softing_bootloader_command(card, 1, "loading app.");
299 if (ret < 0)
300 goto failed;
301 /* verify checksum */
302 rx_sum = ioread16(&card->dpram[DPRAM_RECEIPT + 2]);
303 if (rx_sum != sum) {
304 dev_alert(&card->pdev->dev, "SRAM seems to be damaged"
305 ", wanted 0x%04x, got 0x%04x\n", sum, rx_sum);
306 ret = -EIO;
307 goto failed;
308 }
309 }
310 if (!type_end || !type_entrypoint)
311 goto failed;
312 /* start application in card */
313 iowrite32(start_addr, &card->dpram[DPRAM_COMMAND + 2]);
314 iowrite8(1, &card->dpram[DPRAM_COMMAND + 6]);
315 ret = softing_bootloader_command(card, 3, "start app.");
316 if (ret < 0)
317 goto failed;
318 ret = 0;
319failed:
320 release_firmware(fw);
321 if (ret < 0)
322 dev_info(&card->pdev->dev, "firmware %s failed\n", file);
323 return ret;
324}
325
326static int softing_reset_chip(struct softing *card)
327{
328 int ret;
329
330 do {
331 /* reset chip */
332 iowrite8(0, &card->dpram[DPRAM_RESET_RX_FIFO]);
333 iowrite8(0, &card->dpram[DPRAM_RESET_RX_FIFO+1]);
334 iowrite8(1, &card->dpram[DPRAM_RESET]);
335 iowrite8(0, &card->dpram[DPRAM_RESET+1]);
336
337 ret = softing_fct_cmd(card, 0, "reset_can");
338 if (!ret)
339 break;
340 if (signal_pending(current))
341 /* don't wait any longer */
342 break;
343 } while (1);
344 card->tx.pending = 0;
345 return ret;
346}
347
348int softing_chip_poweron(struct softing *card)
349{
350 int ret;
351 /* sync */
352 ret = _softing_fct_cmd(card, 99, 0x55, "sync-a");
353 if (ret < 0)
354 goto failed;
355
356 ret = _softing_fct_cmd(card, 99, 0xaa, "sync-b");
357 if (ret < 0)
358 goto failed;
359
360 ret = softing_reset_chip(card);
361 if (ret < 0)
362 goto failed;
363 /* get_serial */
364 ret = softing_fct_cmd(card, 43, "get_serial_number");
365 if (ret < 0)
366 goto failed;
367 card->id.serial = ioread32(&card->dpram[DPRAM_FCT_PARAM]);
368 /* get_version */
369 ret = softing_fct_cmd(card, 12, "get_version");
370 if (ret < 0)
371 goto failed;
372 card->id.fw_version = ioread16(&card->dpram[DPRAM_FCT_PARAM + 2]);
373 card->id.hw_version = ioread16(&card->dpram[DPRAM_FCT_PARAM + 4]);
374 card->id.license = ioread16(&card->dpram[DPRAM_FCT_PARAM + 6]);
375 card->id.chip[0] = ioread16(&card->dpram[DPRAM_FCT_PARAM + 8]);
376 card->id.chip[1] = ioread16(&card->dpram[DPRAM_FCT_PARAM + 10]);
377 return 0;
378failed:
379 return ret;
380}
381
382static void softing_initialize_timestamp(struct softing *card)
383{
384 uint64_t ovf;
385
386 card->ts_ref = ktime_get();
387
388 /* 16MHz is the reference */
389 ovf = 0x100000000ULL * 16;
390 do_div(ovf, card->pdat->freq ?: 16);
391
392 card->ts_overflow = ktime_add_us(ktime_set(0, 0), ovf);
393}
394
395ktime_t softing_raw2ktime(struct softing *card, u32 raw)
396{
397 uint64_t rawl;
398 ktime_t now, real_offset;
399 ktime_t target;
400 ktime_t tmp;
401
402 now = ktime_get();
403 real_offset = ktime_sub(ktime_get_real(), now);
404
405 /* find nsec from card */
406 rawl = raw * 16;
407 do_div(rawl, card->pdat->freq ?: 16);
408 target = ktime_add_us(card->ts_ref, rawl);
409 /* test for overflows */
410 tmp = ktime_add(target, card->ts_overflow);
411 while (unlikely(ktime_to_ns(tmp) > ktime_to_ns(now))) {
412 card->ts_ref = ktime_add(card->ts_ref, card->ts_overflow);
413 target = tmp;
414 tmp = ktime_add(target, card->ts_overflow);
415 }
416 return ktime_add(target, real_offset);
417}
418
419static inline int softing_error_reporting(struct net_device *netdev)
420{
421 struct softing_priv *priv = netdev_priv(netdev);
422
423 return (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
424 ? 1 : 0;
425}
426
427int softing_startstop(struct net_device *dev, int up)
428{
429 int ret;
430 struct softing *card;
431 struct softing_priv *priv;
432 struct net_device *netdev;
433 int bus_bitmask_start;
434 int j, error_reporting;
435 struct can_frame msg;
436 const struct can_bittiming *bt;
437
438 priv = netdev_priv(dev);
439 card = priv->card;
440
441 if (!card->fw.up)
442 return -EIO;
443
444 ret = mutex_lock_interruptible(&card->fw.lock);
445 if (ret)
446 return ret;
447
448 bus_bitmask_start = 0;
449 if (dev && up)
450 /* prepare to start this bus as well */
451 bus_bitmask_start |= (1 << priv->index);
452 /* bring netdevs down */
453 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
454 netdev = card->net[j];
455 if (!netdev)
456 continue;
457 priv = netdev_priv(netdev);
458
459 if (dev != netdev)
460 netif_stop_queue(netdev);
461
462 if (netif_running(netdev)) {
463 if (dev != netdev)
464 bus_bitmask_start |= (1 << j);
465 priv->tx.pending = 0;
466 priv->tx.echo_put = 0;
467 priv->tx.echo_get = 0;
468 /*
469 * this bus' may just have called open_candev()
470 * which is rather stupid to call close_candev()
471 * already
472 * but we may come here from busoff recovery too
473 * in which case the echo_skb _needs_ flushing too.
474 * just be sure to call open_candev() again
475 */
476 close_candev(netdev);
477 }
478 priv->can.state = CAN_STATE_STOPPED;
479 }
480 card->tx.pending = 0;
481
482 softing_enable_irq(card, 0);
483 ret = softing_reset_chip(card);
484 if (ret)
485 goto failed;
486 if (!bus_bitmask_start)
487 /* no busses to be brought up */
488 goto card_done;
489
490 if ((bus_bitmask_start & 1) && (bus_bitmask_start & 2)
491 && (softing_error_reporting(card->net[0])
492 != softing_error_reporting(card->net[1]))) {
493 dev_alert(&card->pdev->dev,
494 "err_reporting flag differs for busses\n");
495 goto invalid;
496 }
497 error_reporting = 0;
498 if (bus_bitmask_start & 1) {
499 netdev = card->net[0];
500 priv = netdev_priv(netdev);
501 error_reporting += softing_error_reporting(netdev);
502 /* init chip 1 */
503 bt = &priv->can.bittiming;
504 iowrite16(bt->brp, &card->dpram[DPRAM_FCT_PARAM + 2]);
505 iowrite16(bt->sjw, &card->dpram[DPRAM_FCT_PARAM + 4]);
506 iowrite16(bt->phase_seg1 + bt->prop_seg,
507 &card->dpram[DPRAM_FCT_PARAM + 6]);
508 iowrite16(bt->phase_seg2, &card->dpram[DPRAM_FCT_PARAM + 8]);
509 iowrite16((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 : 0,
510 &card->dpram[DPRAM_FCT_PARAM + 10]);
511 ret = softing_fct_cmd(card, 1, "initialize_chip[0]");
512 if (ret < 0)
513 goto failed;
514 /* set mode */
515 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 2]);
516 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 4]);
517 ret = softing_fct_cmd(card, 3, "set_mode[0]");
518 if (ret < 0)
519 goto failed;
520 /* set filter */
521 /* 11bit id & mask */
522 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 2]);
523 iowrite16(0x07ff, &card->dpram[DPRAM_FCT_PARAM + 4]);
524 /* 29bit id.lo & mask.lo & id.hi & mask.hi */
525 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 6]);
526 iowrite16(0xffff, &card->dpram[DPRAM_FCT_PARAM + 8]);
527 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 10]);
528 iowrite16(0x1fff, &card->dpram[DPRAM_FCT_PARAM + 12]);
529 ret = softing_fct_cmd(card, 7, "set_filter[0]");
530 if (ret < 0)
531 goto failed;
532 /* set output control */
533 iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]);
534 ret = softing_fct_cmd(card, 5, "set_output[0]");
535 if (ret < 0)
536 goto failed;
537 }
538 if (bus_bitmask_start & 2) {
539 netdev = card->net[1];
540 priv = netdev_priv(netdev);
541 error_reporting += softing_error_reporting(netdev);
542 /* init chip2 */
543 bt = &priv->can.bittiming;
544 iowrite16(bt->brp, &card->dpram[DPRAM_FCT_PARAM + 2]);
545 iowrite16(bt->sjw, &card->dpram[DPRAM_FCT_PARAM + 4]);
546 iowrite16(bt->phase_seg1 + bt->prop_seg,
547 &card->dpram[DPRAM_FCT_PARAM + 6]);
548 iowrite16(bt->phase_seg2, &card->dpram[DPRAM_FCT_PARAM + 8]);
549 iowrite16((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 : 0,
550 &card->dpram[DPRAM_FCT_PARAM + 10]);
551 ret = softing_fct_cmd(card, 2, "initialize_chip[1]");
552 if (ret < 0)
553 goto failed;
554 /* set mode2 */
555 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 2]);
556 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 4]);
557 ret = softing_fct_cmd(card, 4, "set_mode[1]");
558 if (ret < 0)
559 goto failed;
560 /* set filter2 */
561 /* 11bit id & mask */
562 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 2]);
563 iowrite16(0x07ff, &card->dpram[DPRAM_FCT_PARAM + 4]);
564 /* 29bit id.lo & mask.lo & id.hi & mask.hi */
565 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 6]);
566 iowrite16(0xffff, &card->dpram[DPRAM_FCT_PARAM + 8]);
567 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 10]);
568 iowrite16(0x1fff, &card->dpram[DPRAM_FCT_PARAM + 12]);
569 ret = softing_fct_cmd(card, 8, "set_filter[1]");
570 if (ret < 0)
571 goto failed;
572 /* set output control2 */
573 iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]);
574 ret = softing_fct_cmd(card, 6, "set_output[1]");
575 if (ret < 0)
576 goto failed;
577 }
578 /* enable_error_frame */
579 /*
580 * Error reporting is switched off at the moment since
581 * the receiving of them is not yet 100% verified
582 * This should be enabled sooner or later
583 *
584 if (error_reporting) {
585 ret = softing_fct_cmd(card, 51, "enable_error_frame");
586 if (ret < 0)
587 goto failed;
588 }
589 */
590 /* initialize interface */
591 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 2]);
592 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 4]);
593 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 6]);
594 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 8]);
595 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 10]);
596 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 12]);
597 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 14]);
598 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 16]);
599 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 18]);
600 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 20]);
601 ret = softing_fct_cmd(card, 17, "initialize_interface");
602 if (ret < 0)
603 goto failed;
604 /* enable_fifo */
605 ret = softing_fct_cmd(card, 36, "enable_fifo");
606 if (ret < 0)
607 goto failed;
608 /* enable fifo tx ack */
609 ret = softing_fct_cmd(card, 13, "fifo_tx_ack[0]");
610 if (ret < 0)
611 goto failed;
612 /* enable fifo tx ack2 */
613 ret = softing_fct_cmd(card, 14, "fifo_tx_ack[1]");
614 if (ret < 0)
615 goto failed;
616 /* start_chip */
617 ret = softing_fct_cmd(card, 11, "start_chip");
618 if (ret < 0)
619 goto failed;
620 iowrite8(0, &card->dpram[DPRAM_INFO_BUSSTATE]);
621 iowrite8(0, &card->dpram[DPRAM_INFO_BUSSTATE2]);
622 if (card->pdat->generation < 2) {
623 iowrite8(0, &card->dpram[DPRAM_V2_IRQ_TOHOST]);
624 /* flush the DPRAM caches */
625 wmb();
626 }
627
628 softing_initialize_timestamp(card);
629
630 /*
631 * do socketcan notifications/status changes
632 * from here, no errors should occur, or the failed: part
633 * must be reviewed
634 */
635 memset(&msg, 0, sizeof(msg));
636 msg.can_id = CAN_ERR_FLAG | CAN_ERR_RESTARTED;
637 msg.can_dlc = CAN_ERR_DLC;
638 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
639 if (!(bus_bitmask_start & (1 << j)))
640 continue;
641 netdev = card->net[j];
642 if (!netdev)
643 continue;
644 priv = netdev_priv(netdev);
645 priv->can.state = CAN_STATE_ERROR_ACTIVE;
646 open_candev(netdev);
647 if (dev != netdev) {
648 /* notify other busses on the restart */
649 softing_netdev_rx(netdev, &msg, ktime_set(0, 0));
650 ++priv->can.can_stats.restarts;
651 }
652 netif_wake_queue(netdev);
653 }
654
655 /* enable interrupts */
656 ret = softing_enable_irq(card, 1);
657 if (ret)
658 goto failed;
659card_done:
660 mutex_unlock(&card->fw.lock);
661 return 0;
662invalid:
663 ret = -EINVAL;
664failed:
665 softing_enable_irq(card, 0);
666 softing_reset_chip(card);
667 mutex_unlock(&card->fw.lock);
668 /* bring all other interfaces down */
669 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
670 netdev = card->net[j];
671 if (!netdev)
672 continue;
673 dev_close(netdev);
674 }
675 return ret;
676}
677
678int softing_default_output(struct net_device *netdev)
679{
680 struct softing_priv *priv = netdev_priv(netdev);
681 struct softing *card = priv->card;
682
683 switch (priv->chip) {
684 case 1000:
685 return (card->pdat->generation < 2) ? 0xfb : 0xfa;
686 case 5:
687 return 0x60;
688 default:
689 return 0x40;
690 }
691}
diff --git a/drivers/net/can/softing/softing_main.c b/drivers/net/can/softing/softing_main.c
new file mode 100644
index 000000000000..60a49e5a2a53
--- /dev/null
+++ b/drivers/net/can/softing/softing_main.c
@@ -0,0 +1,894 @@
1/*
2 * Copyright (C) 2008-2010
3 *
4 * - Kurt Van Dijck, EIA Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/version.h>
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24
25#include "softing.h"
26
27#define TX_ECHO_SKB_MAX (((TXMAX+1)/2)-1)
28
29/*
30 * test is a specific CAN netdev
31 * is online (ie. up 'n running, not sleeping, not busoff
32 */
33static inline int canif_is_active(struct net_device *netdev)
34{
35 struct can_priv *can = netdev_priv(netdev);
36
37 if (!netif_running(netdev))
38 return 0;
39 return (can->state <= CAN_STATE_ERROR_PASSIVE);
40}
41
42/* reset DPRAM */
43static inline void softing_set_reset_dpram(struct softing *card)
44{
45 if (card->pdat->generation >= 2) {
46 spin_lock_bh(&card->spin);
47 iowrite8(ioread8(&card->dpram[DPRAM_V2_RESET]) & ~1,
48 &card->dpram[DPRAM_V2_RESET]);
49 spin_unlock_bh(&card->spin);
50 }
51}
52
53static inline void softing_clr_reset_dpram(struct softing *card)
54{
55 if (card->pdat->generation >= 2) {
56 spin_lock_bh(&card->spin);
57 iowrite8(ioread8(&card->dpram[DPRAM_V2_RESET]) | 1,
58 &card->dpram[DPRAM_V2_RESET]);
59 spin_unlock_bh(&card->spin);
60 }
61}
62
63/* trigger the tx queue-ing */
64static netdev_tx_t softing_netdev_start_xmit(struct sk_buff *skb,
65 struct net_device *dev)
66{
67 struct softing_priv *priv = netdev_priv(dev);
68 struct softing *card = priv->card;
69 int ret;
70 uint8_t *ptr;
71 uint8_t fifo_wr, fifo_rd;
72 struct can_frame *cf = (struct can_frame *)skb->data;
73 uint8_t buf[DPRAM_TX_SIZE];
74
75 if (can_dropped_invalid_skb(dev, skb))
76 return NETDEV_TX_OK;
77
78 spin_lock(&card->spin);
79
80 ret = NETDEV_TX_BUSY;
81 if (!card->fw.up ||
82 (card->tx.pending >= TXMAX) ||
83 (priv->tx.pending >= TX_ECHO_SKB_MAX))
84 goto xmit_done;
85 fifo_wr = ioread8(&card->dpram[DPRAM_TX_WR]);
86 fifo_rd = ioread8(&card->dpram[DPRAM_TX_RD]);
87 if (fifo_wr == fifo_rd)
88 /* fifo full */
89 goto xmit_done;
90 memset(buf, 0, sizeof(buf));
91 ptr = buf;
92 *ptr = CMD_TX;
93 if (cf->can_id & CAN_RTR_FLAG)
94 *ptr |= CMD_RTR;
95 if (cf->can_id & CAN_EFF_FLAG)
96 *ptr |= CMD_XTD;
97 if (priv->index)
98 *ptr |= CMD_BUS2;
99 ++ptr;
100 *ptr++ = cf->can_dlc;
101 *ptr++ = (cf->can_id >> 0);
102 *ptr++ = (cf->can_id >> 8);
103 if (cf->can_id & CAN_EFF_FLAG) {
104 *ptr++ = (cf->can_id >> 16);
105 *ptr++ = (cf->can_id >> 24);
106 } else {
107 /* increment 1, not 2 as you might think */
108 ptr += 1;
109 }
110 if (!(cf->can_id & CAN_RTR_FLAG))
111 memcpy(ptr, &cf->data[0], cf->can_dlc);
112 memcpy_toio(&card->dpram[DPRAM_TX + DPRAM_TX_SIZE * fifo_wr],
113 buf, DPRAM_TX_SIZE);
114 if (++fifo_wr >= DPRAM_TX_CNT)
115 fifo_wr = 0;
116 iowrite8(fifo_wr, &card->dpram[DPRAM_TX_WR]);
117 card->tx.last_bus = priv->index;
118 ++card->tx.pending;
119 ++priv->tx.pending;
120 can_put_echo_skb(skb, dev, priv->tx.echo_put);
121 ++priv->tx.echo_put;
122 if (priv->tx.echo_put >= TX_ECHO_SKB_MAX)
123 priv->tx.echo_put = 0;
124 /* can_put_echo_skb() saves the skb, safe to return TX_OK */
125 ret = NETDEV_TX_OK;
126xmit_done:
127 spin_unlock(&card->spin);
128 if (card->tx.pending >= TXMAX) {
129 int j;
130 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
131 if (card->net[j])
132 netif_stop_queue(card->net[j]);
133 }
134 }
135 if (ret != NETDEV_TX_OK)
136 netif_stop_queue(dev);
137
138 return ret;
139}
140
141/*
142 * shortcut for skb delivery
143 */
144int softing_netdev_rx(struct net_device *netdev, const struct can_frame *msg,
145 ktime_t ktime)
146{
147 struct sk_buff *skb;
148 struct can_frame *cf;
149
150 skb = alloc_can_skb(netdev, &cf);
151 if (!skb)
152 return -ENOMEM;
153 memcpy(cf, msg, sizeof(*msg));
154 skb->tstamp = ktime;
155 return netif_rx(skb);
156}
157
158/*
159 * softing_handle_1
160 * pop 1 entry from the DPRAM queue, and process
161 */
162static int softing_handle_1(struct softing *card)
163{
164 struct net_device *netdev;
165 struct softing_priv *priv;
166 ktime_t ktime;
167 struct can_frame msg;
168 int cnt = 0, lost_msg;
169 uint8_t fifo_rd, fifo_wr, cmd;
170 uint8_t *ptr;
171 uint32_t tmp_u32;
172 uint8_t buf[DPRAM_RX_SIZE];
173
174 memset(&msg, 0, sizeof(msg));
175 /* test for lost msgs */
176 lost_msg = ioread8(&card->dpram[DPRAM_RX_LOST]);
177 if (lost_msg) {
178 int j;
179 /* reset condition */
180 iowrite8(0, &card->dpram[DPRAM_RX_LOST]);
181 /* prepare msg */
182 msg.can_id = CAN_ERR_FLAG | CAN_ERR_CRTL;
183 msg.can_dlc = CAN_ERR_DLC;
184 msg.data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
185 /*
186 * service to all busses, we don't know which it was applicable
187 * but only service busses that are online
188 */
189 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
190 netdev = card->net[j];
191 if (!netdev)
192 continue;
193 if (!canif_is_active(netdev))
194 /* a dead bus has no overflows */
195 continue;
196 ++netdev->stats.rx_over_errors;
197 softing_netdev_rx(netdev, &msg, ktime_set(0, 0));
198 }
199 /* prepare for other use */
200 memset(&msg, 0, sizeof(msg));
201 ++cnt;
202 }
203
204 fifo_rd = ioread8(&card->dpram[DPRAM_RX_RD]);
205 fifo_wr = ioread8(&card->dpram[DPRAM_RX_WR]);
206
207 if (++fifo_rd >= DPRAM_RX_CNT)
208 fifo_rd = 0;
209 if (fifo_wr == fifo_rd)
210 return cnt;
211
212 memcpy_fromio(buf, &card->dpram[DPRAM_RX + DPRAM_RX_SIZE*fifo_rd],
213 DPRAM_RX_SIZE);
214 mb();
215 /* trigger dual port RAM */
216 iowrite8(fifo_rd, &card->dpram[DPRAM_RX_RD]);
217
218 ptr = buf;
219 cmd = *ptr++;
220 if (cmd == 0xff)
221 /* not quite useful, probably the card has got out */
222 return 0;
223 netdev = card->net[0];
224 if (cmd & CMD_BUS2)
225 netdev = card->net[1];
226 priv = netdev_priv(netdev);
227
228 if (cmd & CMD_ERR) {
229 uint8_t can_state, state;
230
231 state = *ptr++;
232
233 msg.can_id = CAN_ERR_FLAG;
234 msg.can_dlc = CAN_ERR_DLC;
235
236 if (state & SF_MASK_BUSOFF) {
237 can_state = CAN_STATE_BUS_OFF;
238 msg.can_id |= CAN_ERR_BUSOFF;
239 state = STATE_BUSOFF;
240 } else if (state & SF_MASK_EPASSIVE) {
241 can_state = CAN_STATE_ERROR_PASSIVE;
242 msg.can_id |= CAN_ERR_CRTL;
243 msg.data[1] = CAN_ERR_CRTL_TX_PASSIVE;
244 state = STATE_EPASSIVE;
245 } else {
246 can_state = CAN_STATE_ERROR_ACTIVE;
247 msg.can_id |= CAN_ERR_CRTL;
248 state = STATE_EACTIVE;
249 }
250 /* update DPRAM */
251 iowrite8(state, &card->dpram[priv->index ?
252 DPRAM_INFO_BUSSTATE2 : DPRAM_INFO_BUSSTATE]);
253 /* timestamp */
254 tmp_u32 = le32_to_cpup((void *)ptr);
255 ptr += 4;
256 ktime = softing_raw2ktime(card, tmp_u32);
257
258 ++netdev->stats.rx_errors;
259 /* update internal status */
260 if (can_state != priv->can.state) {
261 priv->can.state = can_state;
262 if (can_state == CAN_STATE_ERROR_PASSIVE)
263 ++priv->can.can_stats.error_passive;
264 else if (can_state == CAN_STATE_BUS_OFF) {
265 /* this calls can_close_cleanup() */
266 can_bus_off(netdev);
267 netif_stop_queue(netdev);
268 }
269 /* trigger socketcan */
270 softing_netdev_rx(netdev, &msg, ktime);
271 }
272
273 } else {
274 if (cmd & CMD_RTR)
275 msg.can_id |= CAN_RTR_FLAG;
276 msg.can_dlc = get_can_dlc(*ptr++);
277 if (cmd & CMD_XTD) {
278 msg.can_id |= CAN_EFF_FLAG;
279 msg.can_id |= le32_to_cpup((void *)ptr);
280 ptr += 4;
281 } else {
282 msg.can_id |= le16_to_cpup((void *)ptr);
283 ptr += 2;
284 }
285 /* timestamp */
286 tmp_u32 = le32_to_cpup((void *)ptr);
287 ptr += 4;
288 ktime = softing_raw2ktime(card, tmp_u32);
289 if (!(msg.can_id & CAN_RTR_FLAG))
290 memcpy(&msg.data[0], ptr, 8);
291 ptr += 8;
292 /* update socket */
293 if (cmd & CMD_ACK) {
294 /* acknowledge, was tx msg */
295 struct sk_buff *skb;
296 skb = priv->can.echo_skb[priv->tx.echo_get];
297 if (skb)
298 skb->tstamp = ktime;
299 can_get_echo_skb(netdev, priv->tx.echo_get);
300 ++priv->tx.echo_get;
301 if (priv->tx.echo_get >= TX_ECHO_SKB_MAX)
302 priv->tx.echo_get = 0;
303 if (priv->tx.pending)
304 --priv->tx.pending;
305 if (card->tx.pending)
306 --card->tx.pending;
307 ++netdev->stats.tx_packets;
308 if (!(msg.can_id & CAN_RTR_FLAG))
309 netdev->stats.tx_bytes += msg.can_dlc;
310 } else {
311 int ret;
312
313 ret = softing_netdev_rx(netdev, &msg, ktime);
314 if (ret == NET_RX_SUCCESS) {
315 ++netdev->stats.rx_packets;
316 if (!(msg.can_id & CAN_RTR_FLAG))
317 netdev->stats.rx_bytes += msg.can_dlc;
318 } else {
319 ++netdev->stats.rx_dropped;
320 }
321 }
322 }
323 ++cnt;
324 return cnt;
325}
326
327/*
328 * real interrupt handler
329 */
330static irqreturn_t softing_irq_thread(int irq, void *dev_id)
331{
332 struct softing *card = (struct softing *)dev_id;
333 struct net_device *netdev;
334 struct softing_priv *priv;
335 int j, offset, work_done;
336
337 work_done = 0;
338 spin_lock_bh(&card->spin);
339 while (softing_handle_1(card) > 0) {
340 ++card->irq.svc_count;
341 ++work_done;
342 }
343 spin_unlock_bh(&card->spin);
344 /* resume tx queue's */
345 offset = card->tx.last_bus;
346 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
347 if (card->tx.pending >= TXMAX)
348 break;
349 netdev = card->net[(j + offset + 1) % card->pdat->nbus];
350 if (!netdev)
351 continue;
352 priv = netdev_priv(netdev);
353 if (!canif_is_active(netdev))
354 /* it makes no sense to wake dead busses */
355 continue;
356 if (priv->tx.pending >= TX_ECHO_SKB_MAX)
357 continue;
358 ++work_done;
359 netif_wake_queue(netdev);
360 }
361 return work_done ? IRQ_HANDLED : IRQ_NONE;
362}
363
364/*
365 * interrupt routines:
366 * schedule the 'real interrupt handler'
367 */
368static irqreturn_t softing_irq_v2(int irq, void *dev_id)
369{
370 struct softing *card = (struct softing *)dev_id;
371 uint8_t ir;
372
373 ir = ioread8(&card->dpram[DPRAM_V2_IRQ_TOHOST]);
374 iowrite8(0, &card->dpram[DPRAM_V2_IRQ_TOHOST]);
375 return (1 == ir) ? IRQ_WAKE_THREAD : IRQ_NONE;
376}
377
378static irqreturn_t softing_irq_v1(int irq, void *dev_id)
379{
380 struct softing *card = (struct softing *)dev_id;
381 uint8_t ir;
382
383 ir = ioread8(&card->dpram[DPRAM_IRQ_TOHOST]);
384 iowrite8(0, &card->dpram[DPRAM_IRQ_TOHOST]);
385 return ir ? IRQ_WAKE_THREAD : IRQ_NONE;
386}
387
388/*
389 * netdev/candev inter-operability
390 */
391static int softing_netdev_open(struct net_device *ndev)
392{
393 int ret;
394
395 /* check or determine and set bittime */
396 ret = open_candev(ndev);
397 if (!ret)
398 ret = softing_startstop(ndev, 1);
399 return ret;
400}
401
402static int softing_netdev_stop(struct net_device *ndev)
403{
404 int ret;
405
406 netif_stop_queue(ndev);
407
408 /* softing cycle does close_candev() */
409 ret = softing_startstop(ndev, 0);
410 return ret;
411}
412
413static int softing_candev_set_mode(struct net_device *ndev, enum can_mode mode)
414{
415 int ret;
416
417 switch (mode) {
418 case CAN_MODE_START:
419 /* softing_startstop does close_candev() */
420 ret = softing_startstop(ndev, 1);
421 return ret;
422 case CAN_MODE_STOP:
423 case CAN_MODE_SLEEP:
424 return -EOPNOTSUPP;
425 }
426 return 0;
427}
428
429/*
430 * Softing device management helpers
431 */
432int softing_enable_irq(struct softing *card, int enable)
433{
434 int ret;
435
436 if (!card->irq.nr) {
437 return 0;
438 } else if (card->irq.requested && !enable) {
439 free_irq(card->irq.nr, card);
440 card->irq.requested = 0;
441 } else if (!card->irq.requested && enable) {
442 ret = request_threaded_irq(card->irq.nr,
443 (card->pdat->generation >= 2) ?
444 softing_irq_v2 : softing_irq_v1,
445 softing_irq_thread, IRQF_SHARED,
446 dev_name(&card->pdev->dev), card);
447 if (ret) {
448 dev_alert(&card->pdev->dev,
449 "request_threaded_irq(%u) failed\n",
450 card->irq.nr);
451 return ret;
452 }
453 card->irq.requested = 1;
454 }
455 return 0;
456}
457
458static void softing_card_shutdown(struct softing *card)
459{
460 int fw_up = 0;
461
462 if (mutex_lock_interruptible(&card->fw.lock))
463 /* return -ERESTARTSYS */;
464 fw_up = card->fw.up;
465 card->fw.up = 0;
466
467 if (card->irq.requested && card->irq.nr) {
468 free_irq(card->irq.nr, card);
469 card->irq.requested = 0;
470 }
471 if (fw_up) {
472 if (card->pdat->enable_irq)
473 card->pdat->enable_irq(card->pdev, 0);
474 softing_set_reset_dpram(card);
475 if (card->pdat->reset)
476 card->pdat->reset(card->pdev, 1);
477 }
478 mutex_unlock(&card->fw.lock);
479}
480
481static __devinit int softing_card_boot(struct softing *card)
482{
483 int ret, j;
484 static const uint8_t stream[] = {
485 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, };
486 unsigned char back[sizeof(stream)];
487
488 if (mutex_lock_interruptible(&card->fw.lock))
489 return -ERESTARTSYS;
490 if (card->fw.up) {
491 mutex_unlock(&card->fw.lock);
492 return 0;
493 }
494 /* reset board */
495 if (card->pdat->enable_irq)
496 card->pdat->enable_irq(card->pdev, 1);
497 /* boot card */
498 softing_set_reset_dpram(card);
499 if (card->pdat->reset)
500 card->pdat->reset(card->pdev, 1);
501 for (j = 0; (j + sizeof(stream)) < card->dpram_size;
502 j += sizeof(stream)) {
503
504 memcpy_toio(&card->dpram[j], stream, sizeof(stream));
505 /* flush IO cache */
506 mb();
507 memcpy_fromio(back, &card->dpram[j], sizeof(stream));
508
509 if (!memcmp(back, stream, sizeof(stream)))
510 continue;
511 /* memory is not equal */
512 dev_alert(&card->pdev->dev, "dpram failed at 0x%04x\n", j);
513 ret = -EIO;
514 goto failed;
515 }
516 wmb();
517 /* load boot firmware */
518 ret = softing_load_fw(card->pdat->boot.fw, card, card->dpram,
519 card->dpram_size,
520 card->pdat->boot.offs - card->pdat->boot.addr);
521 if (ret < 0)
522 goto failed;
523 /* load loader firmware */
524 ret = softing_load_fw(card->pdat->load.fw, card, card->dpram,
525 card->dpram_size,
526 card->pdat->load.offs - card->pdat->load.addr);
527 if (ret < 0)
528 goto failed;
529
530 if (card->pdat->reset)
531 card->pdat->reset(card->pdev, 0);
532 softing_clr_reset_dpram(card);
533 ret = softing_bootloader_command(card, 0, "card boot");
534 if (ret < 0)
535 goto failed;
536 ret = softing_load_app_fw(card->pdat->app.fw, card);
537 if (ret < 0)
538 goto failed;
539
540 ret = softing_chip_poweron(card);
541 if (ret < 0)
542 goto failed;
543
544 card->fw.up = 1;
545 mutex_unlock(&card->fw.lock);
546 return 0;
547failed:
548 card->fw.up = 0;
549 if (card->pdat->enable_irq)
550 card->pdat->enable_irq(card->pdev, 0);
551 softing_set_reset_dpram(card);
552 if (card->pdat->reset)
553 card->pdat->reset(card->pdev, 1);
554 mutex_unlock(&card->fw.lock);
555 return ret;
556}
557
558/*
559 * netdev sysfs
560 */
561static ssize_t show_channel(struct device *dev, struct device_attribute *attr,
562 char *buf)
563{
564 struct net_device *ndev = to_net_dev(dev);
565 struct softing_priv *priv = netdev2softing(ndev);
566
567 return sprintf(buf, "%i\n", priv->index);
568}
569
570static ssize_t show_chip(struct device *dev, struct device_attribute *attr,
571 char *buf)
572{
573 struct net_device *ndev = to_net_dev(dev);
574 struct softing_priv *priv = netdev2softing(ndev);
575
576 return sprintf(buf, "%i\n", priv->chip);
577}
578
579static ssize_t show_output(struct device *dev, struct device_attribute *attr,
580 char *buf)
581{
582 struct net_device *ndev = to_net_dev(dev);
583 struct softing_priv *priv = netdev2softing(ndev);
584
585 return sprintf(buf, "0x%02x\n", priv->output);
586}
587
588static ssize_t store_output(struct device *dev, struct device_attribute *attr,
589 const char *buf, size_t count)
590{
591 struct net_device *ndev = to_net_dev(dev);
592 struct softing_priv *priv = netdev2softing(ndev);
593 struct softing *card = priv->card;
594 unsigned long val;
595 int ret;
596
597 ret = strict_strtoul(buf, 0, &val);
598 if (ret < 0)
599 return ret;
600 val &= 0xFF;
601
602 ret = mutex_lock_interruptible(&card->fw.lock);
603 if (ret)
604 return -ERESTARTSYS;
605 if (netif_running(ndev)) {
606 mutex_unlock(&card->fw.lock);
607 return -EBUSY;
608 }
609 priv->output = val;
610 mutex_unlock(&card->fw.lock);
611 return count;
612}
613
614static const DEVICE_ATTR(channel, S_IRUGO, show_channel, NULL);
615static const DEVICE_ATTR(chip, S_IRUGO, show_chip, NULL);
616static const DEVICE_ATTR(output, S_IRUGO | S_IWUSR, show_output, store_output);
617
618static const struct attribute *const netdev_sysfs_attrs[] = {
619 &dev_attr_channel.attr,
620 &dev_attr_chip.attr,
621 &dev_attr_output.attr,
622 NULL,
623};
624static const struct attribute_group netdev_sysfs_group = {
625 .name = NULL,
626 .attrs = (struct attribute **)netdev_sysfs_attrs,
627};
628
629static const struct net_device_ops softing_netdev_ops = {
630 .ndo_open = softing_netdev_open,
631 .ndo_stop = softing_netdev_stop,
632 .ndo_start_xmit = softing_netdev_start_xmit,
633};
634
635static const struct can_bittiming_const softing_btr_const = {
636 .name = "softing",
637 .tseg1_min = 1,
638 .tseg1_max = 16,
639 .tseg2_min = 1,
640 .tseg2_max = 8,
641 .sjw_max = 4, /* overruled */
642 .brp_min = 1,
643 .brp_max = 32, /* overruled */
644 .brp_inc = 1,
645};
646
647
648static __devinit struct net_device *softing_netdev_create(struct softing *card,
649 uint16_t chip_id)
650{
651 struct net_device *netdev;
652 struct softing_priv *priv;
653
654 netdev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);
655 if (!netdev) {
656 dev_alert(&card->pdev->dev, "alloc_candev failed\n");
657 return NULL;
658 }
659 priv = netdev_priv(netdev);
660 priv->netdev = netdev;
661 priv->card = card;
662 memcpy(&priv->btr_const, &softing_btr_const, sizeof(priv->btr_const));
663 priv->btr_const.brp_max = card->pdat->max_brp;
664 priv->btr_const.sjw_max = card->pdat->max_sjw;
665 priv->can.bittiming_const = &priv->btr_const;
666 priv->can.clock.freq = 8000000;
667 priv->chip = chip_id;
668 priv->output = softing_default_output(netdev);
669 SET_NETDEV_DEV(netdev, &card->pdev->dev);
670
671 netdev->flags |= IFF_ECHO;
672 netdev->netdev_ops = &softing_netdev_ops;
673 priv->can.do_set_mode = softing_candev_set_mode;
674 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
675
676 return netdev;
677}
678
679static __devinit int softing_netdev_register(struct net_device *netdev)
680{
681 int ret;
682
683 netdev->sysfs_groups[0] = &netdev_sysfs_group;
684 ret = register_candev(netdev);
685 if (ret) {
686 dev_alert(&netdev->dev, "register failed\n");
687 return ret;
688 }
689 return 0;
690}
691
692static void softing_netdev_cleanup(struct net_device *netdev)
693{
694 unregister_candev(netdev);
695 free_candev(netdev);
696}
697
698/*
699 * sysfs for Platform device
700 */
701#define DEV_ATTR_RO(name, member) \
702static ssize_t show_##name(struct device *dev, \
703 struct device_attribute *attr, char *buf) \
704{ \
705 struct softing *card = platform_get_drvdata(to_platform_device(dev)); \
706 return sprintf(buf, "%u\n", card->member); \
707} \
708static DEVICE_ATTR(name, 0444, show_##name, NULL)
709
710#define DEV_ATTR_RO_STR(name, member) \
711static ssize_t show_##name(struct device *dev, \
712 struct device_attribute *attr, char *buf) \
713{ \
714 struct softing *card = platform_get_drvdata(to_platform_device(dev)); \
715 return sprintf(buf, "%s\n", card->member); \
716} \
717static DEVICE_ATTR(name, 0444, show_##name, NULL)
718
719DEV_ATTR_RO(serial, id.serial);
720DEV_ATTR_RO_STR(firmware, pdat->app.fw);
721DEV_ATTR_RO(firmware_version, id.fw_version);
722DEV_ATTR_RO_STR(hardware, pdat->name);
723DEV_ATTR_RO(hardware_version, id.hw_version);
724DEV_ATTR_RO(license, id.license);
725DEV_ATTR_RO(frequency, id.freq);
726DEV_ATTR_RO(txpending, tx.pending);
727
728static struct attribute *softing_pdev_attrs[] = {
729 &dev_attr_serial.attr,
730 &dev_attr_firmware.attr,
731 &dev_attr_firmware_version.attr,
732 &dev_attr_hardware.attr,
733 &dev_attr_hardware_version.attr,
734 &dev_attr_license.attr,
735 &dev_attr_frequency.attr,
736 &dev_attr_txpending.attr,
737 NULL,
738};
739
740static const struct attribute_group softing_pdev_group = {
741 .name = NULL,
742 .attrs = softing_pdev_attrs,
743};
744
745/*
746 * platform driver
747 */
748static __devexit int softing_pdev_remove(struct platform_device *pdev)
749{
750 struct softing *card = platform_get_drvdata(pdev);
751 int j;
752
753 /* first, disable card*/
754 softing_card_shutdown(card);
755
756 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
757 if (!card->net[j])
758 continue;
759 softing_netdev_cleanup(card->net[j]);
760 card->net[j] = NULL;
761 }
762 sysfs_remove_group(&pdev->dev.kobj, &softing_pdev_group);
763
764 iounmap(card->dpram);
765 kfree(card);
766 return 0;
767}
768
769static __devinit int softing_pdev_probe(struct platform_device *pdev)
770{
771 const struct softing_platform_data *pdat = pdev->dev.platform_data;
772 struct softing *card;
773 struct net_device *netdev;
774 struct softing_priv *priv;
775 struct resource *pres;
776 int ret;
777 int j;
778
779 if (!pdat) {
780 dev_warn(&pdev->dev, "no platform data\n");
781 return -EINVAL;
782 }
783 if (pdat->nbus > ARRAY_SIZE(card->net)) {
784 dev_warn(&pdev->dev, "%u nets??\n", pdat->nbus);
785 return -EINVAL;
786 }
787
788 card = kzalloc(sizeof(*card), GFP_KERNEL);
789 if (!card)
790 return -ENOMEM;
791 card->pdat = pdat;
792 card->pdev = pdev;
793 platform_set_drvdata(pdev, card);
794 mutex_init(&card->fw.lock);
795 spin_lock_init(&card->spin);
796
797 ret = -EINVAL;
798 pres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
799 if (!pres)
800 goto platform_resource_failed;
801 card->dpram_phys = pres->start;
802 card->dpram_size = pres->end - pres->start + 1;
803 card->dpram = ioremap_nocache(card->dpram_phys, card->dpram_size);
804 if (!card->dpram) {
805 dev_alert(&card->pdev->dev, "dpram ioremap failed\n");
806 goto ioremap_failed;
807 }
808
809 pres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
810 if (pres)
811 card->irq.nr = pres->start;
812
813 /* reset card */
814 ret = softing_card_boot(card);
815 if (ret < 0) {
816 dev_alert(&pdev->dev, "failed to boot\n");
817 goto boot_failed;
818 }
819
820 /* only now, the chip's are known */
821 card->id.freq = card->pdat->freq;
822
823 ret = sysfs_create_group(&pdev->dev.kobj, &softing_pdev_group);
824 if (ret < 0) {
825 dev_alert(&card->pdev->dev, "sysfs failed\n");
826 goto sysfs_failed;
827 }
828
829 ret = -ENOMEM;
830 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
831 card->net[j] = netdev =
832 softing_netdev_create(card, card->id.chip[j]);
833 if (!netdev) {
834 dev_alert(&pdev->dev, "failed to make can[%i]", j);
835 goto netdev_failed;
836 }
837 priv = netdev_priv(card->net[j]);
838 priv->index = j;
839 ret = softing_netdev_register(netdev);
840 if (ret) {
841 free_candev(netdev);
842 card->net[j] = NULL;
843 dev_alert(&card->pdev->dev,
844 "failed to register can[%i]\n", j);
845 goto netdev_failed;
846 }
847 }
848 dev_info(&card->pdev->dev, "%s ready.\n", card->pdat->name);
849 return 0;
850
851netdev_failed:
852 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
853 if (!card->net[j])
854 continue;
855 softing_netdev_cleanup(card->net[j]);
856 }
857 sysfs_remove_group(&pdev->dev.kobj, &softing_pdev_group);
858sysfs_failed:
859 softing_card_shutdown(card);
860boot_failed:
861 iounmap(card->dpram);
862ioremap_failed:
863platform_resource_failed:
864 kfree(card);
865 return ret;
866}
867
868static struct platform_driver softing_driver = {
869 .driver = {
870 .name = "softing",
871 .owner = THIS_MODULE,
872 },
873 .probe = softing_pdev_probe,
874 .remove = __devexit_p(softing_pdev_remove),
875};
876
877MODULE_ALIAS("platform:softing");
878
879static int __init softing_start(void)
880{
881 return platform_driver_register(&softing_driver);
882}
883
884static void __exit softing_stop(void)
885{
886 platform_driver_unregister(&softing_driver);
887}
888
889module_init(softing_start);
890module_exit(softing_stop);
891
892MODULE_DESCRIPTION("Softing DPRAM CAN driver");
893MODULE_AUTHOR("Kurt Van Dijck <kurt.van.dijck@eia.be>");
894MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/can/softing/softing_platform.h b/drivers/net/can/softing/softing_platform.h
new file mode 100644
index 000000000000..ebbf69815623
--- /dev/null
+++ b/drivers/net/can/softing/softing_platform.h
@@ -0,0 +1,40 @@
1
2#include <linux/platform_device.h>
3
4#ifndef _SOFTING_DEVICE_H_
5#define _SOFTING_DEVICE_H_
6
7/* softing firmware directory prefix */
8#define fw_dir "softing-4.6/"
9
10struct softing_platform_data {
11 unsigned int manf;
12 unsigned int prod;
13 /*
14 * generation
15 * 1st with NEC or SJA1000
16 * 8bit, exclusive interrupt, ...
17 * 2nd only SJA1000
18 * 16bit, shared interrupt
19 */
20 int generation;
21 int nbus; /* # busses on device */
22 unsigned int freq; /* operating frequency in Hz */
23 unsigned int max_brp;
24 unsigned int max_sjw;
25 unsigned long dpram_size;
26 const char *name;
27 struct {
28 unsigned long offs;
29 unsigned long addr;
30 const char *fw;
31 } boot, load, app;
32 /*
33 * reset() function
34 * bring pdev in or out of reset, depending on value
35 */
36 int (*reset)(struct platform_device *pdev, int value);
37 int (*enable_irq)(struct platform_device *pdev, int value);
38};
39
40#endif
diff --git a/drivers/net/can/ti_hecc.c b/drivers/net/can/ti_hecc.c
index 4d07f1ee7168..f7bbde9eb2cb 100644
--- a/drivers/net/can/ti_hecc.c
+++ b/drivers/net/can/ti_hecc.c
@@ -663,7 +663,7 @@ static int ti_hecc_error(struct net_device *ndev, int int_status,
663 struct can_frame *cf; 663 struct can_frame *cf;
664 struct sk_buff *skb; 664 struct sk_buff *skb;
665 665
666 /* propogate the error condition to the can stack */ 666 /* propagate the error condition to the can stack */
667 skb = alloc_can_err_skb(ndev, &cf); 667 skb = alloc_can_err_skb(ndev, &cf);
668 if (!skb) { 668 if (!skb) {
669 if (printk_ratelimit()) 669 if (printk_ratelimit())
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index e75f1a876972..a72c7bfb4090 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -386,7 +386,7 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg)
386 break; 386 break;
387 } 387 }
388 388
389 /* Error occured during transmission? */ 389 /* Error occurred during transmission? */
390 if ((ecc & SJA1000_ECC_DIR) == 0) 390 if ((ecc & SJA1000_ECC_DIR) == 0)
391 cf->data[2] |= CAN_ERR_PROT_TX; 391 cf->data[2] |= CAN_ERR_PROT_TX;
392 392
diff --git a/drivers/net/can/usb/esd_usb2.c b/drivers/net/can/usb/esd_usb2.c
index 05a52754f486..eb8b0e600282 100644
--- a/drivers/net/can/usb/esd_usb2.c
+++ b/drivers/net/can/usb/esd_usb2.c
@@ -284,7 +284,7 @@ static void esd_usb2_rx_event(struct esd_usb2_net_priv *priv,
284 break; 284 break;
285 } 285 }
286 286
287 /* Error occured during transmission? */ 287 /* Error occurred during transmission? */
288 if (!(ecc & SJA1000_ECC_DIR)) 288 if (!(ecc & SJA1000_ECC_DIR))
289 cf->data[2] |= CAN_ERR_PROT_TX; 289 cf->data[2] |= CAN_ERR_PROT_TX;
290 290
@@ -659,7 +659,7 @@ failed:
659static void unlink_all_urbs(struct esd_usb2 *dev) 659static void unlink_all_urbs(struct esd_usb2 *dev)
660{ 660{
661 struct esd_usb2_net_priv *priv; 661 struct esd_usb2_net_priv *priv;
662 int i; 662 int i, j;
663 663
664 usb_kill_anchored_urbs(&dev->rx_submitted); 664 usb_kill_anchored_urbs(&dev->rx_submitted);
665 for (i = 0; i < dev->net_count; i++) { 665 for (i = 0; i < dev->net_count; i++) {
@@ -668,8 +668,8 @@ static void unlink_all_urbs(struct esd_usb2 *dev)
668 usb_kill_anchored_urbs(&priv->tx_submitted); 668 usb_kill_anchored_urbs(&priv->tx_submitted);
669 atomic_set(&priv->active_tx_jobs, 0); 669 atomic_set(&priv->active_tx_jobs, 0);
670 670
671 for (i = 0; i < MAX_TX_URBS; i++) 671 for (j = 0; j < MAX_TX_URBS; j++)
672 priv->tx_contexts[i].echo_index = MAX_TX_URBS; 672 priv->tx_contexts[j].echo_index = MAX_TX_URBS;
673 } 673 }
674 } 674 }
675} 675}
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-03 14:15:48 -0400