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Diffstat (limited to 'drivers/net/bnx2x_hsi.h')
-rw-r--r--drivers/net/bnx2x_hsi.h27
1 files changed, 23 insertions, 4 deletions
diff --git a/drivers/net/bnx2x_hsi.h b/drivers/net/bnx2x_hsi.h
index b21075ccb52e..96208ace1466 100644
--- a/drivers/net/bnx2x_hsi.h
+++ b/drivers/net/bnx2x_hsi.h
@@ -522,8 +522,21 @@ struct dev_info { /* size */
522 522
523#define FUNC_0 0 523#define FUNC_0 0
524#define FUNC_1 1 524#define FUNC_1 1
525#define FUNC_2 2
526#define FUNC_3 3
527#define FUNC_4 4
528#define FUNC_5 5
529#define FUNC_6 6
530#define FUNC_7 7
525#define E1_FUNC_MAX 2 531#define E1_FUNC_MAX 2
526#define FUNC_MAX E1_FUNC_MAX 532#define E1H_FUNC_MAX 8
533
534#define VN_0 0
535#define VN_1 1
536#define VN_2 2
537#define VN_3 3
538#define E1VN_MAX 1
539#define E1HVN_MAX 4
527 540
528 541
529/* This value (in milliseconds) determines the frequency of the driver 542/* This value (in milliseconds) determines the frequency of the driver
@@ -747,7 +760,11 @@ struct shmem_region { /* SharedMem Offset (size) */
747 struct mgmtfw_state mgmtfw_state; /* 0x4ac (0x1b8) */ 760 struct mgmtfw_state mgmtfw_state; /* 0x4ac (0x1b8) */
748 761
749 struct drv_port_mb port_mb[PORT_MAX]; /* 0x664 (16*2=0x20) */ 762 struct drv_port_mb port_mb[PORT_MAX]; /* 0x664 (16*2=0x20) */
750 struct drv_func_mb func_mb[FUNC_MAX]; /* 0x684 (44*2=0x58) */ 763#if defined(b710)
764 struct drv_func_mb func_mb[E1_FUNC_MAX]; /* 0x684 (44*2=0x58) */
765#else
766 struct drv_func_mb func_mb[E1H_FUNC_MAX];
767#endif
751 768
752}; /* 0x6dc */ 769}; /* 0x6dc */
753 770
@@ -901,8 +918,10 @@ struct dmae_command {
901#define DMAE_COMMAND_SRC_RESET_SHIFT 13 918#define DMAE_COMMAND_SRC_RESET_SHIFT 13
902#define DMAE_COMMAND_DST_RESET (0x1<<14) 919#define DMAE_COMMAND_DST_RESET (0x1<<14)
903#define DMAE_COMMAND_DST_RESET_SHIFT 14 920#define DMAE_COMMAND_DST_RESET_SHIFT 14
904#define DMAE_COMMAND_RESERVED0 (0x1FFFF<<15) 921#define DMAE_COMMAND_E1HVN (0x3<<15)
905#define DMAE_COMMAND_RESERVED0_SHIFT 15 922#define DMAE_COMMAND_E1HVN_SHIFT 15
923#define DMAE_COMMAND_RESERVED0 (0x7FFF<<17)
924#define DMAE_COMMAND_RESERVED0_SHIFT 17
906 u32 src_addr_lo; 925 u32 src_addr_lo;
907 u32 src_addr_hi; 926 u32 src_addr_hi;
908 u32 dst_addr_lo; 927 u32 dst_addr_lo;