diff options
Diffstat (limited to 'drivers/net/bnx2x/bnx2x_stats.c')
-rw-r--r-- | drivers/net/bnx2x/bnx2x_stats.c | 327 |
1 files changed, 166 insertions, 161 deletions
diff --git a/drivers/net/bnx2x/bnx2x_stats.c b/drivers/net/bnx2x/bnx2x_stats.c index c74724461020..e535bfa08945 100644 --- a/drivers/net/bnx2x/bnx2x_stats.c +++ b/drivers/net/bnx2x/bnx2x_stats.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* bnx2x_stats.c: Broadcom Everest network driver. | 1 | /* bnx2x_stats.c: Broadcom Everest network driver. |
2 | * | 2 | * |
3 | * Copyright (c) 2007-2010 Broadcom Corporation | 3 | * Copyright (c) 2007-2011 Broadcom Corporation |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify | 5 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License as published by | 6 | * it under the terms of the GNU General Public License as published by |
@@ -14,8 +14,8 @@ | |||
14 | * Statistics and Link management by Yitchak Gertner | 14 | * Statistics and Link management by Yitchak Gertner |
15 | * | 15 | * |
16 | */ | 16 | */ |
17 | #include "bnx2x_cmn.h" | 17 | #include "bnx2x_cmn.h" |
18 | #include "bnx2x_stats.h" | 18 | #include "bnx2x_stats.h" |
19 | 19 | ||
20 | /* Statistics */ | 20 | /* Statistics */ |
21 | 21 | ||
@@ -153,24 +153,26 @@ static inline long bnx2x_hilo(u32 *hiref) | |||
153 | static void bnx2x_storm_stats_post(struct bnx2x *bp) | 153 | static void bnx2x_storm_stats_post(struct bnx2x *bp) |
154 | { | 154 | { |
155 | if (!bp->stats_pending) { | 155 | if (!bp->stats_pending) { |
156 | struct eth_query_ramrod_data ramrod_data = {0}; | 156 | struct common_query_ramrod_data ramrod_data = {0}; |
157 | int i, rc; | 157 | int i, rc; |
158 | 158 | ||
159 | spin_lock_bh(&bp->stats_lock); | 159 | spin_lock_bh(&bp->stats_lock); |
160 | 160 | ||
161 | if (bp->stats_pending) { | ||
162 | spin_unlock_bh(&bp->stats_lock); | ||
163 | return; | ||
164 | } | ||
165 | |||
161 | ramrod_data.drv_counter = bp->stats_counter++; | 166 | ramrod_data.drv_counter = bp->stats_counter++; |
162 | ramrod_data.collect_port = bp->port.pmf ? 1 : 0; | 167 | ramrod_data.collect_port = bp->port.pmf ? 1 : 0; |
163 | for_each_queue(bp, i) | 168 | for_each_eth_queue(bp, i) |
164 | ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id); | 169 | ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id); |
165 | 170 | ||
166 | rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_STAT_QUERY, 0, | 171 | rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0, |
167 | ((u32 *)&ramrod_data)[1], | 172 | ((u32 *)&ramrod_data)[1], |
168 | ((u32 *)&ramrod_data)[0], 0); | 173 | ((u32 *)&ramrod_data)[0], 1); |
169 | if (rc == 0) { | 174 | if (rc == 0) |
170 | /* stats ramrod has it's own slot on the spq */ | ||
171 | bp->spq_left++; | ||
172 | bp->stats_pending = 1; | 175 | bp->stats_pending = 1; |
173 | } | ||
174 | 176 | ||
175 | spin_unlock_bh(&bp->stats_lock); | 177 | spin_unlock_bh(&bp->stats_lock); |
176 | } | 178 | } |
@@ -188,20 +190,12 @@ static void bnx2x_hw_stats_post(struct bnx2x *bp) | |||
188 | /* loader */ | 190 | /* loader */ |
189 | if (bp->executer_idx) { | 191 | if (bp->executer_idx) { |
190 | int loader_idx = PMF_DMAE_C(bp); | 192 | int loader_idx = PMF_DMAE_C(bp); |
193 | u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, | ||
194 | true, DMAE_COMP_GRC); | ||
195 | opcode = bnx2x_dmae_opcode_clr_src_reset(opcode); | ||
191 | 196 | ||
192 | memset(dmae, 0, sizeof(struct dmae_command)); | 197 | memset(dmae, 0, sizeof(struct dmae_command)); |
193 | 198 | dmae->opcode = opcode; | |
194 | dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC | | ||
195 | DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE | | ||
196 | DMAE_CMD_DST_RESET | | ||
197 | #ifdef __BIG_ENDIAN | ||
198 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
199 | #else | ||
200 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
201 | #endif | ||
202 | (BP_PORT(bp) ? DMAE_CMD_PORT_1 : | ||
203 | DMAE_CMD_PORT_0) | | ||
204 | (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT)); | ||
205 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0])); | 199 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0])); |
206 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0])); | 200 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0])); |
207 | dmae->dst_addr_lo = (DMAE_REG_CMD_MEM + | 201 | dmae->dst_addr_lo = (DMAE_REG_CMD_MEM + |
@@ -253,26 +247,17 @@ static void bnx2x_stats_pmf_update(struct bnx2x *bp) | |||
253 | u32 *stats_comp = bnx2x_sp(bp, stats_comp); | 247 | u32 *stats_comp = bnx2x_sp(bp, stats_comp); |
254 | 248 | ||
255 | /* sanity */ | 249 | /* sanity */ |
256 | if (!IS_E1HMF(bp) || !bp->port.pmf || !bp->port.port_stx) { | 250 | if (!IS_MF(bp) || !bp->port.pmf || !bp->port.port_stx) { |
257 | BNX2X_ERR("BUG!\n"); | 251 | BNX2X_ERR("BUG!\n"); |
258 | return; | 252 | return; |
259 | } | 253 | } |
260 | 254 | ||
261 | bp->executer_idx = 0; | 255 | bp->executer_idx = 0; |
262 | 256 | ||
263 | opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI | | 257 | opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0); |
264 | DMAE_CMD_C_ENABLE | | ||
265 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
266 | #ifdef __BIG_ENDIAN | ||
267 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
268 | #else | ||
269 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
270 | #endif | ||
271 | (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
272 | (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT)); | ||
273 | 258 | ||
274 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 259 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
275 | dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC); | 260 | dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); |
276 | dmae->src_addr_lo = bp->port.port_stx >> 2; | 261 | dmae->src_addr_lo = bp->port.port_stx >> 2; |
277 | dmae->src_addr_hi = 0; | 262 | dmae->src_addr_hi = 0; |
278 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); | 263 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); |
@@ -283,7 +268,7 @@ static void bnx2x_stats_pmf_update(struct bnx2x *bp) | |||
283 | dmae->comp_val = 1; | 268 | dmae->comp_val = 1; |
284 | 269 | ||
285 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 270 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
286 | dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI); | 271 | dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); |
287 | dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX; | 272 | dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX; |
288 | dmae->src_addr_hi = 0; | 273 | dmae->src_addr_hi = 0; |
289 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) + | 274 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) + |
@@ -304,7 +289,6 @@ static void bnx2x_port_stats_init(struct bnx2x *bp) | |||
304 | { | 289 | { |
305 | struct dmae_command *dmae; | 290 | struct dmae_command *dmae; |
306 | int port = BP_PORT(bp); | 291 | int port = BP_PORT(bp); |
307 | int vn = BP_E1HVN(bp); | ||
308 | u32 opcode; | 292 | u32 opcode; |
309 | int loader_idx = PMF_DMAE_C(bp); | 293 | int loader_idx = PMF_DMAE_C(bp); |
310 | u32 mac_addr; | 294 | u32 mac_addr; |
@@ -319,16 +303,8 @@ static void bnx2x_port_stats_init(struct bnx2x *bp) | |||
319 | bp->executer_idx = 0; | 303 | bp->executer_idx = 0; |
320 | 304 | ||
321 | /* MCP */ | 305 | /* MCP */ |
322 | opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC | | 306 | opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, |
323 | DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE | | 307 | true, DMAE_COMP_GRC); |
324 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
325 | #ifdef __BIG_ENDIAN | ||
326 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
327 | #else | ||
328 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
329 | #endif | ||
330 | (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
331 | (vn << DMAE_CMD_E1HVN_SHIFT)); | ||
332 | 308 | ||
333 | if (bp->port.port_stx) { | 309 | if (bp->port.port_stx) { |
334 | 310 | ||
@@ -359,16 +335,8 @@ static void bnx2x_port_stats_init(struct bnx2x *bp) | |||
359 | } | 335 | } |
360 | 336 | ||
361 | /* MAC */ | 337 | /* MAC */ |
362 | opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI | | 338 | opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, |
363 | DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE | | 339 | true, DMAE_COMP_GRC); |
364 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
365 | #ifdef __BIG_ENDIAN | ||
366 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
367 | #else | ||
368 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
369 | #endif | ||
370 | (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
371 | (vn << DMAE_CMD_E1HVN_SHIFT)); | ||
372 | 340 | ||
373 | if (bp->link_vars.mac_type == MAC_TYPE_BMAC) { | 341 | if (bp->link_vars.mac_type == MAC_TYPE_BMAC) { |
374 | 342 | ||
@@ -379,13 +347,21 @@ static void bnx2x_port_stats_init(struct bnx2x *bp) | |||
379 | BIGMAC_REGISTER_TX_STAT_GTBYT */ | 347 | BIGMAC_REGISTER_TX_STAT_GTBYT */ |
380 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 348 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
381 | dmae->opcode = opcode; | 349 | dmae->opcode = opcode; |
382 | dmae->src_addr_lo = (mac_addr + | 350 | if (CHIP_IS_E1x(bp)) { |
351 | dmae->src_addr_lo = (mac_addr + | ||
352 | BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; | ||
353 | dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT - | ||
383 | BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; | 354 | BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; |
355 | } else { | ||
356 | dmae->src_addr_lo = (mac_addr + | ||
357 | BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; | ||
358 | dmae->len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT - | ||
359 | BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; | ||
360 | } | ||
361 | |||
384 | dmae->src_addr_hi = 0; | 362 | dmae->src_addr_hi = 0; |
385 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); | 363 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); |
386 | dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); | 364 | dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); |
387 | dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT - | ||
388 | BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; | ||
389 | dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; | 365 | dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; |
390 | dmae->comp_addr_hi = 0; | 366 | dmae->comp_addr_hi = 0; |
391 | dmae->comp_val = 1; | 367 | dmae->comp_val = 1; |
@@ -394,15 +370,31 @@ static void bnx2x_port_stats_init(struct bnx2x *bp) | |||
394 | BIGMAC_REGISTER_RX_STAT_GRIPJ */ | 370 | BIGMAC_REGISTER_RX_STAT_GRIPJ */ |
395 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 371 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
396 | dmae->opcode = opcode; | 372 | dmae->opcode = opcode; |
397 | dmae->src_addr_lo = (mac_addr + | ||
398 | BIGMAC_REGISTER_RX_STAT_GR64) >> 2; | ||
399 | dmae->src_addr_hi = 0; | 373 | dmae->src_addr_hi = 0; |
400 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) + | 374 | if (CHIP_IS_E1x(bp)) { |
401 | offsetof(struct bmac_stats, rx_stat_gr64_lo)); | 375 | dmae->src_addr_lo = (mac_addr + |
402 | dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) + | 376 | BIGMAC_REGISTER_RX_STAT_GR64) >> 2; |
403 | offsetof(struct bmac_stats, rx_stat_gr64_lo)); | 377 | dmae->dst_addr_lo = |
404 | dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - | 378 | U64_LO(bnx2x_sp_mapping(bp, mac_stats) + |
405 | BIGMAC_REGISTER_RX_STAT_GR64) >> 2; | 379 | offsetof(struct bmac1_stats, rx_stat_gr64_lo)); |
380 | dmae->dst_addr_hi = | ||
381 | U64_HI(bnx2x_sp_mapping(bp, mac_stats) + | ||
382 | offsetof(struct bmac1_stats, rx_stat_gr64_lo)); | ||
383 | dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - | ||
384 | BIGMAC_REGISTER_RX_STAT_GR64) >> 2; | ||
385 | } else { | ||
386 | dmae->src_addr_lo = | ||
387 | (mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; | ||
388 | dmae->dst_addr_lo = | ||
389 | U64_LO(bnx2x_sp_mapping(bp, mac_stats) + | ||
390 | offsetof(struct bmac2_stats, rx_stat_gr64_lo)); | ||
391 | dmae->dst_addr_hi = | ||
392 | U64_HI(bnx2x_sp_mapping(bp, mac_stats) + | ||
393 | offsetof(struct bmac2_stats, rx_stat_gr64_lo)); | ||
394 | dmae->len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ - | ||
395 | BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; | ||
396 | } | ||
397 | |||
406 | dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; | 398 | dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; |
407 | dmae->comp_addr_hi = 0; | 399 | dmae->comp_addr_hi = 0; |
408 | dmae->comp_val = 1; | 400 | dmae->comp_val = 1; |
@@ -483,16 +475,8 @@ static void bnx2x_port_stats_init(struct bnx2x *bp) | |||
483 | dmae->comp_val = 1; | 475 | dmae->comp_val = 1; |
484 | 476 | ||
485 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 477 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
486 | dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI | | 478 | dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, |
487 | DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE | | 479 | true, DMAE_COMP_PCI); |
488 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
489 | #ifdef __BIG_ENDIAN | ||
490 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
491 | #else | ||
492 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
493 | #endif | ||
494 | (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
495 | (vn << DMAE_CMD_E1HVN_SHIFT)); | ||
496 | dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : | 480 | dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : |
497 | NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; | 481 | NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; |
498 | dmae->src_addr_hi = 0; | 482 | dmae->src_addr_hi = 0; |
@@ -522,16 +506,8 @@ static void bnx2x_func_stats_init(struct bnx2x *bp) | |||
522 | bp->executer_idx = 0; | 506 | bp->executer_idx = 0; |
523 | memset(dmae, 0, sizeof(struct dmae_command)); | 507 | memset(dmae, 0, sizeof(struct dmae_command)); |
524 | 508 | ||
525 | dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC | | 509 | dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, |
526 | DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE | | 510 | true, DMAE_COMP_PCI); |
527 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
528 | #ifdef __BIG_ENDIAN | ||
529 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
530 | #else | ||
531 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
532 | #endif | ||
533 | (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
534 | (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT)); | ||
535 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); | 511 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); |
536 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); | 512 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); |
537 | dmae->dst_addr_lo = bp->func_stx >> 2; | 513 | dmae->dst_addr_lo = bp->func_stx >> 2; |
@@ -571,7 +547,6 @@ static void bnx2x_stats_restart(struct bnx2x *bp) | |||
571 | 547 | ||
572 | static void bnx2x_bmac_stats_update(struct bnx2x *bp) | 548 | static void bnx2x_bmac_stats_update(struct bnx2x *bp) |
573 | { | 549 | { |
574 | struct bmac_stats *new = bnx2x_sp(bp, mac_stats.bmac_stats); | ||
575 | struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); | 550 | struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); |
576 | struct bnx2x_eth_stats *estats = &bp->eth_stats; | 551 | struct bnx2x_eth_stats *estats = &bp->eth_stats; |
577 | struct { | 552 | struct { |
@@ -579,35 +554,74 @@ static void bnx2x_bmac_stats_update(struct bnx2x *bp) | |||
579 | u32 hi; | 554 | u32 hi; |
580 | } diff; | 555 | } diff; |
581 | 556 | ||
582 | UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); | 557 | if (CHIP_IS_E1x(bp)) { |
583 | UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); | 558 | struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats); |
584 | UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); | 559 | |
585 | UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); | 560 | /* the macros below will use "bmac1_stats" type */ |
586 | UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); | 561 | UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); |
587 | UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); | 562 | UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); |
588 | UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); | 563 | UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); |
589 | UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); | 564 | UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); |
590 | UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf); | 565 | UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); |
591 | UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); | 566 | UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); |
592 | UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); | 567 | UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); |
593 | UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); | 568 | UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); |
594 | UPDATE_STAT64(tx_stat_gt127, | 569 | UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf); |
570 | UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); | ||
571 | UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); | ||
572 | UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); | ||
573 | UPDATE_STAT64(tx_stat_gt127, | ||
595 | tx_stat_etherstatspkts65octetsto127octets); | 574 | tx_stat_etherstatspkts65octetsto127octets); |
596 | UPDATE_STAT64(tx_stat_gt255, | 575 | UPDATE_STAT64(tx_stat_gt255, |
597 | tx_stat_etherstatspkts128octetsto255octets); | 576 | tx_stat_etherstatspkts128octetsto255octets); |
598 | UPDATE_STAT64(tx_stat_gt511, | 577 | UPDATE_STAT64(tx_stat_gt511, |
599 | tx_stat_etherstatspkts256octetsto511octets); | 578 | tx_stat_etherstatspkts256octetsto511octets); |
600 | UPDATE_STAT64(tx_stat_gt1023, | 579 | UPDATE_STAT64(tx_stat_gt1023, |
601 | tx_stat_etherstatspkts512octetsto1023octets); | 580 | tx_stat_etherstatspkts512octetsto1023octets); |
602 | UPDATE_STAT64(tx_stat_gt1518, | 581 | UPDATE_STAT64(tx_stat_gt1518, |
603 | tx_stat_etherstatspkts1024octetsto1522octets); | 582 | tx_stat_etherstatspkts1024octetsto1522octets); |
604 | UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047); | 583 | UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047); |
605 | UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095); | 584 | UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095); |
606 | UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216); | 585 | UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216); |
607 | UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383); | 586 | UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383); |
608 | UPDATE_STAT64(tx_stat_gterr, | 587 | UPDATE_STAT64(tx_stat_gterr, |
609 | tx_stat_dot3statsinternalmactransmiterrors); | 588 | tx_stat_dot3statsinternalmactransmiterrors); |
610 | UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl); | 589 | UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl); |
590 | |||
591 | } else { | ||
592 | struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats); | ||
593 | |||
594 | /* the macros below will use "bmac2_stats" type */ | ||
595 | UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); | ||
596 | UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); | ||
597 | UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); | ||
598 | UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); | ||
599 | UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); | ||
600 | UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); | ||
601 | UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); | ||
602 | UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); | ||
603 | UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf); | ||
604 | UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); | ||
605 | UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); | ||
606 | UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); | ||
607 | UPDATE_STAT64(tx_stat_gt127, | ||
608 | tx_stat_etherstatspkts65octetsto127octets); | ||
609 | UPDATE_STAT64(tx_stat_gt255, | ||
610 | tx_stat_etherstatspkts128octetsto255octets); | ||
611 | UPDATE_STAT64(tx_stat_gt511, | ||
612 | tx_stat_etherstatspkts256octetsto511octets); | ||
613 | UPDATE_STAT64(tx_stat_gt1023, | ||
614 | tx_stat_etherstatspkts512octetsto1023octets); | ||
615 | UPDATE_STAT64(tx_stat_gt1518, | ||
616 | tx_stat_etherstatspkts1024octetsto1522octets); | ||
617 | UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047); | ||
618 | UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095); | ||
619 | UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216); | ||
620 | UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383); | ||
621 | UPDATE_STAT64(tx_stat_gterr, | ||
622 | tx_stat_dot3statsinternalmactransmiterrors); | ||
623 | UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl); | ||
624 | } | ||
611 | 625 | ||
612 | estats->pause_frames_received_hi = | 626 | estats->pause_frames_received_hi = |
613 | pstats->mac_stx[1].rx_stat_bmac_xpf_hi; | 627 | pstats->mac_stx[1].rx_stat_bmac_xpf_hi; |
@@ -757,7 +771,7 @@ static int bnx2x_storm_stats_update(struct bnx2x *bp) | |||
757 | estats->no_buff_discard_hi = 0; | 771 | estats->no_buff_discard_hi = 0; |
758 | estats->no_buff_discard_lo = 0; | 772 | estats->no_buff_discard_lo = 0; |
759 | 773 | ||
760 | for_each_queue(bp, i) { | 774 | for_each_eth_queue(bp, i) { |
761 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 775 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
762 | int cl_id = fp->cl_id; | 776 | int cl_id = fp->cl_id; |
763 | struct tstorm_per_client_stats *tclient = | 777 | struct tstorm_per_client_stats *tclient = |
@@ -969,6 +983,7 @@ static void bnx2x_net_stats_update(struct bnx2x *bp) | |||
969 | { | 983 | { |
970 | struct bnx2x_eth_stats *estats = &bp->eth_stats; | 984 | struct bnx2x_eth_stats *estats = &bp->eth_stats; |
971 | struct net_device_stats *nstats = &bp->dev->stats; | 985 | struct net_device_stats *nstats = &bp->dev->stats; |
986 | unsigned long tmp; | ||
972 | int i; | 987 | int i; |
973 | 988 | ||
974 | nstats->rx_packets = | 989 | nstats->rx_packets = |
@@ -985,10 +1000,10 @@ static void bnx2x_net_stats_update(struct bnx2x *bp) | |||
985 | 1000 | ||
986 | nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi); | 1001 | nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi); |
987 | 1002 | ||
988 | nstats->rx_dropped = estats->mac_discard; | 1003 | tmp = estats->mac_discard; |
989 | for_each_queue(bp, i) | 1004 | for_each_rx_queue(bp, i) |
990 | nstats->rx_dropped += | 1005 | tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard); |
991 | le32_to_cpu(bp->fp[i].old_tclient.checksum_discard); | 1006 | nstats->rx_dropped = tmp; |
992 | 1007 | ||
993 | nstats->tx_dropped = 0; | 1008 | nstats->tx_dropped = 0; |
994 | 1009 | ||
@@ -1077,7 +1092,7 @@ static void bnx2x_stats_update(struct bnx2x *bp) | |||
1077 | bp->dev->name, | 1092 | bp->dev->name, |
1078 | estats->brb_drop_lo, estats->brb_truncate_lo); | 1093 | estats->brb_drop_lo, estats->brb_truncate_lo); |
1079 | 1094 | ||
1080 | for_each_queue(bp, i) { | 1095 | for_each_eth_queue(bp, i) { |
1081 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 1096 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
1082 | struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; | 1097 | struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; |
1083 | 1098 | ||
@@ -1091,7 +1106,7 @@ static void bnx2x_stats_update(struct bnx2x *bp) | |||
1091 | fp->rx_calls, fp->rx_pkt); | 1106 | fp->rx_calls, fp->rx_pkt); |
1092 | } | 1107 | } |
1093 | 1108 | ||
1094 | for_each_queue(bp, i) { | 1109 | for_each_eth_queue(bp, i) { |
1095 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 1110 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
1096 | struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; | 1111 | struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; |
1097 | struct netdev_queue *txq = | 1112 | struct netdev_queue *txq = |
@@ -1123,24 +1138,17 @@ static void bnx2x_port_stats_stop(struct bnx2x *bp) | |||
1123 | 1138 | ||
1124 | bp->executer_idx = 0; | 1139 | bp->executer_idx = 0; |
1125 | 1140 | ||
1126 | opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC | | 1141 | opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0); |
1127 | DMAE_CMD_C_ENABLE | | ||
1128 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
1129 | #ifdef __BIG_ENDIAN | ||
1130 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
1131 | #else | ||
1132 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
1133 | #endif | ||
1134 | (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
1135 | (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT)); | ||
1136 | 1142 | ||
1137 | if (bp->port.port_stx) { | 1143 | if (bp->port.port_stx) { |
1138 | 1144 | ||
1139 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 1145 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
1140 | if (bp->func_stx) | 1146 | if (bp->func_stx) |
1141 | dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC); | 1147 | dmae->opcode = bnx2x_dmae_opcode_add_comp( |
1148 | opcode, DMAE_COMP_GRC); | ||
1142 | else | 1149 | else |
1143 | dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI); | 1150 | dmae->opcode = bnx2x_dmae_opcode_add_comp( |
1151 | opcode, DMAE_COMP_PCI); | ||
1144 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); | 1152 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); |
1145 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); | 1153 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); |
1146 | dmae->dst_addr_lo = bp->port.port_stx >> 2; | 1154 | dmae->dst_addr_lo = bp->port.port_stx >> 2; |
@@ -1164,7 +1172,8 @@ static void bnx2x_port_stats_stop(struct bnx2x *bp) | |||
1164 | if (bp->func_stx) { | 1172 | if (bp->func_stx) { |
1165 | 1173 | ||
1166 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 1174 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
1167 | dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI); | 1175 | dmae->opcode = |
1176 | bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); | ||
1168 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); | 1177 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); |
1169 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); | 1178 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); |
1170 | dmae->dst_addr_lo = bp->func_stx >> 2; | 1179 | dmae->dst_addr_lo = bp->func_stx >> 2; |
@@ -1230,14 +1239,14 @@ void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event) | |||
1230 | if (unlikely(bp->panic)) | 1239 | if (unlikely(bp->panic)) |
1231 | return; | 1240 | return; |
1232 | 1241 | ||
1242 | bnx2x_stats_stm[bp->stats_state][event].action(bp); | ||
1243 | |||
1233 | /* Protect a state change flow */ | 1244 | /* Protect a state change flow */ |
1234 | spin_lock_bh(&bp->stats_lock); | 1245 | spin_lock_bh(&bp->stats_lock); |
1235 | state = bp->stats_state; | 1246 | state = bp->stats_state; |
1236 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; | 1247 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; |
1237 | spin_unlock_bh(&bp->stats_lock); | 1248 | spin_unlock_bh(&bp->stats_lock); |
1238 | 1249 | ||
1239 | bnx2x_stats_stm[state][event].action(bp); | ||
1240 | |||
1241 | if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) | 1250 | if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) |
1242 | DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", | 1251 | DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", |
1243 | state, event, bp->stats_state); | 1252 | state, event, bp->stats_state); |
@@ -1257,16 +1266,8 @@ static void bnx2x_port_stats_base_init(struct bnx2x *bp) | |||
1257 | bp->executer_idx = 0; | 1266 | bp->executer_idx = 0; |
1258 | 1267 | ||
1259 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); | 1268 | dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); |
1260 | dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC | | 1269 | dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, |
1261 | DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE | | 1270 | true, DMAE_COMP_PCI); |
1262 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
1263 | #ifdef __BIG_ENDIAN | ||
1264 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
1265 | #else | ||
1266 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
1267 | #endif | ||
1268 | (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
1269 | (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT)); | ||
1270 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); | 1271 | dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); |
1271 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); | 1272 | dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); |
1272 | dmae->dst_addr_lo = bp->port.port_stx >> 2; | 1273 | dmae->dst_addr_lo = bp->port.port_stx >> 2; |
@@ -1283,9 +1284,7 @@ static void bnx2x_port_stats_base_init(struct bnx2x *bp) | |||
1283 | 1284 | ||
1284 | static void bnx2x_func_stats_base_init(struct bnx2x *bp) | 1285 | static void bnx2x_func_stats_base_init(struct bnx2x *bp) |
1285 | { | 1286 | { |
1286 | int vn, vn_max = IS_E1HMF(bp) ? E1HVN_MAX : E1VN_MAX; | 1287 | int vn, vn_max = IS_MF(bp) ? E1HVN_MAX : E1VN_MAX; |
1287 | int port = BP_PORT(bp); | ||
1288 | int func; | ||
1289 | u32 func_stx; | 1288 | u32 func_stx; |
1290 | 1289 | ||
1291 | /* sanity */ | 1290 | /* sanity */ |
@@ -1298,9 +1297,9 @@ static void bnx2x_func_stats_base_init(struct bnx2x *bp) | |||
1298 | func_stx = bp->func_stx; | 1297 | func_stx = bp->func_stx; |
1299 | 1298 | ||
1300 | for (vn = VN_0; vn < vn_max; vn++) { | 1299 | for (vn = VN_0; vn < vn_max; vn++) { |
1301 | func = 2*vn + port; | 1300 | int mb_idx = !CHIP_IS_E2(bp) ? 2*vn + BP_PORT(bp) : vn; |
1302 | 1301 | ||
1303 | bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param); | 1302 | bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); |
1304 | bnx2x_func_stats_init(bp); | 1303 | bnx2x_func_stats_init(bp); |
1305 | bnx2x_hw_stats_post(bp); | 1304 | bnx2x_hw_stats_post(bp); |
1306 | bnx2x_stats_comp(bp); | 1305 | bnx2x_stats_comp(bp); |
@@ -1324,16 +1323,8 @@ static void bnx2x_func_stats_base_update(struct bnx2x *bp) | |||
1324 | bp->executer_idx = 0; | 1323 | bp->executer_idx = 0; |
1325 | memset(dmae, 0, sizeof(struct dmae_command)); | 1324 | memset(dmae, 0, sizeof(struct dmae_command)); |
1326 | 1325 | ||
1327 | dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI | | 1326 | dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, |
1328 | DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE | | 1327 | true, DMAE_COMP_PCI); |
1329 | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | | ||
1330 | #ifdef __BIG_ENDIAN | ||
1331 | DMAE_CMD_ENDIANITY_B_DW_SWAP | | ||
1332 | #else | ||
1333 | DMAE_CMD_ENDIANITY_DW_SWAP | | ||
1334 | #endif | ||
1335 | (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) | | ||
1336 | (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT)); | ||
1337 | dmae->src_addr_lo = bp->func_stx >> 2; | 1328 | dmae->src_addr_lo = bp->func_stx >> 2; |
1338 | dmae->src_addr_hi = 0; | 1329 | dmae->src_addr_hi = 0; |
1339 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base)); | 1330 | dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base)); |
@@ -1351,8 +1342,9 @@ static void bnx2x_func_stats_base_update(struct bnx2x *bp) | |||
1351 | void bnx2x_stats_init(struct bnx2x *bp) | 1342 | void bnx2x_stats_init(struct bnx2x *bp) |
1352 | { | 1343 | { |
1353 | int port = BP_PORT(bp); | 1344 | int port = BP_PORT(bp); |
1354 | int func = BP_FUNC(bp); | 1345 | int mb_idx = BP_FW_MB_IDX(bp); |
1355 | int i; | 1346 | int i; |
1347 | struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats); | ||
1356 | 1348 | ||
1357 | bp->stats_pending = 0; | 1349 | bp->stats_pending = 0; |
1358 | bp->executer_idx = 0; | 1350 | bp->executer_idx = 0; |
@@ -1361,7 +1353,7 @@ void bnx2x_stats_init(struct bnx2x *bp) | |||
1361 | /* port and func stats for management */ | 1353 | /* port and func stats for management */ |
1362 | if (!BP_NOMCP(bp)) { | 1354 | if (!BP_NOMCP(bp)) { |
1363 | bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx); | 1355 | bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx); |
1364 | bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param); | 1356 | bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); |
1365 | 1357 | ||
1366 | } else { | 1358 | } else { |
1367 | bp->port.port_stx = 0; | 1359 | bp->port.port_stx = 0; |
@@ -1394,6 +1386,19 @@ void bnx2x_stats_init(struct bnx2x *bp) | |||
1394 | memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats)); | 1386 | memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats)); |
1395 | } | 1387 | } |
1396 | 1388 | ||
1389 | /* FW stats are currently collected for ETH clients only */ | ||
1390 | for_each_eth_queue(bp, i) { | ||
1391 | /* Set initial stats counter in the stats ramrod data to -1 */ | ||
1392 | int cl_id = bp->fp[i].cl_id; | ||
1393 | |||
1394 | stats->xstorm_common.client_statistics[cl_id]. | ||
1395 | stats_counter = 0xffff; | ||
1396 | stats->ustorm_common.client_statistics[cl_id]. | ||
1397 | stats_counter = 0xffff; | ||
1398 | stats->tstorm_common.client_statistics[cl_id]. | ||
1399 | stats_counter = 0xffff; | ||
1400 | } | ||
1401 | |||
1397 | memset(&bp->dev->stats, 0, sizeof(struct net_device_stats)); | 1402 | memset(&bp->dev->stats, 0, sizeof(struct net_device_stats)); |
1398 | memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats)); | 1403 | memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats)); |
1399 | 1404 | ||