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Diffstat (limited to 'drivers/net/bnx2x.h')
-rw-r--r--drivers/net/bnx2x.h87
1 files changed, 52 insertions, 35 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 4bf4f7b205f2..b468f904c7f8 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -40,20 +40,20 @@
40#define DP(__mask, __fmt, __args...) do { \ 40#define DP(__mask, __fmt, __args...) do { \
41 if (bp->msglevel & (__mask)) \ 41 if (bp->msglevel & (__mask)) \
42 printk(DP_LEVEL "[%s:%d(%s)]" __fmt, __func__, __LINE__, \ 42 printk(DP_LEVEL "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
43 bp->dev?(bp->dev->name):"?", ##__args); \ 43 bp->dev ? (bp->dev->name) : "?", ##__args); \
44 } while (0) 44 } while (0)
45 45
46/* errors debug print */ 46/* errors debug print */
47#define BNX2X_DBG_ERR(__fmt, __args...) do { \ 47#define BNX2X_DBG_ERR(__fmt, __args...) do { \
48 if (bp->msglevel & NETIF_MSG_PROBE) \ 48 if (bp->msglevel & NETIF_MSG_PROBE) \
49 printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \ 49 printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
50 bp->dev?(bp->dev->name):"?", ##__args); \ 50 bp->dev ? (bp->dev->name) : "?", ##__args); \
51 } while (0) 51 } while (0)
52 52
53/* for errors (never masked) */ 53/* for errors (never masked) */
54#define BNX2X_ERR(__fmt, __args...) do { \ 54#define BNX2X_ERR(__fmt, __args...) do { \
55 printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \ 55 printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \
56 bp->dev?(bp->dev->name):"?", ##__args); \ 56 bp->dev ? (bp->dev->name) : "?", ##__args); \
57 } while (0) 57 } while (0)
58 58
59/* before we have a dev->name use dev_info() */ 59/* before we have a dev->name use dev_info() */
@@ -120,16 +120,8 @@
120#define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) 120#define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field))
121#define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val) 121#define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val)
122 122
123#define NIG_WR(reg, val) REG_WR(bp, reg, val) 123#define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg)
124#define EMAC_WR(reg, val) REG_WR(bp, emac_base + reg, val) 124#define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val)
125#define BMAC_WR(reg, val) REG_WR(bp, GRCBASE_NIG + bmac_addr + reg, val)
126
127
128#define for_each_queue(bp, var) for (var = 0; var < bp->num_queues; var++)
129
130#define for_each_nondefault_queue(bp, var) \
131 for (var = 1; var < bp->num_queues; var++)
132#define is_multi(bp) (bp->num_queues > 1)
133 125
134 126
135/* fast path */ 127/* fast path */
@@ -163,7 +155,7 @@ struct sw_rx_page {
163#define NUM_RX_SGE_PAGES 2 155#define NUM_RX_SGE_PAGES 2
164#define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) 156#define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge))
165#define MAX_RX_SGE_CNT (RX_SGE_CNT - 2) 157#define MAX_RX_SGE_CNT (RX_SGE_CNT - 2)
166/* RX_SGE_CNT is promissed to be a power of 2 */ 158/* RX_SGE_CNT is promised to be a power of 2 */
167#define RX_SGE_MASK (RX_SGE_CNT - 1) 159#define RX_SGE_MASK (RX_SGE_CNT - 1)
168#define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) 160#define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES)
169#define MAX_RX_SGE (NUM_RX_SGE - 1) 161#define MAX_RX_SGE (NUM_RX_SGE - 1)
@@ -258,8 +250,7 @@ struct bnx2x_fastpath {
258 250
259 unsigned long tx_pkt, 251 unsigned long tx_pkt,
260 rx_pkt, 252 rx_pkt,
261 rx_calls, 253 rx_calls;
262 rx_alloc_failed;
263 /* TPA related */ 254 /* TPA related */
264 struct sw_rx_bd tpa_pool[ETH_MAX_AGGREGATION_QUEUES_E1H]; 255 struct sw_rx_bd tpa_pool[ETH_MAX_AGGREGATION_QUEUES_E1H];
265 u8 tpa_state[ETH_MAX_AGGREGATION_QUEUES_E1H]; 256 u8 tpa_state[ETH_MAX_AGGREGATION_QUEUES_E1H];
@@ -275,6 +266,15 @@ struct bnx2x_fastpath {
275 266
276#define bnx2x_fp(bp, nr, var) (bp->fp[nr].var) 267#define bnx2x_fp(bp, nr, var) (bp->fp[nr].var)
277 268
269#define BNX2X_HAS_TX_WORK(fp) \
270 ((fp->tx_pkt_prod != le16_to_cpu(*fp->tx_cons_sb)) || \
271 (fp->tx_pkt_prod != fp->tx_pkt_cons))
272
273#define BNX2X_HAS_RX_WORK(fp) \
274 (fp->rx_comp_cons != le16_to_cpu(*fp->rx_cons_sb))
275
276#define BNX2X_HAS_WORK(fp) (BNX2X_HAS_RX_WORK(fp) || BNX2X_HAS_TX_WORK(fp))
277
278 278
279/* MC hsi */ 279/* MC hsi */
280#define MAX_FETCH_BD 13 /* HW max BDs per packet */ 280#define MAX_FETCH_BD 13 /* HW max BDs per packet */
@@ -317,7 +317,7 @@ struct bnx2x_fastpath {
317#define RCQ_BD(x) ((x) & MAX_RCQ_BD) 317#define RCQ_BD(x) ((x) & MAX_RCQ_BD)
318 318
319 319
320/* This is needed for determening of last_max */ 320/* This is needed for determining of last_max */
321#define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) 321#define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b))
322 322
323#define __SGE_MASK_SET_BIT(el, bit) \ 323#define __SGE_MASK_SET_BIT(el, bit) \
@@ -386,20 +386,28 @@ struct bnx2x_fastpath {
386#define TPA_TYPE(cqe_fp_flags) ((cqe_fp_flags) & \ 386#define TPA_TYPE(cqe_fp_flags) ((cqe_fp_flags) & \
387 (TPA_TYPE_START | TPA_TYPE_END)) 387 (TPA_TYPE_START | TPA_TYPE_END))
388 388
389#define BNX2X_RX_SUM_OK(cqe) \ 389#define ETH_RX_ERROR_FALGS ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG
390 (!(cqe->fast_path_cqe.status_flags & \ 390
391 (ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG | \ 391#define BNX2X_IP_CSUM_ERR(cqe) \
392 ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG))) 392 (!((cqe)->fast_path_cqe.status_flags & \
393 ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG) && \
394 ((cqe)->fast_path_cqe.type_error_flags & \
395 ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG))
396
397#define BNX2X_L4_CSUM_ERR(cqe) \
398 (!((cqe)->fast_path_cqe.status_flags & \
399 ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG) && \
400 ((cqe)->fast_path_cqe.type_error_flags & \
401 ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG))
402
403#define BNX2X_RX_CSUM_OK(cqe) \
404 (!(BNX2X_L4_CSUM_ERR(cqe) || BNX2X_IP_CSUM_ERR(cqe)))
393 405
394#define BNX2X_RX_SUM_FIX(cqe) \ 406#define BNX2X_RX_SUM_FIX(cqe) \
395 ((le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & \ 407 ((le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & \
396 PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) == \ 408 PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) == \
397 (1 << PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT)) 409 (1 << PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT))
398 410
399#define ETH_RX_ERROR_FALGS (ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG | \
400 ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG | \
401 ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG)
402
403 411
404#define FP_USB_FUNC_OFF (2 + 2*HC_USTORM_SB_NUM_INDICES) 412#define FP_USB_FUNC_OFF (2 + 2*HC_USTORM_SB_NUM_INDICES)
405#define FP_CSB_FUNC_OFF (2 + 2*HC_CSTORM_SB_NUM_INDICES) 413#define FP_CSB_FUNC_OFF (2 + 2*HC_CSTORM_SB_NUM_INDICES)
@@ -647,6 +655,8 @@ struct bnx2x_eth_stats {
647 655
648 u32 brb_drop_hi; 656 u32 brb_drop_hi;
649 u32 brb_drop_lo; 657 u32 brb_drop_lo;
658 u32 brb_truncate_hi;
659 u32 brb_truncate_lo;
650 660
651 u32 jabber_packets_received; 661 u32 jabber_packets_received;
652 662
@@ -663,6 +673,9 @@ struct bnx2x_eth_stats {
663 u32 mac_discard; 673 u32 mac_discard;
664 674
665 u32 driver_xoff; 675 u32 driver_xoff;
676 u32 rx_err_discard_pkt;
677 u32 rx_skb_alloc_failed;
678 u32 hw_csum_err;
666}; 679};
667 680
668#define STATS_OFFSET32(stat_name) \ 681#define STATS_OFFSET32(stat_name) \
@@ -753,7 +766,6 @@ struct bnx2x {
753 u16 def_att_idx; 766 u16 def_att_idx;
754 u32 attn_state; 767 u32 attn_state;
755 struct attn_route attn_group[MAX_DYNAMIC_ATTN_GRPS]; 768 struct attn_route attn_group[MAX_DYNAMIC_ATTN_GRPS];
756 u32 aeu_mask;
757 u32 nig_mask; 769 u32 nig_mask;
758 770
759 /* slow path ring */ 771 /* slow path ring */
@@ -772,7 +784,7 @@ struct bnx2x {
772 u8 stats_pending; 784 u8 stats_pending;
773 u8 set_mac_pending; 785 u8 set_mac_pending;
774 786
775 /* End of fileds used in the performance code paths */ 787 /* End of fields used in the performance code paths */
776 788
777 int panic; 789 int panic;
778 int msglevel; 790 int msglevel;
@@ -794,9 +806,6 @@ struct bnx2x {
794#define BP_FUNC(bp) (bp->func) 806#define BP_FUNC(bp) (bp->func)
795#define BP_E1HVN(bp) (bp->func >> 1) 807#define BP_E1HVN(bp) (bp->func >> 1)
796#define BP_L_ID(bp) (BP_E1HVN(bp) << 2) 808#define BP_L_ID(bp) (BP_E1HVN(bp) << 2)
797/* assorted E1HVN */
798#define IS_E1HMF(bp) (bp->e1hmf != 0)
799#define BP_MAX_QUEUES(bp) (IS_E1HMF(bp) ? 4 : 16)
800 809
801 int pm_cap; 810 int pm_cap;
802 int pcie_cap; 811 int pcie_cap;
@@ -821,6 +830,7 @@ struct bnx2x {
821 u32 mf_config; 830 u32 mf_config;
822 u16 e1hov; 831 u16 e1hov;
823 u8 e1hmf; 832 u8 e1hmf;
833#define IS_E1HMF(bp) (bp->e1hmf != 0)
824 834
825 u8 wol; 835 u8 wol;
826 836
@@ -836,7 +846,6 @@ struct bnx2x {
836 u16 rx_ticks_int; 846 u16 rx_ticks_int;
837 u16 rx_ticks; 847 u16 rx_ticks;
838 848
839 u32 stats_ticks;
840 u32 lin_cnt; 849 u32 lin_cnt;
841 850
842 int state; 851 int state;
@@ -852,6 +861,7 @@ struct bnx2x {
852#define BNX2X_STATE_ERROR 0xf000 861#define BNX2X_STATE_ERROR 0xf000
853 862
854 int num_queues; 863 int num_queues;
864#define BP_MAX_QUEUES(bp) (IS_E1HMF(bp) ? 4 : 16)
855 865
856 u32 rx_mode; 866 u32 rx_mode;
857#define BNX2X_RX_MODE_NONE 0 867#define BNX2X_RX_MODE_NONE 0
@@ -902,10 +912,17 @@ struct bnx2x {
902}; 912};
903 913
904 914
915#define for_each_queue(bp, var) for (var = 0; var < bp->num_queues; var++)
916
917#define for_each_nondefault_queue(bp, var) \
918 for (var = 1; var < bp->num_queues; var++)
919#define is_multi(bp) (bp->num_queues > 1)
920
921
905void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); 922void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32);
906void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, 923void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
907 u32 len32); 924 u32 len32);
908int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode); 925int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
909 926
910static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, 927static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
911 int wait) 928 int wait)
@@ -976,7 +993,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
976#define PCICFG_LINK_SPEED_SHIFT 16 993#define PCICFG_LINK_SPEED_SHIFT 16
977 994
978 995
979#define BNX2X_NUM_STATS 39 996#define BNX2X_NUM_STATS 42
980#define BNX2X_NUM_TESTS 8 997#define BNX2X_NUM_TESTS 8
981 998
982#define BNX2X_MAC_LOOPBACK 0 999#define BNX2X_MAC_LOOPBACK 0
@@ -1007,10 +1024,10 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
1007/* resolution of the rate shaping timer - 100 usec */ 1024/* resolution of the rate shaping timer - 100 usec */
1008#define RS_PERIODIC_TIMEOUT_USEC 100 1025#define RS_PERIODIC_TIMEOUT_USEC 100
1009/* resolution of fairness algorithm in usecs - 1026/* resolution of fairness algorithm in usecs -
1010 coefficient for clauclating the actuall t fair */ 1027 coefficient for calculating the actual t fair */
1011#define T_FAIR_COEF 10000000 1028#define T_FAIR_COEF 10000000
1012/* number of bytes in single QM arbitration cycle - 1029/* number of bytes in single QM arbitration cycle -
1013 coeffiecnt for calculating the fairness timer */ 1030 coefficient for calculating the fairness timer */
1014#define QM_ARB_BYTES 40000 1031#define QM_ARB_BYTES 40000
1015#define FAIR_MEM 2 1032#define FAIR_MEM 2
1016 1033