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Diffstat (limited to 'drivers/net/bnx2x.h')
-rw-r--r--drivers/net/bnx2x.h148
1 files changed, 96 insertions, 52 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index bbf842284ebb..3c48a7a68308 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -1,6 +1,6 @@
1/* bnx2x.h: Broadcom Everest network driver. 1/* bnx2x.h: Broadcom Everest network driver.
2 * 2 *
3 * Copyright (c) 2007-2009 Broadcom Corporation 3 * Copyright (c) 2007-2010 Broadcom Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
@@ -24,6 +24,10 @@
24#define BCM_VLAN 1 24#define BCM_VLAN 1
25#endif 25#endif
26 26
27#if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE)
28#define BCM_CNIC 1
29#include "cnic_if.h"
30#endif
27 31
28#define BNX2X_MULTI_QUEUE 32#define BNX2X_MULTI_QUEUE
29 33
@@ -40,7 +44,6 @@
40/* error/debug prints */ 44/* error/debug prints */
41 45
42#define DRV_MODULE_NAME "bnx2x" 46#define DRV_MODULE_NAME "bnx2x"
43#define PFX DRV_MODULE_NAME ": "
44 47
45/* for messages that are currently off */ 48/* for messages that are currently off */
46#define BNX2X_MSG_OFF 0 49#define BNX2X_MSG_OFF 0
@@ -54,30 +57,40 @@
54#define DP_LEVEL KERN_NOTICE /* was: KERN_DEBUG */ 57#define DP_LEVEL KERN_NOTICE /* was: KERN_DEBUG */
55 58
56/* regular debug print */ 59/* regular debug print */
57#define DP(__mask, __fmt, __args...) do { \ 60#define DP(__mask, __fmt, __args...) \
58 if (bp->msglevel & (__mask)) \ 61do { \
59 printk(DP_LEVEL "[%s:%d(%s)]" __fmt, __func__, __LINE__, \ 62 if (bp->msg_enable & (__mask)) \
60 bp->dev ? (bp->dev->name) : "?", ##__args); \ 63 printk(DP_LEVEL "[%s:%d(%s)]" __fmt, \
61 } while (0) 64 __func__, __LINE__, \
65 bp->dev ? (bp->dev->name) : "?", \
66 ##__args); \
67} while (0)
62 68
63/* errors debug print */ 69/* errors debug print */
64#define BNX2X_DBG_ERR(__fmt, __args...) do { \ 70#define BNX2X_DBG_ERR(__fmt, __args...) \
65 if (bp->msglevel & NETIF_MSG_PROBE) \ 71do { \
66 printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \ 72 if (netif_msg_probe(bp)) \
67 bp->dev ? (bp->dev->name) : "?", ##__args); \ 73 pr_err("[%s:%d(%s)]" __fmt, \
68 } while (0) 74 __func__, __LINE__, \
75 bp->dev ? (bp->dev->name) : "?", \
76 ##__args); \
77} while (0)
69 78
70/* for errors (never masked) */ 79/* for errors (never masked) */
71#define BNX2X_ERR(__fmt, __args...) do { \ 80#define BNX2X_ERR(__fmt, __args...) \
72 printk(KERN_ERR "[%s:%d(%s)]" __fmt, __func__, __LINE__, \ 81do { \
73 bp->dev ? (bp->dev->name) : "?", ##__args); \ 82 pr_err("[%s:%d(%s)]" __fmt, \
74 } while (0) 83 __func__, __LINE__, \
84 bp->dev ? (bp->dev->name) : "?", \
85 ##__args); \
86} while (0)
75 87
76/* before we have a dev->name use dev_info() */ 88/* before we have a dev->name use dev_info() */
77#define BNX2X_DEV_INFO(__fmt, __args...) do { \ 89#define BNX2X_DEV_INFO(__fmt, __args...) \
78 if (bp->msglevel & NETIF_MSG_PROBE) \ 90do { \
79 dev_info(&bp->pdev->dev, __fmt, ##__args); \ 91 if (netif_msg_probe(bp)) \
80 } while (0) 92 dev_info(&bp->pdev->dev, __fmt, ##__args); \
93} while (0)
81 94
82 95
83#ifdef BNX2X_STOP_ON_ERROR 96#ifdef BNX2X_STOP_ON_ERROR
@@ -126,7 +139,7 @@
126 offset, len32); \ 139 offset, len32); \
127 } while (0) 140 } while (0)
128 141
129#define VIRT_WR_DMAE_LEN(bp, data, addr, len32) \ 142#define VIRT_WR_DMAE_LEN(bp, data, addr, len32, le32_swap) \
130 do { \ 143 do { \
131 memcpy(GUNZIP_BUF(bp), data, (len32) * 4); \ 144 memcpy(GUNZIP_BUF(bp), data, (len32) * 4); \
132 bnx2x_write_big_buf_wb(bp, addr, len32); \ 145 bnx2x_write_big_buf_wb(bp, addr, len32); \
@@ -255,9 +268,6 @@ struct bnx2x_eth_q_stats {
255struct bnx2x_fastpath { 268struct bnx2x_fastpath {
256 269
257 struct napi_struct napi; 270 struct napi_struct napi;
258
259 u8 is_rx_queue;
260
261 struct host_status_block *status_blk; 271 struct host_status_block *status_blk;
262 dma_addr_t status_blk_mapping; 272 dma_addr_t status_blk_mapping;
263 273
@@ -762,7 +772,11 @@ struct bnx2x_eth_stats {
762 (offsetof(struct bnx2x_eth_stats, stat_name) / 4) 772 (offsetof(struct bnx2x_eth_stats, stat_name) / 4)
763 773
764 774
775#ifdef BCM_CNIC
776#define MAX_CONTEXT 15
777#else
765#define MAX_CONTEXT 16 778#define MAX_CONTEXT 16
779#endif
766 780
767union cdu_context { 781union cdu_context {
768 struct eth_context eth; 782 struct eth_context eth;
@@ -811,13 +825,21 @@ struct bnx2x {
811 struct bnx2x_fastpath fp[MAX_CONTEXT]; 825 struct bnx2x_fastpath fp[MAX_CONTEXT];
812 void __iomem *regview; 826 void __iomem *regview;
813 void __iomem *doorbells; 827 void __iomem *doorbells;
828#ifdef BCM_CNIC
829#define BNX2X_DB_SIZE (18*BCM_PAGE_SIZE)
830#else
814#define BNX2X_DB_SIZE (16*BCM_PAGE_SIZE) 831#define BNX2X_DB_SIZE (16*BCM_PAGE_SIZE)
832#endif
815 833
816 struct net_device *dev; 834 struct net_device *dev;
817 struct pci_dev *pdev; 835 struct pci_dev *pdev;
818 836
819 atomic_t intr_sem; 837 atomic_t intr_sem;
838#ifdef BCM_CNIC
839 struct msix_entry msix_table[MAX_CONTEXT+2];
840#else
820 struct msix_entry msix_table[MAX_CONTEXT+1]; 841 struct msix_entry msix_table[MAX_CONTEXT+1];
842#endif
821#define INT_MODE_INTx 1 843#define INT_MODE_INTx 1
822#define INT_MODE_MSI 2 844#define INT_MODE_MSI 2
823#define INT_MODE_MSIX 3 845#define INT_MODE_MSIX 3
@@ -863,13 +885,13 @@ struct bnx2x {
863 885
864 /* Flags for marking that there is a STAT_QUERY or 886 /* Flags for marking that there is a STAT_QUERY or
865 SET_MAC ramrod pending */ 887 SET_MAC ramrod pending */
866 u8 stats_pending; 888 int stats_pending;
867 u8 set_mac_pending; 889 int set_mac_pending;
868 890
869 /* End of fields used in the performance code paths */ 891 /* End of fields used in the performance code paths */
870 892
871 int panic; 893 int panic;
872 int msglevel; 894 int msg_enable;
873 895
874 u32 flags; 896 u32 flags;
875#define PCIX_FLAG 1 897#define PCIX_FLAG 1
@@ -884,6 +906,7 @@ struct bnx2x {
884#define BP_NOMCP(bp) (bp->flags & NO_MCP_FLAG) 906#define BP_NOMCP(bp) (bp->flags & NO_MCP_FLAG)
885#define HW_VLAN_TX_FLAG 0x400 907#define HW_VLAN_TX_FLAG 0x400
886#define HW_VLAN_RX_FLAG 0x800 908#define HW_VLAN_RX_FLAG 0x800
909#define MF_FUNC_DIS 0x1000
887 910
888 int func; 911 int func;
889#define BP_PORT(bp) (bp->func % PORT_MAX) 912#define BP_PORT(bp) (bp->func % PORT_MAX)
@@ -891,6 +914,11 @@ struct bnx2x {
891#define BP_E1HVN(bp) (bp->func >> 1) 914#define BP_E1HVN(bp) (bp->func >> 1)
892#define BP_L_ID(bp) (BP_E1HVN(bp) << 2) 915#define BP_L_ID(bp) (BP_E1HVN(bp) << 2)
893 916
917#ifdef BCM_CNIC
918#define BCM_CNIC_CID_START 16
919#define BCM_ISCSI_ETH_CL_ID 17
920#endif
921
894 int pm_cap; 922 int pm_cap;
895 int pcie_cap; 923 int pcie_cap;
896 int mrrs; 924 int mrrs;
@@ -944,13 +972,11 @@ struct bnx2x {
944#define BNX2X_STATE_CLOSING_WAIT4_HALT 0x4000 972#define BNX2X_STATE_CLOSING_WAIT4_HALT 0x4000
945#define BNX2X_STATE_CLOSING_WAIT4_DELETE 0x5000 973#define BNX2X_STATE_CLOSING_WAIT4_DELETE 0x5000
946#define BNX2X_STATE_CLOSING_WAIT4_UNLOAD 0x6000 974#define BNX2X_STATE_CLOSING_WAIT4_UNLOAD 0x6000
947#define BNX2X_STATE_DISABLED 0xd000
948#define BNX2X_STATE_DIAG 0xe000 975#define BNX2X_STATE_DIAG 0xe000
949#define BNX2X_STATE_ERROR 0xf000 976#define BNX2X_STATE_ERROR 0xf000
950 977
951 int multi_mode; 978 int multi_mode;
952 int num_rx_queues; 979 int num_queues;
953 int num_tx_queues;
954 980
955 u32 rx_mode; 981 u32 rx_mode;
956#define BNX2X_RX_MODE_NONE 0 982#define BNX2X_RX_MODE_NONE 0
@@ -960,28 +986,51 @@ struct bnx2x {
960#define BNX2X_MAX_MULTICAST 64 986#define BNX2X_MAX_MULTICAST 64
961#define BNX2X_MAX_EMUL_MULTI 16 987#define BNX2X_MAX_EMUL_MULTI 16
962 988
989 u32 rx_mode_cl_mask;
990
963 dma_addr_t def_status_blk_mapping; 991 dma_addr_t def_status_blk_mapping;
964 992
965 struct bnx2x_slowpath *slowpath; 993 struct bnx2x_slowpath *slowpath;
966 dma_addr_t slowpath_mapping; 994 dma_addr_t slowpath_mapping;
967 995
968#ifdef BCM_ISCSI
969 void *t1;
970 dma_addr_t t1_mapping;
971 void *t2;
972 dma_addr_t t2_mapping;
973 void *timers;
974 dma_addr_t timers_mapping;
975 void *qm;
976 dma_addr_t qm_mapping;
977#endif
978
979 int dropless_fc; 996 int dropless_fc;
980 997
998#ifdef BCM_CNIC
999 u32 cnic_flags;
1000#define BNX2X_CNIC_FLAG_MAC_SET 1
1001
1002 void *t1;
1003 dma_addr_t t1_mapping;
1004 void *t2;
1005 dma_addr_t t2_mapping;
1006 void *timers;
1007 dma_addr_t timers_mapping;
1008 void *qm;
1009 dma_addr_t qm_mapping;
1010 struct cnic_ops *cnic_ops;
1011 void *cnic_data;
1012 u32 cnic_tag;
1013 struct cnic_eth_dev cnic_eth_dev;
1014 struct host_status_block *cnic_sb;
1015 dma_addr_t cnic_sb_mapping;
1016#define CNIC_SB_ID(bp) BP_L_ID(bp)
1017 struct eth_spe *cnic_kwq;
1018 struct eth_spe *cnic_kwq_prod;
1019 struct eth_spe *cnic_kwq_cons;
1020 struct eth_spe *cnic_kwq_last;
1021 u16 cnic_kwq_pending;
1022 u16 cnic_spq_pending;
1023 struct mutex cnic_mutex;
1024 u8 iscsi_mac[6];
1025#endif
1026
981 int dmae_ready; 1027 int dmae_ready;
982 /* used to synchronize dmae accesses */ 1028 /* used to synchronize dmae accesses */
983 struct mutex dmae_mutex; 1029 struct mutex dmae_mutex;
984 1030
1031 /* used to protect the FW mail box */
1032 struct mutex fw_mb_mutex;
1033
985 /* used to synchronize stats collecting */ 1034 /* used to synchronize stats collecting */
986 int stats_state; 1035 int stats_state;
987 /* used by dmae command loader */ 1036 /* used by dmae command loader */
@@ -1030,20 +1079,15 @@ struct bnx2x {
1030}; 1079};
1031 1080
1032 1081
1033#define BNX2X_MAX_QUEUES(bp) (IS_E1HMF(bp) ? (MAX_CONTEXT/(2 * E1HVN_MAX)) \ 1082#define BNX2X_MAX_QUEUES(bp) (IS_E1HMF(bp) ? (MAX_CONTEXT/E1HVN_MAX) \
1034 : (MAX_CONTEXT/2)) 1083 : MAX_CONTEXT)
1035#define BNX2X_NUM_QUEUES(bp) (bp->num_rx_queues + bp->num_tx_queues) 1084#define BNX2X_NUM_QUEUES(bp) (bp->num_queues)
1036#define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 2) 1085#define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1)
1037 1086
1038#define for_each_rx_queue(bp, var) \
1039 for (var = 0; var < bp->num_rx_queues; var++)
1040#define for_each_tx_queue(bp, var) \
1041 for (var = bp->num_rx_queues; \
1042 var < BNX2X_NUM_QUEUES(bp); var++)
1043#define for_each_queue(bp, var) \ 1087#define for_each_queue(bp, var) \
1044 for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) 1088 for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++)
1045#define for_each_nondefault_queue(bp, var) \ 1089#define for_each_nondefault_queue(bp, var) \
1046 for (var = 1; var < bp->num_rx_queues; var++) 1090 for (var = 1; var < BNX2X_NUM_QUEUES(bp); var++)
1047 1091
1048 1092
1049void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); 1093void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32);
@@ -1147,7 +1191,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
1147#define MAX_SP_DESC_CNT (SP_DESC_CNT - 1) 1191#define MAX_SP_DESC_CNT (SP_DESC_CNT - 1)
1148 1192
1149 1193
1150#define BNX2X_BTR 3 1194#define BNX2X_BTR 1
1151#define MAX_SPQ_PENDING 8 1195#define MAX_SPQ_PENDING 8
1152 1196
1153 1197
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-28 19:26:48 -0400