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-rw-r--r--drivers/mtd/chips/map_rom.c8
-rw-r--r--drivers/mtd/devices/Kconfig7
-rw-r--r--drivers/mtd/devices/Makefile1
-rw-r--r--drivers/mtd/devices/mtd_dataflash.c3
-rw-r--r--drivers/mtd/devices/ps3vram.c768
-rw-r--r--drivers/mtd/devices/slram.c14
-rw-r--r--drivers/mtd/lpddr/Kconfig1
-rw-r--r--drivers/mtd/maps/Kconfig2
-rw-r--r--drivers/mtd/maps/bfin-async-flash.c6
-rw-r--r--drivers/mtd/maps/ck804xrom.c2
-rw-r--r--drivers/mtd/maps/physmap.c41
-rw-r--r--drivers/mtd/nand/atmel_nand.c3
-rw-r--r--drivers/mtd/nand/orion_nand.c2
13 files changed, 53 insertions, 805 deletions
diff --git a/drivers/mtd/chips/map_rom.c b/drivers/mtd/chips/map_rom.c
index 821d0ed6bae3..c76d6e5f47ee 100644
--- a/drivers/mtd/chips/map_rom.c
+++ b/drivers/mtd/chips/map_rom.c
@@ -19,6 +19,7 @@ static int maprom_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
19static int maprom_write (struct mtd_info *, loff_t, size_t, size_t *, const u_char *); 19static int maprom_write (struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
20static void maprom_nop (struct mtd_info *); 20static void maprom_nop (struct mtd_info *);
21static struct mtd_info *map_rom_probe(struct map_info *map); 21static struct mtd_info *map_rom_probe(struct map_info *map);
22static int maprom_erase (struct mtd_info *mtd, struct erase_info *info);
22 23
23static struct mtd_chip_driver maprom_chipdrv = { 24static struct mtd_chip_driver maprom_chipdrv = {
24 .probe = map_rom_probe, 25 .probe = map_rom_probe,
@@ -42,6 +43,7 @@ static struct mtd_info *map_rom_probe(struct map_info *map)
42 mtd->read = maprom_read; 43 mtd->read = maprom_read;
43 mtd->write = maprom_write; 44 mtd->write = maprom_write;
44 mtd->sync = maprom_nop; 45 mtd->sync = maprom_nop;
46 mtd->erase = maprom_erase;
45 mtd->flags = MTD_CAP_ROM; 47 mtd->flags = MTD_CAP_ROM;
46 mtd->erasesize = map->size; 48 mtd->erasesize = map->size;
47 mtd->writesize = 1; 49 mtd->writesize = 1;
@@ -71,6 +73,12 @@ static int maprom_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *re
71 return -EIO; 73 return -EIO;
72} 74}
73 75
76static int maprom_erase (struct mtd_info *mtd, struct erase_info *info)
77{
78 /* We do our best 8) */
79 return -EROFS;
80}
81
74static int __init map_rom_init(void) 82static int __init map_rom_init(void)
75{ 83{
76 register_mtd_chip_driver(&maprom_chipdrv); 84 register_mtd_chip_driver(&maprom_chipdrv);
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index bc33200535fc..6fde0a2e3567 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -120,13 +120,6 @@ config MTD_PHRAM
120 doesn't have access to, memory beyond the mem=xxx limit, nvram, 120 doesn't have access to, memory beyond the mem=xxx limit, nvram,
121 memory on the video card, etc... 121 memory on the video card, etc...
122 122
123config MTD_PS3VRAM
124 tristate "PS3 video RAM"
125 depends on FB_PS3
126 help
127 This driver allows you to use excess PS3 video RAM as volatile
128 storage or system swap.
129
130config MTD_LART 123config MTD_LART
131 tristate "28F160xx flash driver for LART" 124 tristate "28F160xx flash driver for LART"
132 depends on SA1100_LART 125 depends on SA1100_LART
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index e51521df4e40..0993d5cf3923 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -16,4 +16,3 @@ obj-$(CONFIG_MTD_LART) += lart.o
16obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o 16obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
17obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o 17obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
18obj-$(CONFIG_MTD_M25P80) += m25p80.o 18obj-$(CONFIG_MTD_M25P80) += m25p80.o
19obj-$(CONFIG_MTD_PS3VRAM) += ps3vram.o
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index d44f741ae229..6d9f810565c8 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -821,7 +821,8 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
821 if (!(info->flags & IS_POW2PS)) 821 if (!(info->flags & IS_POW2PS))
822 return info; 822 return info;
823 } 823 }
824 } 824 } else
825 return info;
825 } 826 }
826 } 827 }
827 828
diff --git a/drivers/mtd/devices/ps3vram.c b/drivers/mtd/devices/ps3vram.c
deleted file mode 100644
index d21e9beb7ed2..000000000000
--- a/drivers/mtd/devices/ps3vram.c
+++ /dev/null
@@ -1,768 +0,0 @@
1/**
2 * ps3vram - Use extra PS3 video ram as MTD block device.
3 *
4 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
5 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
6 */
7
8#include <linux/io.h>
9#include <linux/mm.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/list.h>
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/slab.h>
16#include <linux/version.h>
17#include <linux/gfp.h>
18#include <linux/delay.h>
19#include <linux/mtd/mtd.h>
20
21#include <asm/lv1call.h>
22#include <asm/ps3.h>
23
24#define DEVICE_NAME "ps3vram"
25
26#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
27#define XDR_IOIF 0x0c000000
28
29#define FIFO_BASE XDR_IOIF
30#define FIFO_SIZE (64 * 1024)
31
32#define DMA_PAGE_SIZE (4 * 1024)
33
34#define CACHE_PAGE_SIZE (256 * 1024)
35#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
36
37#define CACHE_OFFSET CACHE_PAGE_SIZE
38#define FIFO_OFFSET 0
39
40#define CTRL_PUT 0x10
41#define CTRL_GET 0x11
42#define CTRL_TOP 0x15
43
44#define UPLOAD_SUBCH 1
45#define DOWNLOAD_SUBCH 2
46
47#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
48#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
49
50#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
51
52struct mtd_info ps3vram_mtd;
53
54#define CACHE_PAGE_PRESENT 1
55#define CACHE_PAGE_DIRTY 2
56
57struct ps3vram_tag {
58 unsigned int address;
59 unsigned int flags;
60};
61
62struct ps3vram_cache {
63 unsigned int page_count;
64 unsigned int page_size;
65 struct ps3vram_tag *tags;
66};
67
68struct ps3vram_priv {
69 u64 memory_handle;
70 u64 context_handle;
71 u32 *ctrl;
72 u32 *reports;
73 u8 __iomem *ddr_base;
74 u8 *xdr_buf;
75
76 u32 *fifo_base;
77 u32 *fifo_ptr;
78
79 struct device *dev;
80 struct ps3vram_cache cache;
81
82 /* Used to serialize cache/DMA operations */
83 struct mutex lock;
84};
85
86#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
87#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
88#define DMA_NOTIFIER_SIZE 0x40
89#define NOTIFIER 7 /* notifier used for completion report */
90
91/* A trailing '-' means to subtract off ps3fb_videomemory.size */
92char *size = "256M-";
93module_param(size, charp, 0);
94MODULE_PARM_DESC(size, "memory size");
95
96static u32 *ps3vram_get_notifier(u32 *reports, int notifier)
97{
98 return (void *) reports +
99 DMA_NOTIFIER_OFFSET_BASE +
100 DMA_NOTIFIER_SIZE * notifier;
101}
102
103static void ps3vram_notifier_reset(struct mtd_info *mtd)
104{
105 int i;
106
107 struct ps3vram_priv *priv = mtd->priv;
108 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
109 for (i = 0; i < 4; i++)
110 notify[i] = 0xffffffff;
111}
112
113static int ps3vram_notifier_wait(struct mtd_info *mtd, unsigned int timeout_ms)
114{
115 struct ps3vram_priv *priv = mtd->priv;
116 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
117 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
118
119 do {
120 if (!notify[3])
121 return 0;
122 msleep(1);
123 } while (time_before(jiffies, timeout));
124
125 return -ETIMEDOUT;
126}
127
128static void ps3vram_init_ring(struct mtd_info *mtd)
129{
130 struct ps3vram_priv *priv = mtd->priv;
131
132 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
133 priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
134}
135
136static int ps3vram_wait_ring(struct mtd_info *mtd, unsigned int timeout_ms)
137{
138 struct ps3vram_priv *priv = mtd->priv;
139 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
140
141 do {
142 if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
143 return 0;
144 msleep(1);
145 } while (time_before(jiffies, timeout));
146
147 dev_dbg(priv->dev, "%s:%d: FIFO timeout (%08x/%08x/%08x)\n", __func__,
148 __LINE__, priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET],
149 priv->ctrl[CTRL_TOP]);
150
151 return -ETIMEDOUT;
152}
153
154static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
155{
156 *(priv->fifo_ptr)++ = data;
157}
158
159static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan,
160 u32 tag, u32 size)
161{
162 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
163}
164
165static void ps3vram_rewind_ring(struct mtd_info *mtd)
166{
167 struct ps3vram_priv *priv = mtd->priv;
168 u64 status;
169
170 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
171
172 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
173
174 /* asking the HV for a blit will kick the fifo */
175 status = lv1_gpu_context_attribute(priv->context_handle,
176 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
177 0, 0, 0, 0);
178 if (status)
179 dev_err(priv->dev, "%s:%d: lv1_gpu_context_attribute failed\n",
180 __func__, __LINE__);
181
182 priv->fifo_ptr = priv->fifo_base;
183}
184
185static void ps3vram_fire_ring(struct mtd_info *mtd)
186{
187 struct ps3vram_priv *priv = mtd->priv;
188 u64 status;
189
190 mutex_lock(&ps3_gpu_mutex);
191
192 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
193 (priv->fifo_ptr - priv->fifo_base) * sizeof(u32);
194
195 /* asking the HV for a blit will kick the fifo */
196 status = lv1_gpu_context_attribute(priv->context_handle,
197 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
198 0, 0, 0, 0);
199 if (status)
200 dev_err(priv->dev, "%s:%d: lv1_gpu_context_attribute failed\n",
201 __func__, __LINE__);
202
203 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
204 FIFO_SIZE - 1024) {
205 dev_dbg(priv->dev, "%s:%d: fifo full, rewinding\n", __func__,
206 __LINE__);
207 ps3vram_wait_ring(mtd, 200);
208 ps3vram_rewind_ring(mtd);
209 }
210
211 mutex_unlock(&ps3_gpu_mutex);
212}
213
214static void ps3vram_bind(struct mtd_info *mtd)
215{
216 struct ps3vram_priv *priv = mtd->priv;
217
218 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
219 ps3vram_out_ring(priv, 0x31337303);
220 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
221 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
222 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
223 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
224
225 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
226 ps3vram_out_ring(priv, 0x3137c0de);
227 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
228 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
229 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
230 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
231
232 ps3vram_fire_ring(mtd);
233}
234
235static int ps3vram_upload(struct mtd_info *mtd, unsigned int src_offset,
236 unsigned int dst_offset, int len, int count)
237{
238 struct ps3vram_priv *priv = mtd->priv;
239
240 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
241 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
242 ps3vram_out_ring(priv, XDR_IOIF + src_offset);
243 ps3vram_out_ring(priv, dst_offset);
244 ps3vram_out_ring(priv, len);
245 ps3vram_out_ring(priv, len);
246 ps3vram_out_ring(priv, len);
247 ps3vram_out_ring(priv, count);
248 ps3vram_out_ring(priv, (1 << 8) | 1);
249 ps3vram_out_ring(priv, 0);
250
251 ps3vram_notifier_reset(mtd);
252 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
253 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
254 ps3vram_out_ring(priv, 0);
255 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
256 ps3vram_out_ring(priv, 0);
257 ps3vram_fire_ring(mtd);
258 if (ps3vram_notifier_wait(mtd, 200) < 0) {
259 dev_dbg(priv->dev, "%s:%d: notifier timeout\n", __func__,
260 __LINE__);
261 return -1;
262 }
263
264 return 0;
265}
266
267static int ps3vram_download(struct mtd_info *mtd, unsigned int src_offset,
268 unsigned int dst_offset, int len, int count)
269{
270 struct ps3vram_priv *priv = mtd->priv;
271
272 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
273 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
274 ps3vram_out_ring(priv, src_offset);
275 ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
276 ps3vram_out_ring(priv, len);
277 ps3vram_out_ring(priv, len);
278 ps3vram_out_ring(priv, len);
279 ps3vram_out_ring(priv, count);
280 ps3vram_out_ring(priv, (1 << 8) | 1);
281 ps3vram_out_ring(priv, 0);
282
283 ps3vram_notifier_reset(mtd);
284 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
285 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
286 ps3vram_out_ring(priv, 0);
287 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
288 ps3vram_out_ring(priv, 0);
289 ps3vram_fire_ring(mtd);
290 if (ps3vram_notifier_wait(mtd, 200) < 0) {
291 dev_dbg(priv->dev, "%s:%d: notifier timeout\n", __func__,
292 __LINE__);
293 return -1;
294 }
295
296 return 0;
297}
298
299static void ps3vram_cache_evict(struct mtd_info *mtd, int entry)
300{
301 struct ps3vram_priv *priv = mtd->priv;
302 struct ps3vram_cache *cache = &priv->cache;
303
304 if (cache->tags[entry].flags & CACHE_PAGE_DIRTY) {
305 dev_dbg(priv->dev, "%s:%d: flushing %d : 0x%08x\n", __func__,
306 __LINE__, entry, cache->tags[entry].address);
307 if (ps3vram_upload(mtd,
308 CACHE_OFFSET + entry * cache->page_size,
309 cache->tags[entry].address,
310 DMA_PAGE_SIZE,
311 cache->page_size / DMA_PAGE_SIZE) < 0) {
312 dev_dbg(priv->dev, "%s:%d: failed to upload from "
313 "0x%x to 0x%x size 0x%x\n", __func__, __LINE__,
314 entry * cache->page_size,
315 cache->tags[entry].address, cache->page_size);
316 }
317 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
318 }
319}
320
321static void ps3vram_cache_load(struct mtd_info *mtd, int entry,
322 unsigned int address)
323{
324 struct ps3vram_priv *priv = mtd->priv;
325 struct ps3vram_cache *cache = &priv->cache;
326
327 dev_dbg(priv->dev, "%s:%d: fetching %d : 0x%08x\n", __func__, __LINE__,
328 entry, address);
329 if (ps3vram_download(mtd,
330 address,
331 CACHE_OFFSET + entry * cache->page_size,
332 DMA_PAGE_SIZE,
333 cache->page_size / DMA_PAGE_SIZE) < 0) {
334 dev_err(priv->dev, "%s:%d: failed to download from "
335 "0x%x to 0x%x size 0x%x\n", __func__, __LINE__, address,
336 entry * cache->page_size, cache->page_size);
337 }
338
339 cache->tags[entry].address = address;
340 cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
341}
342
343
344static void ps3vram_cache_flush(struct mtd_info *mtd)
345{
346 struct ps3vram_priv *priv = mtd->priv;
347 struct ps3vram_cache *cache = &priv->cache;
348 int i;
349
350 dev_dbg(priv->dev, "%s:%d: FLUSH\n", __func__, __LINE__);
351 for (i = 0; i < cache->page_count; i++) {
352 ps3vram_cache_evict(mtd, i);
353 cache->tags[i].flags = 0;
354 }
355}
356
357static unsigned int ps3vram_cache_match(struct mtd_info *mtd, loff_t address)
358{
359 struct ps3vram_priv *priv = mtd->priv;
360 struct ps3vram_cache *cache = &priv->cache;
361 unsigned int base;
362 unsigned int offset;
363 int i;
364 static int counter;
365
366 offset = (unsigned int) (address & (cache->page_size - 1));
367 base = (unsigned int) (address - offset);
368
369 /* fully associative check */
370 for (i = 0; i < cache->page_count; i++) {
371 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
372 cache->tags[i].address == base) {
373 dev_dbg(priv->dev, "%s:%d: found entry %d : 0x%08x\n",
374 __func__, __LINE__, i, cache->tags[i].address);
375 return i;
376 }
377 }
378
379 /* choose a random entry */
380 i = (jiffies + (counter++)) % cache->page_count;
381 dev_dbg(priv->dev, "%s:%d: using entry %d\n", __func__, __LINE__, i);
382
383 ps3vram_cache_evict(mtd, i);
384 ps3vram_cache_load(mtd, i, base);
385
386 return i;
387}
388
389static int ps3vram_cache_init(struct mtd_info *mtd)
390{
391 struct ps3vram_priv *priv = mtd->priv;
392
393 priv->cache.page_count = CACHE_PAGE_COUNT;
394 priv->cache.page_size = CACHE_PAGE_SIZE;
395 priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
396 CACHE_PAGE_COUNT, GFP_KERNEL);
397 if (priv->cache.tags == NULL) {
398 dev_err(priv->dev, "%s:%d: could not allocate cache tags\n",
399 __func__, __LINE__);
400 return -ENOMEM;
401 }
402
403 dev_info(priv->dev, "created ram cache: %d entries, %d KiB each\n",
404 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
405
406 return 0;
407}
408
409static void ps3vram_cache_cleanup(struct mtd_info *mtd)
410{
411 struct ps3vram_priv *priv = mtd->priv;
412
413 ps3vram_cache_flush(mtd);
414 kfree(priv->cache.tags);
415}
416
417static int ps3vram_erase(struct mtd_info *mtd, struct erase_info *instr)
418{
419 struct ps3vram_priv *priv = mtd->priv;
420
421 if (instr->addr + instr->len > mtd->size)
422 return -EINVAL;
423
424 mutex_lock(&priv->lock);
425
426 ps3vram_cache_flush(mtd);
427
428 /* Set bytes to 0xFF */
429 memset_io(priv->ddr_base + instr->addr, 0xFF, instr->len);
430
431 mutex_unlock(&priv->lock);
432
433 instr->state = MTD_ERASE_DONE;
434 mtd_erase_callback(instr);
435
436 return 0;
437}
438
439static int ps3vram_read(struct mtd_info *mtd, loff_t from, size_t len,
440 size_t *retlen, u_char *buf)
441{
442 struct ps3vram_priv *priv = mtd->priv;
443 unsigned int cached, count;
444
445 dev_dbg(priv->dev, "%s:%d: from=0x%08x len=0x%zx\n", __func__, __LINE__,
446 (unsigned int)from, len);
447
448 if (from >= mtd->size)
449 return -EINVAL;
450
451 if (len > mtd->size - from)
452 len = mtd->size - from;
453
454 /* Copy from vram to buf */
455 count = len;
456 while (count) {
457 unsigned int offset, avail;
458 unsigned int entry;
459
460 offset = (unsigned int) (from & (priv->cache.page_size - 1));
461 avail = priv->cache.page_size - offset;
462
463 mutex_lock(&priv->lock);
464
465 entry = ps3vram_cache_match(mtd, from);
466 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
467
468 dev_dbg(priv->dev, "%s:%d: from=%08x cached=%08x offset=%08x "
469 "avail=%08x count=%08x\n", __func__, __LINE__,
470 (unsigned int)from, cached, offset, avail, count);
471
472 if (avail > count)
473 avail = count;
474 memcpy(buf, priv->xdr_buf + cached, avail);
475
476 mutex_unlock(&priv->lock);
477
478 buf += avail;
479 count -= avail;
480 from += avail;
481 }
482
483 *retlen = len;
484 return 0;
485}
486
487static int ps3vram_write(struct mtd_info *mtd, loff_t to, size_t len,
488 size_t *retlen, const u_char *buf)
489{
490 struct ps3vram_priv *priv = mtd->priv;
491 unsigned int cached, count;
492
493 if (to >= mtd->size)
494 return -EINVAL;
495
496 if (len > mtd->size - to)
497 len = mtd->size - to;
498
499 /* Copy from buf to vram */
500 count = len;
501 while (count) {
502 unsigned int offset, avail;
503 unsigned int entry;
504
505 offset = (unsigned int) (to & (priv->cache.page_size - 1));
506 avail = priv->cache.page_size - offset;
507
508 mutex_lock(&priv->lock);
509
510 entry = ps3vram_cache_match(mtd, to);
511 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
512
513 dev_dbg(priv->dev, "%s:%d: to=%08x cached=%08x offset=%08x "
514 "avail=%08x count=%08x\n", __func__, __LINE__,
515 (unsigned int)to, cached, offset, avail, count);
516
517 if (avail > count)
518 avail = count;
519 memcpy(priv->xdr_buf + cached, buf, avail);
520
521 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
522
523 mutex_unlock(&priv->lock);
524
525 buf += avail;
526 count -= avail;
527 to += avail;
528 }
529
530 *retlen = len;
531 return 0;
532}
533
534static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
535{
536 struct ps3vram_priv *priv;
537 int status;
538 u64 ddr_lpar;
539 u64 ctrl_lpar;
540 u64 info_lpar;
541 u64 reports_lpar;
542 u64 ddr_size;
543 u64 reports_size;
544 int ret = -ENOMEM;
545 char *rest;
546
547 ret = -EIO;
548 ps3vram_mtd.priv = kzalloc(sizeof(struct ps3vram_priv), GFP_KERNEL);
549 if (!ps3vram_mtd.priv)
550 goto out;
551 priv = ps3vram_mtd.priv;
552
553 mutex_init(&priv->lock);
554 priv->dev = &dev->core;
555
556 /* Allocate XDR buffer (1MiB aligned) */
557 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
558 get_order(XDR_BUF_SIZE));
559 if (priv->xdr_buf == NULL) {
560 dev_dbg(&dev->core, "%s:%d: could not allocate XDR buffer\n",
561 __func__, __LINE__);
562 ret = -ENOMEM;
563 goto out_free_priv;
564 }
565
566 /* Put FIFO at begginning of XDR buffer */
567 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
568 priv->fifo_ptr = priv->fifo_base;
569
570 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
571 if (ps3_open_hv_device(dev)) {
572 dev_err(&dev->core, "%s:%d: ps3_open_hv_device failed\n",
573 __func__, __LINE__);
574 ret = -EAGAIN;
575 goto out_close_gpu;
576 }
577
578 /* Request memory */
579 status = -1;
580 ddr_size = memparse(size, &rest);
581 if (*rest == '-')
582 ddr_size -= ps3fb_videomemory.size;
583 ddr_size = ALIGN(ddr_size, 1024*1024);
584 if (ddr_size <= 0) {
585 dev_err(&dev->core, "%s:%d: specified size is too small\n",
586 __func__, __LINE__);
587 ret = -EINVAL;
588 goto out_close_gpu;
589 }
590
591 while (ddr_size > 0) {
592 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
593 &priv->memory_handle,
594 &ddr_lpar);
595 if (!status)
596 break;
597 ddr_size -= 1024*1024;
598 }
599 if (status || ddr_size <= 0) {
600 dev_err(&dev->core, "%s:%d: lv1_gpu_memory_allocate failed\n",
601 __func__, __LINE__);
602 ret = -ENOMEM;
603 goto out_free_xdr_buf;
604 }
605
606 /* Request context */
607 status = lv1_gpu_context_allocate(priv->memory_handle,
608 0,
609 &priv->context_handle,
610 &ctrl_lpar,
611 &info_lpar,
612 &reports_lpar,
613 &reports_size);
614 if (status) {
615 dev_err(&dev->core, "%s:%d: lv1_gpu_context_allocate failed\n",
616 __func__, __LINE__);
617 ret = -ENOMEM;
618 goto out_free_memory;
619 }
620
621 /* Map XDR buffer to RSX */
622 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
623 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
624 XDR_BUF_SIZE, 0);
625 if (status) {
626 dev_err(&dev->core, "%s:%d: lv1_gpu_context_iomap failed\n",
627 __func__, __LINE__);
628 ret = -ENOMEM;
629 goto out_free_context;
630 }
631
632 priv->ddr_base = ioremap_flags(ddr_lpar, ddr_size, _PAGE_NO_CACHE);
633
634 if (!priv->ddr_base) {
635 dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
636 __LINE__);
637 ret = -ENOMEM;
638 goto out_free_context;
639 }
640
641 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
642 if (!priv->ctrl) {
643 dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
644 __LINE__);
645 ret = -ENOMEM;
646 goto out_unmap_vram;
647 }
648
649 priv->reports = ioremap(reports_lpar, reports_size);
650 if (!priv->reports) {
651 dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
652 __LINE__);
653 ret = -ENOMEM;
654 goto out_unmap_ctrl;
655 }
656
657 mutex_lock(&ps3_gpu_mutex);
658 ps3vram_init_ring(&ps3vram_mtd);
659 mutex_unlock(&ps3_gpu_mutex);
660
661 ps3vram_mtd.name = "ps3vram";
662 ps3vram_mtd.size = ddr_size;
663 ps3vram_mtd.flags = MTD_CAP_RAM;
664 ps3vram_mtd.erase = ps3vram_erase;
665 ps3vram_mtd.point = NULL;
666 ps3vram_mtd.unpoint = NULL;
667 ps3vram_mtd.read = ps3vram_read;
668 ps3vram_mtd.write = ps3vram_write;
669 ps3vram_mtd.owner = THIS_MODULE;
670 ps3vram_mtd.type = MTD_RAM;
671 ps3vram_mtd.erasesize = CACHE_PAGE_SIZE;
672 ps3vram_mtd.writesize = 1;
673
674 ps3vram_bind(&ps3vram_mtd);
675
676 mutex_lock(&ps3_gpu_mutex);
677 ret = ps3vram_wait_ring(&ps3vram_mtd, 100);
678 mutex_unlock(&ps3_gpu_mutex);
679 if (ret < 0) {
680 dev_err(&dev->core, "%s:%d: failed to initialize channels\n",
681 __func__, __LINE__);
682 ret = -ETIMEDOUT;
683 goto out_unmap_reports;
684 }
685
686 ps3vram_cache_init(&ps3vram_mtd);
687
688 if (add_mtd_device(&ps3vram_mtd)) {
689 dev_err(&dev->core, "%s:%d: add_mtd_device failed\n",
690 __func__, __LINE__);
691 ret = -EAGAIN;
692 goto out_cache_cleanup;
693 }
694
695 dev_info(&dev->core, "reserved %u MiB of gpu memory\n",
696 (unsigned int)(ddr_size / 1024 / 1024));
697
698 return 0;
699
700out_cache_cleanup:
701 ps3vram_cache_cleanup(&ps3vram_mtd);
702out_unmap_reports:
703 iounmap(priv->reports);
704out_unmap_ctrl:
705 iounmap(priv->ctrl);
706out_unmap_vram:
707 iounmap(priv->ddr_base);
708out_free_context:
709 lv1_gpu_context_free(priv->context_handle);
710out_free_memory:
711 lv1_gpu_memory_free(priv->memory_handle);
712out_close_gpu:
713 ps3_close_hv_device(dev);
714out_free_xdr_buf:
715 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
716out_free_priv:
717 kfree(ps3vram_mtd.priv);
718 ps3vram_mtd.priv = NULL;
719out:
720 return ret;
721}
722
723static int ps3vram_shutdown(struct ps3_system_bus_device *dev)
724{
725 struct ps3vram_priv *priv;
726
727 priv = ps3vram_mtd.priv;
728
729 del_mtd_device(&ps3vram_mtd);
730 ps3vram_cache_cleanup(&ps3vram_mtd);
731 iounmap(priv->reports);
732 iounmap(priv->ctrl);
733 iounmap(priv->ddr_base);
734 lv1_gpu_context_free(priv->context_handle);
735 lv1_gpu_memory_free(priv->memory_handle);
736 ps3_close_hv_device(dev);
737 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
738 kfree(priv);
739 return 0;
740}
741
742static struct ps3_system_bus_driver ps3vram_driver = {
743 .match_id = PS3_MATCH_ID_GPU,
744 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
745 .core.name = DEVICE_NAME,
746 .core.owner = THIS_MODULE,
747 .probe = ps3vram_probe,
748 .remove = ps3vram_shutdown,
749 .shutdown = ps3vram_shutdown,
750};
751
752static int __init ps3vram_init(void)
753{
754 return ps3_system_bus_driver_register(&ps3vram_driver);
755}
756
757static void __exit ps3vram_exit(void)
758{
759 ps3_system_bus_driver_unregister(&ps3vram_driver);
760}
761
762module_init(ps3vram_init);
763module_exit(ps3vram_exit);
764
765MODULE_LICENSE("GPL");
766MODULE_AUTHOR("Jim Paris <jim@jtan.com>");
767MODULE_DESCRIPTION("MTD driver for PS3 video RAM");
768MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
diff --git a/drivers/mtd/devices/slram.c b/drivers/mtd/devices/slram.c
index a425d09f35a0..00248e81ecd5 100644
--- a/drivers/mtd/devices/slram.c
+++ b/drivers/mtd/devices/slram.c
@@ -267,22 +267,28 @@ static int parse_cmdline(char *devname, char *szstart, char *szlength)
267 if (*(szlength) != '+') { 267 if (*(szlength) != '+') {
268 devlength = simple_strtoul(szlength, &buffer, 0); 268 devlength = simple_strtoul(szlength, &buffer, 0);
269 devlength = handle_unit(devlength, buffer) - devstart; 269 devlength = handle_unit(devlength, buffer) - devstart;
270 if (devlength < devstart)
271 goto err_out;
272
273 devlength -= devstart;
270 } else { 274 } else {
271 devlength = simple_strtoul(szlength + 1, &buffer, 0); 275 devlength = simple_strtoul(szlength + 1, &buffer, 0);
272 devlength = handle_unit(devlength, buffer); 276 devlength = handle_unit(devlength, buffer);
273 } 277 }
274 T("slram: devname=%s, devstart=0x%lx, devlength=0x%lx\n", 278 T("slram: devname=%s, devstart=0x%lx, devlength=0x%lx\n",
275 devname, devstart, devlength); 279 devname, devstart, devlength);
276 if ((devstart < 0) || (devlength < 0) || (devlength % SLRAM_BLK_SZ != 0)) { 280 if (devlength % SLRAM_BLK_SZ != 0)
277 E("slram: Illegal start / length parameter.\n"); 281 goto err_out;
278 return(-EINVAL);
279 }
280 282
281 if ((devstart = register_device(devname, devstart, devlength))){ 283 if ((devstart = register_device(devname, devstart, devlength))){
282 unregister_devices(); 284 unregister_devices();
283 return((int)devstart); 285 return((int)devstart);
284 } 286 }
285 return(0); 287 return(0);
288
289err_out:
290 E("slram: Illegal length parameter.\n");
291 return(-EINVAL);
286} 292}
287 293
288#ifndef MODULE 294#ifndef MODULE
diff --git a/drivers/mtd/lpddr/Kconfig b/drivers/mtd/lpddr/Kconfig
index acd4ea9b2278..5a401d8047ab 100644
--- a/drivers/mtd/lpddr/Kconfig
+++ b/drivers/mtd/lpddr/Kconfig
@@ -12,6 +12,7 @@ config MTD_LPDDR
12 DDR memories, intended for battery-operated systems. 12 DDR memories, intended for battery-operated systems.
13 13
14config MTD_QINFO_PROBE 14config MTD_QINFO_PROBE
15 depends on MTD_LPDDR
15 tristate "Detect flash chips by QINFO probe" 16 tristate "Detect flash chips by QINFO probe"
16 help 17 help
17 Device Information for LPDDR chips is offered through the Overlay 18 Device Information for LPDDR chips is offered through the Overlay
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 0225cbbf22de..043d50fb6ef6 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -491,7 +491,7 @@ config MTD_PCMCIA_ANONYMOUS
491 491
492config MTD_BFIN_ASYNC 492config MTD_BFIN_ASYNC
493 tristate "Blackfin BF533-STAMP Flash Chip Support" 493 tristate "Blackfin BF533-STAMP Flash Chip Support"
494 depends on BFIN533_STAMP && MTD_CFI 494 depends on BFIN533_STAMP && MTD_CFI && MTD_COMPLEX_MAPPINGS
495 select MTD_PARTITIONS 495 select MTD_PARTITIONS
496 default y 496 default y
497 help 497 help
diff --git a/drivers/mtd/maps/bfin-async-flash.c b/drivers/mtd/maps/bfin-async-flash.c
index 6fec86aaed7e..576611f605db 100644
--- a/drivers/mtd/maps/bfin-async-flash.c
+++ b/drivers/mtd/maps/bfin-async-flash.c
@@ -152,14 +152,18 @@ static int __devinit bfin_flash_probe(struct platform_device *pdev)
152 152
153 if (gpio_request(state->enet_flash_pin, DRIVER_NAME)) { 153 if (gpio_request(state->enet_flash_pin, DRIVER_NAME)) {
154 pr_devinit(KERN_ERR DRIVER_NAME ": Failed to request gpio %d\n", state->enet_flash_pin); 154 pr_devinit(KERN_ERR DRIVER_NAME ": Failed to request gpio %d\n", state->enet_flash_pin);
155 kfree(state);
155 return -EBUSY; 156 return -EBUSY;
156 } 157 }
157 gpio_direction_output(state->enet_flash_pin, 1); 158 gpio_direction_output(state->enet_flash_pin, 1);
158 159
159 pr_devinit(KERN_NOTICE DRIVER_NAME ": probing %d-bit flash bus\n", state->map.bankwidth * 8); 160 pr_devinit(KERN_NOTICE DRIVER_NAME ": probing %d-bit flash bus\n", state->map.bankwidth * 8);
160 state->mtd = do_map_probe(memory->name, &state->map); 161 state->mtd = do_map_probe(memory->name, &state->map);
161 if (!state->mtd) 162 if (!state->mtd) {
163 gpio_free(state->enet_flash_pin);
164 kfree(state);
162 return -ENXIO; 165 return -ENXIO;
166 }
163 167
164#ifdef CONFIG_MTD_PARTITIONS 168#ifdef CONFIG_MTD_PARTITIONS
165 ret = parse_mtd_partitions(state->mtd, part_probe_types, &pdata->parts, 0); 169 ret = parse_mtd_partitions(state->mtd, part_probe_types, &pdata->parts, 0);
diff --git a/drivers/mtd/maps/ck804xrom.c b/drivers/mtd/maps/ck804xrom.c
index 5f7a245ed132..424f17d6ffd1 100644
--- a/drivers/mtd/maps/ck804xrom.c
+++ b/drivers/mtd/maps/ck804xrom.c
@@ -342,9 +342,9 @@ static struct pci_device_id ck804xrom_pci_tbl[] = {
342 { 0, } 342 { 0, }
343}; 343};
344 344
345#if 0
345MODULE_DEVICE_TABLE(pci, ck804xrom_pci_tbl); 346MODULE_DEVICE_TABLE(pci, ck804xrom_pci_tbl);
346 347
347#if 0
348static struct pci_driver ck804xrom_driver = { 348static struct pci_driver ck804xrom_driver = {
349 .name = MOD_NAME, 349 .name = MOD_NAME,
350 .id_table = ck804xrom_pci_tbl, 350 .id_table = ck804xrom_pci_tbl,
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c
index 87743661d48e..229718222db7 100644
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -29,6 +29,7 @@ struct physmap_flash_info {
29 struct map_info map[MAX_RESOURCES]; 29 struct map_info map[MAX_RESOURCES];
30#ifdef CONFIG_MTD_PARTITIONS 30#ifdef CONFIG_MTD_PARTITIONS
31 int nr_parts; 31 int nr_parts;
32 struct mtd_partition *parts;
32#endif 33#endif
33}; 34};
34 35
@@ -45,25 +46,29 @@ static int physmap_flash_remove(struct platform_device *dev)
45 46
46 physmap_data = dev->dev.platform_data; 47 physmap_data = dev->dev.platform_data;
47 48
48#ifdef CONFIG_MTD_CONCAT 49 if (info->cmtd) {
49 if (info->cmtd != info->mtd[0]) { 50#ifdef CONFIG_MTD_PARTITIONS
51 if (info->nr_parts || physmap_data->nr_parts)
52 del_mtd_partitions(info->cmtd);
53 else
54 del_mtd_device(info->cmtd);
55#else
50 del_mtd_device(info->cmtd); 56 del_mtd_device(info->cmtd);
51 mtd_concat_destroy(info->cmtd); 57#endif
52 } 58 }
59#ifdef CONFIG_MTD_PARTITIONS
60 if (info->nr_parts)
61 kfree(info->parts);
53#endif 62#endif
54 63
55 for (i = 0; i < MAX_RESOURCES; i++) { 64#ifdef CONFIG_MTD_CONCAT
56 if (info->mtd[i] != NULL) { 65 if (info->cmtd != info->mtd[0])
57#ifdef CONFIG_MTD_PARTITIONS 66 mtd_concat_destroy(info->cmtd);
58 if (info->nr_parts || physmap_data->nr_parts)
59 del_mtd_partitions(info->mtd[i]);
60 else
61 del_mtd_device(info->mtd[i]);
62#else
63 del_mtd_device(info->mtd[i]);
64#endif 67#endif
68
69 for (i = 0; i < MAX_RESOURCES; i++) {
70 if (info->mtd[i] != NULL)
65 map_destroy(info->mtd[i]); 71 map_destroy(info->mtd[i]);
66 }
67 } 72 }
68 return 0; 73 return 0;
69} 74}
@@ -86,9 +91,6 @@ static int physmap_flash_probe(struct platform_device *dev)
86 int err = 0; 91 int err = 0;
87 int i; 92 int i;
88 int devices_found = 0; 93 int devices_found = 0;
89#ifdef CONFIG_MTD_PARTITIONS
90 struct mtd_partition *parts;
91#endif
92 94
93 physmap_data = dev->dev.platform_data; 95 physmap_data = dev->dev.platform_data;
94 if (physmap_data == NULL) 96 if (physmap_data == NULL)
@@ -167,10 +169,11 @@ static int physmap_flash_probe(struct platform_device *dev)
167 goto err_out; 169 goto err_out;
168 170
169#ifdef CONFIG_MTD_PARTITIONS 171#ifdef CONFIG_MTD_PARTITIONS
170 err = parse_mtd_partitions(info->cmtd, part_probe_types, &parts, 0); 172 err = parse_mtd_partitions(info->cmtd, part_probe_types,
173 &info->parts, 0);
171 if (err > 0) { 174 if (err > 0) {
172 add_mtd_partitions(info->cmtd, parts, err); 175 add_mtd_partitions(info->cmtd, info->parts, err);
173 kfree(parts); 176 info->nr_parts = err;
174 return 0; 177 return 0;
175 } 178 }
176 179
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index c98c1570a40b..47a33cec3793 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -139,7 +139,8 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
139 struct nand_chip *nand_chip = mtd->priv; 139 struct nand_chip *nand_chip = mtd->priv;
140 struct atmel_nand_host *host = nand_chip->priv; 140 struct atmel_nand_host *host = nand_chip->priv;
141 141
142 return gpio_get_value(host->board->rdy_pin); 142 return gpio_get_value(host->board->rdy_pin) ^
143 !!host->board->rdy_pin_active_low;
143} 144}
144 145
145/* 146/*
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c
index 917cf8d3ae95..c2dfd3ea353d 100644
--- a/drivers/mtd/nand/orion_nand.c
+++ b/drivers/mtd/nand/orion_nand.c
@@ -149,7 +149,7 @@ static int __devexit orion_nand_remove(struct platform_device *pdev)
149 149
150static struct platform_driver orion_nand_driver = { 150static struct platform_driver orion_nand_driver = {
151 .probe = orion_nand_probe, 151 .probe = orion_nand_probe,
152 .remove = orion_nand_remove, 152 .remove = __devexit_p(orion_nand_remove),
153 .driver = { 153 .driver = {
154 .name = "orion_nand", 154 .name = "orion_nand",
155 .owner = THIS_MODULE, 155 .owner = THIS_MODULE,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-08 21:26:55 -0500