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Diffstat (limited to 'drivers/mtd/nand/omap2.c')
-rw-r--r--drivers/mtd/nand/omap2.c31
1 files changed, 9 insertions, 22 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 63f858e6bf39..60fa89939c24 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1048,10 +1048,9 @@ static int omap_dev_ready(struct mtd_info *mtd)
1048 * @mtd: MTD device structure 1048 * @mtd: MTD device structure
1049 * @mode: Read/Write mode 1049 * @mode: Read/Write mode
1050 * 1050 *
1051 * When using BCH, sector size is hardcoded to 512 bytes. 1051 * When using BCH with SW correction (i.e. no ELM), sector size is set
1052 * Using wrapping mode 6 both for reading and writing if ELM module not uses 1052 * to 512 bytes and we use BCH_WRAPMODE_6 wrapping mode
1053 * for error correction. 1053 * for both reading and writing with:
1054 * On writing,
1055 * eccsize0 = 0 (no additional protected byte in spare area) 1054 * eccsize0 = 0 (no additional protected byte in spare area)
1056 * eccsize1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area) 1055 * eccsize1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
1057 */ 1056 */
@@ -1071,15 +1070,9 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode)
1071 case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW: 1070 case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
1072 bch_type = 0; 1071 bch_type = 0;
1073 nsectors = 1; 1072 nsectors = 1;
1074 if (mode == NAND_ECC_READ) { 1073 wr_mode = BCH_WRAPMODE_6;
1075 wr_mode = BCH_WRAPMODE_6; 1074 ecc_size0 = BCH_ECC_SIZE0;
1076 ecc_size0 = BCH_ECC_SIZE0; 1075 ecc_size1 = BCH_ECC_SIZE1;
1077 ecc_size1 = BCH_ECC_SIZE1;
1078 } else {
1079 wr_mode = BCH_WRAPMODE_6;
1080 ecc_size0 = BCH_ECC_SIZE0;
1081 ecc_size1 = BCH_ECC_SIZE1;
1082 }
1083 break; 1076 break;
1084 case OMAP_ECC_BCH4_CODE_HW: 1077 case OMAP_ECC_BCH4_CODE_HW:
1085 bch_type = 0; 1078 bch_type = 0;
@@ -1097,15 +1090,9 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode)
1097 case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW: 1090 case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
1098 bch_type = 1; 1091 bch_type = 1;
1099 nsectors = 1; 1092 nsectors = 1;
1100 if (mode == NAND_ECC_READ) { 1093 wr_mode = BCH_WRAPMODE_6;
1101 wr_mode = BCH_WRAPMODE_6; 1094 ecc_size0 = BCH_ECC_SIZE0;
1102 ecc_size0 = BCH_ECC_SIZE0; 1095 ecc_size1 = BCH_ECC_SIZE1;
1103 ecc_size1 = BCH_ECC_SIZE1;
1104 } else {
1105 wr_mode = BCH_WRAPMODE_6;
1106 ecc_size0 = BCH_ECC_SIZE0;
1107 ecc_size1 = BCH_ECC_SIZE1;
1108 }
1109 break; 1096 break;
1110 case OMAP_ECC_BCH8_CODE_HW: 1097 case OMAP_ECC_BCH8_CODE_HW:
1111 bch_type = 1; 1098 bch_type = 1;