1 files changed, 14 insertions, 53 deletions

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index bd1ce7d13702..d78a97d4153a 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1062,56 +1062,28 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd)
 }
 
 /*
- * Get ECC requirement in ONFI parameters, returns -1 if ONFI
- * parameters is not supported.
- * return 0 if success to get the ECC requirement.
- */
-static int get_onfi_ecc_param(struct nand_chip *chip,
-                int *ecc_bits, int *sector_size)
-{
-        *ecc_bits = *sector_size = 0;
-
-        if (chip->onfi_params.ecc_bits == 0xff)
-                /* TODO: the sector_size and ecc_bits need to be find in
-                 * extended ecc parameter, currently we don't support it.
-                 */
-                return -1;
-
-        *ecc_bits = chip->onfi_params.ecc_bits;
-
-        /* The default sector size (ecc codeword size) is 512 */
-        *sector_size = 512;
-
-        return 0;
-}
-
-/*
- * Get ecc requirement from ONFI parameters ecc requirement.
+ * Get minimum ecc requirements from NAND.
  * If pmecc-cap, pmecc-sector-size in DTS are not specified, this function
- * will set them according to ONFI ecc requirement. Otherwise, use the
+ * will set them according to minimum ecc requirement. Otherwise, use the
  * value in DTS file.
  * return 0 if success. otherwise return error code.
  */
 static int pmecc_choose_ecc(struct atmel_nand_host *host,
                 int *cap, int *sector_size)
 {
-        /* Get ECC requirement from ONFI parameters */
-        *cap = *sector_size = 0;
-        if (host->nand_chip.onfi_version) {
-                if (!get_onfi_ecc_param(&host->nand_chip, cap, sector_size))
-                        dev_info(host->dev, "ONFI params, minimum required ECC: %d bits in %d bytes\n",
+        /* Get minimum ECC requirements */
+        if (host->nand_chip.ecc_strength_ds) {
+                *cap = host->nand_chip.ecc_strength_ds;
+                *sector_size = host->nand_chip.ecc_step_ds;
+                dev_info(host->dev, "minimum ECC: %d bits in %d bytes\n",
                                 *cap, *sector_size);
-                else
-                        dev_info(host->dev, "NAND chip ECC reqirement is in Extended ONFI parameter, we don't support yet.\n");
         } else {
-                dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes");
-        }
-        if (*cap == 0 && *sector_size == 0) {
                 *cap = 2;
                 *sector_size = 512;
+                dev_info(host->dev, "can't detect min. ECC, assume 2 bits in 512 bytes\n");
         }
 
-        /* If dts file doesn't specify then use the one in ONFI parameters */
+        /* If device tree doesn't specify, use NAND's minimum ECC parameters */
         if (host->pmecc_corr_cap == 0) {
                 /* use the most fitable ecc bits (the near bigger one ) */
                 if (*cap <= 2)
@@ -1449,7 +1421,6 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode)
                 ecc_writel(host->ecc, CR, ATMEL_ECC_RST);
 }
 
-#if defined(CONFIG_OF)
 static int atmel_of_init_port(struct atmel_nand_host *host,
                               struct device_node *np)
 {
@@ -1457,7 +1428,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host,
         u32 offset[2];
         int ecc_mode;
         struct atmel_nand_data *board = &host->board;
-        enum of_gpio_flags flags;
+        enum of_gpio_flags flags = 0;
 
         if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) {
                 if (val >= 32) {
@@ -1540,13 +1511,6 @@ static int atmel_of_init_port(struct atmel_nand_host *host,
 
         return 0;
 }
-#else
-static int atmel_of_init_port(struct atmel_nand_host *host,
-                              struct device_node *np)
-{
-        return -EINVAL;
-}
-#endif
 
 static int atmel_hw_nand_init_params(struct platform_device *pdev,
                                          struct atmel_nand_host *host)
@@ -2019,7 +1983,8 @@ static int atmel_nand_probe(struct platform_device *pdev)
         mtd = &host->mtd;
         nand_chip = &host->nand_chip;
         host->dev = &pdev->dev;
-        if (pdev->dev.of_node) {
+        if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+                /* Only when CONFIG_OF is enabled of_node can be parsed */
                 res = atmel_of_init_port(host, pdev->dev.of_node);
                 if (res)
                         goto err_nand_ioremap;
@@ -2177,7 +2142,6 @@ err_no_card:
         if (host->dma_chan)
                 dma_release_channel(host->dma_chan);
 err_nand_ioremap:
-        platform_driver_unregister(&atmel_nand_nfc_driver);
         return res;
 }
 
@@ -2207,14 +2171,12 @@ static int atmel_nand_remove(struct platform_device *pdev)
         return 0;
 }
 
-#if defined(CONFIG_OF)
 static const struct of_device_id atmel_nand_dt_ids[] = {
         { .compatible = "atmel,at91rm9200-nand" },
         { /* sentinel */ }
 };
 
 MODULE_DEVICE_TABLE(of, atmel_nand_dt_ids);
-#endif
 
 static int atmel_nand_nfc_probe(struct platform_device *pdev)
 {
@@ -2253,12 +2215,11 @@ static int atmel_nand_nfc_probe(struct platform_device *pdev)
         return 0;
 }
 
-#if defined(CONFIG_OF)
-static struct of_device_id atmel_nand_nfc_match[] = {
+static const struct of_device_id atmel_nand_nfc_match[] = {
         { .compatible = "atmel,sama5d3-nfc" },
         { /* sentinel */ }
 };
-#endif
+MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match);
 
 static struct platform_driver atmel_nand_nfc_driver = {
         .driver = {