1 files changed, 81 insertions, 2 deletions

diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
index 63fb265e0da6..8d6794cdf899 100644
--- a/drivers/mmc/host/s3cmci.c
+++ b/drivers/mmc/host/s3cmci.c
@@ -25,14 +25,93 @@
 
 #include <mach/dma.h>
 
-#include <mach/regs-sdi.h>
-
 #include <linux/platform_data/mmc-s3cmci.h>
 
 #include "s3cmci.h"
 
 #define DRIVER_NAME "s3c-mci"
 
+#define S3C2410_SDICON                  (0x00)
+#define S3C2410_SDIPRE                  (0x04)
+#define S3C2410_SDICMDARG               (0x08)
+#define S3C2410_SDICMDCON               (0x0C)
+#define S3C2410_SDICMDSTAT              (0x10)
+#define S3C2410_SDIRSP0                 (0x14)
+#define S3C2410_SDIRSP1                 (0x18)
+#define S3C2410_SDIRSP2                 (0x1C)
+#define S3C2410_SDIRSP3                 (0x20)
+#define S3C2410_SDITIMER                (0x24)
+#define S3C2410_SDIBSIZE                (0x28)
+#define S3C2410_SDIDCON                 (0x2C)
+#define S3C2410_SDIDCNT                 (0x30)
+#define S3C2410_SDIDSTA                 (0x34)
+#define S3C2410_SDIFSTA                 (0x38)
+
+#define S3C2410_SDIDATA                 (0x3C)
+#define S3C2410_SDIIMSK                 (0x40)
+
+#define S3C2440_SDIDATA                 (0x40)
+#define S3C2440_SDIIMSK                 (0x3C)
+
+#define S3C2440_SDICON_SDRESET          (1 << 8)
+#define S3C2410_SDICON_SDIOIRQ          (1 << 3)
+#define S3C2410_SDICON_FIFORESET        (1 << 1)
+#define S3C2410_SDICON_CLOCKTYPE        (1 << 0)
+
+#define S3C2410_SDICMDCON_LONGRSP       (1 << 10)
+#define S3C2410_SDICMDCON_WAITRSP       (1 << 9)
+#define S3C2410_SDICMDCON_CMDSTART      (1 << 8)
+#define S3C2410_SDICMDCON_SENDERHOST    (1 << 6)
+#define S3C2410_SDICMDCON_INDEX         (0x3f)
+
+#define S3C2410_SDICMDSTAT_CRCFAIL      (1 << 12)
+#define S3C2410_SDICMDSTAT_CMDSENT      (1 << 11)
+#define S3C2410_SDICMDSTAT_CMDTIMEOUT   (1 << 10)
+#define S3C2410_SDICMDSTAT_RSPFIN       (1 << 9)
+
+#define S3C2440_SDIDCON_DS_WORD         (2 << 22)
+#define S3C2410_SDIDCON_TXAFTERRESP     (1 << 20)
+#define S3C2410_SDIDCON_RXAFTERCMD      (1 << 19)
+#define S3C2410_SDIDCON_BLOCKMODE       (1 << 17)
+#define S3C2410_SDIDCON_WIDEBUS         (1 << 16)
+#define S3C2410_SDIDCON_DMAEN           (1 << 15)
+#define S3C2410_SDIDCON_STOP            (1 << 14)
+#define S3C2440_SDIDCON_DATSTART        (1 << 14)
+
+#define S3C2410_SDIDCON_XFER_RXSTART    (2 << 12)
+#define S3C2410_SDIDCON_XFER_TXSTART    (3 << 12)
+
+#define S3C2410_SDIDCON_BLKNUM_MASK     (0xFFF)
+
+#define S3C2410_SDIDSTA_SDIOIRQDETECT   (1 << 9)
+#define S3C2410_SDIDSTA_FIFOFAIL        (1 << 8)
+#define S3C2410_SDIDSTA_CRCFAIL         (1 << 7)
+#define S3C2410_SDIDSTA_RXCRCFAIL       (1 << 6)
+#define S3C2410_SDIDSTA_DATATIMEOUT     (1 << 5)
+#define S3C2410_SDIDSTA_XFERFINISH      (1 << 4)
+#define S3C2410_SDIDSTA_TXDATAON        (1 << 1)
+#define S3C2410_SDIDSTA_RXDATAON        (1 << 0)
+
+#define S3C2440_SDIFSTA_FIFORESET       (1 << 16)
+#define S3C2440_SDIFSTA_FIFOFAIL        (3 << 14)
+#define S3C2410_SDIFSTA_TFDET           (1 << 13)
+#define S3C2410_SDIFSTA_RFDET           (1 << 12)
+#define S3C2410_SDIFSTA_COUNTMASK       (0x7f)
+
+#define S3C2410_SDIIMSK_RESPONSECRC     (1 << 17)
+#define S3C2410_SDIIMSK_CMDSENT         (1 << 16)
+#define S3C2410_SDIIMSK_CMDTIMEOUT      (1 << 15)
+#define S3C2410_SDIIMSK_RESPONSEND      (1 << 14)
+#define S3C2410_SDIIMSK_SDIOIRQ         (1 << 12)
+#define S3C2410_SDIIMSK_FIFOFAIL        (1 << 11)
+#define S3C2410_SDIIMSK_CRCSTATUS       (1 << 10)
+#define S3C2410_SDIIMSK_DATACRC         (1 << 9)
+#define S3C2410_SDIIMSK_DATATIMEOUT     (1 << 8)
+#define S3C2410_SDIIMSK_DATAFINISH      (1 << 7)
+#define S3C2410_SDIIMSK_TXFIFOHALF      (1 << 4)
+#define S3C2410_SDIIMSK_RXFIFOLAST      (1 << 2)
+#define S3C2410_SDIIMSK_RXFIFOHALF      (1 << 0)
+
 enum dbg_channels {
         dbg_err   = (1 << 0),
         dbg_debug = (1 << 1),