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-rw-r--r--drivers/mmc/host/tmio_mmc.h233
1 files changed, 71 insertions, 162 deletions
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 0fedc78e3ea5..8260bc2c34e3 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -1,58 +1,31 @@
1/* Definitons for use with the tmio_mmc.c 1/*
2 * linux/drivers/mmc/host/tmio_mmc.h
2 * 3 *
3 * (c) 2004 Ian Molton <spyro@f2s.com> 4 * Copyright (C) 2007 Ian Molton
4 * (c) 2007 Ian Molton <spyro@f2s.com> 5 * Copyright (C) 2004 Ian Molton
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
9 * 10 *
11 * Driver for the MMC / SD / SDIO cell found in:
12 *
13 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
10 */ 14 */
11 15
16#ifndef TMIO_MMC_H
17#define TMIO_MMC_H
18
12#include <linux/highmem.h> 19#include <linux/highmem.h>
13#include <linux/interrupt.h> 20#include <linux/mmc/tmio.h>
14#include <linux/dmaengine.h> 21#include <linux/pagemap.h>
15 22#include <linux/spinlock.h>
16#define CTL_SD_CMD 0x00 23
17#define CTL_ARG_REG 0x04 24/* Definitions for values the CTRL_SDIO_STATUS register can take. */
18#define CTL_STOP_INTERNAL_ACTION 0x08 25#define TMIO_SDIO_STAT_IOIRQ 0x0001
19#define CTL_XFER_BLK_COUNT 0xa 26#define TMIO_SDIO_STAT_EXPUB52 0x4000
20#define CTL_RESPONSE 0x0c 27#define TMIO_SDIO_STAT_EXWT 0x8000
21#define CTL_STATUS 0x1c 28#define TMIO_SDIO_MASK_ALL 0xc007
22#define CTL_IRQ_MASK 0x20
23#define CTL_SD_CARD_CLK_CTL 0x24
24#define CTL_SD_XFER_LEN 0x26
25#define CTL_SD_MEM_CARD_OPT 0x28
26#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
27#define CTL_SD_DATA_PORT 0x30
28#define CTL_TRANSACTION_CTL 0x34
29#define CTL_RESET_SD 0xe0
30#define CTL_SDIO_REGS 0x100
31#define CTL_CLK_AND_WAIT_CTL 0x138
32#define CTL_RESET_SDIO 0x1e0
33
34/* Definitions for values the CTRL_STATUS register can take. */
35#define TMIO_STAT_CMDRESPEND 0x00000001
36#define TMIO_STAT_DATAEND 0x00000004
37#define TMIO_STAT_CARD_REMOVE 0x00000008
38#define TMIO_STAT_CARD_INSERT 0x00000010
39#define TMIO_STAT_SIGSTATE 0x00000020
40#define TMIO_STAT_WRPROTECT 0x00000080
41#define TMIO_STAT_CARD_REMOVE_A 0x00000100
42#define TMIO_STAT_CARD_INSERT_A 0x00000200
43#define TMIO_STAT_SIGSTATE_A 0x00000400
44#define TMIO_STAT_CMD_IDX_ERR 0x00010000
45#define TMIO_STAT_CRCFAIL 0x00020000
46#define TMIO_STAT_STOPBIT_ERR 0x00040000
47#define TMIO_STAT_DATATIMEOUT 0x00080000
48#define TMIO_STAT_RXOVERFLOW 0x00100000
49#define TMIO_STAT_TXUNDERRUN 0x00200000
50#define TMIO_STAT_CMDTIMEOUT 0x00400000
51#define TMIO_STAT_RXRDY 0x01000000
52#define TMIO_STAT_TXRQ 0x02000000
53#define TMIO_STAT_ILL_FUNC 0x20000000
54#define TMIO_STAT_CMD_BUSY 0x40000000
55#define TMIO_STAT_ILL_ACCESS 0x80000000
56 29
57/* Define some IRQ masks */ 30/* Define some IRQ masks */
58/* This is the mask used at reset by the chip */ 31/* This is the mask used at reset by the chip */
@@ -63,28 +36,7 @@
63 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) 36 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
64#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) 37#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
65 38
66 39struct tmio_mmc_data;
67#define enable_mmc_irqs(host, i) \
68 do { \
69 u32 mask;\
70 mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
71 mask &= ~((i) & TMIO_MASK_IRQ); \
72 sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
73 } while (0)
74
75#define disable_mmc_irqs(host, i) \
76 do { \
77 u32 mask;\
78 mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
79 mask |= ((i) & TMIO_MASK_IRQ); \
80 sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
81 } while (0)
82
83#define ack_mmc_irqs(host, i) \
84 do { \
85 sd_ctrl_write32((host), CTL_STATUS, ~(i)); \
86 } while (0)
87
88 40
89struct tmio_mmc_host { 41struct tmio_mmc_host {
90 void __iomem *ctl; 42 void __iomem *ctl;
@@ -93,136 +45,93 @@ struct tmio_mmc_host {
93 struct mmc_request *mrq; 45 struct mmc_request *mrq;
94 struct mmc_data *data; 46 struct mmc_data *data;
95 struct mmc_host *mmc; 47 struct mmc_host *mmc;
96 int irq; 48 unsigned int sdio_irq_enabled;
97 49
98 /* Callbacks for clock / power control */ 50 /* Callbacks for clock / power control */
99 void (*set_pwr)(struct platform_device *host, int state); 51 void (*set_pwr)(struct platform_device *host, int state);
100 void (*set_clk_div)(struct platform_device *host, int state); 52 void (*set_clk_div)(struct platform_device *host, int state);
101 53
54 int pm_error;
55
102 /* pio related stuff */ 56 /* pio related stuff */
103 struct scatterlist *sg_ptr; 57 struct scatterlist *sg_ptr;
58 struct scatterlist *sg_orig;
104 unsigned int sg_len; 59 unsigned int sg_len;
105 unsigned int sg_off; 60 unsigned int sg_off;
106 61
107 struct platform_device *pdev; 62 struct platform_device *pdev;
63 struct tmio_mmc_data *pdata;
108 64
109 /* DMA support */ 65 /* DMA support */
66 bool force_pio;
110 struct dma_chan *chan_rx; 67 struct dma_chan *chan_rx;
111 struct dma_chan *chan_tx; 68 struct dma_chan *chan_tx;
112 struct tasklet_struct dma_complete; 69 struct tasklet_struct dma_complete;
113 struct tasklet_struct dma_issue; 70 struct tasklet_struct dma_issue;
114#ifdef CONFIG_TMIO_MMC_DMA 71 struct scatterlist bounce_sg;
115 struct dma_async_tx_descriptor *desc; 72 u8 *bounce_buf;
116 unsigned int dma_sglen;
117 dma_cookie_t cookie;
118#endif
119};
120
121#include <linux/io.h>
122 73
123static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) 74 /* Track lost interrupts */
124{ 75 struct delayed_work delayed_reset_work;
125 return readw(host->ctl + (addr << host->bus_shift)); 76 spinlock_t lock;
126} 77 unsigned long last_req_ts;
127 78};
128static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
129 u16 *buf, int count)
130{
131 readsw(host->ctl + (addr << host->bus_shift), buf, count);
132}
133 79
134static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr) 80int tmio_mmc_host_probe(struct tmio_mmc_host **host,
135{ 81 struct platform_device *pdev,
136 return readw(host->ctl + (addr << host->bus_shift)) | 82 struct tmio_mmc_data *pdata);
137 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 83void tmio_mmc_host_remove(struct tmio_mmc_host *host);
138} 84void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
139 85
140static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, 86void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
141 u16 val) 87void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
142{ 88irqreturn_t tmio_mmc_irq(int irq, void *devid);
143 writew(val, host->ctl + (addr << host->bus_shift));
144}
145 89
146static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, 90static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
147 u16 *buf, int count) 91 unsigned long *flags)
148{
149 writesw(host->ctl + (addr << host->bus_shift), buf, count);
150}
151
152static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
153 u32 val)
154{ 92{
155 writew(val, host->ctl + (addr << host->bus_shift)); 93 local_irq_save(*flags);
156 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 94 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
157} 95}
158 96
159#include <linux/scatterlist.h> 97static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
160#include <linux/blkdev.h> 98 unsigned long *flags, void *virt)
161
162static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
163 struct mmc_data *data)
164{ 99{
165 host->sg_len = data->sg_len; 100 kunmap_atomic(virt - sg->offset, KM_BIO_SRC_IRQ);
166 host->sg_ptr = data->sg; 101 local_irq_restore(*flags);
167 host->sg_off = 0;
168} 102}
169 103
170static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host) 104#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
105void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
106void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
107void tmio_mmc_release_dma(struct tmio_mmc_host *host);
108#else
109static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
110 struct mmc_data *data)
171{ 111{
172 host->sg_ptr = sg_next(host->sg_ptr);
173 host->sg_off = 0;
174 return --host->sg_len;
175} 112}
176 113
177static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg, 114static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
178 unsigned long *flags) 115 struct tmio_mmc_data *pdata)
179{ 116{
180 local_irq_save(*flags); 117 host->chan_tx = NULL;
181 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; 118 host->chan_rx = NULL;
182} 119}
183 120
184static inline void tmio_mmc_kunmap_atomic(void *virt, 121static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
185 unsigned long *flags)
186{ 122{
187 kunmap_atomic(virt, KM_BIO_SRC_IRQ);
188 local_irq_restore(*flags);
189} 123}
124#endif
190 125
191#ifdef CONFIG_MMC_DEBUG 126#ifdef CONFIG_PM
192 127int tmio_mmc_host_suspend(struct device *dev);
193#define STATUS_TO_TEXT(a) \ 128int tmio_mmc_host_resume(struct device *dev);
194 do { \ 129#else
195 if (status & TMIO_STAT_##a) \ 130#define tmio_mmc_host_suspend NULL
196 printk(#a); \ 131#define tmio_mmc_host_resume NULL
197 } while (0) 132#endif
198 133
199void pr_debug_status(u32 status) 134int tmio_mmc_host_runtime_suspend(struct device *dev);
200{ 135int tmio_mmc_host_runtime_resume(struct device *dev);
201 printk(KERN_DEBUG "status: %08x = ", status);
202 STATUS_TO_TEXT(CARD_REMOVE);
203 STATUS_TO_TEXT(CARD_INSERT);
204 STATUS_TO_TEXT(SIGSTATE);
205 STATUS_TO_TEXT(WRPROTECT);
206 STATUS_TO_TEXT(CARD_REMOVE_A);
207 STATUS_TO_TEXT(CARD_INSERT_A);
208 STATUS_TO_TEXT(SIGSTATE_A);
209 STATUS_TO_TEXT(CMD_IDX_ERR);
210 STATUS_TO_TEXT(STOPBIT_ERR);
211 STATUS_TO_TEXT(ILL_FUNC);
212 STATUS_TO_TEXT(CMD_BUSY);
213 STATUS_TO_TEXT(CMDRESPEND);
214 STATUS_TO_TEXT(DATAEND);
215 STATUS_TO_TEXT(CRCFAIL);
216 STATUS_TO_TEXT(DATATIMEOUT);
217 STATUS_TO_TEXT(CMDTIMEOUT);
218 STATUS_TO_TEXT(RXOVERFLOW);
219 STATUS_TO_TEXT(TXUNDERRUN);
220 STATUS_TO_TEXT(RXRDY);
221 STATUS_TO_TEXT(TXRQ);
222 STATUS_TO_TEXT(ILL_ACCESS);
223 printk("\n");
224}
225 136
226#else
227#define pr_debug_status(s) do { } while (0)
228#endif 137#endif