diff options
Diffstat (limited to 'drivers/mmc/host/sh_mmcif.c')
-rw-r--r-- | drivers/mmc/host/sh_mmcif.c | 19 |
1 files changed, 6 insertions, 13 deletions
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 75a485448796..724b35e85a26 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c | |||
@@ -286,7 +286,7 @@ static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host) | |||
286 | DMA_FROM_DEVICE); | 286 | DMA_FROM_DEVICE); |
287 | if (ret > 0) { | 287 | if (ret > 0) { |
288 | host->dma_active = true; | 288 | host->dma_active = true; |
289 | desc = chan->device->device_prep_slave_sg(chan, sg, ret, | 289 | desc = dmaengine_prep_slave_sg(chan, sg, ret, |
290 | DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | 290 | DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
291 | } | 291 | } |
292 | 292 | ||
@@ -335,7 +335,7 @@ static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host) | |||
335 | DMA_TO_DEVICE); | 335 | DMA_TO_DEVICE); |
336 | if (ret > 0) { | 336 | if (ret > 0) { |
337 | host->dma_active = true; | 337 | host->dma_active = true; |
338 | desc = chan->device->device_prep_slave_sg(chan, sg, ret, | 338 | desc = dmaengine_prep_slave_sg(chan, sg, ret, |
339 | DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | 339 | DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
340 | } | 340 | } |
341 | 341 | ||
@@ -454,7 +454,8 @@ static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk) | |||
454 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK); | 454 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK); |
455 | else | 455 | else |
456 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & | 456 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & |
457 | ((fls(host->clk / clk) - 1) << 16)); | 457 | ((fls(DIV_ROUND_UP(host->clk, |
458 | clk) - 1) - 1) << 16)); | ||
458 | 459 | ||
459 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); | 460 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); |
460 | } | 461 | } |
@@ -746,7 +747,6 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host, | |||
746 | case MMC_SET_WRITE_PROT: | 747 | case MMC_SET_WRITE_PROT: |
747 | case MMC_CLR_WRITE_PROT: | 748 | case MMC_CLR_WRITE_PROT: |
748 | case MMC_ERASE: | 749 | case MMC_ERASE: |
749 | case MMC_GEN_CMD: | ||
750 | tmp |= CMD_SET_RBSY; | 750 | tmp |= CMD_SET_RBSY; |
751 | break; | 751 | break; |
752 | } | 752 | } |
@@ -829,7 +829,6 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host, | |||
829 | case MMC_SET_WRITE_PROT: | 829 | case MMC_SET_WRITE_PROT: |
830 | case MMC_CLR_WRITE_PROT: | 830 | case MMC_CLR_WRITE_PROT: |
831 | case MMC_ERASE: | 831 | case MMC_ERASE: |
832 | case MMC_GEN_CMD: | ||
833 | mask = MASK_START_CMD | MASK_MRBSYE; | 832 | mask = MASK_START_CMD | MASK_MRBSYE; |
834 | break; | 833 | break; |
835 | default: | 834 | default: |
@@ -1299,14 +1298,8 @@ static int __devinit sh_mmcif_probe(struct platform_device *pdev) | |||
1299 | spin_lock_init(&host->lock); | 1298 | spin_lock_init(&host->lock); |
1300 | 1299 | ||
1301 | mmc->ops = &sh_mmcif_ops; | 1300 | mmc->ops = &sh_mmcif_ops; |
1302 | mmc->f_max = host->clk; | 1301 | mmc->f_max = host->clk / 2; |
1303 | /* close to 400KHz */ | 1302 | mmc->f_min = host->clk / 512; |
1304 | if (mmc->f_max < 51200000) | ||
1305 | mmc->f_min = mmc->f_max / 128; | ||
1306 | else if (mmc->f_max < 102400000) | ||
1307 | mmc->f_min = mmc->f_max / 256; | ||
1308 | else | ||
1309 | mmc->f_min = mmc->f_max / 512; | ||
1310 | if (pd->ocr) | 1303 | if (pd->ocr) |
1311 | mmc->ocr_avail = pd->ocr; | 1304 | mmc->ocr_avail = pd->ocr; |
1312 | mmc->caps = MMC_CAP_MMC_HIGHSPEED; | 1305 | mmc->caps = MMC_CAP_MMC_HIGHSPEED; |