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path: root/drivers/mmc/host/sdhci-esdhc-imx.c
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Diffstat (limited to 'drivers/mmc/host/sdhci-esdhc-imx.c')
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c86
1 files changed, 79 insertions, 7 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 3b5248567973..a19967d0bfc4 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -16,14 +16,40 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/slab.h>
19#include <linux/mmc/host.h> 20#include <linux/mmc/host.h>
20#include <linux/mmc/sdhci-pltfm.h> 21#include <linux/mmc/sdhci-pltfm.h>
22#include <linux/mmc/mmc.h>
23#include <linux/mmc/sdio.h>
21#include <mach/hardware.h> 24#include <mach/hardware.h>
22#include <mach/esdhc.h> 25#include <mach/esdhc.h>
23#include "sdhci.h" 26#include "sdhci.h"
24#include "sdhci-pltfm.h" 27#include "sdhci-pltfm.h"
25#include "sdhci-esdhc.h" 28#include "sdhci-esdhc.h"
26 29
30/* VENDOR SPEC register */
31#define SDHCI_VENDOR_SPEC 0xC0
32#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002
33
34#define ESDHC_FLAG_GPIO_FOR_CD_WP (1 << 0)
35/*
36 * The CMDTYPE of the CMD register (offset 0xE) should be set to
37 * "11" when the STOP CMD12 is issued on imx53 to abort one
38 * open ended multi-blk IO. Otherwise the TC INT wouldn't
39 * be generated.
40 * In exact block transfer, the controller doesn't complete the
41 * operations automatically as required at the end of the
42 * transfer and remains on hold if the abort command is not sent.
43 * As a result, the TC flag is not asserted and SW received timeout
44 * exeception. Bit1 of Vendor Spec registor is used to fix it.
45 */
46#define ESDHC_FLAG_MULTIBLK_NO_INT (1 << 1)
47
48struct pltfm_imx_data {
49 int flags;
50 u32 scratchpad;
51};
52
27static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg) 53static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
28{ 54{
29 void __iomem *base = host->ioaddr + (reg & ~0x3); 55 void __iomem *base = host->ioaddr + (reg & ~0x3);
@@ -34,10 +60,14 @@ static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, i
34 60
35static u32 esdhc_readl_le(struct sdhci_host *host, int reg) 61static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
36{ 62{
63 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
64 struct pltfm_imx_data *imx_data = pltfm_host->priv;
65
37 /* fake CARD_PRESENT flag on mx25/35 */ 66 /* fake CARD_PRESENT flag on mx25/35 */
38 u32 val = readl(host->ioaddr + reg); 67 u32 val = readl(host->ioaddr + reg);
39 68
40 if (unlikely(reg == SDHCI_PRESENT_STATE)) { 69 if (unlikely((reg == SDHCI_PRESENT_STATE)
70 && (imx_data->flags & ESDHC_FLAG_GPIO_FOR_CD_WP))) {
41 struct esdhc_platform_data *boarddata = 71 struct esdhc_platform_data *boarddata =
42 host->mmc->parent->platform_data; 72 host->mmc->parent->platform_data;
43 73
@@ -55,13 +85,26 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
55 85
56static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) 86static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
57{ 87{
58 if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) 88 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
89 struct pltfm_imx_data *imx_data = pltfm_host->priv;
90
91 if (unlikely((reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)
92 && (imx_data->flags & ESDHC_FLAG_GPIO_FOR_CD_WP)))
59 /* 93 /*
60 * these interrupts won't work with a custom card_detect gpio 94 * these interrupts won't work with a custom card_detect gpio
61 * (only applied to mx25/35) 95 * (only applied to mx25/35)
62 */ 96 */
63 val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); 97 val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
64 98
99 if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
100 && (reg == SDHCI_INT_STATUS)
101 && (val & SDHCI_INT_DATA_END))) {
102 u32 v;
103 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
104 v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
105 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
106 }
107
65 writel(val, host->ioaddr + reg); 108 writel(val, host->ioaddr + reg);
66} 109}
67 110
@@ -76,6 +119,7 @@ static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
76static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) 119static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
77{ 120{
78 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 121 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
122 struct pltfm_imx_data *imx_data = pltfm_host->priv;
79 123
80 switch (reg) { 124 switch (reg) {
81 case SDHCI_TRANSFER_MODE: 125 case SDHCI_TRANSFER_MODE:
@@ -83,10 +127,22 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
83 * Postpone this write, we must do it together with a 127 * Postpone this write, we must do it together with a
84 * command write that is down below. 128 * command write that is down below.
85 */ 129 */
86 pltfm_host->scratchpad = val; 130 if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
131 && (host->cmd->opcode == SD_IO_RW_EXTENDED)
132 && (host->cmd->data->blocks > 1)
133 && (host->cmd->data->flags & MMC_DATA_READ)) {
134 u32 v;
135 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
136 v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
137 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
138 }
139 imx_data->scratchpad = val;
87 return; 140 return;
88 case SDHCI_COMMAND: 141 case SDHCI_COMMAND:
89 writel(val << 16 | pltfm_host->scratchpad, 142 if ((host->cmd->opcode == MMC_STOP_TRANSMISSION)
143 && (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
144 val |= SDHCI_CMD_ABORTCMD;
145 writel(val << 16 | imx_data->scratchpad,
90 host->ioaddr + SDHCI_TRANSFER_MODE); 146 host->ioaddr + SDHCI_TRANSFER_MODE);
91 return; 147 return;
92 case SDHCI_BLOCK_SIZE: 148 case SDHCI_BLOCK_SIZE:
@@ -146,7 +202,9 @@ static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
146} 202}
147 203
148static struct sdhci_ops sdhci_esdhc_ops = { 204static struct sdhci_ops sdhci_esdhc_ops = {
205 .read_l = esdhc_readl_le,
149 .read_w = esdhc_readw_le, 206 .read_w = esdhc_readw_le,
207 .write_l = esdhc_writel_le,
150 .write_w = esdhc_writew_le, 208 .write_w = esdhc_writew_le,
151 .write_b = esdhc_writeb_le, 209 .write_b = esdhc_writeb_le,
152 .set_clock = esdhc_set_clock, 210 .set_clock = esdhc_set_clock,
@@ -168,6 +226,7 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
168 struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data; 226 struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
169 struct clk *clk; 227 struct clk *clk;
170 int err; 228 int err;
229 struct pltfm_imx_data *imx_data;
171 230
172 clk = clk_get(mmc_dev(host->mmc), NULL); 231 clk = clk_get(mmc_dev(host->mmc), NULL);
173 if (IS_ERR(clk)) { 232 if (IS_ERR(clk)) {
@@ -177,7 +236,15 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
177 clk_enable(clk); 236 clk_enable(clk);
178 pltfm_host->clk = clk; 237 pltfm_host->clk = clk;
179 238
180 if (cpu_is_mx35() || cpu_is_mx51()) 239 imx_data = kzalloc(sizeof(struct pltfm_imx_data), GFP_KERNEL);
240 if (!imx_data) {
241 clk_disable(pltfm_host->clk);
242 clk_put(pltfm_host->clk);
243 return -ENOMEM;
244 }
245 pltfm_host->priv = imx_data;
246
247 if (!cpu_is_mx25())
181 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; 248 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
182 249
183 if (cpu_is_mx25() || cpu_is_mx35()) { 250 if (cpu_is_mx25() || cpu_is_mx35()) {
@@ -187,6 +254,9 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
187 sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro; 254 sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro;
188 } 255 }
189 256
257 if (!(cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx51()))
258 imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT;
259
190 if (boarddata) { 260 if (boarddata) {
191 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP"); 261 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
192 if (err) { 262 if (err) {
@@ -214,8 +284,7 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
214 goto no_card_detect_irq; 284 goto no_card_detect_irq;
215 } 285 }
216 286
217 sdhci_esdhc_ops.write_l = esdhc_writel_le; 287 imx_data->flags |= ESDHC_FLAG_GPIO_FOR_CD_WP;
218 sdhci_esdhc_ops.read_l = esdhc_readl_le;
219 /* Now we have a working card_detect again */ 288 /* Now we have a working card_detect again */
220 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; 289 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
221 } 290 }
@@ -227,6 +296,7 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
227 no_card_detect_pin: 296 no_card_detect_pin:
228 boarddata->cd_gpio = err; 297 boarddata->cd_gpio = err;
229 not_supported: 298 not_supported:
299 kfree(imx_data);
230 return 0; 300 return 0;
231} 301}
232 302
@@ -234,6 +304,7 @@ static void esdhc_pltfm_exit(struct sdhci_host *host)
234{ 304{
235 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 305 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
236 struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data; 306 struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
307 struct pltfm_imx_data *imx_data = pltfm_host->priv;
237 308
238 if (boarddata && gpio_is_valid(boarddata->wp_gpio)) 309 if (boarddata && gpio_is_valid(boarddata->wp_gpio))
239 gpio_free(boarddata->wp_gpio); 310 gpio_free(boarddata->wp_gpio);
@@ -247,6 +318,7 @@ static void esdhc_pltfm_exit(struct sdhci_host *host)
247 318
248 clk_disable(pltfm_host->clk); 319 clk_disable(pltfm_host->clk);
249 clk_put(pltfm_host->clk); 320 clk_put(pltfm_host->clk);
321 kfree(imx_data);
250} 322}
251 323
252struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = { 324struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {