diff options
Diffstat (limited to 'drivers/mmc/host/pxamci.c')
-rw-r--r-- | drivers/mmc/host/pxamci.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 3c5483b75da4..9702ad3774cf 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c | |||
@@ -180,7 +180,15 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data) | |||
180 | else | 180 | else |
181 | DALGN &= ~(1 << host->dma); | 181 | DALGN &= ~(1 << host->dma); |
182 | DDADR(host->dma) = host->sg_dma; | 182 | DDADR(host->dma) = host->sg_dma; |
183 | DCSR(host->dma) = DCSR_RUN; | 183 | |
184 | /* | ||
185 | * workaround for erratum #91: | ||
186 | * only start DMA now if we are doing a read, | ||
187 | * otherwise we wait until CMD/RESP has finished | ||
188 | * before starting DMA. | ||
189 | */ | ||
190 | if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ) | ||
191 | DCSR(host->dma) = DCSR_RUN; | ||
184 | } | 192 | } |
185 | 193 | ||
186 | static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat) | 194 | static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat) |
@@ -251,23 +259,28 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat) | |||
251 | if (stat & STAT_TIME_OUT_RESPONSE) { | 259 | if (stat & STAT_TIME_OUT_RESPONSE) { |
252 | cmd->error = -ETIMEDOUT; | 260 | cmd->error = -ETIMEDOUT; |
253 | } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) { | 261 | } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) { |
254 | #ifdef CONFIG_PXA27x | ||
255 | /* | 262 | /* |
256 | * workaround for erratum #42: | 263 | * workaround for erratum #42: |
257 | * Intel PXA27x Family Processor Specification Update Rev 001 | 264 | * Intel PXA27x Family Processor Specification Update Rev 001 |
258 | * A bogus CRC error can appear if the msb of a 136 bit | 265 | * A bogus CRC error can appear if the msb of a 136 bit |
259 | * response is a one. | 266 | * response is a one. |
260 | */ | 267 | */ |
261 | if (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000) { | 268 | if (cpu_is_pxa27x() && |
269 | (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000)) | ||
262 | pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode); | 270 | pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode); |
263 | } else | 271 | else |
264 | #endif | 272 | cmd->error = -EILSEQ; |
265 | cmd->error = -EILSEQ; | ||
266 | } | 273 | } |
267 | 274 | ||
268 | pxamci_disable_irq(host, END_CMD_RES); | 275 | pxamci_disable_irq(host, END_CMD_RES); |
269 | if (host->data && !cmd->error) { | 276 | if (host->data && !cmd->error) { |
270 | pxamci_enable_irq(host, DATA_TRAN_DONE); | 277 | pxamci_enable_irq(host, DATA_TRAN_DONE); |
278 | /* | ||
279 | * workaround for erratum #91, if doing write | ||
280 | * enable DMA late | ||
281 | */ | ||
282 | if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE) | ||
283 | DCSR(host->dma) = DCSR_RUN; | ||
271 | } else { | 284 | } else { |
272 | pxamci_finish_request(host, host->mrq); | 285 | pxamci_finish_request(host, host->mrq); |
273 | } | 286 | } |