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path: root/drivers/mmc/host/dw_mmc.h
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Diffstat (limited to 'drivers/mmc/host/dw_mmc.h')
-rw-r--r--drivers/mmc/host/dw_mmc.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index b8051d049fb7..f45ab91de339 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -169,6 +169,16 @@
169#define SDMMC_CTRL_ALL_RESET_FLAGS \ 169#define SDMMC_CTRL_ALL_RESET_FLAGS \
170 (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET) 170 (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET)
171 171
172/* FIFO register access macros. These should not change the data endian-ness
173 * as they are written to memory to be dealt with by the upper layers */
174#define mci_fifo_readw(__reg) __raw_readw(__reg)
175#define mci_fifo_readl(__reg) __raw_readl(__reg)
176#define mci_fifo_readq(__reg) __raw_readq(__reg)
177
178#define mci_fifo_writew(__value, __reg) __raw_writew(__reg, __value)
179#define mci_fifo_writel(__value, __reg) __raw_writel(__reg, __value)
180#define mci_fifo_writeq(__value, __reg) __raw_writeq(__reg, __value)
181
172/* Register access macros */ 182/* Register access macros */
173#define mci_readl(dev, reg) \ 183#define mci_readl(dev, reg) \
174 readl_relaxed((dev)->regs + SDMMC_##reg) 184 readl_relaxed((dev)->regs + SDMMC_##reg)
@@ -200,6 +210,10 @@
200 (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg)) 210 (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg))
201#define mci_writeq(dev, reg, value) \ 211#define mci_writeq(dev, reg, value) \
202 (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg) = (value)) 212 (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg) = (value))
213
214#define __raw_writeq(__value, __reg) \
215 (*(volatile u64 __force *)(__reg) = (__value))
216#define __raw_readq(__reg) (*(volatile u64 __force *)(__reg))
203#endif 217#endif
204 218
205extern int dw_mci_probe(struct dw_mci *host); 219extern int dw_mci_probe(struct dw_mci *host);