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path: root/drivers/mmc/host/atmel-mci.c
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Diffstat (limited to 'drivers/mmc/host/atmel-mci.c')
-rw-r--r--drivers/mmc/host/atmel-mci.c823
1 files changed, 558 insertions, 265 deletions
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index fa8cae1d7005..a7ee50271465 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -30,6 +30,7 @@
30 30
31#include <mach/atmel-mci.h> 31#include <mach/atmel-mci.h>
32#include <linux/atmel-mci.h> 32#include <linux/atmel-mci.h>
33#include <linux/atmel_pdc.h>
33 34
34#include <asm/io.h> 35#include <asm/io.h>
35#include <asm/unaligned.h> 36#include <asm/unaligned.h>
@@ -39,7 +40,7 @@
39 40
40#include "atmel-mci-regs.h" 41#include "atmel-mci-regs.h"
41 42
42#define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE) 43#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
43#define ATMCI_DMA_THRESHOLD 16 44#define ATMCI_DMA_THRESHOLD 16
44 45
45enum { 46enum {
@@ -58,18 +59,35 @@ enum atmel_mci_state {
58 STATE_DATA_ERROR, 59 STATE_DATA_ERROR,
59}; 60};
60 61
62enum atmci_xfer_dir {
63 XFER_RECEIVE = 0,
64 XFER_TRANSMIT,
65};
66
67enum atmci_pdc_buf {
68 PDC_FIRST_BUF = 0,
69 PDC_SECOND_BUF,
70};
71
72struct atmel_mci_caps {
73 bool has_dma;
74 bool has_pdc;
75 bool has_cfg_reg;
76 bool has_cstor_reg;
77 bool has_highspeed;
78 bool has_rwproof;
79};
80
61struct atmel_mci_dma { 81struct atmel_mci_dma {
62#ifdef CONFIG_MMC_ATMELMCI_DMA
63 struct dma_chan *chan; 82 struct dma_chan *chan;
64 struct dma_async_tx_descriptor *data_desc; 83 struct dma_async_tx_descriptor *data_desc;
65#endif
66}; 84};
67 85
68/** 86/**
69 * struct atmel_mci - MMC controller state shared between all slots 87 * struct atmel_mci - MMC controller state shared between all slots
70 * @lock: Spinlock protecting the queue and associated data. 88 * @lock: Spinlock protecting the queue and associated data.
71 * @regs: Pointer to MMIO registers. 89 * @regs: Pointer to MMIO registers.
72 * @sg: Scatterlist entry currently being processed by PIO code, if any. 90 * @sg: Scatterlist entry currently being processed by PIO or PDC code.
73 * @pio_offset: Offset into the current scatterlist entry. 91 * @pio_offset: Offset into the current scatterlist entry.
74 * @cur_slot: The slot which is currently using the controller. 92 * @cur_slot: The slot which is currently using the controller.
75 * @mrq: The request currently being processed on @cur_slot, 93 * @mrq: The request currently being processed on @cur_slot,
@@ -77,6 +95,7 @@ struct atmel_mci_dma {
77 * @cmd: The command currently being sent to the card, or NULL. 95 * @cmd: The command currently being sent to the card, or NULL.
78 * @data: The data currently being transferred, or NULL if no data 96 * @data: The data currently being transferred, or NULL if no data
79 * transfer is in progress. 97 * transfer is in progress.
98 * @data_size: just data->blocks * data->blksz.
80 * @dma: DMA client state. 99 * @dma: DMA client state.
81 * @data_chan: DMA channel being used for the current data transfer. 100 * @data_chan: DMA channel being used for the current data transfer.
82 * @cmd_status: Snapshot of SR taken upon completion of the current 101 * @cmd_status: Snapshot of SR taken upon completion of the current
@@ -103,6 +122,13 @@ struct atmel_mci_dma {
103 * @mck: The peripheral bus clock hooked up to the MMC controller. 122 * @mck: The peripheral bus clock hooked up to the MMC controller.
104 * @pdev: Platform device associated with the MMC controller. 123 * @pdev: Platform device associated with the MMC controller.
105 * @slot: Slots sharing this MMC controller. 124 * @slot: Slots sharing this MMC controller.
125 * @caps: MCI capabilities depending on MCI version.
126 * @prepare_data: function to setup MCI before data transfer which
127 * depends on MCI capabilities.
128 * @submit_data: function to start data transfer which depends on MCI
129 * capabilities.
130 * @stop_transfer: function to stop data transfer which depends on MCI
131 * capabilities.
106 * 132 *
107 * Locking 133 * Locking
108 * ======= 134 * =======
@@ -143,6 +169,7 @@ struct atmel_mci {
143 struct mmc_request *mrq; 169 struct mmc_request *mrq;
144 struct mmc_command *cmd; 170 struct mmc_command *cmd;
145 struct mmc_data *data; 171 struct mmc_data *data;
172 unsigned int data_size;
146 173
147 struct atmel_mci_dma dma; 174 struct atmel_mci_dma dma;
148 struct dma_chan *data_chan; 175 struct dma_chan *data_chan;
@@ -166,7 +193,13 @@ struct atmel_mci {
166 struct clk *mck; 193 struct clk *mck;
167 struct platform_device *pdev; 194 struct platform_device *pdev;
168 195
169 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS]; 196 struct atmel_mci_slot *slot[ATMCI_MAX_NR_SLOTS];
197
198 struct atmel_mci_caps caps;
199
200 u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data);
201 void (*submit_data)(struct atmel_mci *host, struct mmc_data *data);
202 void (*stop_transfer)(struct atmel_mci *host);
170}; 203};
171 204
172/** 205/**
@@ -220,31 +253,6 @@ struct atmel_mci_slot {
220 set_bit(event, &host->pending_events) 253 set_bit(event, &host->pending_events)
221 254
222/* 255/*
223 * Enable or disable features/registers based on
224 * whether the processor supports them
225 */
226static bool mci_has_rwproof(void)
227{
228 if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
229 return false;
230 else
231 return true;
232}
233
234/*
235 * The new MCI2 module isn't 100% compatible with the old MCI module,
236 * and it has a few nice features which we want to use...
237 */
238static inline bool atmci_is_mci2(void)
239{
240 if (cpu_is_at91sam9g45())
241 return true;
242
243 return false;
244}
245
246
247/*
248 * The debugfs stuff below is mostly optimized away when 256 * The debugfs stuff below is mostly optimized away when
249 * CONFIG_DEBUG_FS is not set. 257 * CONFIG_DEBUG_FS is not set.
250 */ 258 */
@@ -352,7 +360,7 @@ static int atmci_regs_show(struct seq_file *s, void *v)
352 struct atmel_mci *host = s->private; 360 struct atmel_mci *host = s->private;
353 u32 *buf; 361 u32 *buf;
354 362
355 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL); 363 buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL);
356 if (!buf) 364 if (!buf)
357 return -ENOMEM; 365 return -ENOMEM;
358 366
@@ -363,47 +371,50 @@ static int atmci_regs_show(struct seq_file *s, void *v)
363 */ 371 */
364 spin_lock_bh(&host->lock); 372 spin_lock_bh(&host->lock);
365 clk_enable(host->mck); 373 clk_enable(host->mck);
366 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE); 374 memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE);
367 clk_disable(host->mck); 375 clk_disable(host->mck);
368 spin_unlock_bh(&host->lock); 376 spin_unlock_bh(&host->lock);
369 377
370 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n", 378 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
371 buf[MCI_MR / 4], 379 buf[ATMCI_MR / 4],
372 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "", 380 buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "",
373 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "", 381 buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : "",
374 buf[MCI_MR / 4] & 0xff); 382 buf[ATMCI_MR / 4] & 0xff);
375 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]); 383 seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]);
376 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]); 384 seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]);
377 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]); 385 seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]);
378 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n", 386 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
379 buf[MCI_BLKR / 4], 387 buf[ATMCI_BLKR / 4],
380 buf[MCI_BLKR / 4] & 0xffff, 388 buf[ATMCI_BLKR / 4] & 0xffff,
381 (buf[MCI_BLKR / 4] >> 16) & 0xffff); 389 (buf[ATMCI_BLKR / 4] >> 16) & 0xffff);
382 if (atmci_is_mci2()) 390 if (host->caps.has_cstor_reg)
383 seq_printf(s, "CSTOR:\t0x%08x\n", buf[MCI_CSTOR / 4]); 391 seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]);
384 392
385 /* Don't read RSPR and RDR; it will consume the data there */ 393 /* Don't read RSPR and RDR; it will consume the data there */
386 394
387 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]); 395 atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]);
388 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]); 396 atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]);
389 397
390 if (atmci_is_mci2()) { 398 if (host->caps.has_dma) {
391 u32 val; 399 u32 val;
392 400
393 val = buf[MCI_DMA / 4]; 401 val = buf[ATMCI_DMA / 4];
394 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n", 402 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
395 val, val & 3, 403 val, val & 3,
396 ((val >> 4) & 3) ? 404 ((val >> 4) & 3) ?
397 1 << (((val >> 4) & 3) + 1) : 1, 405 1 << (((val >> 4) & 3) + 1) : 1,
398 val & MCI_DMAEN ? " DMAEN" : ""); 406 val & ATMCI_DMAEN ? " DMAEN" : "");
407 }
408 if (host->caps.has_cfg_reg) {
409 u32 val;
399 410
400 val = buf[MCI_CFG / 4]; 411 val = buf[ATMCI_CFG / 4];
401 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n", 412 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
402 val, 413 val,
403 val & MCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "", 414 val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
404 val & MCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "", 415 val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
405 val & MCI_CFG_HSMODE ? " HSMODE" : "", 416 val & ATMCI_CFG_HSMODE ? " HSMODE" : "",
406 val & MCI_CFG_LSYNC ? " LSYNC" : ""); 417 val & ATMCI_CFG_LSYNC ? " LSYNC" : "");
407 } 418 }
408 419
409 kfree(buf); 420 kfree(buf);
@@ -466,7 +477,7 @@ err:
466 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 477 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
467} 478}
468 479
469static inline unsigned int ns_to_clocks(struct atmel_mci *host, 480static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,
470 unsigned int ns) 481 unsigned int ns)
471{ 482{
472 return (ns * (host->bus_hz / 1000000) + 999) / 1000; 483 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
@@ -482,7 +493,8 @@ static void atmci_set_timeout(struct atmel_mci *host,
482 unsigned dtocyc; 493 unsigned dtocyc;
483 unsigned dtomul; 494 unsigned dtomul;
484 495
485 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; 496 timeout = atmci_ns_to_clocks(host, data->timeout_ns)
497 + data->timeout_clks;
486 498
487 for (dtomul = 0; dtomul < 8; dtomul++) { 499 for (dtomul = 0; dtomul < 8; dtomul++) {
488 unsigned shift = dtomul_to_shift[dtomul]; 500 unsigned shift = dtomul_to_shift[dtomul];
@@ -498,7 +510,7 @@ static void atmci_set_timeout(struct atmel_mci *host,
498 510
499 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n", 511 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
500 dtocyc << dtomul_to_shift[dtomul]); 512 dtocyc << dtomul_to_shift[dtomul]);
501 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc))); 513 atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc)));
502} 514}
503 515
504/* 516/*
@@ -512,13 +524,13 @@ static u32 atmci_prepare_command(struct mmc_host *mmc,
512 524
513 cmd->error = -EINPROGRESS; 525 cmd->error = -EINPROGRESS;
514 526
515 cmdr = MCI_CMDR_CMDNB(cmd->opcode); 527 cmdr = ATMCI_CMDR_CMDNB(cmd->opcode);
516 528
517 if (cmd->flags & MMC_RSP_PRESENT) { 529 if (cmd->flags & MMC_RSP_PRESENT) {
518 if (cmd->flags & MMC_RSP_136) 530 if (cmd->flags & MMC_RSP_136)
519 cmdr |= MCI_CMDR_RSPTYP_136BIT; 531 cmdr |= ATMCI_CMDR_RSPTYP_136BIT;
520 else 532 else
521 cmdr |= MCI_CMDR_RSPTYP_48BIT; 533 cmdr |= ATMCI_CMDR_RSPTYP_48BIT;
522 } 534 }
523 535
524 /* 536 /*
@@ -526,34 +538,34 @@ static u32 atmci_prepare_command(struct mmc_host *mmc,
526 * it's too difficult to determine whether this is an ACMD or 538 * it's too difficult to determine whether this is an ACMD or
527 * not. Better make it 64. 539 * not. Better make it 64.
528 */ 540 */
529 cmdr |= MCI_CMDR_MAXLAT_64CYC; 541 cmdr |= ATMCI_CMDR_MAXLAT_64CYC;
530 542
531 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) 543 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
532 cmdr |= MCI_CMDR_OPDCMD; 544 cmdr |= ATMCI_CMDR_OPDCMD;
533 545
534 data = cmd->data; 546 data = cmd->data;
535 if (data) { 547 if (data) {
536 cmdr |= MCI_CMDR_START_XFER; 548 cmdr |= ATMCI_CMDR_START_XFER;
537 549
538 if (cmd->opcode == SD_IO_RW_EXTENDED) { 550 if (cmd->opcode == SD_IO_RW_EXTENDED) {
539 cmdr |= MCI_CMDR_SDIO_BLOCK; 551 cmdr |= ATMCI_CMDR_SDIO_BLOCK;
540 } else { 552 } else {
541 if (data->flags & MMC_DATA_STREAM) 553 if (data->flags & MMC_DATA_STREAM)
542 cmdr |= MCI_CMDR_STREAM; 554 cmdr |= ATMCI_CMDR_STREAM;
543 else if (data->blocks > 1) 555 else if (data->blocks > 1)
544 cmdr |= MCI_CMDR_MULTI_BLOCK; 556 cmdr |= ATMCI_CMDR_MULTI_BLOCK;
545 else 557 else
546 cmdr |= MCI_CMDR_BLOCK; 558 cmdr |= ATMCI_CMDR_BLOCK;
547 } 559 }
548 560
549 if (data->flags & MMC_DATA_READ) 561 if (data->flags & MMC_DATA_READ)
550 cmdr |= MCI_CMDR_TRDIR_READ; 562 cmdr |= ATMCI_CMDR_TRDIR_READ;
551 } 563 }
552 564
553 return cmdr; 565 return cmdr;
554} 566}
555 567
556static void atmci_start_command(struct atmel_mci *host, 568static void atmci_send_command(struct atmel_mci *host,
557 struct mmc_command *cmd, u32 cmd_flags) 569 struct mmc_command *cmd, u32 cmd_flags)
558{ 570{
559 WARN_ON(host->cmd); 571 WARN_ON(host->cmd);
@@ -563,43 +575,119 @@ static void atmci_start_command(struct atmel_mci *host,
563 "start command: ARGR=0x%08x CMDR=0x%08x\n", 575 "start command: ARGR=0x%08x CMDR=0x%08x\n",
564 cmd->arg, cmd_flags); 576 cmd->arg, cmd_flags);
565 577
566 mci_writel(host, ARGR, cmd->arg); 578 atmci_writel(host, ATMCI_ARGR, cmd->arg);
567 mci_writel(host, CMDR, cmd_flags); 579 atmci_writel(host, ATMCI_CMDR, cmd_flags);
568} 580}
569 581
570static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data) 582static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
571{ 583{
572 atmci_start_command(host, data->stop, host->stop_cmdr); 584 atmci_send_command(host, data->stop, host->stop_cmdr);
573 mci_writel(host, IER, MCI_CMDRDY); 585 atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);
574} 586}
575 587
576#ifdef CONFIG_MMC_ATMELMCI_DMA 588/*
577static void atmci_dma_cleanup(struct atmel_mci *host) 589 * Configure given PDC buffer taking care of alignement issues.
590 * Update host->data_size and host->sg.
591 */
592static void atmci_pdc_set_single_buf(struct atmel_mci *host,
593 enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb)
594{
595 u32 pointer_reg, counter_reg;
596
597 if (dir == XFER_RECEIVE) {
598 pointer_reg = ATMEL_PDC_RPR;
599 counter_reg = ATMEL_PDC_RCR;
600 } else {
601 pointer_reg = ATMEL_PDC_TPR;
602 counter_reg = ATMEL_PDC_TCR;
603 }
604
605 if (buf_nb == PDC_SECOND_BUF) {
606 pointer_reg += ATMEL_PDC_SCND_BUF_OFF;
607 counter_reg += ATMEL_PDC_SCND_BUF_OFF;
608 }
609
610 atmci_writel(host, pointer_reg, sg_dma_address(host->sg));
611 if (host->data_size <= sg_dma_len(host->sg)) {
612 if (host->data_size & 0x3) {
613 /* If size is different from modulo 4, transfer bytes */
614 atmci_writel(host, counter_reg, host->data_size);
615 atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE);
616 } else {
617 /* Else transfer 32-bits words */
618 atmci_writel(host, counter_reg, host->data_size / 4);
619 }
620 host->data_size = 0;
621 } else {
622 /* We assume the size of a page is 32-bits aligned */
623 atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4);
624 host->data_size -= sg_dma_len(host->sg);
625 if (host->data_size)
626 host->sg = sg_next(host->sg);
627 }
628}
629
630/*
631 * Configure PDC buffer according to the data size ie configuring one or two
632 * buffers. Don't use this function if you want to configure only the second
633 * buffer. In this case, use atmci_pdc_set_single_buf.
634 */
635static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir)
578{ 636{
579 struct mmc_data *data = host->data; 637 atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF);
638 if (host->data_size)
639 atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF);
640}
641
642/*
643 * Unmap sg lists, called when transfer is finished.
644 */
645static void atmci_pdc_cleanup(struct atmel_mci *host)
646{
647 struct mmc_data *data = host->data;
580 648
581 if (data) 649 if (data)
582 dma_unmap_sg(host->dma.chan->device->dev, 650 dma_unmap_sg(&host->pdev->dev,
583 data->sg, data->sg_len, 651 data->sg, data->sg_len,
584 ((data->flags & MMC_DATA_WRITE) 652 ((data->flags & MMC_DATA_WRITE)
585 ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 653 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
586} 654}
587 655
588static void atmci_stop_dma(struct atmel_mci *host) 656/*
657 * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after
658 * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY
659 * interrupt needed for both transfer directions.
660 */
661static void atmci_pdc_complete(struct atmel_mci *host)
589{ 662{
590 struct dma_chan *chan = host->data_chan; 663 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
664 atmci_pdc_cleanup(host);
591 665
592 if (chan) { 666 /*
593 dmaengine_terminate_all(chan); 667 * If the card was removed, data will be NULL. No point trying
594 atmci_dma_cleanup(host); 668 * to send the stop command or waiting for NBUSY in this case.
595 } else { 669 */
596 /* Data transfer was stopped by the interrupt handler */ 670 if (host->data) {
597 atmci_set_pending(host, EVENT_XFER_COMPLETE); 671 atmci_set_pending(host, EVENT_XFER_COMPLETE);
598 mci_writel(host, IER, MCI_NOTBUSY); 672 tasklet_schedule(&host->tasklet);
673 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
599 } 674 }
600} 675}
601 676
602/* This function is called by the DMA driver from tasklet context. */ 677static void atmci_dma_cleanup(struct atmel_mci *host)
678{
679 struct mmc_data *data = host->data;
680
681 if (data)
682 dma_unmap_sg(host->dma.chan->device->dev,
683 data->sg, data->sg_len,
684 ((data->flags & MMC_DATA_WRITE)
685 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
686}
687
688/*
689 * This function is called by the DMA driver from tasklet context.
690 */
603static void atmci_dma_complete(void *arg) 691static void atmci_dma_complete(void *arg)
604{ 692{
605 struct atmel_mci *host = arg; 693 struct atmel_mci *host = arg;
@@ -607,9 +695,9 @@ static void atmci_dma_complete(void *arg)
607 695
608 dev_vdbg(&host->pdev->dev, "DMA complete\n"); 696 dev_vdbg(&host->pdev->dev, "DMA complete\n");
609 697
610 if (atmci_is_mci2()) 698 if (host->caps.has_dma)
611 /* Disable DMA hardware handshaking on MCI */ 699 /* Disable DMA hardware handshaking on MCI */
612 mci_writel(host, DMA, mci_readl(host, DMA) & ~MCI_DMAEN); 700 atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN);
613 701
614 atmci_dma_cleanup(host); 702 atmci_dma_cleanup(host);
615 703
@@ -641,11 +729,93 @@ static void atmci_dma_complete(void *arg)
641 * completion callback" rule of the dma engine 729 * completion callback" rule of the dma engine
642 * framework. 730 * framework.
643 */ 731 */
644 mci_writel(host, IER, MCI_NOTBUSY); 732 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
645 } 733 }
646} 734}
647 735
648static int 736/*
737 * Returns a mask of interrupt flags to be enabled after the whole
738 * request has been prepared.
739 */
740static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
741{
742 u32 iflags;
743
744 data->error = -EINPROGRESS;
745
746 host->sg = data->sg;
747 host->data = data;
748 host->data_chan = NULL;
749
750 iflags = ATMCI_DATA_ERROR_FLAGS;
751
752 /*
753 * Errata: MMC data write operation with less than 12
754 * bytes is impossible.
755 *
756 * Errata: MCI Transmit Data Register (TDR) FIFO
757 * corruption when length is not multiple of 4.
758 */
759 if (data->blocks * data->blksz < 12
760 || (data->blocks * data->blksz) & 3)
761 host->need_reset = true;
762
763 host->pio_offset = 0;
764 if (data->flags & MMC_DATA_READ)
765 iflags |= ATMCI_RXRDY;
766 else
767 iflags |= ATMCI_TXRDY;
768
769 return iflags;
770}
771
772/*
773 * Set interrupt flags and set block length into the MCI mode register even
774 * if this value is also accessible in the MCI block register. It seems to be
775 * necessary before the High Speed MCI version. It also map sg and configure
776 * PDC registers.
777 */
778static u32
779atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)
780{
781 u32 iflags, tmp;
782 unsigned int sg_len;
783 enum dma_data_direction dir;
784
785 data->error = -EINPROGRESS;
786
787 host->data = data;
788 host->sg = data->sg;
789 iflags = ATMCI_DATA_ERROR_FLAGS;
790
791 /* Enable pdc mode */
792 atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE);
793
794 if (data->flags & MMC_DATA_READ) {
795 dir = DMA_FROM_DEVICE;
796 iflags |= ATMCI_ENDRX | ATMCI_RXBUFF;
797 } else {
798 dir = DMA_TO_DEVICE;
799 iflags |= ATMCI_ENDTX | ATMCI_TXBUFE;
800 }
801
802 /* Set BLKLEN */
803 tmp = atmci_readl(host, ATMCI_MR);
804 tmp &= 0x0000ffff;
805 tmp |= ATMCI_BLKLEN(data->blksz);
806 atmci_writel(host, ATMCI_MR, tmp);
807
808 /* Configure PDC */
809 host->data_size = data->blocks * data->blksz;
810 sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir);
811 if (host->data_size)
812 atmci_pdc_set_both_buf(host,
813 ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT));
814
815 return iflags;
816}
817
818static u32
649atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data) 819atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
650{ 820{
651 struct dma_chan *chan; 821 struct dma_chan *chan;
@@ -654,6 +824,15 @@ atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
654 unsigned int i; 824 unsigned int i;
655 enum dma_data_direction direction; 825 enum dma_data_direction direction;
656 unsigned int sglen; 826 unsigned int sglen;
827 u32 iflags;
828
829 data->error = -EINPROGRESS;
830
831 WARN_ON(host->data);
832 host->sg = NULL;
833 host->data = data;
834
835 iflags = ATMCI_DATA_ERROR_FLAGS;
657 836
658 /* 837 /*
659 * We don't do DMA on "complex" transfers, i.e. with 838 * We don't do DMA on "complex" transfers, i.e. with
@@ -661,13 +840,13 @@ atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
661 * with all the DMA setup overhead for short transfers. 840 * with all the DMA setup overhead for short transfers.
662 */ 841 */
663 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD) 842 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
664 return -EINVAL; 843 return atmci_prepare_data(host, data);
665 if (data->blksz & 3) 844 if (data->blksz & 3)
666 return -EINVAL; 845 return atmci_prepare_data(host, data);
667 846
668 for_each_sg(data->sg, sg, data->sg_len, i) { 847 for_each_sg(data->sg, sg, data->sg_len, i) {
669 if (sg->offset & 3 || sg->length & 3) 848 if (sg->offset & 3 || sg->length & 3)
670 return -EINVAL; 849 return atmci_prepare_data(host, data);
671 } 850 }
672 851
673 /* If we don't have a channel, we can't do DMA */ 852 /* If we don't have a channel, we can't do DMA */
@@ -678,8 +857,8 @@ atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
678 if (!chan) 857 if (!chan)
679 return -ENODEV; 858 return -ENODEV;
680 859
681 if (atmci_is_mci2()) 860 if (host->caps.has_dma)
682 mci_writel(host, DMA, MCI_DMA_CHKSIZE(3) | MCI_DMAEN); 861 atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(3) | ATMCI_DMAEN);
683 862
684 if (data->flags & MMC_DATA_READ) 863 if (data->flags & MMC_DATA_READ)
685 direction = DMA_FROM_DEVICE; 864 direction = DMA_FROM_DEVICE;
@@ -687,7 +866,7 @@ atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
687 direction = DMA_TO_DEVICE; 866 direction = DMA_TO_DEVICE;
688 867
689 sglen = dma_map_sg(chan->device->dev, data->sg, 868 sglen = dma_map_sg(chan->device->dev, data->sg,
690 data->sg_len, direction); 869 data->sg_len, direction);
691 870
692 desc = chan->device->device_prep_slave_sg(chan, 871 desc = chan->device->device_prep_slave_sg(chan,
693 data->sg, sglen, direction, 872 data->sg, sglen, direction,
@@ -699,13 +878,32 @@ atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
699 desc->callback = atmci_dma_complete; 878 desc->callback = atmci_dma_complete;
700 desc->callback_param = host; 879 desc->callback_param = host;
701 880
702 return 0; 881 return iflags;
703unmap_exit: 882unmap_exit:
704 dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction); 883 dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
705 return -ENOMEM; 884 return -ENOMEM;
706} 885}
707 886
708static void atmci_submit_data(struct atmel_mci *host) 887static void
888atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
889{
890 return;
891}
892
893/*
894 * Start PDC according to transfer direction.
895 */
896static void
897atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data)
898{
899 if (data->flags & MMC_DATA_READ)
900 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
901 else
902 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
903}
904
905static void
906atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
709{ 907{
710 struct dma_chan *chan = host->data_chan; 908 struct dma_chan *chan = host->data_chan;
711 struct dma_async_tx_descriptor *desc = host->dma.data_desc; 909 struct dma_async_tx_descriptor *desc = host->dma.data_desc;
@@ -716,64 +914,39 @@ static void atmci_submit_data(struct atmel_mci *host)
716 } 914 }
717} 915}
718 916
719#else /* CONFIG_MMC_ATMELMCI_DMA */ 917static void atmci_stop_transfer(struct atmel_mci *host)
720
721static int atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
722{
723 return -ENOSYS;
724}
725
726static void atmci_submit_data(struct atmel_mci *host) {}
727
728static void atmci_stop_dma(struct atmel_mci *host)
729{ 918{
730 /* Data transfer was stopped by the interrupt handler */
731 atmci_set_pending(host, EVENT_XFER_COMPLETE); 919 atmci_set_pending(host, EVENT_XFER_COMPLETE);
732 mci_writel(host, IER, MCI_NOTBUSY); 920 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
733} 921}
734 922
735#endif /* CONFIG_MMC_ATMELMCI_DMA */
736
737/* 923/*
738 * Returns a mask of interrupt flags to be enabled after the whole 924 * Stop data transfer because error(s) occured.
739 * request has been prepared.
740 */ 925 */
741static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data) 926static void atmci_stop_transfer_pdc(struct atmel_mci *host)
742{ 927{
743 u32 iflags; 928 atmci_set_pending(host, EVENT_XFER_COMPLETE);
744 929 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
745 data->error = -EINPROGRESS; 930}
746
747 WARN_ON(host->data);
748 host->sg = NULL;
749 host->data = data;
750
751 iflags = ATMCI_DATA_ERROR_FLAGS;
752 if (atmci_prepare_data_dma(host, data)) {
753 host->data_chan = NULL;
754 931
755 /* 932static void atmci_stop_transfer_dma(struct atmel_mci *host)
756 * Errata: MMC data write operation with less than 12 933{
757 * bytes is impossible. 934 struct dma_chan *chan = host->data_chan;
758 *
759 * Errata: MCI Transmit Data Register (TDR) FIFO
760 * corruption when length is not multiple of 4.
761 */
762 if (data->blocks * data->blksz < 12
763 || (data->blocks * data->blksz) & 3)
764 host->need_reset = true;
765 935
766 host->sg = data->sg; 936 if (chan) {
767 host->pio_offset = 0; 937 dmaengine_terminate_all(chan);
768 if (data->flags & MMC_DATA_READ) 938 atmci_dma_cleanup(host);
769 iflags |= MCI_RXRDY; 939 } else {
770 else 940 /* Data transfer was stopped by the interrupt handler */
771 iflags |= MCI_TXRDY; 941 atmci_set_pending(host, EVENT_XFER_COMPLETE);
942 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
772 } 943 }
773
774 return iflags;
775} 944}
776 945
946/*
947 * Start a request: prepare data if needed, prepare the command and activate
948 * interrupts.
949 */
777static void atmci_start_request(struct atmel_mci *host, 950static void atmci_start_request(struct atmel_mci *host,
778 struct atmel_mci_slot *slot) 951 struct atmel_mci_slot *slot)
779{ 952{
@@ -792,24 +965,24 @@ static void atmci_start_request(struct atmel_mci *host,
792 host->data_status = 0; 965 host->data_status = 0;
793 966
794 if (host->need_reset) { 967 if (host->need_reset) {
795 mci_writel(host, CR, MCI_CR_SWRST); 968 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
796 mci_writel(host, CR, MCI_CR_MCIEN); 969 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
797 mci_writel(host, MR, host->mode_reg); 970 atmci_writel(host, ATMCI_MR, host->mode_reg);
798 if (atmci_is_mci2()) 971 if (host->caps.has_cfg_reg)
799 mci_writel(host, CFG, host->cfg_reg); 972 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
800 host->need_reset = false; 973 host->need_reset = false;
801 } 974 }
802 mci_writel(host, SDCR, slot->sdc_reg); 975 atmci_writel(host, ATMCI_SDCR, slot->sdc_reg);
803 976
804 iflags = mci_readl(host, IMR); 977 iflags = atmci_readl(host, ATMCI_IMR);
805 if (iflags & ~(MCI_SDIOIRQA | MCI_SDIOIRQB)) 978 if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
806 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n", 979 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
807 iflags); 980 iflags);
808 981
809 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) { 982 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
810 /* Send init sequence (74 clock cycles) */ 983 /* Send init sequence (74 clock cycles) */
811 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT); 984 atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT);
812 while (!(mci_readl(host, SR) & MCI_CMDRDY)) 985 while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY))
813 cpu_relax(); 986 cpu_relax();
814 } 987 }
815 iflags = 0; 988 iflags = 0;
@@ -818,31 +991,31 @@ static void atmci_start_request(struct atmel_mci *host,
818 atmci_set_timeout(host, slot, data); 991 atmci_set_timeout(host, slot, data);
819 992
820 /* Must set block count/size before sending command */ 993 /* Must set block count/size before sending command */
821 mci_writel(host, BLKR, MCI_BCNT(data->blocks) 994 atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks)
822 | MCI_BLKLEN(data->blksz)); 995 | ATMCI_BLKLEN(data->blksz));
823 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n", 996 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
824 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz)); 997 ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz));
825 998
826 iflags |= atmci_prepare_data(host, data); 999 iflags |= host->prepare_data(host, data);
827 } 1000 }
828 1001
829 iflags |= MCI_CMDRDY; 1002 iflags |= ATMCI_CMDRDY;
830 cmd = mrq->cmd; 1003 cmd = mrq->cmd;
831 cmdflags = atmci_prepare_command(slot->mmc, cmd); 1004 cmdflags = atmci_prepare_command(slot->mmc, cmd);
832 atmci_start_command(host, cmd, cmdflags); 1005 atmci_send_command(host, cmd, cmdflags);
833 1006
834 if (data) 1007 if (data)
835 atmci_submit_data(host); 1008 host->submit_data(host, data);
836 1009
837 if (mrq->stop) { 1010 if (mrq->stop) {
838 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop); 1011 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
839 host->stop_cmdr |= MCI_CMDR_STOP_XFER; 1012 host->stop_cmdr |= ATMCI_CMDR_STOP_XFER;
840 if (!(data->flags & MMC_DATA_WRITE)) 1013 if (!(data->flags & MMC_DATA_WRITE))
841 host->stop_cmdr |= MCI_CMDR_TRDIR_READ; 1014 host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ;
842 if (data->flags & MMC_DATA_STREAM) 1015 if (data->flags & MMC_DATA_STREAM)
843 host->stop_cmdr |= MCI_CMDR_STREAM; 1016 host->stop_cmdr |= ATMCI_CMDR_STREAM;
844 else 1017 else
845 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK; 1018 host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK;
846 } 1019 }
847 1020
848 /* 1021 /*
@@ -851,7 +1024,7 @@ static void atmci_start_request(struct atmel_mci *host,
851 * conditions (e.g. command and data complete, but stop not 1024 * conditions (e.g. command and data complete, but stop not
852 * prepared yet.) 1025 * prepared yet.)
853 */ 1026 */
854 mci_writel(host, IER, iflags); 1027 atmci_writel(host, ATMCI_IER, iflags);
855} 1028}
856 1029
857static void atmci_queue_request(struct atmel_mci *host, 1030static void atmci_queue_request(struct atmel_mci *host,
@@ -909,13 +1082,13 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
909 struct atmel_mci *host = slot->host; 1082 struct atmel_mci *host = slot->host;
910 unsigned int i; 1083 unsigned int i;
911 1084
912 slot->sdc_reg &= ~MCI_SDCBUS_MASK; 1085 slot->sdc_reg &= ~ATMCI_SDCBUS_MASK;
913 switch (ios->bus_width) { 1086 switch (ios->bus_width) {
914 case MMC_BUS_WIDTH_1: 1087 case MMC_BUS_WIDTH_1:
915 slot->sdc_reg |= MCI_SDCBUS_1BIT; 1088 slot->sdc_reg |= ATMCI_SDCBUS_1BIT;
916 break; 1089 break;
917 case MMC_BUS_WIDTH_4: 1090 case MMC_BUS_WIDTH_4:
918 slot->sdc_reg |= MCI_SDCBUS_4BIT; 1091 slot->sdc_reg |= ATMCI_SDCBUS_4BIT;
919 break; 1092 break;
920 } 1093 }
921 1094
@@ -926,10 +1099,10 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
926 spin_lock_bh(&host->lock); 1099 spin_lock_bh(&host->lock);
927 if (!host->mode_reg) { 1100 if (!host->mode_reg) {
928 clk_enable(host->mck); 1101 clk_enable(host->mck);
929 mci_writel(host, CR, MCI_CR_SWRST); 1102 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
930 mci_writel(host, CR, MCI_CR_MCIEN); 1103 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
931 if (atmci_is_mci2()) 1104 if (host->caps.has_cfg_reg)
932 mci_writel(host, CFG, host->cfg_reg); 1105 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
933 } 1106 }
934 1107
935 /* 1108 /*
@@ -937,7 +1110,7 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
937 * core ios update when finding the minimum. 1110 * core ios update when finding the minimum.
938 */ 1111 */
939 slot->clock = ios->clock; 1112 slot->clock = ios->clock;
940 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) { 1113 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
941 if (host->slot[i] && host->slot[i]->clock 1114 if (host->slot[i] && host->slot[i]->clock
942 && host->slot[i]->clock < clock_min) 1115 && host->slot[i]->clock < clock_min)
943 clock_min = host->slot[i]->clock; 1116 clock_min = host->slot[i]->clock;
@@ -952,28 +1125,28 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
952 clkdiv = 255; 1125 clkdiv = 255;
953 } 1126 }
954 1127
955 host->mode_reg = MCI_MR_CLKDIV(clkdiv); 1128 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv);
956 1129
957 /* 1130 /*
958 * WRPROOF and RDPROOF prevent overruns/underruns by 1131 * WRPROOF and RDPROOF prevent overruns/underruns by
959 * stopping the clock when the FIFO is full/empty. 1132 * stopping the clock when the FIFO is full/empty.
960 * This state is not expected to last for long. 1133 * This state is not expected to last for long.
961 */ 1134 */
962 if (mci_has_rwproof()) 1135 if (host->caps.has_rwproof)
963 host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF); 1136 host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF);
964 1137
965 if (atmci_is_mci2()) { 1138 if (host->caps.has_cfg_reg) {
966 /* setup High Speed mode in relation with card capacity */ 1139 /* setup High Speed mode in relation with card capacity */
967 if (ios->timing == MMC_TIMING_SD_HS) 1140 if (ios->timing == MMC_TIMING_SD_HS)
968 host->cfg_reg |= MCI_CFG_HSMODE; 1141 host->cfg_reg |= ATMCI_CFG_HSMODE;
969 else 1142 else
970 host->cfg_reg &= ~MCI_CFG_HSMODE; 1143 host->cfg_reg &= ~ATMCI_CFG_HSMODE;
971 } 1144 }
972 1145
973 if (list_empty(&host->queue)) { 1146 if (list_empty(&host->queue)) {
974 mci_writel(host, MR, host->mode_reg); 1147 atmci_writel(host, ATMCI_MR, host->mode_reg);
975 if (atmci_is_mci2()) 1148 if (host->caps.has_cfg_reg)
976 mci_writel(host, CFG, host->cfg_reg); 1149 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
977 } else { 1150 } else {
978 host->need_clock_update = true; 1151 host->need_clock_update = true;
979 } 1152 }
@@ -984,16 +1157,16 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
984 1157
985 spin_lock_bh(&host->lock); 1158 spin_lock_bh(&host->lock);
986 slot->clock = 0; 1159 slot->clock = 0;
987 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) { 1160 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
988 if (host->slot[i] && host->slot[i]->clock) { 1161 if (host->slot[i] && host->slot[i]->clock) {
989 any_slot_active = true; 1162 any_slot_active = true;
990 break; 1163 break;
991 } 1164 }
992 } 1165 }
993 if (!any_slot_active) { 1166 if (!any_slot_active) {
994 mci_writel(host, CR, MCI_CR_MCIDIS); 1167 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
995 if (host->mode_reg) { 1168 if (host->mode_reg) {
996 mci_readl(host, MR); 1169 atmci_readl(host, ATMCI_MR);
997 clk_disable(host->mck); 1170 clk_disable(host->mck);
998 } 1171 }
999 host->mode_reg = 0; 1172 host->mode_reg = 0;
@@ -1057,9 +1230,9 @@ static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1057 struct atmel_mci *host = slot->host; 1230 struct atmel_mci *host = slot->host;
1058 1231
1059 if (enable) 1232 if (enable)
1060 mci_writel(host, IER, slot->sdio_irq); 1233 atmci_writel(host, ATMCI_IER, slot->sdio_irq);
1061 else 1234 else
1062 mci_writel(host, IDR, slot->sdio_irq); 1235 atmci_writel(host, ATMCI_IDR, slot->sdio_irq);
1063} 1236}
1064 1237
1065static const struct mmc_host_ops atmci_ops = { 1238static const struct mmc_host_ops atmci_ops = {
@@ -1086,9 +1259,9 @@ static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1086 * busy transferring data. 1259 * busy transferring data.
1087 */ 1260 */
1088 if (host->need_clock_update) { 1261 if (host->need_clock_update) {
1089 mci_writel(host, MR, host->mode_reg); 1262 atmci_writel(host, ATMCI_MR, host->mode_reg);
1090 if (atmci_is_mci2()) 1263 if (host->caps.has_cfg_reg)
1091 mci_writel(host, CFG, host->cfg_reg); 1264 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1092 } 1265 }
1093 1266
1094 host->cur_slot->mrq = NULL; 1267 host->cur_slot->mrq = NULL;
@@ -1117,16 +1290,16 @@ static void atmci_command_complete(struct atmel_mci *host,
1117 u32 status = host->cmd_status; 1290 u32 status = host->cmd_status;
1118 1291
1119 /* Read the response from the card (up to 16 bytes) */ 1292 /* Read the response from the card (up to 16 bytes) */
1120 cmd->resp[0] = mci_readl(host, RSPR); 1293 cmd->resp[0] = atmci_readl(host, ATMCI_RSPR);
1121 cmd->resp[1] = mci_readl(host, RSPR); 1294 cmd->resp[1] = atmci_readl(host, ATMCI_RSPR);
1122 cmd->resp[2] = mci_readl(host, RSPR); 1295 cmd->resp[2] = atmci_readl(host, ATMCI_RSPR);
1123 cmd->resp[3] = mci_readl(host, RSPR); 1296 cmd->resp[3] = atmci_readl(host, ATMCI_RSPR);
1124 1297
1125 if (status & MCI_RTOE) 1298 if (status & ATMCI_RTOE)
1126 cmd->error = -ETIMEDOUT; 1299 cmd->error = -ETIMEDOUT;
1127 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE)) 1300 else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE))
1128 cmd->error = -EILSEQ; 1301 cmd->error = -EILSEQ;
1129 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE)) 1302 else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE))
1130 cmd->error = -EIO; 1303 cmd->error = -EIO;
1131 else 1304 else
1132 cmd->error = 0; 1305 cmd->error = 0;
@@ -1136,10 +1309,10 @@ static void atmci_command_complete(struct atmel_mci *host,
1136 "command error: status=0x%08x\n", status); 1309 "command error: status=0x%08x\n", status);
1137 1310
1138 if (cmd->data) { 1311 if (cmd->data) {
1139 atmci_stop_dma(host); 1312 host->stop_transfer(host);
1140 host->data = NULL; 1313 host->data = NULL;
1141 mci_writel(host, IDR, MCI_NOTBUSY 1314 atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY
1142 | MCI_TXRDY | MCI_RXRDY 1315 | ATMCI_TXRDY | ATMCI_RXRDY
1143 | ATMCI_DATA_ERROR_FLAGS); 1316 | ATMCI_DATA_ERROR_FLAGS);
1144 } 1317 }
1145 } 1318 }
@@ -1191,11 +1364,11 @@ static void atmci_detect_change(unsigned long data)
1191 * Reset controller to terminate any ongoing 1364 * Reset controller to terminate any ongoing
1192 * commands or data transfers. 1365 * commands or data transfers.
1193 */ 1366 */
1194 mci_writel(host, CR, MCI_CR_SWRST); 1367 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1195 mci_writel(host, CR, MCI_CR_MCIEN); 1368 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1196 mci_writel(host, MR, host->mode_reg); 1369 atmci_writel(host, ATMCI_MR, host->mode_reg);
1197 if (atmci_is_mci2()) 1370 if (host->caps.has_cfg_reg)
1198 mci_writel(host, CFG, host->cfg_reg); 1371 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1199 1372
1200 host->data = NULL; 1373 host->data = NULL;
1201 host->cmd = NULL; 1374 host->cmd = NULL;
@@ -1210,7 +1383,7 @@ static void atmci_detect_change(unsigned long data)
1210 /* fall through */ 1383 /* fall through */
1211 case STATE_SENDING_DATA: 1384 case STATE_SENDING_DATA:
1212 mrq->data->error = -ENOMEDIUM; 1385 mrq->data->error = -ENOMEDIUM;
1213 atmci_stop_dma(host); 1386 host->stop_transfer(host);
1214 break; 1387 break;
1215 case STATE_DATA_BUSY: 1388 case STATE_DATA_BUSY:
1216 case STATE_DATA_ERROR: 1389 case STATE_DATA_ERROR:
@@ -1261,7 +1434,7 @@ static void atmci_tasklet_func(unsigned long priv)
1261 dev_vdbg(&host->pdev->dev, 1434 dev_vdbg(&host->pdev->dev,
1262 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n", 1435 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1263 state, host->pending_events, host->completed_events, 1436 state, host->pending_events, host->completed_events,
1264 mci_readl(host, IMR)); 1437 atmci_readl(host, ATMCI_IMR));
1265 1438
1266 do { 1439 do {
1267 prev_state = state; 1440 prev_state = state;
@@ -1289,9 +1462,9 @@ static void atmci_tasklet_func(unsigned long priv)
1289 case STATE_SENDING_DATA: 1462 case STATE_SENDING_DATA:
1290 if (atmci_test_and_clear_pending(host, 1463 if (atmci_test_and_clear_pending(host,
1291 EVENT_DATA_ERROR)) { 1464 EVENT_DATA_ERROR)) {
1292 atmci_stop_dma(host); 1465 host->stop_transfer(host);
1293 if (data->stop) 1466 if (data->stop)
1294 send_stop_cmd(host, data); 1467 atmci_send_stop_cmd(host, data);
1295 state = STATE_DATA_ERROR; 1468 state = STATE_DATA_ERROR;
1296 break; 1469 break;
1297 } 1470 }
@@ -1313,11 +1486,11 @@ static void atmci_tasklet_func(unsigned long priv)
1313 atmci_set_completed(host, EVENT_DATA_COMPLETE); 1486 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1314 status = host->data_status; 1487 status = host->data_status;
1315 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) { 1488 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1316 if (status & MCI_DTOE) { 1489 if (status & ATMCI_DTOE) {
1317 dev_dbg(&host->pdev->dev, 1490 dev_dbg(&host->pdev->dev,
1318 "data timeout error\n"); 1491 "data timeout error\n");
1319 data->error = -ETIMEDOUT; 1492 data->error = -ETIMEDOUT;
1320 } else if (status & MCI_DCRCE) { 1493 } else if (status & ATMCI_DCRCE) {
1321 dev_dbg(&host->pdev->dev, 1494 dev_dbg(&host->pdev->dev,
1322 "data CRC error\n"); 1495 "data CRC error\n");
1323 data->error = -EILSEQ; 1496 data->error = -EILSEQ;
@@ -1330,7 +1503,7 @@ static void atmci_tasklet_func(unsigned long priv)
1330 } else { 1503 } else {
1331 data->bytes_xfered = data->blocks * data->blksz; 1504 data->bytes_xfered = data->blocks * data->blksz;
1332 data->error = 0; 1505 data->error = 0;
1333 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS); 1506 atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS);
1334 } 1507 }
1335 1508
1336 if (!data->stop) { 1509 if (!data->stop) {
@@ -1340,7 +1513,7 @@ static void atmci_tasklet_func(unsigned long priv)
1340 1513
1341 prev_state = state = STATE_SENDING_STOP; 1514 prev_state = state = STATE_SENDING_STOP;
1342 if (!data->error) 1515 if (!data->error)
1343 send_stop_cmd(host, data); 1516 atmci_send_stop_cmd(host, data);
1344 /* fall through */ 1517 /* fall through */
1345 1518
1346 case STATE_SENDING_STOP: 1519 case STATE_SENDING_STOP:
@@ -1380,7 +1553,7 @@ static void atmci_read_data_pio(struct atmel_mci *host)
1380 unsigned int nbytes = 0; 1553 unsigned int nbytes = 0;
1381 1554
1382 do { 1555 do {
1383 value = mci_readl(host, RDR); 1556 value = atmci_readl(host, ATMCI_RDR);
1384 if (likely(offset + 4 <= sg->length)) { 1557 if (likely(offset + 4 <= sg->length)) {
1385 put_unaligned(value, (u32 *)(buf + offset)); 1558 put_unaligned(value, (u32 *)(buf + offset));
1386 1559
@@ -1412,9 +1585,9 @@ static void atmci_read_data_pio(struct atmel_mci *host)
1412 nbytes += offset; 1585 nbytes += offset;
1413 } 1586 }
1414 1587
1415 status = mci_readl(host, SR); 1588 status = atmci_readl(host, ATMCI_SR);
1416 if (status & ATMCI_DATA_ERROR_FLAGS) { 1589 if (status & ATMCI_DATA_ERROR_FLAGS) {
1417 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY 1590 atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY
1418 | ATMCI_DATA_ERROR_FLAGS)); 1591 | ATMCI_DATA_ERROR_FLAGS));
1419 host->data_status = status; 1592 host->data_status = status;
1420 data->bytes_xfered += nbytes; 1593 data->bytes_xfered += nbytes;
@@ -1423,7 +1596,7 @@ static void atmci_read_data_pio(struct atmel_mci *host)
1423 tasklet_schedule(&host->tasklet); 1596 tasklet_schedule(&host->tasklet);
1424 return; 1597 return;
1425 } 1598 }
1426 } while (status & MCI_RXRDY); 1599 } while (status & ATMCI_RXRDY);
1427 1600
1428 host->pio_offset = offset; 1601 host->pio_offset = offset;
1429 data->bytes_xfered += nbytes; 1602 data->bytes_xfered += nbytes;
@@ -1431,8 +1604,8 @@ static void atmci_read_data_pio(struct atmel_mci *host)
1431 return; 1604 return;
1432 1605
1433done: 1606done:
1434 mci_writel(host, IDR, MCI_RXRDY); 1607 atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY);
1435 mci_writel(host, IER, MCI_NOTBUSY); 1608 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1436 data->bytes_xfered += nbytes; 1609 data->bytes_xfered += nbytes;
1437 smp_wmb(); 1610 smp_wmb();
1438 atmci_set_pending(host, EVENT_XFER_COMPLETE); 1611 atmci_set_pending(host, EVENT_XFER_COMPLETE);
@@ -1451,7 +1624,7 @@ static void atmci_write_data_pio(struct atmel_mci *host)
1451 do { 1624 do {
1452 if (likely(offset + 4 <= sg->length)) { 1625 if (likely(offset + 4 <= sg->length)) {
1453 value = get_unaligned((u32 *)(buf + offset)); 1626 value = get_unaligned((u32 *)(buf + offset));
1454 mci_writel(host, TDR, value); 1627 atmci_writel(host, ATMCI_TDR, value);
1455 1628
1456 offset += 4; 1629 offset += 4;
1457 nbytes += 4; 1630 nbytes += 4;
@@ -1472,20 +1645,20 @@ static void atmci_write_data_pio(struct atmel_mci *host)
1472 1645
1473 host->sg = sg = sg_next(sg); 1646 host->sg = sg = sg_next(sg);
1474 if (!sg) { 1647 if (!sg) {
1475 mci_writel(host, TDR, value); 1648 atmci_writel(host, ATMCI_TDR, value);
1476 goto done; 1649 goto done;
1477 } 1650 }
1478 1651
1479 offset = 4 - remaining; 1652 offset = 4 - remaining;
1480 buf = sg_virt(sg); 1653 buf = sg_virt(sg);
1481 memcpy((u8 *)&value + remaining, buf, offset); 1654 memcpy((u8 *)&value + remaining, buf, offset);
1482 mci_writel(host, TDR, value); 1655 atmci_writel(host, ATMCI_TDR, value);
1483 nbytes += offset; 1656 nbytes += offset;
1484 } 1657 }
1485 1658
1486 status = mci_readl(host, SR); 1659 status = atmci_readl(host, ATMCI_SR);
1487 if (status & ATMCI_DATA_ERROR_FLAGS) { 1660 if (status & ATMCI_DATA_ERROR_FLAGS) {
1488 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY 1661 atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY
1489 | ATMCI_DATA_ERROR_FLAGS)); 1662 | ATMCI_DATA_ERROR_FLAGS));
1490 host->data_status = status; 1663 host->data_status = status;
1491 data->bytes_xfered += nbytes; 1664 data->bytes_xfered += nbytes;
@@ -1494,7 +1667,7 @@ static void atmci_write_data_pio(struct atmel_mci *host)
1494 tasklet_schedule(&host->tasklet); 1667 tasklet_schedule(&host->tasklet);
1495 return; 1668 return;
1496 } 1669 }
1497 } while (status & MCI_TXRDY); 1670 } while (status & ATMCI_TXRDY);
1498 1671
1499 host->pio_offset = offset; 1672 host->pio_offset = offset;
1500 data->bytes_xfered += nbytes; 1673 data->bytes_xfered += nbytes;
@@ -1502,8 +1675,8 @@ static void atmci_write_data_pio(struct atmel_mci *host)
1502 return; 1675 return;
1503 1676
1504done: 1677done:
1505 mci_writel(host, IDR, MCI_TXRDY); 1678 atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY);
1506 mci_writel(host, IER, MCI_NOTBUSY); 1679 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1507 data->bytes_xfered += nbytes; 1680 data->bytes_xfered += nbytes;
1508 smp_wmb(); 1681 smp_wmb();
1509 atmci_set_pending(host, EVENT_XFER_COMPLETE); 1682 atmci_set_pending(host, EVENT_XFER_COMPLETE);
@@ -1511,7 +1684,7 @@ done:
1511 1684
1512static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status) 1685static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1513{ 1686{
1514 mci_writel(host, IDR, MCI_CMDRDY); 1687 atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);
1515 1688
1516 host->cmd_status = status; 1689 host->cmd_status = status;
1517 smp_wmb(); 1690 smp_wmb();
@@ -1523,7 +1696,7 @@ static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1523{ 1696{
1524 int i; 1697 int i;
1525 1698
1526 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) { 1699 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1527 struct atmel_mci_slot *slot = host->slot[i]; 1700 struct atmel_mci_slot *slot = host->slot[i];
1528 if (slot && (status & slot->sdio_irq)) { 1701 if (slot && (status & slot->sdio_irq)) {
1529 mmc_signal_sdio_irq(slot->mmc); 1702 mmc_signal_sdio_irq(slot->mmc);
@@ -1539,40 +1712,92 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1539 unsigned int pass_count = 0; 1712 unsigned int pass_count = 0;
1540 1713
1541 do { 1714 do {
1542 status = mci_readl(host, SR); 1715 status = atmci_readl(host, ATMCI_SR);
1543 mask = mci_readl(host, IMR); 1716 mask = atmci_readl(host, ATMCI_IMR);
1544 pending = status & mask; 1717 pending = status & mask;
1545 if (!pending) 1718 if (!pending)
1546 break; 1719 break;
1547 1720
1548 if (pending & ATMCI_DATA_ERROR_FLAGS) { 1721 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1549 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS 1722 atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS
1550 | MCI_RXRDY | MCI_TXRDY); 1723 | ATMCI_RXRDY | ATMCI_TXRDY);
1551 pending &= mci_readl(host, IMR); 1724 pending &= atmci_readl(host, ATMCI_IMR);
1552 1725
1553 host->data_status = status; 1726 host->data_status = status;
1554 smp_wmb(); 1727 smp_wmb();
1555 atmci_set_pending(host, EVENT_DATA_ERROR); 1728 atmci_set_pending(host, EVENT_DATA_ERROR);
1556 tasklet_schedule(&host->tasklet); 1729 tasklet_schedule(&host->tasklet);
1557 } 1730 }
1558 if (pending & MCI_NOTBUSY) { 1731
1559 mci_writel(host, IDR, 1732 if (pending & ATMCI_TXBUFE) {
1560 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY); 1733 atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);
1734 atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1735 /*
1736 * We can receive this interruption before having configured
1737 * the second pdc buffer, so we need to reconfigure first and
1738 * second buffers again
1739 */
1740 if (host->data_size) {
1741 atmci_pdc_set_both_buf(host, XFER_TRANSMIT);
1742 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1743 atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE);
1744 } else {
1745 atmci_pdc_complete(host);
1746 }
1747 } else if (pending & ATMCI_ENDTX) {
1748 atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1749
1750 if (host->data_size) {
1751 atmci_pdc_set_single_buf(host,
1752 XFER_TRANSMIT, PDC_SECOND_BUF);
1753 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1754 }
1755 }
1756
1757 if (pending & ATMCI_RXBUFF) {
1758 atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF);
1759 atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1760 /*
1761 * We can receive this interruption before having configured
1762 * the second pdc buffer, so we need to reconfigure first and
1763 * second buffers again
1764 */
1765 if (host->data_size) {
1766 atmci_pdc_set_both_buf(host, XFER_RECEIVE);
1767 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1768 atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF);
1769 } else {
1770 atmci_pdc_complete(host);
1771 }
1772 } else if (pending & ATMCI_ENDRX) {
1773 atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1774
1775 if (host->data_size) {
1776 atmci_pdc_set_single_buf(host,
1777 XFER_RECEIVE, PDC_SECOND_BUF);
1778 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1779 }
1780 }
1781
1782
1783 if (pending & ATMCI_NOTBUSY) {
1784 atmci_writel(host, ATMCI_IDR,
1785 ATMCI_DATA_ERROR_FLAGS | ATMCI_NOTBUSY);
1561 if (!host->data_status) 1786 if (!host->data_status)
1562 host->data_status = status; 1787 host->data_status = status;
1563 smp_wmb(); 1788 smp_wmb();
1564 atmci_set_pending(host, EVENT_DATA_COMPLETE); 1789 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1565 tasklet_schedule(&host->tasklet); 1790 tasklet_schedule(&host->tasklet);
1566 } 1791 }
1567 if (pending & MCI_RXRDY) 1792 if (pending & ATMCI_RXRDY)
1568 atmci_read_data_pio(host); 1793 atmci_read_data_pio(host);
1569 if (pending & MCI_TXRDY) 1794 if (pending & ATMCI_TXRDY)
1570 atmci_write_data_pio(host); 1795 atmci_write_data_pio(host);
1571 1796
1572 if (pending & MCI_CMDRDY) 1797 if (pending & ATMCI_CMDRDY)
1573 atmci_cmd_interrupt(host, status); 1798 atmci_cmd_interrupt(host, status);
1574 1799
1575 if (pending & (MCI_SDIOIRQA | MCI_SDIOIRQB)) 1800 if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
1576 atmci_sdio_interrupt(host, status); 1801 atmci_sdio_interrupt(host, status);
1577 1802
1578 } while (pass_count++ < 5); 1803 } while (pass_count++ < 5);
@@ -1621,7 +1846,7 @@ static int __init atmci_init_slot(struct atmel_mci *host,
1621 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1846 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1622 if (sdio_irq) 1847 if (sdio_irq)
1623 mmc->caps |= MMC_CAP_SDIO_IRQ; 1848 mmc->caps |= MMC_CAP_SDIO_IRQ;
1624 if (atmci_is_mci2()) 1849 if (host->caps.has_highspeed)
1625 mmc->caps |= MMC_CAP_SD_HIGHSPEED; 1850 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1626 if (slot_data->bus_width >= 4) 1851 if (slot_data->bus_width >= 4)
1627 mmc->caps |= MMC_CAP_4_BIT_DATA; 1852 mmc->caps |= MMC_CAP_4_BIT_DATA;
@@ -1704,8 +1929,7 @@ static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1704 mmc_free_host(slot->mmc); 1929 mmc_free_host(slot->mmc);
1705} 1930}
1706 1931
1707#ifdef CONFIG_MMC_ATMELMCI_DMA 1932static bool atmci_filter(struct dma_chan *chan, void *slave)
1708static bool filter(struct dma_chan *chan, void *slave)
1709{ 1933{
1710 struct mci_dma_data *sl = slave; 1934 struct mci_dma_data *sl = slave;
1711 1935
@@ -1730,14 +1954,14 @@ static void atmci_configure_dma(struct atmel_mci *host)
1730 dma_cap_mask_t mask; 1954 dma_cap_mask_t mask;
1731 1955
1732 setup_dma_addr(pdata->dma_slave, 1956 setup_dma_addr(pdata->dma_slave,
1733 host->mapbase + MCI_TDR, 1957 host->mapbase + ATMCI_TDR,
1734 host->mapbase + MCI_RDR); 1958 host->mapbase + ATMCI_RDR);
1735 1959
1736 /* Try to grab a DMA channel */ 1960 /* Try to grab a DMA channel */
1737 dma_cap_zero(mask); 1961 dma_cap_zero(mask);
1738 dma_cap_set(DMA_SLAVE, mask); 1962 dma_cap_set(DMA_SLAVE, mask);
1739 host->dma.chan = 1963 host->dma.chan =
1740 dma_request_channel(mask, filter, pdata->dma_slave); 1964 dma_request_channel(mask, atmci_filter, pdata->dma_slave);
1741 } 1965 }
1742 if (!host->dma.chan) 1966 if (!host->dma.chan)
1743 dev_notice(&host->pdev->dev, "DMA not available, using PIO\n"); 1967 dev_notice(&host->pdev->dev, "DMA not available, using PIO\n");
@@ -1746,9 +1970,60 @@ static void atmci_configure_dma(struct atmel_mci *host)
1746 "Using %s for DMA transfers\n", 1970 "Using %s for DMA transfers\n",
1747 dma_chan_name(host->dma.chan)); 1971 dma_chan_name(host->dma.chan));
1748} 1972}
1973
1974static inline unsigned int atmci_get_version(struct atmel_mci *host)
1975{
1976 return atmci_readl(host, ATMCI_VERSION) & 0x00000fff;
1977}
1978
1979/*
1980 * HSMCI (High Speed MCI) module is not fully compatible with MCI module.
1981 * HSMCI provides DMA support and a new config register but no more supports
1982 * PDC.
1983 */
1984static void __init atmci_get_cap(struct atmel_mci *host)
1985{
1986 unsigned int version;
1987
1988 version = atmci_get_version(host);
1989 dev_info(&host->pdev->dev,
1990 "version: 0x%x\n", version);
1991
1992 host->caps.has_dma = 0;
1993 host->caps.has_pdc = 0;
1994 host->caps.has_cfg_reg = 0;
1995 host->caps.has_cstor_reg = 0;
1996 host->caps.has_highspeed = 0;
1997 host->caps.has_rwproof = 0;
1998
1999 /* keep only major version number */
2000 switch (version & 0xf00) {
2001 case 0x100:
2002 case 0x200:
2003 host->caps.has_pdc = 1;
2004 host->caps.has_rwproof = 1;
2005 break;
2006 case 0x300:
2007 case 0x400:
2008 case 0x500:
2009#ifdef CONFIG_AT_HDMAC
2010 host->caps.has_dma = 1;
1749#else 2011#else
1750static void atmci_configure_dma(struct atmel_mci *host) {} 2012 host->caps.has_dma = 0;
2013 dev_info(&host->pdev->dev,
2014 "has dma capability but dma engine is not selected, then use pio\n");
1751#endif 2015#endif
2016 host->caps.has_cfg_reg = 1;
2017 host->caps.has_cstor_reg = 1;
2018 host->caps.has_highspeed = 1;
2019 host->caps.has_rwproof = 1;
2020 break;
2021 default:
2022 dev_warn(&host->pdev->dev,
2023 "Unmanaged mci version, set minimum capabilities\n");
2024 break;
2025 }
2026}
1752 2027
1753static int __init atmci_probe(struct platform_device *pdev) 2028static int __init atmci_probe(struct platform_device *pdev)
1754{ 2029{
@@ -1789,7 +2064,7 @@ static int __init atmci_probe(struct platform_device *pdev)
1789 goto err_ioremap; 2064 goto err_ioremap;
1790 2065
1791 clk_enable(host->mck); 2066 clk_enable(host->mck);
1792 mci_writel(host, CR, MCI_CR_SWRST); 2067 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1793 host->bus_hz = clk_get_rate(host->mck); 2068 host->bus_hz = clk_get_rate(host->mck);
1794 clk_disable(host->mck); 2069 clk_disable(host->mck);
1795 2070
@@ -1801,7 +2076,27 @@ static int __init atmci_probe(struct platform_device *pdev)
1801 if (ret) 2076 if (ret)
1802 goto err_request_irq; 2077 goto err_request_irq;
1803 2078
1804 atmci_configure_dma(host); 2079 /* Get MCI capabilities and set operations according to it */
2080 atmci_get_cap(host);
2081 if (host->caps.has_dma) {
2082 dev_info(&pdev->dev, "using DMA\n");
2083 host->prepare_data = &atmci_prepare_data_dma;
2084 host->submit_data = &atmci_submit_data_dma;
2085 host->stop_transfer = &atmci_stop_transfer_dma;
2086 } else if (host->caps.has_pdc) {
2087 dev_info(&pdev->dev, "using PDC\n");
2088 host->prepare_data = &atmci_prepare_data_pdc;
2089 host->submit_data = &atmci_submit_data_pdc;
2090 host->stop_transfer = &atmci_stop_transfer_pdc;
2091 } else {
2092 dev_info(&pdev->dev, "no DMA, no PDC\n");
2093 host->prepare_data = &atmci_prepare_data;
2094 host->submit_data = &atmci_submit_data;
2095 host->stop_transfer = &atmci_stop_transfer;
2096 }
2097
2098 if (host->caps.has_dma)
2099 atmci_configure_dma(host);
1805 2100
1806 platform_set_drvdata(pdev, host); 2101 platform_set_drvdata(pdev, host);
1807 2102
@@ -1810,13 +2105,13 @@ static int __init atmci_probe(struct platform_device *pdev)
1810 ret = -ENODEV; 2105 ret = -ENODEV;
1811 if (pdata->slot[0].bus_width) { 2106 if (pdata->slot[0].bus_width) {
1812 ret = atmci_init_slot(host, &pdata->slot[0], 2107 ret = atmci_init_slot(host, &pdata->slot[0],
1813 0, MCI_SDCSEL_SLOT_A, MCI_SDIOIRQA); 2108 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA);
1814 if (!ret) 2109 if (!ret)
1815 nr_slots++; 2110 nr_slots++;
1816 } 2111 }
1817 if (pdata->slot[1].bus_width) { 2112 if (pdata->slot[1].bus_width) {
1818 ret = atmci_init_slot(host, &pdata->slot[1], 2113 ret = atmci_init_slot(host, &pdata->slot[1],
1819 1, MCI_SDCSEL_SLOT_B, MCI_SDIOIRQB); 2114 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB);
1820 if (!ret) 2115 if (!ret)
1821 nr_slots++; 2116 nr_slots++;
1822 } 2117 }
@@ -1833,10 +2128,8 @@ static int __init atmci_probe(struct platform_device *pdev)
1833 return 0; 2128 return 0;
1834 2129
1835err_init_slot: 2130err_init_slot:
1836#ifdef CONFIG_MMC_ATMELMCI_DMA
1837 if (host->dma.chan) 2131 if (host->dma.chan)
1838 dma_release_channel(host->dma.chan); 2132 dma_release_channel(host->dma.chan);
1839#endif
1840 free_irq(irq, host); 2133 free_irq(irq, host);
1841err_request_irq: 2134err_request_irq:
1842 iounmap(host->regs); 2135 iounmap(host->regs);
@@ -1854,15 +2147,15 @@ static int __exit atmci_remove(struct platform_device *pdev)
1854 2147
1855 platform_set_drvdata(pdev, NULL); 2148 platform_set_drvdata(pdev, NULL);
1856 2149
1857 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) { 2150 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1858 if (host->slot[i]) 2151 if (host->slot[i])
1859 atmci_cleanup_slot(host->slot[i], i); 2152 atmci_cleanup_slot(host->slot[i], i);
1860 } 2153 }
1861 2154
1862 clk_enable(host->mck); 2155 clk_enable(host->mck);
1863 mci_writel(host, IDR, ~0UL); 2156 atmci_writel(host, ATMCI_IDR, ~0UL);
1864 mci_writel(host, CR, MCI_CR_MCIDIS); 2157 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
1865 mci_readl(host, SR); 2158 atmci_readl(host, ATMCI_SR);
1866 clk_disable(host->mck); 2159 clk_disable(host->mck);
1867 2160
1868#ifdef CONFIG_MMC_ATMELMCI_DMA 2161#ifdef CONFIG_MMC_ATMELMCI_DMA
@@ -1885,7 +2178,7 @@ static int atmci_suspend(struct device *dev)
1885 struct atmel_mci *host = dev_get_drvdata(dev); 2178 struct atmel_mci *host = dev_get_drvdata(dev);
1886 int i; 2179 int i;
1887 2180
1888 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) { 2181 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1889 struct atmel_mci_slot *slot = host->slot[i]; 2182 struct atmel_mci_slot *slot = host->slot[i];
1890 int ret; 2183 int ret;
1891 2184
@@ -1916,7 +2209,7 @@ static int atmci_resume(struct device *dev)
1916 int i; 2209 int i;
1917 int ret = 0; 2210 int ret = 0;
1918 2211
1919 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) { 2212 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1920 struct atmel_mci_slot *slot = host->slot[i]; 2213 struct atmel_mci_slot *slot = host->slot[i];
1921 int err; 2214 int err;
1922 2215
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-01 23:57:09 -0500