diff options
Diffstat (limited to 'drivers/misc/mic/host/mic_x100.c')
-rw-r--r-- | drivers/misc/mic/host/mic_x100.c | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/drivers/misc/mic/host/mic_x100.c b/drivers/misc/mic/host/mic_x100.c index 0dfa8a81436e..5562fdd3ef4e 100644 --- a/drivers/misc/mic/host/mic_x100.c +++ b/drivers/misc/mic/host/mic_x100.c | |||
@@ -174,35 +174,38 @@ static void mic_x100_send_intr(struct mic_device *mdev, int doorbell) | |||
174 | } | 174 | } |
175 | 175 | ||
176 | /** | 176 | /** |
177 | * mic_ack_interrupt - Device specific interrupt handling. | 177 | * mic_x100_ack_interrupt - Read the interrupt sources register and |
178 | * @mdev: pointer to mic_device instance | 178 | * clear it. This function will be called in the MSI/INTx case. |
179 | * @mdev: Pointer to mic_device instance. | ||
179 | * | 180 | * |
180 | * Returns: bitmask of doorbell events triggered. | 181 | * Returns: bitmask of interrupt sources triggered. |
181 | */ | 182 | */ |
182 | static u32 mic_x100_ack_interrupt(struct mic_device *mdev) | 183 | static u32 mic_x100_ack_interrupt(struct mic_device *mdev) |
183 | { | 184 | { |
184 | u32 reg = 0; | ||
185 | struct mic_mw *mw = &mdev->mmio; | ||
186 | u32 sicr0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICR0; | 185 | u32 sicr0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICR0; |
186 | u32 reg = mic_mmio_read(&mdev->mmio, sicr0); | ||
187 | mic_mmio_write(&mdev->mmio, reg, sicr0); | ||
188 | return reg; | ||
189 | } | ||
190 | |||
191 | /** | ||
192 | * mic_x100_intr_workarounds - These hardware specific workarounds are | ||
193 | * to be invoked everytime an interrupt is handled. | ||
194 | * @mdev: Pointer to mic_device instance. | ||
195 | * | ||
196 | * Returns: none | ||
197 | */ | ||
198 | static void mic_x100_intr_workarounds(struct mic_device *mdev) | ||
199 | { | ||
200 | struct mic_mw *mw = &mdev->mmio; | ||
187 | 201 | ||
188 | /* Clear pending bit array. */ | 202 | /* Clear pending bit array. */ |
189 | if (MIC_A0_STEP == mdev->stepping) | 203 | if (MIC_A0_STEP == mdev->stepping) |
190 | mic_mmio_write(mw, 1, MIC_X100_SBOX_BASE_ADDRESS + | 204 | mic_mmio_write(mw, 1, MIC_X100_SBOX_BASE_ADDRESS + |
191 | MIC_X100_SBOX_MSIXPBACR); | 205 | MIC_X100_SBOX_MSIXPBACR); |
192 | 206 | ||
193 | if (mdev->irq_info.num_vectors <= 1) { | ||
194 | reg = mic_mmio_read(mw, sicr0); | ||
195 | |||
196 | if (unlikely(!reg)) | ||
197 | goto done; | ||
198 | |||
199 | mic_mmio_write(mw, reg, sicr0); | ||
200 | } | ||
201 | |||
202 | if (mdev->stepping >= MIC_B0_STEP) | 207 | if (mdev->stepping >= MIC_B0_STEP) |
203 | mdev->intr_ops->enable_interrupts(mdev); | 208 | mdev->intr_ops->enable_interrupts(mdev); |
204 | done: | ||
205 | return reg; | ||
206 | } | 209 | } |
207 | 210 | ||
208 | /** | 211 | /** |
@@ -553,6 +556,7 @@ struct mic_hw_ops mic_x100_ops = { | |||
553 | .write_spad = mic_x100_write_spad, | 556 | .write_spad = mic_x100_write_spad, |
554 | .send_intr = mic_x100_send_intr, | 557 | .send_intr = mic_x100_send_intr, |
555 | .ack_interrupt = mic_x100_ack_interrupt, | 558 | .ack_interrupt = mic_x100_ack_interrupt, |
559 | .intr_workarounds = mic_x100_intr_workarounds, | ||
556 | .reset = mic_x100_hw_reset, | 560 | .reset = mic_x100_hw_reset, |
557 | .reset_fw_ready = mic_x100_reset_fw_ready, | 561 | .reset_fw_ready = mic_x100_reset_fw_ready, |
558 | .is_fw_ready = mic_x100_is_fw_ready, | 562 | .is_fw_ready = mic_x100_is_fw_ready, |