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path: root/drivers/mfd/rts5209.c
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Diffstat (limited to 'drivers/mfd/rts5209.c')
-rw-r--r--drivers/mfd/rts5209.c63
1 files changed, 46 insertions, 17 deletions
diff --git a/drivers/mfd/rts5209.c b/drivers/mfd/rts5209.c
index ec78d9fb0879..cb04174a8924 100644
--- a/drivers/mfd/rts5209.c
+++ b/drivers/mfd/rts5209.c
@@ -1,6 +1,6 @@
1/* Driver for Realtek PCI-Express card reader 1/* Driver for Realtek PCI-Express card reader
2 * 2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved. 3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the 6 * under the terms of the GNU General Public License as published by the
@@ -17,7 +17,6 @@
17 * 17 *
18 * Author: 18 * Author:
19 * Wei WANG <wei_wang@realsil.com.cn> 19 * Wei WANG <wei_wang@realsil.com.cn>
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */ 20 */
22 21
23#include <linux/module.h> 22#include <linux/module.h>
@@ -34,19 +33,34 @@ static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr)
34 return val & 0x0F; 33 return val & 0x0F;
35} 34}
36 35
37static void rts5209_init_vendor_cfg(struct rtsx_pcr *pcr) 36static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
38{ 37{
39 u32 val; 38 u32 reg;
40 39
41 rtsx_pci_read_config_dword(pcr, 0x724, &val); 40 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
42 dev_dbg(&(pcr->pci->dev), "Cfg 0x724: 0x%x\n", val); 41 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
43 42
44 if (!(val & 0x80)) { 43 if (rts5209_vendor_setting1_valid(reg)) {
45 if (val & 0x08) 44 if (rts5209_reg_check_ms_pmos(reg))
46 pcr->ms_pmos = false; 45 pcr->flags |= PCR_MS_PMOS;
47 else 46 pcr->aspm_en = rts5209_reg_to_aspm(reg);
48 pcr->ms_pmos = true;
49 } 47 }
48
49 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
50 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
51
52 if (rts5209_vendor_setting2_valid(reg)) {
53 pcr->sd30_drive_sel_1v8 =
54 rts5209_reg_to_sd30_drive_sel_1v8(reg);
55 pcr->sd30_drive_sel_3v3 =
56 rts5209_reg_to_sd30_drive_sel_3v3(reg);
57 pcr->card_drive_sel = rts5209_reg_to_card_drive_sel(reg);
58 }
59}
60
61static void rts5209_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
62{
63 rtsx_pci_write_register(pcr, FPDCTL, 0x07, 0x07);
50} 64}
51 65
52static int rts5209_extra_init_hw(struct rtsx_pcr *pcr) 66static int rts5209_extra_init_hw(struct rtsx_pcr *pcr)
@@ -55,8 +69,15 @@ static int rts5209_extra_init_hw(struct rtsx_pcr *pcr)
55 69
56 /* Turn off LED */ 70 /* Turn off LED */
57 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03); 71 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03);
72 /* Reset ASPM state to default value */
73 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
74 /* Force CLKREQ# PIN to drive 0 to request clock */
75 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
58 /* Configure GPIO as output */ 76 /* Configure GPIO as output */
59 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03); 77 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03);
78 /* Configure driving */
79 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
80 0xFF, pcr->sd30_drive_sel_3v3);
60 81
61 return rtsx_pci_send_cmd(pcr, 100); 82 return rtsx_pci_send_cmd(pcr, 100);
62} 83}
@@ -95,7 +116,7 @@ static int rts5209_card_power_on(struct rtsx_pcr *pcr, int card)
95 partial_pwr_on = SD_PARTIAL_POWER_ON; 116 partial_pwr_on = SD_PARTIAL_POWER_ON;
96 pwr_on = SD_POWER_ON; 117 pwr_on = SD_POWER_ON;
97 118
98 if (pcr->ms_pmos && (card == RTSX_MS_CARD)) { 119 if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
99 pwr_mask = MS_POWER_MASK; 120 pwr_mask = MS_POWER_MASK;
100 partial_pwr_on = MS_PARTIAL_POWER_ON; 121 partial_pwr_on = MS_PARTIAL_POWER_ON;
101 pwr_on = MS_POWER_ON; 122 pwr_on = MS_POWER_ON;
@@ -131,7 +152,7 @@ static int rts5209_card_power_off(struct rtsx_pcr *pcr, int card)
131 pwr_mask = SD_POWER_MASK; 152 pwr_mask = SD_POWER_MASK;
132 pwr_off = SD_POWER_OFF; 153 pwr_off = SD_POWER_OFF;
133 154
134 if (pcr->ms_pmos && (card == RTSX_MS_CARD)) { 155 if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
135 pwr_mask = MS_POWER_MASK; 156 pwr_mask = MS_POWER_MASK;
136 pwr_off = MS_POWER_OFF; 157 pwr_off = MS_POWER_OFF;
137 } 158 }
@@ -140,7 +161,7 @@ static int rts5209_card_power_off(struct rtsx_pcr *pcr, int card)
140 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, 161 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
141 pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA); 162 pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA);
142 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, 163 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
143 LDO3318_PWR_MASK, 0X06); 164 LDO3318_PWR_MASK, 0x06);
144 return rtsx_pci_send_cmd(pcr, 100); 165 return rtsx_pci_send_cmd(pcr, 100);
145} 166}
146 167
@@ -150,7 +171,7 @@ static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
150 171
151 if (voltage == OUTPUT_3V3) { 172 if (voltage == OUTPUT_3V3) {
152 err = rtsx_pci_write_register(pcr, 173 err = rtsx_pci_write_register(pcr,
153 SD30_DRIVE_SEL, 0x07, DRIVER_TYPE_D); 174 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
154 if (err < 0) 175 if (err < 0)
155 return err; 176 return err;
156 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24); 177 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
@@ -158,7 +179,7 @@ static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
158 return err; 179 return err;
159 } else if (voltage == OUTPUT_1V8) { 180 } else if (voltage == OUTPUT_1V8) {
160 err = rtsx_pci_write_register(pcr, 181 err = rtsx_pci_write_register(pcr,
161 SD30_DRIVE_SEL, 0x07, DRIVER_TYPE_B); 182 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
162 if (err < 0) 183 if (err < 0)
163 return err; 184 return err;
164 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24); 185 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
@@ -172,6 +193,7 @@ static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
172} 193}
173 194
174static const struct pcr_ops rts5209_pcr_ops = { 195static const struct pcr_ops rts5209_pcr_ops = {
196 .fetch_vendor_settings = rts5209_fetch_vendor_settings,
175 .extra_init_hw = rts5209_extra_init_hw, 197 .extra_init_hw = rts5209_extra_init_hw,
176 .optimize_phy = rts5209_optimize_phy, 198 .optimize_phy = rts5209_optimize_phy,
177 .turn_on_led = rts5209_turn_on_led, 199 .turn_on_led = rts5209_turn_on_led,
@@ -183,6 +205,7 @@ static const struct pcr_ops rts5209_pcr_ops = {
183 .switch_output_voltage = rts5209_switch_output_voltage, 205 .switch_output_voltage = rts5209_switch_output_voltage,
184 .cd_deglitch = NULL, 206 .cd_deglitch = NULL,
185 .conv_clk_and_div_n = NULL, 207 .conv_clk_and_div_n = NULL,
208 .force_power_down = rts5209_force_power_down,
186}; 209};
187 210
188/* SD Pull Control Enable: 211/* SD Pull Control Enable:
@@ -242,7 +265,13 @@ void rts5209_init_params(struct rtsx_pcr *pcr)
242 pcr->num_slots = 2; 265 pcr->num_slots = 2;
243 pcr->ops = &rts5209_pcr_ops; 266 pcr->ops = &rts5209_pcr_ops;
244 267
245 rts5209_init_vendor_cfg(pcr); 268 pcr->flags = 0;
269 pcr->card_drive_sel = RTS5209_CARD_DRIVE_DEFAULT;
270 pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
271 pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
272 pcr->aspm_en = ASPM_L1_EN;
273 pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 16);
274 pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);
246 275
247 pcr->ic_version = rts5209_get_ic_version(pcr); 276 pcr->ic_version = rts5209_get_ic_version(pcr);
248 pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl; 277 pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl;