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path: root/drivers/mfd/mc13xxx-spi.c
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Diffstat (limited to 'drivers/mfd/mc13xxx-spi.c')
-rw-r--r--drivers/mfd/mc13xxx-spi.c67
1 files changed, 65 insertions, 2 deletions
diff --git a/drivers/mfd/mc13xxx-spi.c b/drivers/mfd/mc13xxx-spi.c
index 3fcdab3eb8eb..03df422feb76 100644
--- a/drivers/mfd/mc13xxx-spi.c
+++ b/drivers/mfd/mc13xxx-spi.c
@@ -49,10 +49,72 @@ static struct regmap_config mc13xxx_regmap_spi_config = {
49 .reg_bits = 7, 49 .reg_bits = 7,
50 .pad_bits = 1, 50 .pad_bits = 1,
51 .val_bits = 24, 51 .val_bits = 24,
52 .write_flag_mask = 0x80,
52 53
53 .max_register = MC13XXX_NUMREGS, 54 .max_register = MC13XXX_NUMREGS,
54 55
55 .cache_type = REGCACHE_NONE, 56 .cache_type = REGCACHE_NONE,
57 .use_single_rw = 1,
58};
59
60static int mc13xxx_spi_read(void *context, const void *reg, size_t reg_size,
61 void *val, size_t val_size)
62{
63 unsigned char w[4] = { *((unsigned char *) reg), 0, 0, 0};
64 unsigned char r[4];
65 unsigned char *p = val;
66 struct device *dev = context;
67 struct spi_device *spi = to_spi_device(dev);
68 struct spi_transfer t = {
69 .tx_buf = w,
70 .rx_buf = r,
71 .len = 4,
72 };
73
74 struct spi_message m;
75 int ret;
76
77 if (val_size != 3 || reg_size != 1)
78 return -ENOTSUPP;
79
80 spi_message_init(&m);
81 spi_message_add_tail(&t, &m);
82 ret = spi_sync(spi, &m);
83
84 memcpy(p, &r[1], 3);
85
86 return ret;
87}
88
89static int mc13xxx_spi_write(void *context, const void *data, size_t count)
90{
91 struct device *dev = context;
92 struct spi_device *spi = to_spi_device(dev);
93
94 if (count != 4)
95 return -ENOTSUPP;
96
97 return spi_write(spi, data, count);
98}
99
100/*
101 * We cannot use regmap-spi generic bus implementation here.
102 * The MC13783 chip will get corrupted if CS signal is deasserted
103 * and on i.Mx31 SoC (the target SoC for MC13783 PMIC) the SPI controller
104 * has the following errata (DSPhl22960):
105 * "The CSPI negates SS when the FIFO becomes empty with
106 * SSCTL= 0. Software cannot guarantee that the FIFO will not
107 * drain because of higher priority interrupts and the
108 * non-realtime characteristics of the operating system. As a
109 * result, the SS will negate before all of the data has been
110 * transferred to/from the peripheral."
111 * We workaround this by accessing the SPI controller with a
112 * single transfert.
113 */
114
115static struct regmap_bus regmap_mc13xxx_bus = {
116 .write = mc13xxx_spi_write,
117 .read = mc13xxx_spi_read,
56}; 118};
57 119
58static int mc13xxx_spi_probe(struct spi_device *spi) 120static int mc13xxx_spi_probe(struct spi_device *spi)
@@ -73,12 +135,13 @@ static int mc13xxx_spi_probe(struct spi_device *spi)
73 135
74 dev_set_drvdata(&spi->dev, mc13xxx); 136 dev_set_drvdata(&spi->dev, mc13xxx);
75 spi->mode = SPI_MODE_0 | SPI_CS_HIGH; 137 spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
76 spi->bits_per_word = 32;
77 138
78 mc13xxx->dev = &spi->dev; 139 mc13xxx->dev = &spi->dev;
79 mutex_init(&mc13xxx->lock); 140 mutex_init(&mc13xxx->lock);
80 141
81 mc13xxx->regmap = regmap_init_spi(spi, &mc13xxx_regmap_spi_config); 142 mc13xxx->regmap = regmap_init(&spi->dev, &regmap_mc13xxx_bus, &spi->dev,
143 &mc13xxx_regmap_spi_config);
144
82 if (IS_ERR(mc13xxx->regmap)) { 145 if (IS_ERR(mc13xxx->regmap)) {
83 ret = PTR_ERR(mc13xxx->regmap); 146 ret = PTR_ERR(mc13xxx->regmap);
84 dev_err(mc13xxx->dev, "Failed to initialize register map: %d\n", 147 dev_err(mc13xxx->dev, "Failed to initialize register map: %d\n",