diff options
Diffstat (limited to 'drivers/media/video/ivtv/ivtv-driver.h')
-rw-r--r-- | drivers/media/video/ivtv/ivtv-driver.h | 113 |
1 files changed, 16 insertions, 97 deletions
diff --git a/drivers/media/video/ivtv/ivtv-driver.h b/drivers/media/video/ivtv/ivtv-driver.h index f7849f852e9d..b9dfdab66362 100644 --- a/drivers/media/video/ivtv/ivtv-driver.h +++ b/drivers/media/video/ivtv/ivtv-driver.h | |||
@@ -65,12 +65,11 @@ | |||
65 | #include <media/ivtv.h> | 65 | #include <media/ivtv.h> |
66 | 66 | ||
67 | 67 | ||
68 | /* Memory layout */ | ||
68 | #define IVTV_ENCODER_OFFSET 0x00000000 | 69 | #define IVTV_ENCODER_OFFSET 0x00000000 |
69 | #define IVTV_ENCODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */ | 70 | #define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */ |
70 | |||
71 | #define IVTV_DECODER_OFFSET 0x01000000 | 71 | #define IVTV_DECODER_OFFSET 0x01000000 |
72 | #define IVTV_DECODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */ | 72 | #define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */ |
73 | |||
74 | #define IVTV_REG_OFFSET 0x02000000 | 73 | #define IVTV_REG_OFFSET 0x02000000 |
75 | #define IVTV_REG_SIZE 0x00010000 | 74 | #define IVTV_REG_SIZE 0x00010000 |
76 | 75 | ||
@@ -89,51 +88,8 @@ | |||
89 | #define IVTV_DEC_STREAM_TYPE_YUV 8 | 88 | #define IVTV_DEC_STREAM_TYPE_YUV 8 |
90 | #define IVTV_MAX_STREAMS 9 | 89 | #define IVTV_MAX_STREAMS 9 |
91 | 90 | ||
92 | #define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */ | ||
93 | #define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */ | ||
94 | #define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */ | ||
95 | #define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */ | ||
96 | #define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */ | ||
97 | #define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */ | ||
98 | |||
99 | #define IVTV_ENC_MEM_START 0x00000000 | ||
100 | #define IVTV_DEC_MEM_START 0x01000000 | ||
101 | |||
102 | /* Decoder Buffer hardware size on Chip */ | ||
103 | #define IVTV_DEC_MAX_BUF 0x00100000 /* max bytes in decoder buffer */ | ||
104 | #define IVTV_DEC_MIN_BUF 0x00010000 /* min bytes in dec buffer */ | ||
105 | |||
106 | /* ======================================================================== */ | ||
107 | /* ========================== START USER SETTABLE DMA VARIABLES =========== */ | ||
108 | /* ======================================================================== */ | ||
109 | |||
110 | #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */ | 91 | #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */ |
111 | 92 | ||
112 | /* DMA Buffers, Default size in MB allocated */ | ||
113 | #define IVTV_DEFAULT_ENC_MPG_BUFFERS 4 | ||
114 | #define IVTV_DEFAULT_ENC_YUV_BUFFERS 2 | ||
115 | #define IVTV_DEFAULT_ENC_VBI_BUFFERS 1 | ||
116 | /* Exception: size in kB for this stream (MB is overkill) */ | ||
117 | #define IVTV_DEFAULT_ENC_PCM_BUFFERS 320 | ||
118 | #define IVTV_DEFAULT_DEC_MPG_BUFFERS 1 | ||
119 | #define IVTV_DEFAULT_DEC_YUV_BUFFERS 1 | ||
120 | /* Exception: size in kB for this stream (MB is way overkill) */ | ||
121 | #define IVTV_DEFAULT_DEC_VBI_BUFFERS 64 | ||
122 | |||
123 | /* ======================================================================== */ | ||
124 | /* ========================== END USER SETTABLE DMA VARIABLES ============= */ | ||
125 | /* ======================================================================== */ | ||
126 | |||
127 | /* Decoder Status Register */ | ||
128 | #define IVTV_DMA_ERR_LIST 0x00000010 | ||
129 | #define IVTV_DMA_ERR_WRITE 0x00000008 | ||
130 | #define IVTV_DMA_ERR_READ 0x00000004 | ||
131 | #define IVTV_DMA_SUCCESS_WRITE 0x00000002 | ||
132 | #define IVTV_DMA_SUCCESS_READ 0x00000001 | ||
133 | #define IVTV_DMA_READ_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ) | ||
134 | #define IVTV_DMA_WRITE_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE) | ||
135 | #define IVTV_DMA_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ) | ||
136 | |||
137 | /* DMA Registers */ | 93 | /* DMA Registers */ |
138 | #define IVTV_REG_DMAXFER (0x0000) | 94 | #define IVTV_REG_DMAXFER (0x0000) |
139 | #define IVTV_REG_DMASTATUS (0x0004) | 95 | #define IVTV_REG_DMASTATUS (0x0004) |
@@ -156,32 +112,11 @@ | |||
156 | #define IVTV_REG_VPU (0x9058) | 112 | #define IVTV_REG_VPU (0x9058) |
157 | #define IVTV_REG_APU (0xA064) | 113 | #define IVTV_REG_APU (0xA064) |
158 | 114 | ||
159 | #define IVTV_IRQ_ENC_START_CAP (0x1 << 31) | ||
160 | #define IVTV_IRQ_ENC_EOS (0x1 << 30) | ||
161 | #define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29) | ||
162 | #define IVTV_IRQ_ENC_VIM_RST (0x1 << 28) | ||
163 | #define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27) | ||
164 | #define IVTV_IRQ_ENC_PIO_COMPLETE (0x1 << 25) | ||
165 | #define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24) | ||
166 | #define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22) | ||
167 | #define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20) | ||
168 | #define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19) | ||
169 | #define IVTV_IRQ_DMA_ERR (0x1 << 18) | ||
170 | #define IVTV_IRQ_DMA_WRITE (0x1 << 17) | ||
171 | #define IVTV_IRQ_DMA_READ (0x1 << 16) | ||
172 | #define IVTV_IRQ_DEC_VSYNC (0x1 << 10) | ||
173 | |||
174 | /* IRQ Masks */ | ||
175 | #define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\ | ||
176 | IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE) | ||
177 | |||
178 | #define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS) | ||
179 | #define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG) | ||
180 | |||
181 | /* i2c stuff */ | 115 | /* i2c stuff */ |
182 | #define I2C_CLIENTS_MAX 16 | 116 | #define I2C_CLIENTS_MAX 16 |
183 | 117 | ||
184 | /* debugging */ | 118 | /* debugging */ |
119 | extern int ivtv_debug; | ||
185 | 120 | ||
186 | #define IVTV_DBGFLG_WARN (1 << 0) | 121 | #define IVTV_DBGFLG_WARN (1 << 0) |
187 | #define IVTV_DBGFLG_INFO (1 << 1) | 122 | #define IVTV_DBGFLG_INFO (1 << 1) |
@@ -235,11 +170,6 @@ | |||
235 | #define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args) | 170 | #define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args) |
236 | #define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args) | 171 | #define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args) |
237 | 172 | ||
238 | /* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */ | ||
239 | #define MPEG_FRAME_TYPE_IFRAME 1 | ||
240 | #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3 | ||
241 | #define MPEG_FRAME_TYPE_ALL 7 | ||
242 | |||
243 | /* output modes (cx23415 only) */ | 173 | /* output modes (cx23415 only) */ |
244 | #define OUT_NONE 0 | 174 | #define OUT_NONE 0 |
245 | #define OUT_MPG 1 | 175 | #define OUT_MPG 1 |
@@ -249,9 +179,6 @@ | |||
249 | 179 | ||
250 | #define IVTV_MAX_PGM_INDEX (400) | 180 | #define IVTV_MAX_PGM_INDEX (400) |
251 | 181 | ||
252 | extern int ivtv_debug; | ||
253 | |||
254 | |||
255 | struct ivtv_options { | 182 | struct ivtv_options { |
256 | int kilobytes[IVTV_MAX_STREAMS]; /* Size in kilobytes of each stream */ | 183 | int kilobytes[IVTV_MAX_STREAMS]; /* Size in kilobytes of each stream */ |
257 | int cardtype; /* force card type on load */ | 184 | int cardtype; /* force card type on load */ |
@@ -260,11 +187,6 @@ struct ivtv_options { | |||
260 | int newi2c; /* New I2C algorithm */ | 187 | int newi2c; /* New I2C algorithm */ |
261 | }; | 188 | }; |
262 | 189 | ||
263 | #define IVTV_MBOX_DMA_START 6 | ||
264 | #define IVTV_MBOX_DMA_END 8 | ||
265 | #define IVTV_MBOX_DMA 9 | ||
266 | #define IVTV_MBOX_FIELD_DISPLAYED 8 | ||
267 | |||
268 | /* ivtv-specific mailbox template */ | 190 | /* ivtv-specific mailbox template */ |
269 | struct ivtv_mailbox { | 191 | struct ivtv_mailbox { |
270 | u32 flags; | 192 | u32 flags; |
@@ -450,31 +372,28 @@ struct ivtv_open_id { | |||
450 | struct ivtv *itv; | 372 | struct ivtv *itv; |
451 | }; | 373 | }; |
452 | 374 | ||
453 | #define IVTV_YUV_UPDATE_HORIZONTAL 0x01 | ||
454 | #define IVTV_YUV_UPDATE_VERTICAL 0x02 | ||
455 | |||
456 | struct yuv_frame_info | 375 | struct yuv_frame_info |
457 | { | 376 | { |
458 | u32 update; | 377 | u32 update; |
459 | int src_x; | 378 | s32 src_x; |
460 | int src_y; | 379 | s32 src_y; |
461 | unsigned int src_w; | 380 | u32 src_w; |
462 | unsigned int src_h; | 381 | u32 src_h; |
463 | int dst_x; | 382 | s32 dst_x; |
464 | int dst_y; | 383 | s32 dst_y; |
465 | unsigned int dst_w; | 384 | u32 dst_w; |
466 | unsigned int dst_h; | 385 | u32 dst_h; |
467 | int pan_x; | 386 | s32 pan_x; |
468 | int pan_y; | 387 | s32 pan_y; |
469 | u32 vis_w; | 388 | u32 vis_w; |
470 | u32 vis_h; | 389 | u32 vis_h; |
471 | u32 interlaced_y; | 390 | u32 interlaced_y; |
472 | u32 interlaced_uv; | 391 | u32 interlaced_uv; |
473 | int tru_x; | 392 | s32 tru_x; |
474 | u32 tru_w; | 393 | u32 tru_w; |
475 | u32 tru_h; | 394 | u32 tru_h; |
476 | u32 offset_y; | 395 | u32 offset_y; |
477 | int lace_mode; | 396 | s32 lace_mode; |
478 | }; | 397 | }; |
479 | 398 | ||
480 | #define IVTV_YUV_MODE_INTERLACED 0x00 | 399 | #define IVTV_YUV_MODE_INTERLACED 0x00 |