diff options
Diffstat (limited to 'drivers/media/video/cx18/cx18-driver.h')
-rw-r--r-- | drivers/media/video/cx18/cx18-driver.h | 78 |
1 files changed, 54 insertions, 24 deletions
diff --git a/drivers/media/video/cx18/cx18-driver.h b/drivers/media/video/cx18/cx18-driver.h index bbdd5f25041d..0d2edebc39b4 100644 --- a/drivers/media/video/cx18/cx18-driver.h +++ b/drivers/media/video/cx18/cx18-driver.h | |||
@@ -4,6 +4,7 @@ | |||
4 | * Derived from ivtv-driver.h | 4 | * Derived from ivtv-driver.h |
5 | * | 5 | * |
6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | 6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> |
7 | * Copyright (C) 2008 Andy Walls <awalls@radix.net> | ||
7 | * | 8 | * |
8 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 10 | * it under the terms of the GNU General Public License as published by |
@@ -64,9 +65,6 @@ | |||
64 | # error "This driver requires kernel PCI support." | 65 | # error "This driver requires kernel PCI support." |
65 | #endif | 66 | #endif |
66 | 67 | ||
67 | /* Default delay to throttle mmio access to the CX23418 */ | ||
68 | #define CX18_DEFAULT_MMIO_NDELAY 0 /* 0 ns = 0 PCI clock(s) / 33 MHz */ | ||
69 | |||
70 | #define CX18_MEM_OFFSET 0x00000000 | 68 | #define CX18_MEM_OFFSET 0x00000000 |
71 | #define CX18_MEM_SIZE 0x04000000 | 69 | #define CX18_MEM_SIZE 0x04000000 |
72 | #define CX18_REG_OFFSET 0x02000000 | 70 | #define CX18_REG_OFFSET 0x02000000 |
@@ -117,6 +115,17 @@ | |||
117 | #define CX18_DEFAULT_ENC_VBI_BUFFERS 1 | 115 | #define CX18_DEFAULT_ENC_VBI_BUFFERS 1 |
118 | #define CX18_DEFAULT_ENC_PCM_BUFFERS 1 | 116 | #define CX18_DEFAULT_ENC_PCM_BUFFERS 1 |
119 | 117 | ||
118 | /* Maximum firmware DMA buffers per stream */ | ||
119 | #define CX18_MAX_FW_MDLS_PER_STREAM 63 | ||
120 | |||
121 | /* DMA buffer, default size in kB allocated */ | ||
122 | #define CX18_DEFAULT_ENC_TS_BUFSIZE 32 | ||
123 | #define CX18_DEFAULT_ENC_MPG_BUFSIZE 32 | ||
124 | #define CX18_DEFAULT_ENC_IDX_BUFSIZE 32 | ||
125 | #define CX18_DEFAULT_ENC_YUV_BUFSIZE 128 | ||
126 | /* Default VBI bufsize based on standards supported by card tuner for now */ | ||
127 | #define CX18_DEFAULT_ENC_PCM_BUFSIZE 4 | ||
128 | |||
120 | /* i2c stuff */ | 129 | /* i2c stuff */ |
121 | #define I2C_CLIENTS_MAX 16 | 130 | #define I2C_CLIENTS_MAX 16 |
122 | 131 | ||
@@ -176,7 +185,6 @@ | |||
176 | 185 | ||
177 | #define CX18_MAX_PGM_INDEX (400) | 186 | #define CX18_MAX_PGM_INDEX (400) |
178 | 187 | ||
179 | extern int cx18_retry_mmio; /* enable check & retry of mmio accesses */ | ||
180 | extern int cx18_debug; | 188 | extern int cx18_debug; |
181 | 189 | ||
182 | 190 | ||
@@ -185,7 +193,6 @@ struct cx18_options { | |||
185 | int cardtype; /* force card type on load */ | 193 | int cardtype; /* force card type on load */ |
186 | int tuner; /* set tuner on load */ | 194 | int tuner; /* set tuner on load */ |
187 | int radio; /* enable/disable radio */ | 195 | int radio; /* enable/disable radio */ |
188 | unsigned long mmio_ndelay; /* delay in ns after every PCI mmio access */ | ||
189 | }; | 196 | }; |
190 | 197 | ||
191 | /* per-buffer bit flags */ | 198 | /* per-buffer bit flags */ |
@@ -203,11 +210,8 @@ struct cx18_options { | |||
203 | #define CX18_F_I_EOS 4 /* End of encoder stream */ | 210 | #define CX18_F_I_EOS 4 /* End of encoder stream */ |
204 | #define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */ | 211 | #define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */ |
205 | #define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */ | 212 | #define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */ |
206 | #define CX18_F_I_HAVE_WORK 15 /* there is work to be done */ | ||
207 | #define CX18_F_I_WORK_HANDLER_DVB 18 /* work to be done for DVB */ | ||
208 | #define CX18_F_I_INITED 21 /* set after first open */ | 213 | #define CX18_F_I_INITED 21 /* set after first open */ |
209 | #define CX18_F_I_FAILED 22 /* set if first open failed */ | 214 | #define CX18_F_I_FAILED 22 /* set if first open failed */ |
210 | #define CX18_F_I_WORK_INITED 23 /* worker thread initialized */ | ||
211 | 215 | ||
212 | /* These are the VBI types as they appear in the embedded VBI private packets. */ | 216 | /* These are the VBI types as they appear in the embedded VBI private packets. */ |
213 | #define CX18_SLICED_TYPE_TELETEXT_B (1) | 217 | #define CX18_SLICED_TYPE_TELETEXT_B (1) |
@@ -220,6 +224,7 @@ struct cx18_buffer { | |||
220 | dma_addr_t dma_handle; | 224 | dma_addr_t dma_handle; |
221 | u32 id; | 225 | u32 id; |
222 | unsigned long b_flags; | 226 | unsigned long b_flags; |
227 | unsigned skipped; | ||
223 | char *buf; | 228 | char *buf; |
224 | 229 | ||
225 | u32 bytesused; | 230 | u32 bytesused; |
@@ -248,6 +253,27 @@ struct cx18_dvb { | |||
248 | struct cx18; /* forward reference */ | 253 | struct cx18; /* forward reference */ |
249 | struct cx18_scb; /* forward reference */ | 254 | struct cx18_scb; /* forward reference */ |
250 | 255 | ||
256 | |||
257 | #define CX18_MAX_MDL_ACKS 2 | ||
258 | #define CX18_MAX_EPU_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7) | ||
259 | /* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */ | ||
260 | |||
261 | #define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1 | ||
262 | #define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2 | ||
263 | #define CX18_F_EWO_MB_STALE \ | ||
264 | (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC) | ||
265 | |||
266 | struct cx18_epu_work_order { | ||
267 | struct work_struct work; | ||
268 | atomic_t pending; | ||
269 | struct cx18 *cx; | ||
270 | unsigned long flags; | ||
271 | int rpu; | ||
272 | struct cx18_mailbox mb; | ||
273 | struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS]; | ||
274 | char *str; | ||
275 | }; | ||
276 | |||
251 | #define CX18_INVALID_TASK_HANDLE 0xffffffff | 277 | #define CX18_INVALID_TASK_HANDLE 0xffffffff |
252 | 278 | ||
253 | struct cx18_stream { | 279 | struct cx18_stream { |
@@ -261,7 +287,7 @@ struct cx18_stream { | |||
261 | unsigned mdl_offset; | 287 | unsigned mdl_offset; |
262 | 288 | ||
263 | u32 id; | 289 | u32 id; |
264 | spinlock_t qlock; /* locks access to the queues */ | 290 | struct mutex qlock; /* locks access to the queues */ |
265 | unsigned long s_flags; /* status flags, see above */ | 291 | unsigned long s_flags; /* status flags, see above */ |
266 | int dma; /* can be PCI_DMA_TODEVICE, | 292 | int dma; /* can be PCI_DMA_TODEVICE, |
267 | PCI_DMA_FROMDEVICE or | 293 | PCI_DMA_FROMDEVICE or |
@@ -275,8 +301,8 @@ struct cx18_stream { | |||
275 | 301 | ||
276 | /* Buffer Queues */ | 302 | /* Buffer Queues */ |
277 | struct cx18_queue q_free; /* free buffers */ | 303 | struct cx18_queue q_free; /* free buffers */ |
278 | struct cx18_queue q_full; /* full buffers */ | 304 | struct cx18_queue q_busy; /* busy buffers - in use by firmware */ |
279 | struct cx18_queue q_io; /* waiting for I/O */ | 305 | struct cx18_queue q_full; /* full buffers - data for user apps */ |
280 | 306 | ||
281 | /* DVB / Digital Transport */ | 307 | /* DVB / Digital Transport */ |
282 | struct cx18_dvb dvb; | 308 | struct cx18_dvb dvb; |
@@ -353,12 +379,7 @@ struct cx18_i2c_algo_callback_data { | |||
353 | int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */ | 379 | int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */ |
354 | }; | 380 | }; |
355 | 381 | ||
356 | #define CX18_MAX_MMIO_RETRIES 10 | 382 | #define CX18_MAX_MMIO_WR_RETRIES 10 |
357 | |||
358 | struct cx18_mmio_stats { | ||
359 | atomic_t retried_write[CX18_MAX_MMIO_RETRIES+1]; | ||
360 | atomic_t retried_read[CX18_MAX_MMIO_RETRIES+1]; | ||
361 | }; | ||
362 | 383 | ||
363 | /* Struct to hold info about cx18 cards */ | 384 | /* Struct to hold info about cx18 cards */ |
364 | struct cx18 { | 385 | struct cx18 { |
@@ -378,7 +399,9 @@ struct cx18 { | |||
378 | u32 v4l2_cap; /* V4L2 capabilities of card */ | 399 | u32 v4l2_cap; /* V4L2 capabilities of card */ |
379 | u32 hw_flags; /* Hardware description of the board */ | 400 | u32 hw_flags; /* Hardware description of the board */ |
380 | unsigned mdl_offset; | 401 | unsigned mdl_offset; |
381 | struct cx18_scb __iomem *scb; /* pointer to SCB */ | 402 | struct cx18_scb __iomem *scb; /* pointer to SCB */ |
403 | struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/ | ||
404 | struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/ | ||
382 | 405 | ||
383 | struct cx18_av_state av_state; | 406 | struct cx18_av_state av_state; |
384 | 407 | ||
@@ -397,6 +420,7 @@ struct cx18 { | |||
397 | 420 | ||
398 | struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */ | 421 | struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */ |
399 | struct cx18_options options; /* User options */ | 422 | struct cx18_options options; /* User options */ |
423 | int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */ | ||
400 | int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */ | 424 | int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */ |
401 | struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */ | 425 | struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */ |
402 | unsigned long i_flags; /* global cx18 flags */ | 426 | unsigned long i_flags; /* global cx18 flags */ |
@@ -428,14 +452,17 @@ struct cx18 { | |||
428 | 452 | ||
429 | wait_queue_head_t mb_apu_waitq; | 453 | wait_queue_head_t mb_apu_waitq; |
430 | wait_queue_head_t mb_cpu_waitq; | 454 | wait_queue_head_t mb_cpu_waitq; |
431 | wait_queue_head_t mb_epu_waitq; | ||
432 | wait_queue_head_t mb_hpu_waitq; | ||
433 | wait_queue_head_t cap_w; | 455 | wait_queue_head_t cap_w; |
434 | /* when the current DMA is finished this queue is woken up */ | 456 | /* when the current DMA is finished this queue is woken up */ |
435 | wait_queue_head_t dma_waitq; | 457 | wait_queue_head_t dma_waitq; |
436 | 458 | ||
459 | u32 sw1_irq_mask; | ||
460 | u32 sw2_irq_mask; | ||
461 | u32 hw2_irq_mask; | ||
462 | |||
437 | struct workqueue_struct *work_queue; | 463 | struct workqueue_struct *work_queue; |
438 | struct work_struct work; | 464 | struct cx18_epu_work_order epu_work_order[CX18_MAX_EPU_WORK_ORDERS]; |
465 | char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */ | ||
439 | 466 | ||
440 | /* i2c */ | 467 | /* i2c */ |
441 | struct i2c_adapter i2c_adap[2]; | 468 | struct i2c_adapter i2c_adap[2]; |
@@ -450,9 +477,6 @@ struct cx18 { | |||
450 | u32 gpio_val; | 477 | u32 gpio_val; |
451 | struct mutex gpio_lock; | 478 | struct mutex gpio_lock; |
452 | 479 | ||
453 | /* Statistics */ | ||
454 | struct cx18_mmio_stats mmio_stats; | ||
455 | |||
456 | /* v4l2 and User settings */ | 480 | /* v4l2 and User settings */ |
457 | 481 | ||
458 | /* codec settings */ | 482 | /* codec settings */ |
@@ -481,4 +505,10 @@ void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv); | |||
481 | /* First-open initialization: load firmware, etc. */ | 505 | /* First-open initialization: load firmware, etc. */ |
482 | int cx18_init_on_first_open(struct cx18 *cx); | 506 | int cx18_init_on_first_open(struct cx18 *cx); |
483 | 507 | ||
508 | /* Test if the current VBI mode is raw (1) or sliced (0) */ | ||
509 | static inline int cx18_raw_vbi(const struct cx18 *cx) | ||
510 | { | ||
511 | return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE; | ||
512 | } | ||
513 | |||
484 | #endif /* CX18_DRIVER_H */ | 514 | #endif /* CX18_DRIVER_H */ |