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-rw-r--r--drivers/media/platform/vsp1/vsp1_bru.c14
-rw-r--r--drivers/media/platform/vsp1/vsp1_hsit.c12
-rw-r--r--drivers/media/platform/vsp1/vsp1_lif.c10
-rw-r--r--drivers/media/platform/vsp1/vsp1_lut.c14
-rw-r--r--drivers/media/platform/vsp1/vsp1_rwpf.c10
-rw-r--r--drivers/media/platform/vsp1/vsp1_sru.c12
-rw-r--r--drivers/media/platform/vsp1/vsp1_uds.c10
-rw-r--r--drivers/media/platform/vsp1/vsp1_video.c42
8 files changed, 62 insertions, 62 deletions
diff --git a/drivers/media/platform/vsp1/vsp1_bru.c b/drivers/media/platform/vsp1/vsp1_bru.c
index a0c1984c733e..b21f381a9862 100644
--- a/drivers/media/platform/vsp1/vsp1_bru.c
+++ b/drivers/media/platform/vsp1/vsp1_bru.c
@@ -187,8 +187,8 @@ static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
187 struct v4l2_subdev_mbus_code_enum *code) 187 struct v4l2_subdev_mbus_code_enum *code)
188{ 188{
189 static const unsigned int codes[] = { 189 static const unsigned int codes[] = {
190 V4L2_MBUS_FMT_ARGB8888_1X32, 190 MEDIA_BUS_FMT_ARGB8888_1X32,
191 V4L2_MBUS_FMT_AYUV8_1X32, 191 MEDIA_BUS_FMT_AYUV8_1X32,
192 }; 192 };
193 struct v4l2_mbus_framefmt *format; 193 struct v4l2_mbus_framefmt *format;
194 194
@@ -215,8 +215,8 @@ static int bru_enum_frame_size(struct v4l2_subdev *subdev,
215 if (fse->index) 215 if (fse->index)
216 return -EINVAL; 216 return -EINVAL;
217 217
218 if (fse->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 218 if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
219 fse->code != V4L2_MBUS_FMT_AYUV8_1X32) 219 fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
220 return -EINVAL; 220 return -EINVAL;
221 221
222 fse->min_width = BRU_MIN_SIZE; 222 fse->min_width = BRU_MIN_SIZE;
@@ -261,9 +261,9 @@ static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_fh *fh,
261 switch (pad) { 261 switch (pad) {
262 case BRU_PAD_SINK(0): 262 case BRU_PAD_SINK(0):
263 /* Default to YUV if the requested format is not supported. */ 263 /* Default to YUV if the requested format is not supported. */
264 if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 264 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
265 fmt->code != V4L2_MBUS_FMT_AYUV8_1X32) 265 fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
266 fmt->code = V4L2_MBUS_FMT_AYUV8_1X32; 266 fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
267 break; 267 break;
268 268
269 default: 269 default:
diff --git a/drivers/media/platform/vsp1/vsp1_hsit.c b/drivers/media/platform/vsp1/vsp1_hsit.c
index db2950a73c60..80bedc554ee3 100644
--- a/drivers/media/platform/vsp1/vsp1_hsit.c
+++ b/drivers/media/platform/vsp1/vsp1_hsit.c
@@ -70,9 +70,9 @@ static int hsit_enum_mbus_code(struct v4l2_subdev *subdev,
70 70
71 if ((code->pad == HSIT_PAD_SINK && !hsit->inverse) | 71 if ((code->pad == HSIT_PAD_SINK && !hsit->inverse) |
72 (code->pad == HSIT_PAD_SOURCE && hsit->inverse)) 72 (code->pad == HSIT_PAD_SOURCE && hsit->inverse))
73 code->code = V4L2_MBUS_FMT_ARGB8888_1X32; 73 code->code = MEDIA_BUS_FMT_ARGB8888_1X32;
74 else 74 else
75 code->code = V4L2_MBUS_FMT_AHSV8888_1X32; 75 code->code = MEDIA_BUS_FMT_AHSV8888_1X32;
76 76
77 return 0; 77 return 0;
78} 78}
@@ -136,8 +136,8 @@ static int hsit_set_format(struct v4l2_subdev *subdev,
136 return 0; 136 return 0;
137 } 137 }
138 138
139 format->code = hsit->inverse ? V4L2_MBUS_FMT_AHSV8888_1X32 139 format->code = hsit->inverse ? MEDIA_BUS_FMT_AHSV8888_1X32
140 : V4L2_MBUS_FMT_ARGB8888_1X32; 140 : MEDIA_BUS_FMT_ARGB8888_1X32;
141 format->width = clamp_t(unsigned int, fmt->format.width, 141 format->width = clamp_t(unsigned int, fmt->format.width,
142 HSIT_MIN_SIZE, HSIT_MAX_SIZE); 142 HSIT_MIN_SIZE, HSIT_MAX_SIZE);
143 format->height = clamp_t(unsigned int, fmt->format.height, 143 format->height = clamp_t(unsigned int, fmt->format.height,
@@ -151,8 +151,8 @@ static int hsit_set_format(struct v4l2_subdev *subdev,
151 format = vsp1_entity_get_pad_format(&hsit->entity, fh, HSIT_PAD_SOURCE, 151 format = vsp1_entity_get_pad_format(&hsit->entity, fh, HSIT_PAD_SOURCE,
152 fmt->which); 152 fmt->which);
153 *format = fmt->format; 153 *format = fmt->format;
154 format->code = hsit->inverse ? V4L2_MBUS_FMT_ARGB8888_1X32 154 format->code = hsit->inverse ? MEDIA_BUS_FMT_ARGB8888_1X32
155 : V4L2_MBUS_FMT_AHSV8888_1X32; 155 : MEDIA_BUS_FMT_AHSV8888_1X32;
156 156
157 return 0; 157 return 0;
158} 158}
diff --git a/drivers/media/platform/vsp1/vsp1_lif.c b/drivers/media/platform/vsp1/vsp1_lif.c
index d4fb23e9c4a8..17a6ca7dafe6 100644
--- a/drivers/media/platform/vsp1/vsp1_lif.c
+++ b/drivers/media/platform/vsp1/vsp1_lif.c
@@ -78,8 +78,8 @@ static int lif_enum_mbus_code(struct v4l2_subdev *subdev,
78 struct v4l2_subdev_mbus_code_enum *code) 78 struct v4l2_subdev_mbus_code_enum *code)
79{ 79{
80 static const unsigned int codes[] = { 80 static const unsigned int codes[] = {
81 V4L2_MBUS_FMT_ARGB8888_1X32, 81 MEDIA_BUS_FMT_ARGB8888_1X32,
82 V4L2_MBUS_FMT_AYUV8_1X32, 82 MEDIA_BUS_FMT_AYUV8_1X32,
83 }; 83 };
84 84
85 if (code->pad == LIF_PAD_SINK) { 85 if (code->pad == LIF_PAD_SINK) {
@@ -147,9 +147,9 @@ static int lif_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
147 struct v4l2_mbus_framefmt *format; 147 struct v4l2_mbus_framefmt *format;
148 148
149 /* Default to YUV if the requested format is not supported. */ 149 /* Default to YUV if the requested format is not supported. */
150 if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 && 150 if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
151 fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32) 151 fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32)
152 fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32; 152 fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32;
153 153
154 format = vsp1_entity_get_pad_format(&lif->entity, fh, fmt->pad, 154 format = vsp1_entity_get_pad_format(&lif->entity, fh, fmt->pad,
155 fmt->which); 155 fmt->which);
diff --git a/drivers/media/platform/vsp1/vsp1_lut.c b/drivers/media/platform/vsp1/vsp1_lut.c
index fea36ebe2565..6f185c3621fe 100644
--- a/drivers/media/platform/vsp1/vsp1_lut.c
+++ b/drivers/media/platform/vsp1/vsp1_lut.c
@@ -86,9 +86,9 @@ static int lut_enum_mbus_code(struct v4l2_subdev *subdev,
86 struct v4l2_subdev_mbus_code_enum *code) 86 struct v4l2_subdev_mbus_code_enum *code)
87{ 87{
88 static const unsigned int codes[] = { 88 static const unsigned int codes[] = {
89 V4L2_MBUS_FMT_ARGB8888_1X32, 89 MEDIA_BUS_FMT_ARGB8888_1X32,
90 V4L2_MBUS_FMT_AHSV8888_1X32, 90 MEDIA_BUS_FMT_AHSV8888_1X32,
91 V4L2_MBUS_FMT_AYUV8_1X32, 91 MEDIA_BUS_FMT_AYUV8_1X32,
92 }; 92 };
93 struct v4l2_mbus_framefmt *format; 93 struct v4l2_mbus_framefmt *format;
94 94
@@ -158,10 +158,10 @@ static int lut_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
158 struct v4l2_mbus_framefmt *format; 158 struct v4l2_mbus_framefmt *format;
159 159
160 /* Default to YUV if the requested format is not supported. */ 160 /* Default to YUV if the requested format is not supported. */
161 if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 && 161 if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
162 fmt->format.code != V4L2_MBUS_FMT_AHSV8888_1X32 && 162 fmt->format.code != MEDIA_BUS_FMT_AHSV8888_1X32 &&
163 fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32) 163 fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32)
164 fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32; 164 fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32;
165 165
166 format = vsp1_entity_get_pad_format(&lut->entity, fh, fmt->pad, 166 format = vsp1_entity_get_pad_format(&lut->entity, fh, fmt->pad,
167 fmt->which); 167 fmt->which);
diff --git a/drivers/media/platform/vsp1/vsp1_rwpf.c b/drivers/media/platform/vsp1/vsp1_rwpf.c
index ec3dab6a9b9b..1f1ba26a834a 100644
--- a/drivers/media/platform/vsp1/vsp1_rwpf.c
+++ b/drivers/media/platform/vsp1/vsp1_rwpf.c
@@ -29,8 +29,8 @@ int vsp1_rwpf_enum_mbus_code(struct v4l2_subdev *subdev,
29 struct v4l2_subdev_mbus_code_enum *code) 29 struct v4l2_subdev_mbus_code_enum *code)
30{ 30{
31 static const unsigned int codes[] = { 31 static const unsigned int codes[] = {
32 V4L2_MBUS_FMT_ARGB8888_1X32, 32 MEDIA_BUS_FMT_ARGB8888_1X32,
33 V4L2_MBUS_FMT_AYUV8_1X32, 33 MEDIA_BUS_FMT_AYUV8_1X32,
34 }; 34 };
35 35
36 if (code->index >= ARRAY_SIZE(codes)) 36 if (code->index >= ARRAY_SIZE(codes))
@@ -103,9 +103,9 @@ int vsp1_rwpf_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
103 struct v4l2_rect *crop; 103 struct v4l2_rect *crop;
104 104
105 /* Default to YUV if the requested format is not supported. */ 105 /* Default to YUV if the requested format is not supported. */
106 if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 && 106 if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
107 fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32) 107 fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32)
108 fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32; 108 fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32;
109 109
110 format = vsp1_entity_get_pad_format(&rwpf->entity, fh, fmt->pad, 110 format = vsp1_entity_get_pad_format(&rwpf->entity, fh, fmt->pad,
111 fmt->which); 111 fmt->which);
diff --git a/drivers/media/platform/vsp1/vsp1_sru.c b/drivers/media/platform/vsp1/vsp1_sru.c
index b7d3c8b9f189..1129494c7cfc 100644
--- a/drivers/media/platform/vsp1/vsp1_sru.c
+++ b/drivers/media/platform/vsp1/vsp1_sru.c
@@ -139,7 +139,7 @@ static int sru_s_stream(struct v4l2_subdev *subdev, int enable)
139 input = &sru->entity.formats[SRU_PAD_SINK]; 139 input = &sru->entity.formats[SRU_PAD_SINK];
140 output = &sru->entity.formats[SRU_PAD_SOURCE]; 140 output = &sru->entity.formats[SRU_PAD_SOURCE];
141 141
142 if (input->code == V4L2_MBUS_FMT_ARGB8888_1X32) 142 if (input->code == MEDIA_BUS_FMT_ARGB8888_1X32)
143 ctrl0 = VI6_SRU_CTRL0_PARAM2 | VI6_SRU_CTRL0_PARAM3 143 ctrl0 = VI6_SRU_CTRL0_PARAM2 | VI6_SRU_CTRL0_PARAM3
144 | VI6_SRU_CTRL0_PARAM4; 144 | VI6_SRU_CTRL0_PARAM4;
145 else 145 else
@@ -170,8 +170,8 @@ static int sru_enum_mbus_code(struct v4l2_subdev *subdev,
170 struct v4l2_subdev_mbus_code_enum *code) 170 struct v4l2_subdev_mbus_code_enum *code)
171{ 171{
172 static const unsigned int codes[] = { 172 static const unsigned int codes[] = {
173 V4L2_MBUS_FMT_ARGB8888_1X32, 173 MEDIA_BUS_FMT_ARGB8888_1X32,
174 V4L2_MBUS_FMT_AYUV8_1X32, 174 MEDIA_BUS_FMT_AYUV8_1X32,
175 }; 175 };
176 struct v4l2_mbus_framefmt *format; 176 struct v4l2_mbus_framefmt *format;
177 177
@@ -248,9 +248,9 @@ static void sru_try_format(struct vsp1_sru *sru, struct v4l2_subdev_fh *fh,
248 switch (pad) { 248 switch (pad) {
249 case SRU_PAD_SINK: 249 case SRU_PAD_SINK:
250 /* Default to YUV if the requested format is not supported. */ 250 /* Default to YUV if the requested format is not supported. */
251 if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 251 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
252 fmt->code != V4L2_MBUS_FMT_AYUV8_1X32) 252 fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
253 fmt->code = V4L2_MBUS_FMT_AYUV8_1X32; 253 fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
254 254
255 fmt->width = clamp(fmt->width, SRU_MIN_SIZE, SRU_MAX_SIZE); 255 fmt->width = clamp(fmt->width, SRU_MIN_SIZE, SRU_MAX_SIZE);
256 fmt->height = clamp(fmt->height, SRU_MIN_SIZE, SRU_MAX_SIZE); 256 fmt->height = clamp(fmt->height, SRU_MIN_SIZE, SRU_MAX_SIZE);
diff --git a/drivers/media/platform/vsp1/vsp1_uds.c b/drivers/media/platform/vsp1/vsp1_uds.c
index de92ef4944b3..a4afec133800 100644
--- a/drivers/media/platform/vsp1/vsp1_uds.c
+++ b/drivers/media/platform/vsp1/vsp1_uds.c
@@ -173,8 +173,8 @@ static int uds_enum_mbus_code(struct v4l2_subdev *subdev,
173 struct v4l2_subdev_mbus_code_enum *code) 173 struct v4l2_subdev_mbus_code_enum *code)
174{ 174{
175 static const unsigned int codes[] = { 175 static const unsigned int codes[] = {
176 V4L2_MBUS_FMT_ARGB8888_1X32, 176 MEDIA_BUS_FMT_ARGB8888_1X32,
177 V4L2_MBUS_FMT_AYUV8_1X32, 177 MEDIA_BUS_FMT_AYUV8_1X32,
178 }; 178 };
179 179
180 if (code->pad == UDS_PAD_SINK) { 180 if (code->pad == UDS_PAD_SINK) {
@@ -246,9 +246,9 @@ static void uds_try_format(struct vsp1_uds *uds, struct v4l2_subdev_fh *fh,
246 switch (pad) { 246 switch (pad) {
247 case UDS_PAD_SINK: 247 case UDS_PAD_SINK:
248 /* Default to YUV if the requested format is not supported. */ 248 /* Default to YUV if the requested format is not supported. */
249 if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 249 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
250 fmt->code != V4L2_MBUS_FMT_AYUV8_1X32) 250 fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
251 fmt->code = V4L2_MBUS_FMT_AYUV8_1X32; 251 fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
252 252
253 fmt->width = clamp(fmt->width, UDS_MIN_SIZE, UDS_MAX_SIZE); 253 fmt->width = clamp(fmt->width, UDS_MIN_SIZE, UDS_MAX_SIZE);
254 fmt->height = clamp(fmt->height, UDS_MIN_SIZE, UDS_MAX_SIZE); 254 fmt->height = clamp(fmt->height, UDS_MIN_SIZE, UDS_MAX_SIZE);
diff --git a/drivers/media/platform/vsp1/vsp1_video.c b/drivers/media/platform/vsp1/vsp1_video.c
index 915a20eb003e..d91f19a9e1c1 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -48,85 +48,85 @@
48 */ 48 */
49 49
50static const struct vsp1_format_info vsp1_video_formats[] = { 50static const struct vsp1_format_info vsp1_video_formats[] = {
51 { V4L2_PIX_FMT_RGB332, V4L2_MBUS_FMT_ARGB8888_1X32, 51 { V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32,
52 VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 52 VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
53 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 53 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
54 1, { 8, 0, 0 }, false, false, 1, 1, false }, 54 1, { 8, 0, 0 }, false, false, 1, 1, false },
55 { V4L2_PIX_FMT_ARGB444, V4L2_MBUS_FMT_ARGB8888_1X32, 55 { V4L2_PIX_FMT_ARGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
56 VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 56 VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
57 VI6_RPF_DSWAP_P_WDS, 57 VI6_RPF_DSWAP_P_WDS,
58 1, { 16, 0, 0 }, false, false, 1, 1, true }, 58 1, { 16, 0, 0 }, false, false, 1, 1, true },
59 { V4L2_PIX_FMT_XRGB444, V4L2_MBUS_FMT_ARGB8888_1X32, 59 { V4L2_PIX_FMT_XRGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
60 VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 60 VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
61 VI6_RPF_DSWAP_P_WDS, 61 VI6_RPF_DSWAP_P_WDS,
62 1, { 16, 0, 0 }, false, false, 1, 1, true }, 62 1, { 16, 0, 0 }, false, false, 1, 1, true },
63 { V4L2_PIX_FMT_ARGB555, V4L2_MBUS_FMT_ARGB8888_1X32, 63 { V4L2_PIX_FMT_ARGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
64 VI6_FMT_ARGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 64 VI6_FMT_ARGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
65 VI6_RPF_DSWAP_P_WDS, 65 VI6_RPF_DSWAP_P_WDS,
66 1, { 16, 0, 0 }, false, false, 1, 1, true }, 66 1, { 16, 0, 0 }, false, false, 1, 1, true },
67 { V4L2_PIX_FMT_XRGB555, V4L2_MBUS_FMT_ARGB8888_1X32, 67 { V4L2_PIX_FMT_XRGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
68 VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 68 VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
69 VI6_RPF_DSWAP_P_WDS, 69 VI6_RPF_DSWAP_P_WDS,
70 1, { 16, 0, 0 }, false, false, 1, 1, false }, 70 1, { 16, 0, 0 }, false, false, 1, 1, false },
71 { V4L2_PIX_FMT_RGB565, V4L2_MBUS_FMT_ARGB8888_1X32, 71 { V4L2_PIX_FMT_RGB565, MEDIA_BUS_FMT_ARGB8888_1X32,
72 VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 72 VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
73 VI6_RPF_DSWAP_P_WDS, 73 VI6_RPF_DSWAP_P_WDS,
74 1, { 16, 0, 0 }, false, false, 1, 1, false }, 74 1, { 16, 0, 0 }, false, false, 1, 1, false },
75 { V4L2_PIX_FMT_BGR24, V4L2_MBUS_FMT_ARGB8888_1X32, 75 { V4L2_PIX_FMT_BGR24, MEDIA_BUS_FMT_ARGB8888_1X32,
76 VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 76 VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
77 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 77 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
78 1, { 24, 0, 0 }, false, false, 1, 1, false }, 78 1, { 24, 0, 0 }, false, false, 1, 1, false },
79 { V4L2_PIX_FMT_RGB24, V4L2_MBUS_FMT_ARGB8888_1X32, 79 { V4L2_PIX_FMT_RGB24, MEDIA_BUS_FMT_ARGB8888_1X32,
80 VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 80 VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
81 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 81 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
82 1, { 24, 0, 0 }, false, false, 1, 1, false }, 82 1, { 24, 0, 0 }, false, false, 1, 1, false },
83 { V4L2_PIX_FMT_ABGR32, V4L2_MBUS_FMT_ARGB8888_1X32, 83 { V4L2_PIX_FMT_ABGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
84 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS, 84 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
85 1, { 32, 0, 0 }, false, false, 1, 1, true }, 85 1, { 32, 0, 0 }, false, false, 1, 1, true },
86 { V4L2_PIX_FMT_XBGR32, V4L2_MBUS_FMT_ARGB8888_1X32, 86 { V4L2_PIX_FMT_XBGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
87 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS, 87 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
88 1, { 32, 0, 0 }, false, false, 1, 1, false }, 88 1, { 32, 0, 0 }, false, false, 1, 1, false },
89 { V4L2_PIX_FMT_ARGB32, V4L2_MBUS_FMT_ARGB8888_1X32, 89 { V4L2_PIX_FMT_ARGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
90 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 90 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
91 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 91 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
92 1, { 32, 0, 0 }, false, false, 1, 1, true }, 92 1, { 32, 0, 0 }, false, false, 1, 1, true },
93 { V4L2_PIX_FMT_XRGB32, V4L2_MBUS_FMT_ARGB8888_1X32, 93 { V4L2_PIX_FMT_XRGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
94 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 94 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
95 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 95 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
96 1, { 32, 0, 0 }, false, false, 1, 1, false }, 96 1, { 32, 0, 0 }, false, false, 1, 1, false },
97 { V4L2_PIX_FMT_UYVY, V4L2_MBUS_FMT_AYUV8_1X32, 97 { V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32,
98 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 98 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
99 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 99 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
100 1, { 16, 0, 0 }, false, false, 2, 1, false }, 100 1, { 16, 0, 0 }, false, false, 2, 1, false },
101 { V4L2_PIX_FMT_VYUY, V4L2_MBUS_FMT_AYUV8_1X32, 101 { V4L2_PIX_FMT_VYUY, MEDIA_BUS_FMT_AYUV8_1X32,
102 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 102 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
103 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 103 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
104 1, { 16, 0, 0 }, false, true, 2, 1, false }, 104 1, { 16, 0, 0 }, false, true, 2, 1, false },
105 { V4L2_PIX_FMT_YUYV, V4L2_MBUS_FMT_AYUV8_1X32, 105 { V4L2_PIX_FMT_YUYV, MEDIA_BUS_FMT_AYUV8_1X32,
106 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 106 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
107 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 107 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
108 1, { 16, 0, 0 }, true, false, 2, 1, false }, 108 1, { 16, 0, 0 }, true, false, 2, 1, false },
109 { V4L2_PIX_FMT_YVYU, V4L2_MBUS_FMT_AYUV8_1X32, 109 { V4L2_PIX_FMT_YVYU, MEDIA_BUS_FMT_AYUV8_1X32,
110 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 110 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
111 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 111 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
112 1, { 16, 0, 0 }, true, true, 2, 1, false }, 112 1, { 16, 0, 0 }, true, true, 2, 1, false },
113 { V4L2_PIX_FMT_NV12M, V4L2_MBUS_FMT_AYUV8_1X32, 113 { V4L2_PIX_FMT_NV12M, MEDIA_BUS_FMT_AYUV8_1X32,
114 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 114 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
115 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 115 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
116 2, { 8, 16, 0 }, false, false, 2, 2, false }, 116 2, { 8, 16, 0 }, false, false, 2, 2, false },
117 { V4L2_PIX_FMT_NV21M, V4L2_MBUS_FMT_AYUV8_1X32, 117 { V4L2_PIX_FMT_NV21M, MEDIA_BUS_FMT_AYUV8_1X32,
118 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 118 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
119 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 119 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
120 2, { 8, 16, 0 }, false, true, 2, 2, false }, 120 2, { 8, 16, 0 }, false, true, 2, 2, false },
121 { V4L2_PIX_FMT_NV16M, V4L2_MBUS_FMT_AYUV8_1X32, 121 { V4L2_PIX_FMT_NV16M, MEDIA_BUS_FMT_AYUV8_1X32,
122 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 122 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
123 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 123 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
124 2, { 8, 16, 0 }, false, false, 2, 1, false }, 124 2, { 8, 16, 0 }, false, false, 2, 1, false },
125 { V4L2_PIX_FMT_NV61M, V4L2_MBUS_FMT_AYUV8_1X32, 125 { V4L2_PIX_FMT_NV61M, MEDIA_BUS_FMT_AYUV8_1X32,
126 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 126 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
127 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 127 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
128 2, { 8, 16, 0 }, false, true, 2, 1, false }, 128 2, { 8, 16, 0 }, false, true, 2, 1, false },
129 { V4L2_PIX_FMT_YUV420M, V4L2_MBUS_FMT_AYUV8_1X32, 129 { V4L2_PIX_FMT_YUV420M, MEDIA_BUS_FMT_AYUV8_1X32,
130 VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 130 VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
131 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 131 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
132 3, { 8, 8, 8 }, false, false, 2, 2, false }, 132 3, { 8, 8, 8 }, false, false, 2, 2, false },